VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp@ 44899

Last change on this file since 44899 was 44899, checked in by vboxsync, 12 years ago

More PCI BM access cleanups.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 30.4 KB
Line 
1/* $Id: PDMRCDevice.cpp 44899 2013-03-01 22:28:43Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, RC Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/vm.h>
28#include <VBox/vmm/vmm.h>
29#include <VBox/vmm/patm.h>
30
31#include <VBox/log.h>
32#include <VBox/err.h>
33#include <iprt/asm.h>
34#include <iprt/assert.h>
35#include <iprt/string.h>
36
37#include "dtrace/VBoxVMM.h"
38#include "PDMInline.h"
39
40
41/*******************************************************************************
42* Global Variables *
43*******************************************************************************/
44RT_C_DECLS_BEGIN
45extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp;
46extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp;
47extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp;
48extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp;
49extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp;
50extern DECLEXPORT(const PDMHPETHLPRC) g_pdmRCHpetHlp;
51extern DECLEXPORT(const PDMDRVHLPRC) g_pdmRCDrvHlp;
52/** @todo missing PDMPCIRAWHLPRC */
53RT_C_DECLS_END
54
55
56/*******************************************************************************
57* Internal Functions *
58*******************************************************************************/
59static bool pdmRCIsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc);
60
61
62/** @name Raw-Mode Context Device Helpers
63 * @{
64 */
65
66/** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysRead} */
67static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70
71 /*
72 * Just check the busmaster setting here and forward the request to the generic read helper.
73 */
74 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
75 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
76
77 if (!PCIDevIsBusmaster(pPciDev))
78 {
79 Log(("pdmRCDevHlp_PCIPhysRead: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
80 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
81 return VERR_PDM_NOT_PCI_BUS_MASTER;
82 }
83
84 return pDevIns->pHlpRC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
85}
86
87
88/** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysRead} */
89static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
90{
91 PDMDEV_ASSERT_DEVINS(pDevIns);
92
93 /*
94 * Just check the busmaster setting here and forward the request to the generic read helper.
95 */
96 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
97 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
98
99 if (!PCIDevIsBusmaster(pPciDev))
100 {
101 Log(("pdmRCDevHlp_PCIPhysWrite: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
102 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
103 return VERR_PDM_NOT_PCI_BUS_MASTER;
104 }
105
106 return pDevIns->pHlpRC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
107}
108
109
110/** @interface_method_impl{PDMDEVHLPRC,pfnPCISetIrq} */
111static DECLCALLBACK(void) pdmRCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
112{
113 PDMDEV_ASSERT_DEVINS(pDevIns);
114 LogFlow(("pdmRCDevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
115
116 PVM pVM = pDevIns->Internal.s.pVMRC;
117 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceRC;
118 PPDMPCIBUS pPciBus = pDevIns->Internal.s.pPciBusRC;
119
120 pdmLock(pVM);
121 uint32_t uTagSrc;
122 if (iLevel & PDM_IRQ_LEVEL_HIGH)
123 {
124 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
125 if (iLevel == PDM_IRQ_LEVEL_HIGH)
126 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
127 else
128 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
129 }
130 else
131 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
132
133 if ( pPciDev
134 && pPciBus
135 && pPciBus->pDevInsRC)
136 {
137 pPciBus->pfnSetIrqRC(pPciBus->pDevInsRC, pPciDev, iIrq, iLevel, uTagSrc);
138
139 pdmUnlock(pVM);
140
141 if (iLevel == PDM_IRQ_LEVEL_LOW)
142 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
143 }
144 else
145 {
146 pdmUnlock(pVM);
147
148 /* queue for ring-3 execution. */
149 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
150 AssertReturnVoid(pTask);
151
152 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
153 pTask->pDevInsR3 = PDMDEVINS_2_R3PTR(pDevIns);
154 pTask->u.SetIRQ.iIrq = iIrq;
155 pTask->u.SetIRQ.iLevel = iLevel;
156 pTask->u.SetIRQ.uTagSrc = uTagSrc;
157
158 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
159 }
160
161 LogFlow(("pdmRCDevHlp_PCISetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
162}
163
164
165/** @interface_method_impl{PDMDRVHLPRC,pfnPCISetIrq} */
166static DECLCALLBACK(void) pdmRCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
167{
168 PDMDEV_ASSERT_DEVINS(pDevIns);
169 LogFlow(("pdmRCDevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
170 PVM pVM = pDevIns->Internal.s.pVMRC;
171
172 pdmLock(pVM);
173 uint32_t uTagSrc;
174 if (iLevel & PDM_IRQ_LEVEL_HIGH)
175 {
176 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
177 if (iLevel == PDM_IRQ_LEVEL_HIGH)
178 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
179 else
180 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
181 }
182 else
183 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
184
185 bool fRc = pdmRCIsaSetIrq(pVM, iIrq, iLevel, uTagSrc);
186
187 if (iLevel == PDM_IRQ_LEVEL_LOW && fRc)
188 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
189 pdmUnlock(pVM);
190 LogFlow(("pdmRCDevHlp_ISASetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
191}
192
193
194/** @interface_method_impl{PDMDEVHLPRC,pfnPhysRead} */
195static DECLCALLBACK(int) pdmRCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
196{
197 PDMDEV_ASSERT_DEVINS(pDevIns);
198 LogFlow(("pdmRCDevHlp_PhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
199 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
200
201 int rc = PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead);
202 AssertRC(rc); /** @todo track down the users for this bugger. */
203
204 Log(("pdmRCDevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));
205 return rc;
206}
207
208
209/** @interface_method_impl{PDMDEVHLPRC,pfnPhysWrite} */
210static DECLCALLBACK(int) pdmRCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
211{
212 PDMDEV_ASSERT_DEVINS(pDevIns);
213 LogFlow(("pdmRCDevHlp_PhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
214 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
215
216 int rc = PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite);
217 AssertRC(rc); /** @todo track down the users for this bugger. */
218
219 Log(("pdmRCDevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, rc));
220 return rc;
221}
222
223
224/** @interface_method_impl{PDMDEVHLPRC,pfnA20IsEnabled} */
225static DECLCALLBACK(bool) pdmRCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 LogFlow(("pdmRCDevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
229
230 bool fEnabled = PGMPhysIsA20Enabled(VMMGetCpu0(pDevIns->Internal.s.pVMRC));
231
232 Log(("pdmRCDevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
233 return fEnabled;
234}
235
236
237/** @interface_method_impl{PDMDEVHLPRC,pfnVMState} */
238static DECLCALLBACK(VMSTATE) pdmRCDevHlp_VMState(PPDMDEVINS pDevIns)
239{
240 PDMDEV_ASSERT_DEVINS(pDevIns);
241
242 VMSTATE enmVMState = pDevIns->Internal.s.pVMRC->enmVMState;
243
244 LogFlow(("pdmRCDevHlp_VMState: caller=%p/%d: returns %d\n", pDevIns, pDevIns->iInstance, enmVMState));
245 return enmVMState;
246}
247
248
249/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetError} */
250static DECLCALLBACK(int) pdmRCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
251{
252 PDMDEV_ASSERT_DEVINS(pDevIns);
253 va_list args;
254 va_start(args, pszFormat);
255 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
256 va_end(args);
257 return rc;
258}
259
260
261/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetErrorV} */
262static DECLCALLBACK(int) pdmRCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
263{
264 PDMDEV_ASSERT_DEVINS(pDevIns);
265 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
266 return rc;
267}
268
269
270/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetRuntimeError} */
271static DECLCALLBACK(int) pdmRCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
272{
273 PDMDEV_ASSERT_DEVINS(pDevIns);
274 va_list va;
275 va_start(va, pszFormat);
276 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
277 va_end(va);
278 return rc;
279}
280
281
282/** @interface_method_impl{PDMDEVHLPRC,pfnVMSetErrorV} */
283static DECLCALLBACK(int) pdmRCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
284{
285 PDMDEV_ASSERT_DEVINS(pDevIns);
286 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
287 return rc;
288}
289
290
291/** @interface_method_impl{PDMDEVHLPRC,pfnPATMSetMMIOPatchInfo} */
292static DECLCALLBACK(int) pdmRCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
293{
294 PDMDEV_ASSERT_DEVINS(pDevIns);
295 LogFlow(("pdmRCDevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
296
297 return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMRC, GCPhys, (RTRCPTR)(uintptr_t)pCachedData);
298}
299
300
301/** @interface_method_impl{PDMDEVHLPRC,pfnGetVM} */
302static DECLCALLBACK(PVM) pdmRCDevHlp_GetVM(PPDMDEVINS pDevIns)
303{
304 PDMDEV_ASSERT_DEVINS(pDevIns);
305 LogFlow(("pdmRCDevHlp_GetVM: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
306 return pDevIns->Internal.s.pVMRC;
307}
308
309
310/** @interface_method_impl{PDMDEVHLPRC,pfnGetVMCPU} */
311static DECLCALLBACK(PVMCPU) pdmRCDevHlp_GetVMCPU(PPDMDEVINS pDevIns)
312{
313 PDMDEV_ASSERT_DEVINS(pDevIns);
314 LogFlow(("pdmRCDevHlp_GetVMCPU: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
315 return VMMGetCpu(pDevIns->Internal.s.pVMRC);
316}
317
318
319/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGet} */
320static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
321{
322 PDMDEV_ASSERT_DEVINS(pDevIns);
323 LogFlow(("pdmRCDevHlp_TMTimeVirtGet: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
324 return TMVirtualGet(pDevIns->Internal.s.pVMRC);
325}
326
327
328/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGetFreq} */
329static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
330{
331 PDMDEV_ASSERT_DEVINS(pDevIns);
332 LogFlow(("pdmRCDevHlp_TMTimeVirtGetFreq: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
333 return TMVirtualGetFreq(pDevIns->Internal.s.pVMRC);
334}
335
336
337/** @interface_method_impl{PDMDEVHLPRC,pfnTMTimeVirtGetNano} */
338static DECLCALLBACK(uint64_t) pdmRCDevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
339{
340 PDMDEV_ASSERT_DEVINS(pDevIns);
341 LogFlow(("pdmRCDevHlp_TMTimeVirtGetNano: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
342 return TMVirtualToNano(pDevIns->Internal.s.pVMRC, TMVirtualGet(pDevIns->Internal.s.pVMRC));
343}
344
345
346/** @interface_method_impl{PDMDEVHLPRC,pfnDBGFTraceBuf} */
347static DECLCALLBACK(RTTRACEBUF) pdmRCDevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
348{
349 PDMDEV_ASSERT_DEVINS(pDevIns);
350 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMRC->hTraceBufRC;
351 LogFlow(("pdmRCDevHlp_DBGFTraceBuf: caller='%p'/%d: returns %p\n", pDevIns, pDevIns->iInstance, hTraceBuf));
352 return hTraceBuf;
353}
354
355
356/**
357 * The Raw-Mode Context Device Helper Callbacks.
358 */
359extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp =
360{
361 PDM_DEVHLPRC_VERSION,
362 pdmRCDevHlp_PCIPhysRead,
363 pdmRCDevHlp_PCIPhysWrite,
364 pdmRCDevHlp_PCISetIrq,
365 pdmRCDevHlp_ISASetIrq,
366 pdmRCDevHlp_PhysRead,
367 pdmRCDevHlp_PhysWrite,
368 pdmRCDevHlp_A20IsEnabled,
369 pdmRCDevHlp_VMState,
370 pdmRCDevHlp_VMSetError,
371 pdmRCDevHlp_VMSetErrorV,
372 pdmRCDevHlp_VMSetRuntimeError,
373 pdmRCDevHlp_VMSetRuntimeErrorV,
374 pdmRCDevHlp_PATMSetMMIOPatchInfo,
375 pdmRCDevHlp_GetVM,
376 pdmRCDevHlp_GetVMCPU,
377 pdmRCDevHlp_TMTimeVirtGet,
378 pdmRCDevHlp_TMTimeVirtGetFreq,
379 pdmRCDevHlp_TMTimeVirtGetNano,
380 pdmRCDevHlp_DBGFTraceBuf,
381 PDM_DEVHLPRC_VERSION
382};
383
384/** @} */
385
386
387
388
389/** @name PIC RC Helpers
390 * @{
391 */
392
393/** @interface_method_impl{PDMPICHLPGC,pfnSetInterruptFF} */
394static DECLCALLBACK(void) pdmRCPicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
395{
396 PDMDEV_ASSERT_DEVINS(pDevIns);
397 PVM pVM = pDevIns->Internal.s.pVMRC;
398
399 if (pVM->pdm.s.Apic.pfnLocalInterruptRC)
400 {
401 LogFlow(("pdmRCPicHlp_SetInterruptFF: caller='%p'/%d: Setting local interrupt on LAPIC\n",
402 pDevIns, pDevIns->iInstance));
403 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
404 pVM->pdm.s.Apic.pfnLocalInterruptRC(pVM->pdm.s.Apic.pDevInsRC, 0, 1);
405 return;
406 }
407
408 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
409
410 LogFlow(("pdmRCPicHlp_SetInterruptFF: caller=%p/%d: VMMCPU_FF_INTERRUPT_PIC %d -> 1\n",
411 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
412
413 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
414}
415
416
417/** @interface_method_impl{PDMPICHLPGC,pfnClearInterruptFF} */
418static DECLCALLBACK(void) pdmRCPicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
419{
420 PDMDEV_ASSERT_DEVINS(pDevIns);
421 PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
422
423 if (pVM->pdm.s.Apic.pfnLocalInterruptRC)
424 {
425 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
426 LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller='%s'/%d: Clearing local interrupt on LAPIC\n",
427 pDevIns, pDevIns->iInstance));
428 /* Lower the LAPIC's LINT0 line instead of signaling the CPU directly. */
429 pVM->pdm.s.Apic.pfnLocalInterruptRC(pVM->pdm.s.Apic.pDevInsRC, 0, 0);
430 return;
431 }
432
433 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
434
435 LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller=%p/%d: VMCPU_FF_INTERRUPT_PIC %d -> 0\n",
436 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
437
438 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
439}
440
441
442/** @interface_method_impl{PDMPICHLPGC,pfnLock} */
443static DECLCALLBACK(int) pdmRCPicHlp_Lock(PPDMDEVINS pDevIns, int rc)
444{
445 PDMDEV_ASSERT_DEVINS(pDevIns);
446 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
447}
448
449
450/** @interface_method_impl{PDMPICHLPGC,pfnUnlock} */
451static DECLCALLBACK(void) pdmRCPicHlp_Unlock(PPDMDEVINS pDevIns)
452{
453 PDMDEV_ASSERT_DEVINS(pDevIns);
454 pdmUnlock(pDevIns->Internal.s.pVMRC);
455}
456
457
458/**
459 * The Raw-Mode Context PIC Helper Callbacks.
460 */
461extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp =
462{
463 PDM_PICHLPRC_VERSION,
464 pdmRCPicHlp_SetInterruptFF,
465 pdmRCPicHlp_ClearInterruptFF,
466 pdmRCPicHlp_Lock,
467 pdmRCPicHlp_Unlock,
468 PDM_PICHLPRC_VERSION
469};
470
471/** @} */
472
473
474
475
476/** @name APIC RC Helpers
477 * @{
478 */
479
480/** @interface_method_impl{PDMAPICHLPRC,pfnSetInterruptFF} */
481static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
482{
483 PDMDEV_ASSERT_DEVINS(pDevIns);
484 PVM pVM = pDevIns->Internal.s.pVMRC;
485 PVMCPU pVCpu = &pVM->aCpus[idCpu];
486
487 AssertReturnVoid(idCpu < pVM->cCpus);
488
489 LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
490 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
491 switch (enmType)
492 {
493 case PDMAPICIRQ_HARDWARE:
494 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
495 break;
496 case PDMAPICIRQ_NMI:
497 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
498 break;
499 case PDMAPICIRQ_SMI:
500 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
501 break;
502 case PDMAPICIRQ_EXTINT:
503 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
504 break;
505 default:
506 AssertMsgFailed(("enmType=%d\n", enmType));
507 break;
508 }
509}
510
511
512/** @interface_method_impl{PDMAPICHLPRC,pfnClearInterruptFF} */
513static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
514{
515 PDMDEV_ASSERT_DEVINS(pDevIns);
516 PVM pVM = pDevIns->Internal.s.pVMRC;
517 PVMCPU pVCpu = &pVM->aCpus[idCpu];
518
519 AssertReturnVoid(idCpu < pVM->cCpus);
520
521 LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
522 pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
523
524 /* Note: NMI/SMI can't be cleared. */
525 switch (enmType)
526 {
527 case PDMAPICIRQ_HARDWARE:
528 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
529 break;
530 case PDMAPICIRQ_EXTINT:
531 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
532 break;
533 default:
534 AssertMsgFailed(("enmType=%d\n", enmType));
535 break;
536 }
537}
538
539
540/** @interface_method_impl{PDMAPICHLPRC,pfnCalcIrqTag} */
541static DECLCALLBACK(uint32_t) pdmRCApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
542{
543 PDMDEV_ASSERT_DEVINS(pDevIns);
544 PVM pVM = pDevIns->Internal.s.pVMRC;
545
546 pdmLock(pVM);
547
548 uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
549 if (u8Level == PDM_IRQ_LEVEL_HIGH)
550 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
551 else
552 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
553
554
555 pdmUnlock(pVM);
556 LogFlow(("pdmRCApicHlp_CalcIrqTag: caller=%p/%d: returns %#x (u8Level=%d)\n",
557 pDevIns, pDevIns->iInstance, uTagSrc, u8Level));
558 return uTagSrc;
559}
560
561
562/** @interface_method_impl{PDMAPICHLPRC,pfnChangeFeature} */
563static DECLCALLBACK(void) pdmRCApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
564{
565 PDMDEV_ASSERT_DEVINS(pDevIns);
566 LogFlow(("pdmRCApicHlp_ChangeFeature: caller=%p/%d: version=%d\n", pDevIns, pDevIns->iInstance, (int)enmVersion));
567 switch (enmVersion)
568 {
569 case PDMAPICVERSION_NONE:
570 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
571 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
572 break;
573 case PDMAPICVERSION_APIC:
574 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
575 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
576 break;
577 case PDMAPICVERSION_X2APIC:
578 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_X2APIC);
579 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
580 break;
581 default:
582 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
583 }
584}
585
586
587/** @interface_method_impl{PDMAPICHLPRC,pfnLock} */
588static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
589{
590 PDMDEV_ASSERT_DEVINS(pDevIns);
591 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
592}
593
594
595/** @interface_method_impl{PDMAPICHLPRC,pfnUnlock} */
596static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)
597{
598 PDMDEV_ASSERT_DEVINS(pDevIns);
599 pdmUnlock(pDevIns->Internal.s.pVMRC);
600}
601
602
603/** @interface_method_impl{PDMAPICHLPRC,pfnGetCpuId} */
604static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns)
605{
606 PDMDEV_ASSERT_DEVINS(pDevIns);
607 return VMMGetCpuId(pDevIns->Internal.s.pVMRC);
608}
609
610
611/**
612 * The Raw-Mode Context APIC Helper Callbacks.
613 */
614extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =
615{
616 PDM_APICHLPRC_VERSION,
617 pdmRCApicHlp_SetInterruptFF,
618 pdmRCApicHlp_ClearInterruptFF,
619 pdmRCApicHlp_CalcIrqTag,
620 pdmRCApicHlp_ChangeFeature,
621 pdmRCApicHlp_Lock,
622 pdmRCApicHlp_Unlock,
623 pdmRCApicHlp_GetCpuId,
624 PDM_APICHLPRC_VERSION
625};
626
627/** @} */
628
629
630
631
632/** @name I/O APIC RC Helpers
633 * @{
634 */
635
636/** @interface_method_impl{PDMIOAPICHLPRC,pfnApicBusDeliver} */
637static DECLCALLBACK(int) pdmRCIoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
638 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)
639{
640 PDMDEV_ASSERT_DEVINS(pDevIns);
641 PVM pVM = pDevIns->Internal.s.pVMRC;
642 LogFlow(("pdmRCIoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
643 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc));
644 Assert(pVM->pdm.s.Apic.pDevInsRC);
645 if (pVM->pdm.s.Apic.pfnBusDeliverRC)
646 return pVM->pdm.s.Apic.pfnBusDeliverRC(pVM->pdm.s.Apic.pDevInsRC, u8Dest, u8DestMode, u8DeliveryMode, iVector,
647 u8Polarity, u8TriggerMode, uTagSrc);
648 return VINF_SUCCESS;
649}
650
651
652/** @interface_method_impl{PDMIOAPICHLPRC,pfnLock} */
653static DECLCALLBACK(int) pdmRCIoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
654{
655 PDMDEV_ASSERT_DEVINS(pDevIns);
656 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
657}
658
659
660/** @interface_method_impl{PDMIOAPICHLPRC,pfnUnlock} */
661static DECLCALLBACK(void) pdmRCIoApicHlp_Unlock(PPDMDEVINS pDevIns)
662{
663 PDMDEV_ASSERT_DEVINS(pDevIns);
664 pdmUnlock(pDevIns->Internal.s.pVMRC);
665}
666
667
668/**
669 * The Raw-Mode Context I/O APIC Helper Callbacks.
670 */
671extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp =
672{
673 PDM_IOAPICHLPRC_VERSION,
674 pdmRCIoApicHlp_ApicBusDeliver,
675 pdmRCIoApicHlp_Lock,
676 pdmRCIoApicHlp_Unlock,
677 PDM_IOAPICHLPRC_VERSION
678};
679
680/** @} */
681
682
683
684
685/** @name PCI Bus RC Helpers
686 * @{
687 */
688
689/** @interface_method_impl{PDMPCIHLPRC,pfnIsaSetIrq} */
690static DECLCALLBACK(void) pdmRCPciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
691{
692 PDMDEV_ASSERT_DEVINS(pDevIns);
693 Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
694 PVM pVM = pDevIns->Internal.s.pVMRC;
695
696 pdmLock(pVM);
697 pdmRCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel, uTagSrc);
698 pdmUnlock(pVM);
699}
700
701
702/** @interface_method_impl{PDMPCIHLPRC,pfnIoApicSetIrq} */
703static DECLCALLBACK(void) pdmRCPciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
704{
705 PDMDEV_ASSERT_DEVINS(pDevIns);
706 Log4(("pdmRCPciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
707 PVM pVM = pDevIns->Internal.s.pVMRC;
708
709 if (pVM->pdm.s.IoApic.pDevInsRC)
710 {
711 pdmLock(pVM);
712 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel, uTagSrc);
713 pdmUnlock(pVM);
714 }
715 else if (pVM->pdm.s.IoApic.pDevInsR3)
716 {
717 /* queue for ring-3 execution. */
718 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
719 if (pTask)
720 {
721 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
722 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
723 pTask->u.SetIRQ.iIrq = iIrq;
724 pTask->u.SetIRQ.iLevel = iLevel;
725 pTask->u.SetIRQ.uTagSrc = uTagSrc;
726
727 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
728 }
729 else
730 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
731 }
732}
733
734
735/** @interface_method_impl{PDMPCIHLPRC,pfnIoApicSendMsi} */
736static DECLCALLBACK(void) pdmRCPciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
737{
738 PDMDEV_ASSERT_DEVINS(pDevIns);
739 Log4(("pdmRCPciHlp_IoApicSendMsi: GCPhys=%p uValue=%d uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
740 PVM pVM = pDevIns->Internal.s.pVMRC;
741
742 if (pVM->pdm.s.IoApic.pDevInsRC)
743 {
744 pdmLock(pVM);
745 pVM->pdm.s.IoApic.pfnSendMsiRC(pVM->pdm.s.IoApic.pDevInsRC, GCPhys, uValue, uTagSrc);
746 pdmUnlock(pVM);
747 }
748 else
749 {
750 AssertFatalMsgFailed(("Lazy bastarts!"));
751 }
752}
753
754
755/** @interface_method_impl{PDMPCIHLPRC,pfnLock} */
756static DECLCALLBACK(int) pdmRCPciHlp_Lock(PPDMDEVINS pDevIns, int rc)
757{
758 PDMDEV_ASSERT_DEVINS(pDevIns);
759 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
760}
761
762
763/** @interface_method_impl{PDMPCIHLPRC,pfnUnlock} */
764static DECLCALLBACK(void) pdmRCPciHlp_Unlock(PPDMDEVINS pDevIns)
765{
766 PDMDEV_ASSERT_DEVINS(pDevIns);
767 pdmUnlock(pDevIns->Internal.s.pVMRC);
768}
769
770
771/**
772 * The Raw-Mode Context PCI Bus Helper Callbacks.
773 */
774extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp =
775{
776 PDM_PCIHLPRC_VERSION,
777 pdmRCPciHlp_IsaSetIrq,
778 pdmRCPciHlp_IoApicSetIrq,
779 pdmRCPciHlp_IoApicSendMsi,
780 pdmRCPciHlp_Lock,
781 pdmRCPciHlp_Unlock,
782 PDM_PCIHLPRC_VERSION, /* the end */
783};
784
785/** @} */
786
787
788
789
790/** @name HPET RC Helpers
791 * @{
792 */
793
794
795/**
796 * The Raw-Mode Context HPET Helper Callbacks.
797 */
798extern DECLEXPORT(const PDMHPETHLPRC) g_pdmRCHpetHlp =
799{
800 PDM_HPETHLPRC_VERSION,
801 PDM_HPETHLPRC_VERSION, /* the end */
802};
803
804/** @} */
805
806
807
808
809/** @name Raw-Mode Context Driver Helpers
810 * @{
811 */
812
813/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetError} */
814static DECLCALLBACK(int) pdmRCDrvHlp_VMSetError(PPDMDRVINS pDrvIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
815{
816 PDMDRV_ASSERT_DRVINS(pDrvIns);
817 va_list args;
818 va_start(args, pszFormat);
819 int rc2 = VMSetErrorV(pDrvIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
820 va_end(args);
821 return rc;
822}
823
824
825/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetErrorV} */
826static DECLCALLBACK(int) pdmRCDrvHlp_VMSetErrorV(PPDMDRVINS pDrvIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
827{
828 PDMDRV_ASSERT_DRVINS(pDrvIns);
829 int rc2 = VMSetErrorV(pDrvIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
830 return rc;
831}
832
833
834/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetRuntimeError} */
835static DECLCALLBACK(int) pdmRCDrvHlp_VMSetRuntimeError(PPDMDRVINS pDrvIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
836{
837 PDMDRV_ASSERT_DRVINS(pDrvIns);
838 va_list va;
839 va_start(va, pszFormat);
840 int rc = VMSetRuntimeErrorV(pDrvIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
841 va_end(va);
842 return rc;
843}
844
845
846/** @interface_method_impl{PDMDRVHLPRC,pfnVMSetErrorV} */
847static DECLCALLBACK(int) pdmRCDrvHlp_VMSetRuntimeErrorV(PPDMDRVINS pDrvIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
848{
849 PDMDRV_ASSERT_DRVINS(pDrvIns);
850 int rc = VMSetRuntimeErrorV(pDrvIns->Internal.s.pVMRC, fFlags, pszErrorId, pszFormat, va);
851 return rc;
852}
853
854
855/** @interface_method_impl{PDMDRVHLPRC,pfnAssertEMT} */
856static DECLCALLBACK(bool) pdmRCDrvHlp_AssertEMT(PPDMDRVINS pDrvIns, const char *pszFile, unsigned iLine, const char *pszFunction)
857{
858 PDMDRV_ASSERT_DRVINS(pDrvIns);
859 if (VM_IS_EMT(pDrvIns->Internal.s.pVMRC))
860 return true;
861
862 RTAssertMsg1Weak("AssertEMT", iLine, pszFile, pszFunction);
863 RTAssertPanic();
864 return false;
865}
866
867
868/** @interface_method_impl{PDMDRVHLPRC,pfnAssertOther} */
869static DECLCALLBACK(bool) pdmRCDrvHlp_AssertOther(PPDMDRVINS pDrvIns, const char *pszFile, unsigned iLine, const char *pszFunction)
870{
871 PDMDRV_ASSERT_DRVINS(pDrvIns);
872 if (!VM_IS_EMT(pDrvIns->Internal.s.pVMRC))
873 return true;
874
875 /* Note: While we don't have any other threads but EMT(0) in RC, might
876 still have drive code compiled in which it shouldn't execute. */
877 RTAssertMsg1Weak("AssertOther", iLine, pszFile, pszFunction);
878 RTAssertPanic();
879 return false;
880}
881
882
883/** @interface_method_impl{PDMDRVHLPRC,pfnFTSetCheckpoint} */
884static DECLCALLBACK(int) pdmRCDrvHlp_FTSetCheckpoint(PPDMDRVINS pDrvIns, FTMCHECKPOINTTYPE enmType)
885{
886 PDMDRV_ASSERT_DRVINS(pDrvIns);
887 return FTMSetCheckpoint(pDrvIns->Internal.s.pVMRC, enmType);
888}
889
890
891/**
892 * The Raw-Mode Context Driver Helper Callbacks.
893 */
894extern DECLEXPORT(const PDMDRVHLPRC) g_pdmRCDrvHlp =
895{
896 PDM_DRVHLPRC_VERSION,
897 pdmRCDrvHlp_VMSetError,
898 pdmRCDrvHlp_VMSetErrorV,
899 pdmRCDrvHlp_VMSetRuntimeError,
900 pdmRCDrvHlp_VMSetRuntimeErrorV,
901 pdmRCDrvHlp_AssertEMT,
902 pdmRCDrvHlp_AssertOther,
903 pdmRCDrvHlp_FTSetCheckpoint,
904 PDM_DRVHLPRC_VERSION
905};
906
907/** @} */
908
909
910
911
912/**
913 * Sets an irq on the PIC and I/O APIC.
914 *
915 * @returns true if delivered, false if postponed.
916 * @param pVM Pointer to the VM.
917 * @param iIrq The irq.
918 * @param iLevel The new level.
919 * @param uTagSrc The IRQ tag and source.
920 *
921 * @remarks The caller holds the PDM lock.
922 */
923static bool pdmRCIsaSetIrq(PVM pVM, int iIrq, int iLevel, uint32_t uTagSrc)
924{
925 if (RT_LIKELY( ( pVM->pdm.s.IoApic.pDevInsRC
926 || !pVM->pdm.s.IoApic.pDevInsR3)
927 && ( pVM->pdm.s.Pic.pDevInsRC
928 || !pVM->pdm.s.Pic.pDevInsR3)))
929 {
930 if (pVM->pdm.s.Pic.pDevInsRC)
931 pVM->pdm.s.Pic.pfnSetIrqRC(pVM->pdm.s.Pic.pDevInsRC, iIrq, iLevel, uTagSrc);
932 if (pVM->pdm.s.IoApic.pDevInsRC)
933 pVM->pdm.s.IoApic.pfnSetIrqRC(pVM->pdm.s.IoApic.pDevInsRC, iIrq, iLevel, uTagSrc);
934 return true;
935 }
936
937 /* queue for ring-3 execution. */
938 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pVM->pdm.s.pDevHlpQueueRC);
939 AssertReturn(pTask, false);
940
941 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
942 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
943 pTask->u.SetIRQ.iIrq = iIrq;
944 pTask->u.SetIRQ.iLevel = iLevel;
945 pTask->u.SetIRQ.uTagSrc = uTagSrc;
946
947 PDMQueueInsertEx(pVM->pdm.s.pDevHlpQueueRC, &pTask->Core, 0);
948 return false;
949}
950
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