IOMRC.cpp@ 69296

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1	/* $Id: IOMRC.cpp 69111 2017-10-17 14:26:02Z vboxsync $ */
2	/** @file
3	* IOM - Input / Output Monitor - Raw-Mode Context.
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_IOM
23	#include <VBox/vmm/iom.h>
24	#include <VBox/vmm/cpum.h>
25	#include <VBox/vmm/pgm.h>
26	#include <VBox/vmm/selm.h>
27	#include <VBox/vmm/mm.h>
28	#include <VBox/vmm/em.h>
29	#include <VBox/vmm/iem.h>
30	#include <VBox/vmm/pgm.h>
31	#include <VBox/vmm/trpm.h>
32	#include "IOMInternal.h"
33	#include <VBox/vmm/vm.h>
34
35	#include <VBox/dis.h>
36	#include <VBox/disopcode.h>
37	#include <VBox/param.h>
38	#include <VBox/err.h>
39	#include <iprt/assert.h>
40	#include <VBox/log.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43
44
45	/**
46	* Converts disassembler mode to IEM mode.
47	* @return IEM CPU mode.
48	* @param enmDisMode Disassembler CPU mode.
49	*/
50	DECLINLINE(IEMMODE) iomDisModeToIemMode(DISCPUMODE enmDisMode)
51	{
52	switch (enmDisMode)
53	{
54	case DISCPUMODE_16BIT: return IEMMODE_16BIT;
55	case DISCPUMODE_32BIT: return IEMMODE_32BIT;
56	case DISCPUMODE_64BIT: return IEMMODE_64BIT;
57	default:
58	AssertFailed();
59	return IEMMODE_32BIT;
60	}
61	}
62
63
64	/**
65	* IN <AL\|AX\|EAX>, <DX\|imm16>
66	*
67	* @returns Strict VBox status code. Informational status codes other than the one documented
68	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
69	* @retval VINF_SUCCESS Success.
70	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
71	* status code must be passed on to EM.
72	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
73	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
74	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
75	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
76	*
77	* @param pVM The cross context VM structure.
78	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
79	* @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
80	* @param pCpu Disassembler CPU state.
81	*/
82	static VBOXSTRICTRC iomRCInterpretIN(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
83	{
84	STAM_COUNTER_INC(&pVM->iom.s.StatInstIn); RT_NOREF_PV(pVM);
85	Assert(pCpu->Param2.fUse & (DISUSE_IMMEDIATE8 \| DISUSE_REG_GEN16));
86	uint16_t u16Port = pCpu->Param2.fUse & DISUSE_REG_GEN16 ? pRegFrame->dx : (uint16_t)pCpu->Param2.uValue;
87
88	Assert(pCpu->Param1.fUse & (DISUSE_REG_GEN32 \| DISUSE_REG_GEN16 \| DISUSE_REG_GEN8));
89	uint8_t cbValue = pCpu->Param1.fUse & DISUSE_REG_GEN32 ? 4 : pCpu->Param1.fUse & DISUSE_REG_GEN16 ? 2 : 1;
90
91	return IEMExecDecodedIn(pVCpu, pCpu->cbInstr, u16Port, cbValue);
92	}
93
94
95	/**
96	* OUT <DX\|imm16>, <AL\|AX\|EAX>
97	*
98	* @returns Strict VBox status code. Informational status codes other than the one documented
99	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
100	* @retval VINF_SUCCESS Success.
101	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
102	* status code must be passed on to EM.
103	* @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
104	* @retval VINF_IOM_R3_IOPORT_COMMIT_WRITE Defer the write to ring-3. (R0/GC only)
105	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
106	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
107	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
108	*
109	* @param pVM The cross context VM structure.
110	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
111	* @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
112	* @param pCpu Disassembler CPU state.
113	*/
114	static VBOXSTRICTRC iomRCInterpretOUT(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
115	{
116	STAM_COUNTER_INC(&pVM->iom.s.StatInstOut); RT_NOREF_PV(pVM);
117	Assert(pCpu->Param1.fUse & (DISUSE_IMMEDIATE8 \| DISUSE_REG_GEN16));
118	uint16_t const u16Port = pCpu->Param1.fUse & DISUSE_REG_GEN16 ? pRegFrame->dx : (uint16_t)pCpu->Param1.uValue;
119
120	Assert(pCpu->Param2.fUse & (DISUSE_REG_GEN32 \| DISUSE_REG_GEN16 \| DISUSE_REG_GEN8));
121	uint8_t const cbValue = pCpu->Param2.fUse & DISUSE_REG_GEN32 ? 4 : pCpu->Param2.fUse & DISUSE_REG_GEN16 ? 2 : 1;
122
123	return IEMExecDecodedOut(pVCpu, pCpu->cbInstr, u16Port, cbValue);
124	}
125
126
127	/**
128	* [REP*] INSB/INSW/INSD
129	* ES:EDI,DX[,ECX]
130	*
131	* @returns Strict VBox status code. Informational status codes other than the one documented
132	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
133	* @retval VINF_SUCCESS Success.
134	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
135	* status code must be passed on to EM.
136	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
137	* @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
138	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
139	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
140	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
141	*
142	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
143	* @param pCpu Disassembler CPU state.
144	*/
145	static VBOXSTRICTRC iomRCInterpretINS(PVMCPU pVCpu, PDISCPUSTATE pCpu)
146	{
147	uint8_t cbValue = pCpu->pCurInstr->uOpcode == OP_INSB ? 1
148	: pCpu->uOpMode == DISCPUMODE_16BIT ? 2 : 4; /* dword in both 32 & 64 bits mode */
149	return IEMExecStringIoRead(pVCpu,
150	cbValue,
151	iomDisModeToIemMode((DISCPUMODE)pCpu->uCpuMode),
152	RT_BOOL(pCpu->fPrefix & (DISPREFIX_REPNE \| DISPREFIX_REP)),
153	pCpu->cbInstr,
154	false /fIoChecked/);
155	}
156
157
158	/**
159	* [REP*] OUTSB/OUTSW/OUTSD
160	* DS:ESI,DX[,ECX]
161	*
162	* @returns Strict VBox status code. Informational status codes other than the one documented
163	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
164	* @retval VINF_SUCCESS Success.
165	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
166	* status code must be passed on to EM.
167	* @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
168	* @retval VINF_IOM_R3_IOPORT_COMMIT_WRITE Defer the write to ring-3. (R0/GC only)
169	* @retval VINF_EM_RAW_EMULATE_INSTR Defer the write to the REM.
170	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
171	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
172	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
173	*
174	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
175	* @param pCpu Disassembler CPU state.
176	*/
177	static VBOXSTRICTRC iomRCInterpretOUTS(PVMCPU pVCpu, PDISCPUSTATE pCpu)
178	{
179	uint8_t cbValue = pCpu->pCurInstr->uOpcode == OP_OUTSB ? 1
180	: pCpu->uOpMode == DISCPUMODE_16BIT ? 2 : 4; /* dword in both 32 & 64 bits mode */
181	return IEMExecStringIoWrite(pVCpu,
182	cbValue,
183	iomDisModeToIemMode((DISCPUMODE)pCpu->uCpuMode),
184	RT_BOOL(pCpu->fPrefix & (DISPREFIX_REPNE \| DISPREFIX_REP)),
185	pCpu->cbInstr,
186	pCpu->fPrefix & DISPREFIX_SEG ? pCpu->idxSegPrefix : X86_SREG_DS,
187	false /fIoChecked/);
188	}
189
190
191
192	/**
193	* Attempts to service an IN/OUT instruction.
194	*
195	* The \#GP trap handler in RC will call this function if the opcode causing
196	* the trap is a in or out type instruction. (Call it indirectly via EM that
197	* is.)
198	*
199	* @returns Strict VBox status code. Informational status codes other than the one documented
200	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
201	* @retval VINF_SUCCESS Success.
202	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
203	* status code must be passed on to EM.
204	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
205	* @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
206	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3.
207	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
208	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
209	*
210	* @param pVM The cross context VM structure.
211	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
212	* @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
213	* @param pCpu Disassembler CPU state.
214	*/
215	VMMRCDECL(VBOXSTRICTRC) IOMRCIOPortHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
216	{
217	switch (pCpu->pCurInstr->uOpcode)
218	{
219	case OP_IN:
220	return iomRCInterpretIN(pVM, pVCpu, pRegFrame, pCpu);
221
222	case OP_OUT:
223	return iomRCInterpretOUT(pVM, pVCpu, pRegFrame, pCpu);
224
225	case OP_INSB:
226	case OP_INSWD:
227	return iomRCInterpretINS(pVCpu, pCpu);
228
229	case OP_OUTSB:
230	case OP_OUTSWD:
231	return iomRCInterpretOUTS(pVCpu, pCpu);
232
233	/*
234	* The opcode wasn't know to us, freak out.
235	*/
236	default:
237	AssertMsgFailed(("Unknown I/O port access opcode %d.\n", pCpu->pCurInstr->uOpcode));
238	return VERR_IOM_IOPORT_UNKNOWN_OPCODE;
239	}
240	}
241

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source: vbox/trunk/src/VBox/VMM/VMMRC/IOMRC.cpp@ 69296

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