VMM.cpp@ 97178

Last change on this file since 97178 was 97178, checked in by vboxsync, 2 years ago
VMM/CPUM,EM,HM,IEM,++: Moved VMCPU_FF_INHIBIT_INTERRUPTS and VMCPU_FF_BLOCK_NMIS to CPUMCTX::fInhibit. Moved ldtr and tr up to the CPUMCTXCORE area in hope for better cache alignment of rip, rflags and crX register fields. bugref:9941
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 105.7 KB

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1	/* $Id: VMM.cpp 97178 2022-10-17 21:06:03Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2022 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	//#define NO_SUPCALLR0VMM
29
30	/** @page pg_vmm VMM - The Virtual Machine Monitor
31	*
32	* The VMM component is two things at the moment, it's a component doing a few
33	* management and routing tasks, and it's the whole virtual machine monitor
34	* thing. For hysterical reasons, it is not doing all the management that one
35	* would expect, this is instead done by @ref pg_vm. We'll address this
36	* misdesign eventually, maybe.
37	*
38	* VMM is made up of these components:
39	* - @subpage pg_cfgm
40	* - @subpage pg_cpum
41	* - @subpage pg_dbgf
42	* - @subpage pg_em
43	* - @subpage pg_gim
44	* - @subpage pg_gmm
45	* - @subpage pg_gvmm
46	* - @subpage pg_hm
47	* - @subpage pg_iem
48	* - @subpage pg_iom
49	* - @subpage pg_mm
50	* - @subpage pg_nem
51	* - @subpage pg_pdm
52	* - @subpage pg_pgm
53	* - @subpage pg_selm
54	* - @subpage pg_ssm
55	* - @subpage pg_stam
56	* - @subpage pg_tm
57	* - @subpage pg_trpm
58	* - @subpage pg_vm
59	*
60	*
61	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62	*
63	*
64	* @section sec_vmmstate VMM State
65	*
66	* @image html VM_Statechart_Diagram.gif
67	*
68	* To be written.
69	*
70	*
71	* @subsection subsec_vmm_init VMM Initialization
72	*
73	* To be written.
74	*
75	*
76	* @subsection subsec_vmm_term VMM Termination
77	*
78	* To be written.
79	*
80	*
81	* @section sec_vmm_limits VMM Limits
82	*
83	* There are various resource limits imposed by the VMM and it's
84	* sub-components. We'll list some of them here.
85	*
86	* On 64-bit hosts:
87	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88	* can be increased up to 64K - 1.
89	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91	* - A VM can be assigned all the memory we can use (16TB), however, the
92	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94	*
95	* On 32-bit hosts:
96	* - Max 127 VMs. Imposed by GMM's per page structure.
97	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98	* ROM pages. The limit is imposed by the 28-bit page ID used
99	* internally in GMM. It is also limited by PAE.
100	* - A VM can be assigned all the memory GMM can allocate, however, the
101	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103	*
104	*/
105
106
107	/*********************************************************************************************************************************
108	* Header Files *
109	*********************************************************************************************************************************/
110	#define LOG_GROUP LOG_GROUP_VMM
111	#include <VBox/vmm/vmm.h>
112	#include <VBox/vmm/vmapi.h>
113	#include <VBox/vmm/pgm.h>
114	#include <VBox/vmm/cfgm.h>
115	#include <VBox/vmm/pdmqueue.h>
116	#include <VBox/vmm/pdmcritsect.h>
117	#include <VBox/vmm/pdmcritsectrw.h>
118	#include <VBox/vmm/pdmapi.h>
119	#include <VBox/vmm/cpum.h>
120	#include <VBox/vmm/gim.h>
121	#include <VBox/vmm/mm.h>
122	#include <VBox/vmm/nem.h>
123	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124	# include <VBox/vmm/iem.h>
125	#endif
126	#include <VBox/vmm/iom.h>
127	#include <VBox/vmm/trpm.h>
128	#include <VBox/vmm/selm.h>
129	#include <VBox/vmm/em.h>
130	#include <VBox/sup.h>
131	#include <VBox/vmm/dbgf.h>
132	#include <VBox/vmm/apic.h>
133	#include <VBox/vmm/ssm.h>
134	#include <VBox/vmm/tm.h>
135	#include "VMMInternal.h"
136	#include <VBox/vmm/vmcc.h>
137
138	#include <VBox/err.h>
139	#include <VBox/param.h>
140	#include <VBox/version.h>
141	#include <VBox/vmm/hm.h>
142	#include <iprt/assert.h>
143	#include <iprt/alloc.h>
144	#include <iprt/asm.h>
145	#include <iprt/time.h>
146	#include <iprt/semaphore.h>
147	#include <iprt/stream.h>
148	#include <iprt/string.h>
149	#include <iprt/stdarg.h>
150	#include <iprt/ctype.h>
151	#include <iprt/x86.h>
152
153
154	/*********************************************************************************************************************************
155	* Defined Constants And Macros *
156	*********************************************************************************************************************************/
157	/** The saved state version. */
158	#define VMM_SAVED_STATE_VERSION 4
159	/** The saved state version used by v3.0 and earlier. (Teleportation) */
160	#define VMM_SAVED_STATE_VERSION_3_0 3
161
162	/** Macro for flushing the ring-0 logging. */
163	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
164	do { \
165	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
166	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
167	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
168	{ /* likely? */ } \
169	else \
170	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
171	} while (0)
172
173
174	/*********************************************************************************************************************************
175	* Internal Functions *
176	*********************************************************************************************************************************/
177	static void vmmR3InitRegisterStats(PVM pVM);
178	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
179	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
180	#if 0 /* pointless when timers doesn't run on EMT */
181	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
182	#endif
183	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
184	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
185	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
186	static FNRTTHREAD vmmR3LogFlusher;
187	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
188	PRTLOGGER pDstLogger);
189	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
190
191
192
193	/**
194	* Initializes the VMM.
195	*
196	* @returns VBox status code.
197	* @param pVM The cross context VM structure.
198	*/
199	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
200	{
201	LogFlow(("VMMR3Init\n"));
202
203	/*
204	* Assert alignment, sizes and order.
205	*/
206	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
207	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
208
209	/*
210	* Init basic VM VMM members.
211	*/
212	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
213	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
214	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
215	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
216	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
217	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
218	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
219	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
220	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
221	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
222
223	#if 0 /* pointless when timers doesn't run on EMT */
224	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
225	* The EMT yield interval. The EMT yielding is a hack we employ to play a
226	* bit nicer with the rest of the system (like for instance the GUI).
227	*/
228	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
229	23 /* Value arrived at after experimenting with the grub boot prompt. */);
230	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
231	#endif
232
233	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
234	* Controls whether we employ per-cpu preemption timers to limit the time
235	* spent executing guest code. This option is not available on all
236	* platforms and we will silently ignore this setting then. If we are
237	* running in VT-x mode, we will use the VMX-preemption timer instead of
238	* this one when possible.
239	*/
240	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
241	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
242	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
243
244	/*
245	* Initialize the VMM rendezvous semaphores.
246	*/
247	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
248	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
249	return VERR_NO_MEMORY;
250	for (VMCPUID i = 0; i < pVM->cCpus; i++)
251	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
252	for (VMCPUID i = 0; i < pVM->cCpus; i++)
253	{
254	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
255	AssertRCReturn(rc, rc);
256	}
257	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
262	AssertRCReturn(rc, rc);
263	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
264	AssertRCReturn(rc, rc);
265	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
266	AssertRCReturn(rc, rc);
267	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
268	AssertRCReturn(rc, rc);
269	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
270	AssertRCReturn(rc, rc);
271	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
272	AssertRCReturn(rc, rc);
273
274	/*
275	* Register the saved state data unit.
276	*/
277	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
278	NULL, NULL, NULL,
279	NULL, vmmR3Save, NULL,
280	NULL, vmmR3Load, NULL);
281	if (RT_FAILURE(rc))
282	return rc;
283
284	/*
285	* Register the Ring-0 VM handle with the session for fast ioctl calls.
286	*/
287	bool const fDriverless = SUPR3IsDriverless();
288	if (!fDriverless)
289	{
290	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
291	if (RT_FAILURE(rc))
292	return rc;
293	}
294
295	#ifdef VBOX_WITH_NMI
296	/*
297	* Allocate mapping for the host APIC.
298	*/
299	rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
300	AssertRC(rc);
301	#endif
302	if (RT_SUCCESS(rc))
303	{
304	/*
305	* Start the log flusher thread.
306	*/
307	if (!fDriverless)
308	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
309	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
310	if (RT_SUCCESS(rc))
311	{
312
313	/*
314	* Debug info and statistics.
315	*/
316	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
317	vmmR3InitRegisterStats(pVM);
318	vmmInitFormatTypes();
319
320	return VINF_SUCCESS;
321	}
322	}
323	/** @todo Need failure cleanup? */
324
325	return rc;
326	}
327
328
329	/**
330	* VMMR3Init worker that register the statistics with STAM.
331	*
332	* @param pVM The cross context VM structure.
333	*/
334	static void vmmR3InitRegisterStats(PVM pVM)
335	{
336	RT_NOREF_PV(pVM);
337
338	/* Nothing to do here in driverless mode. */
339	if (SUPR3IsDriverless())
340	return;
341
342	/*
343	* Statistics.
344	*/
345	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
346	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
347	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
348	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
349	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
350	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
351	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
352	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
353	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
354	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
397
398	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
399	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
400
401	for (VMCPUID i = 0; i < pVM->cCpus; i++)
402	{
403	PVMCPU pVCpu = pVM->apCpusR3[i];
404	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
405	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
406	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
407	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
408	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
409	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
410	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
411	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
412	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
413	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
414	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
415	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
416	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
417	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
418	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
419	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
420	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
421
422	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
423
424	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
425	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
426	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
427	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
428	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
429	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
430	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
431	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
432	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
433
434	pShared = &pVCpu->vmm.s.u.s.RelLogger;
435	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
436	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
437	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
438	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
439	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
440	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
441	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
442	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
443	}
444	}
445
446
447	/**
448	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
449	*
450	* @returns VBox status code.
451	* @param pVM The cross context VM structure.
452	* @param pVCpu The cross context per CPU structure.
453	* @thread EMT(pVCpu)
454	*/
455	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
456	{
457	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
458	}
459
460
461	/**
462	* Initializes the R0 VMM.
463	*
464	* @returns VBox status code.
465	* @param pVM The cross context VM structure.
466	*/
467	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
468	{
469	int rc;
470	PVMCPU pVCpu = VMMGetCpu(pVM);
471	Assert(pVCpu && pVCpu->idCpu == 0);
472
473	/*
474	* Nothing to do here in driverless mode.
475	*/
476	if (SUPR3IsDriverless())
477	return VINF_SUCCESS;
478
479	/*
480	* Make sure the ring-0 loggers are up to date.
481	*/
482	rc = VMMR3UpdateLoggers(pVM);
483	if (RT_FAILURE(rc))
484	return rc;
485
486	/*
487	* Call Ring-0 entry with init code.
488	*/
489	#ifdef NO_SUPCALLR0VMM
490	//rc = VERR_GENERAL_FAILURE;
491	rc = VINF_SUCCESS;
492	#else
493	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
494	#endif
495
496	/*
497	* Flush the logs & deal with assertions.
498	*/
499	#ifdef LOG_ENABLED
500	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
501	#endif
502	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
503	if (rc == VERR_VMM_RING0_ASSERTION)
504	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
505	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
506	{
507	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
508	if (RT_SUCCESS(rc))
509	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
510	}
511
512	/*
513	* Log stuff we learned in ring-0.
514	*/
515	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
516	if (pVM->vmm.s.fIsUsingContextHooks)
517	LogRel(("VMM: Enabled thread-context hooks\n"));
518	else
519	LogRel(("VMM: Thread-context hooks unavailable\n"));
520
521	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
522	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
523	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
524	else
525	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
526	if (pVM->vmm.s.fIsPreemptPossible)
527	LogRel(("VMM: Kernel preemption is possible\n"));
528	else
529	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
530
531	/*
532	* Send all EMTs to ring-0 to get their logger initialized.
533	*/
534	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
535	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
536
537	return rc;
538	}
539
540
541	/**
542	* Called when an init phase completes.
543	*
544	* @returns VBox status code.
545	* @param pVM The cross context VM structure.
546	* @param enmWhat Which init phase.
547	*/
548	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
549	{
550	int rc = VINF_SUCCESS;
551
552	switch (enmWhat)
553	{
554	case VMINITCOMPLETED_RING3:
555	{
556	#if 0 /* pointless when timers doesn't run on EMT */
557	/*
558	* Create the EMT yield timer.
559	*/
560	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
561	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
562	AssertRCReturn(rc, rc);
563
564	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
565	AssertRCReturn(rc, rc);
566	#endif
567	break;
568	}
569
570	case VMINITCOMPLETED_HM:
571	{
572	/*
573	* Disable the periodic preemption timers if we can use the
574	* VMX-preemption timer instead.
575	*/
576	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
577	&& HMR3IsVmxPreemptionTimerUsed(pVM))
578	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
579	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
580
581	/*
582	* Last chance for GIM to update its CPUID leaves if it requires
583	* knowledge/information from HM initialization.
584	*/
585	/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
586	rc = GIMR3InitCompleted(pVM);
587	AssertRCReturn(rc, rc);
588
589	/*
590	* CPUM's post-initialization (print CPUIDs).
591	*/
592	CPUMR3LogCpuIdAndMsrFeatures(pVM);
593	break;
594	}
595
596	default: /* shuts up gcc */
597	break;
598	}
599
600	return rc;
601	}
602
603
604	/**
605	* Terminate the VMM bits.
606	*
607	* @returns VBox status code.
608	* @param pVM The cross context VM structure.
609	*/
610	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
611	{
612	PVMCPU pVCpu = VMMGetCpu(pVM);
613	Assert(pVCpu && pVCpu->idCpu == 0);
614
615	/*
616	* Call Ring-0 entry with termination code.
617	*/
618	int rc = VINF_SUCCESS;
619	if (!SUPR3IsDriverless())
620	{
621	#ifndef NO_SUPCALLR0VMM
622	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
623	#endif
624	}
625
626	/*
627	* Flush the logs & deal with assertions.
628	*/
629	#ifdef LOG_ENABLED
630	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
631	#endif
632	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
633	if (rc == VERR_VMM_RING0_ASSERTION)
634	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
635	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
636	{
637	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
638	if (RT_SUCCESS(rc))
639	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
640	}
641
642	/*
643	* Do clean ups.
644	*/
645	for (VMCPUID i = 0; i < pVM->cCpus; i++)
646	{
647	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
648	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
649	}
650	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
651	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
652	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
653	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
654	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
655	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
656	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
657	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
658	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
659	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
660	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
661	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
662	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
663	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
664	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
665	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
666
667	vmmTermFormatTypes();
668
669	/*
670	* Wait for the log flusher thread to complete.
671	*/
672	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
673	{
674	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
675	AssertLogRelRC(rc2);
676	if (RT_SUCCESS(rc2))
677	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
678	}
679
680	return rc;
681	}
682
683
684	/**
685	* Applies relocations to data and code managed by this
686	* component. This function will be called at init and
687	* whenever the VMM need to relocate it self inside the GC.
688	*
689	* The VMM will need to apply relocations to the core code.
690	*
691	* @param pVM The cross context VM structure.
692	* @param offDelta The relocation delta.
693	*/
694	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
695	{
696	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
697	RT_NOREF(offDelta);
698
699	/*
700	* Update the logger.
701	*/
702	VMMR3UpdateLoggers(pVM);
703	}
704
705
706	/**
707	* Worker for VMMR3UpdateLoggers.
708	*/
709	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
710	{
711	/*
712	* Get the group count.
713	*/
714	uint32_t uGroupsCrc32 = 0;
715	uint32_t cGroups = 0;
716	uint64_t fFlags = 0;
717	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
718	Assert(rc == VERR_BUFFER_OVERFLOW);
719
720	/*
721	* Allocate the request of the right size.
722	*/
723	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
724	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
725	if (pReq)
726	{
727	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
728	pReq->Hdr.cbReq = cbReq;
729	pReq->cGroups = cGroups;
730	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
731	AssertRC(rc);
732	if (RT_SUCCESS(rc))
733	{
734	/*
735	* The 64-bit value argument.
736	*/
737	uint64_t fExtraArg = fReleaseLogger;
738
739	/* Only outputting to the parent VMM's logs? Enable ring-0 to flush directly. */
740	uint32_t fDst = RTLogGetDestinations(pSrcLogger);
741	fDst &= ~(RTLOGDEST_DUMMY \| RTLOGDEST_F_NO_DENY \| RTLOGDEST_F_DELAY_FILE \| RTLOGDEST_FIXED_FILE \| RTLOGDEST_FIXED_DIR);
742	if ( (fDst & (RTLOGDEST_VMM \| RTLOGDEST_VMM_REL))
743	&& !(fDst & ~(RTLOGDEST_VMM \| RTLOGDEST_VMM_REL)))
744	fExtraArg \|= (fDst & RTLOGDEST_VMM ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_DBG : 0)
745	\| (fDst & RTLOGDEST_VMM_REL ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_REL : 0);
746
747	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fExtraArg, &pReq->Hdr);
748	}
749
750	RTMemFree(pReq);
751	}
752	else
753	rc = VERR_NO_MEMORY;
754	return rc;
755	}
756
757
758	/**
759	* Updates the settings for the RC and R0 loggers.
760	*
761	* @returns VBox status code.
762	* @param pVM The cross context VM structure.
763	* @thread EMT
764	*/
765	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
766	{
767	/* Nothing to do here if we're in driverless mode: */
768	if (SUPR3IsDriverless())
769	return VINF_SUCCESS;
770
771	PVMCPU pVCpu = VMMGetCpu(pVM);
772	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
773
774	/*
775	* Each EMT has each own logger instance.
776	*/
777	/* Debug logging.*/
778	int rcDebug = VINF_SUCCESS;
779	#ifdef LOG_ENABLED
780	PRTLOGGER const pDefault = RTLogDefaultInstance();
781	if (pDefault)
782	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
783	#else
784	RT_NOREF(pVM);
785	#endif
786
787	/* Release logging. */
788	int rcRelease = VINF_SUCCESS;
789	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
790	if (pRelease)
791	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
792
793	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
794	}
795
796
797	/**
798	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
799	*/
800	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
801	{
802	PVM const pVM = (PVM)pvUser;
803	RT_NOREF(hThreadSelf);
804
805	/* Reset the flusher state before we start: */
806	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
807
808	/*
809	* The work loop.
810	*/
811	for (;;)
812	{
813	/*
814	* Wait for work.
815	*/
816	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
817	if (RT_SUCCESS(rc))
818	{
819	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
820	VMMLOGFLUSHERENTRY Item;
821	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
822	if ( Item.s.idCpu < pVM->cCpus
823	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
824	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
825	{
826	/*
827	* Verify the request.
828	*/
829	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
830	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
831	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
832	if (cbToFlush > 0)
833	{
834	if (cbToFlush <= pShared->cbBuf)
835	{
836	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
837	if (pchBufR3)
838	{
839	/*
840	* Do the flushing.
841	*/
842	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
843	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
844	if (pLogger)
845	{
846	char szBefore[128];
847	RTStrPrintf(szBefore, sizeof(szBefore),
848	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
849	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
850	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
851	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
852	}
853	}
854	else
855	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
856	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
857	}
858	else
859	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
860	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
861	}
862	else
863	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
864	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
865
866	/*
867	* Mark the descriptor as flushed and set the request flag for same.
868	*/
869	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
870	}
871	else
872	{
873	Assert(Item.s.idCpu == UINT16_MAX);
874	Assert(Item.s.idxLogger == UINT8_MAX);
875	Assert(Item.s.idxBuffer == UINT8_MAX);
876	}
877	}
878	/*
879	* Interrupted can happen, just ignore it.
880	*/
881	else if (rc == VERR_INTERRUPTED)
882	{ /* ignore*/ }
883	/*
884	* The ring-0 termination code will set the shutdown flag and wake us
885	* up, and we should return with object destroyed. In case there is
886	* some kind of race, we might also get sempahore destroyed.
887	*/
888	else if ( rc == VERR_OBJECT_DESTROYED
889	\|\| rc == VERR_SEM_DESTROYED
890	\|\| rc == VERR_INVALID_HANDLE)
891	{
892	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
893	return VINF_SUCCESS;
894	}
895	/*
896	* There shouldn't be any other errors...
897	*/
898	else
899	{
900	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
901	AssertRC(rc);
902	RTThreadSleep(1);
903	}
904	}
905	}
906
907
908	/**
909	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
910	*
911	* @param pVM The cross context VM structure.
912	* @param pVCpu The cross context virtual CPU structure of the calling
913	* EMT.
914	* @param pShared The shared logger data.
915	* @param idxBuf The buffer to flush.
916	* @param pDstLogger The destination IPRT logger.
917	*/
918	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
919	{
920	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
921	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
922	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
923
924	#if VMMLOGGER_BUFFER_COUNT > 1
925	/*
926	* When we have more than one log buffer, the flusher thread may still be
927	* working on the previous buffer when we get here.
928	*/
929	char szBefore[64];
930	if (pShared->cFlushing > 0)
931	{
932	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
933	uint64_t const nsStart = RTTimeNanoTS();
934
935	/* A no-op, but it takes the lock and the hope is that we end up waiting
936	on the flusher to finish up. */
937	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
938	if (pShared->cFlushing != 0)
939	{
940	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
941
942	/* If no luck, go to ring-0 and to proper waiting. */
943	if (pShared->cFlushing != 0)
944	{
945	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
946	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
947	}
948	}
949
950	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
951	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
952	pszBefore = szBefore;
953	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
954	}
955	#else
956	RT_NOREF(pVM, pVCpu);
957	#endif
958
959	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
960	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
961	}
962
963
964	/**
965	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
966	*
967	* @returns Pointer to the buffer.
968	* @param pVM The cross context VM structure.
969	*/
970	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
971	{
972	return pVM->vmm.s.szRing0AssertMsg1;
973	}
974
975
976	/**
977	* Returns the VMCPU of the specified virtual CPU.
978	*
979	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
980	*
981	* @param pUVM The user mode VM handle.
982	* @param idCpu The ID of the virtual CPU.
983	*/
984	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
985	{
986	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
987	AssertReturn(idCpu < pUVM->cCpus, NULL);
988	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
989	return pUVM->pVM->apCpusR3[idCpu];
990	}
991
992
993	/**
994	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
995	*
996	* @returns Pointer to the buffer.
997	* @param pVM The cross context VM structure.
998	*/
999	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1000	{
1001	return pVM->vmm.s.szRing0AssertMsg2;
1002	}
1003
1004
1005	/**
1006	* Execute state save operation.
1007	*
1008	* @returns VBox status code.
1009	* @param pVM The cross context VM structure.
1010	* @param pSSM SSM operation handle.
1011	*/
1012	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1013	{
1014	LogFlow(("vmmR3Save:\n"));
1015
1016	/*
1017	* Save the started/stopped state of all CPUs except 0 as it will always
1018	* be running. This avoids breaking the saved state version. :-)
1019	*/
1020	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1021	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1022
1023	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1024	}
1025
1026
1027	/**
1028	* Execute state load operation.
1029	*
1030	* @returns VBox status code.
1031	* @param pVM The cross context VM structure.
1032	* @param pSSM SSM operation handle.
1033	* @param uVersion Data layout version.
1034	* @param uPass The data pass.
1035	*/
1036	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1037	{
1038	LogFlow(("vmmR3Load:\n"));
1039	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1040
1041	/*
1042	* Validate version.
1043	*/
1044	if ( uVersion != VMM_SAVED_STATE_VERSION
1045	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1046	{
1047	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1048	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1049	}
1050
1051	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1052	{
1053	/* Ignore the stack bottom, stack pointer and stack bits. */
1054	RTRCPTR RCPtrIgnored;
1055	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1056	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1057	#ifdef RT_OS_DARWIN
1058	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1059	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1060	&& SSMR3HandleRevision(pSSM) >= 48858
1061	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1062	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1063	)
1064	SSMR3Skip(pSSM, 16384);
1065	else
1066	SSMR3Skip(pSSM, 8192);
1067	#else
1068	SSMR3Skip(pSSM, 8192);
1069	#endif
1070	}
1071
1072	/*
1073	* Restore the VMCPU states. VCPU 0 is always started.
1074	*/
1075	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1076	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1077	{
1078	bool fStarted;
1079	int rc = SSMR3GetBool(pSSM, &fStarted);
1080	if (RT_FAILURE(rc))
1081	return rc;
1082	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1083	}
1084
1085	/* terminator */
1086	uint32_t u32;
1087	int rc = SSMR3GetU32(pSSM, &u32);
1088	if (RT_FAILURE(rc))
1089	return rc;
1090	if (u32 != UINT32_MAX)
1091	{
1092	AssertMsgFailed(("u32=%#x\n", u32));
1093	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1094	}
1095	return VINF_SUCCESS;
1096	}
1097
1098
1099	/**
1100	* Suspends the CPU yielder.
1101	*
1102	* @param pVM The cross context VM structure.
1103	*/
1104	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1105	{
1106	#if 0 /* pointless when timers doesn't run on EMT */
1107	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1108	if (!pVM->vmm.s.cYieldResumeMillies)
1109	{
1110	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1111	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1112	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1113	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1114	else
1115	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1116	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1117	}
1118	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1119	#else
1120	RT_NOREF(pVM);
1121	#endif
1122	}
1123
1124
1125	/**
1126	* Stops the CPU yielder.
1127	*
1128	* @param pVM The cross context VM structure.
1129	*/
1130	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1131	{
1132	#if 0 /* pointless when timers doesn't run on EMT */
1133	if (!pVM->vmm.s.cYieldResumeMillies)
1134	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1135	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1136	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1137	#else
1138	RT_NOREF(pVM);
1139	#endif
1140	}
1141
1142
1143	/**
1144	* Resumes the CPU yielder when it has been a suspended or stopped.
1145	*
1146	* @param pVM The cross context VM structure.
1147	*/
1148	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1149	{
1150	#if 0 /* pointless when timers doesn't run on EMT */
1151	if (pVM->vmm.s.cYieldResumeMillies)
1152	{
1153	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1154	pVM->vmm.s.cYieldResumeMillies = 0;
1155	}
1156	#else
1157	RT_NOREF(pVM);
1158	#endif
1159	}
1160
1161
1162	#if 0 /* pointless when timers doesn't run on EMT */
1163	/**
1164	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1165	*
1166	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1167	*/
1168	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1169	{
1170	NOREF(pvUser);
1171
1172	/*
1173	* This really needs some careful tuning. While we shouldn't be too greedy since
1174	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1175	* because that'll cause us to stop up.
1176	*
1177	* The current logic is to use the default interval when there is no lag worth
1178	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1179	*
1180	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1181	* so the lag is up to date.)
1182	*/
1183	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1184	if ( u64Lag < 50000000 /* 50ms */
1185	\|\| ( u64Lag < 1000000000 /* 1s */
1186	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1187	)
1188	{
1189	uint64_t u64Elapsed = RTTimeNanoTS();
1190	pVM->vmm.s.u64LastYield = u64Elapsed;
1191
1192	RTThreadYield();
1193
1194	#ifdef LOG_ENABLED
1195	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1196	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1197	#endif
1198	}
1199	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1200	}
1201	#endif
1202
1203
1204	/**
1205	* Executes guest code (Intel VT-x and AMD-V).
1206	*
1207	* @param pVM The cross context VM structure.
1208	* @param pVCpu The cross context virtual CPU structure.
1209	*/
1210	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1211	{
1212	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1213
1214	int rc;
1215	do
1216	{
1217	#ifdef NO_SUPCALLR0VMM
1218	rc = VERR_GENERAL_FAILURE;
1219	#else
1220	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1221	if (RT_LIKELY(rc == VINF_SUCCESS))
1222	rc = pVCpu->vmm.s.iLastGZRc;
1223	#endif
1224	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1225
1226	#if 0 /** @todo triggers too often */
1227	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1228	#endif
1229
1230	/*
1231	* Flush the logs
1232	*/
1233	#ifdef LOG_ENABLED
1234	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1235	#endif
1236	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1237	if (rc != VERR_VMM_RING0_ASSERTION)
1238	{
1239	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1240	return rc;
1241	}
1242	return vmmR3HandleRing0Assert(pVM, pVCpu);
1243	}
1244
1245
1246	/**
1247	* Perform one of the fast I/O control VMMR0 operation.
1248	*
1249	* @returns VBox strict status code.
1250	* @param pVM The cross context VM structure.
1251	* @param pVCpu The cross context virtual CPU structure.
1252	* @param enmOperation The operation to perform.
1253	*/
1254	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1255	{
1256	VBOXSTRICTRC rcStrict;
1257	do
1258	{
1259	#ifdef NO_SUPCALLR0VMM
1260	rcStrict = VERR_GENERAL_FAILURE;
1261	#else
1262	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1263	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1264	rcStrict = pVCpu->vmm.s.iLastGZRc;
1265	#endif
1266	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1267
1268	/*
1269	* Flush the logs
1270	*/
1271	#ifdef LOG_ENABLED
1272	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1273	#endif
1274	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1275	if (rcStrict != VERR_VMM_RING0_ASSERTION)
1276	return rcStrict;
1277	return vmmR3HandleRing0Assert(pVM, pVCpu);
1278	}
1279
1280
1281	/**
1282	* VCPU worker for VMMR3SendStartupIpi.
1283	*
1284	* @param pVM The cross context VM structure.
1285	* @param idCpu Virtual CPU to perform SIPI on.
1286	* @param uVector The SIPI vector.
1287	*/
1288	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1289	{
1290	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1291	VMCPU_ASSERT_EMT(pVCpu);
1292
1293	/*
1294	* In the INIT state, the target CPU is only responsive to an SIPI.
1295	* This is also true for when when the CPU is in VMX non-root mode.
1296	*
1297	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1298	* See Intel spec. 26.6.2 "Activity State".
1299	*/
1300	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1301	return VINF_SUCCESS;
1302
1303	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1304	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1305	if (CPUMIsGuestInVmxRootMode(pCtx))
1306	{
1307	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1308	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1309	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1310
1311	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1312	return VINF_SUCCESS;
1313	}
1314	#endif
1315
1316	pCtx->cs.Sel = uVector << 8;
1317	pCtx->cs.ValidSel = uVector << 8;
1318	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1319	pCtx->cs.u64Base = uVector << 12;
1320	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1321	pCtx->rip = 0;
1322
1323	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1324
1325	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1326	EMSetState(pVCpu, EMSTATE_HALTED);
1327	return VINF_EM_RESCHEDULE;
1328	# else /* And if we go the VMCPU::enmState way it can stay here. */
1329	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1330	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1331	return VINF_SUCCESS;
1332	# endif
1333	}
1334
1335
1336	/**
1337	* VCPU worker for VMMR3SendInitIpi.
1338	*
1339	* @returns VBox status code.
1340	* @param pVM The cross context VM structure.
1341	* @param idCpu Virtual CPU to perform SIPI on.
1342	*/
1343	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1344	{
1345	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1346	VMCPU_ASSERT_EMT(pVCpu);
1347
1348	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1349
1350	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1351	* wait-for-SIPI state. Verify. */
1352
1353	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1354	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1355	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1356	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1357	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1358	#endif
1359
1360	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1361	* IPI (e.g. SVM_EXIT_INIT). */
1362
1363	PGMR3ResetCpu(pVM, pVCpu);
1364	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1365	APICR3InitIpi(pVCpu);
1366	TRPMR3ResetCpu(pVCpu);
1367	CPUMR3ResetCpu(pVM, pVCpu);
1368	EMR3ResetCpu(pVCpu);
1369	HMR3ResetCpu(pVCpu);
1370	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1371
1372	/* This will trickle up on the target EMT. */
1373	return VINF_EM_WAIT_SIPI;
1374	}
1375
1376
1377	/**
1378	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1379	* vector-dependent state and unhalting processor.
1380	*
1381	* @param pVM The cross context VM structure.
1382	* @param idCpu Virtual CPU to perform SIPI on.
1383	* @param uVector SIPI vector.
1384	*/
1385	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1386	{
1387	AssertReturnVoid(idCpu < pVM->cCpus);
1388
1389	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1390	AssertRC(rc);
1391	}
1392
1393
1394	/**
1395	* Sends init IPI to the virtual CPU.
1396	*
1397	* @param pVM The cross context VM structure.
1398	* @param idCpu Virtual CPU to perform int IPI on.
1399	*/
1400	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1401	{
1402	AssertReturnVoid(idCpu < pVM->cCpus);
1403
1404	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1405	AssertRC(rc);
1406	}
1407
1408
1409	/**
1410	* Registers the guest memory range that can be used for patching.
1411	*
1412	* @returns VBox status code.
1413	* @param pVM The cross context VM structure.
1414	* @param pPatchMem Patch memory range.
1415	* @param cbPatchMem Size of the memory range.
1416	*/
1417	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1418	{
1419	VM_ASSERT_EMT(pVM);
1420	if (HMIsEnabled(pVM))
1421	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1422
1423	return VERR_NOT_SUPPORTED;
1424	}
1425
1426
1427	/**
1428	* Deregisters the guest memory range that can be used for patching.
1429	*
1430	* @returns VBox status code.
1431	* @param pVM The cross context VM structure.
1432	* @param pPatchMem Patch memory range.
1433	* @param cbPatchMem Size of the memory range.
1434	*/
1435	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1436	{
1437	if (HMIsEnabled(pVM))
1438	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1439
1440	return VINF_SUCCESS;
1441	}
1442
1443
1444	/**
1445	* Common recursion handler for the other EMTs.
1446	*
1447	* @returns Strict VBox status code.
1448	* @param pVM The cross context VM structure.
1449	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1450	* @param rcStrict Current status code to be combined with the one
1451	* from this recursion and returned.
1452	*/
1453	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1454	{
1455	int rc2;
1456
1457	/*
1458	* We wait here while the initiator of this recursion reconfigures
1459	* everything. The last EMT to get in signals the initiator.
1460	*/
1461	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1462	{
1463	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1464	AssertLogRelRC(rc2);
1465	}
1466
1467	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1468	AssertLogRelRC(rc2);
1469
1470	/*
1471	* Do the normal rendezvous processing.
1472	*/
1473	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1474	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1475
1476	/*
1477	* Wait for the initiator to restore everything.
1478	*/
1479	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1480	AssertLogRelRC(rc2);
1481
1482	/*
1483	* Last thread out of here signals the initiator.
1484	*/
1485	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1486	{
1487	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1488	AssertLogRelRC(rc2);
1489	}
1490
1491	/*
1492	* Merge status codes and return.
1493	*/
1494	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1495	if ( rcStrict2 != VINF_SUCCESS
1496	&& ( rcStrict == VINF_SUCCESS
1497	\|\| rcStrict > rcStrict2))
1498	rcStrict = rcStrict2;
1499	return rcStrict;
1500	}
1501
1502
1503	/**
1504	* Count returns and have the last non-caller EMT wake up the caller.
1505	*
1506	* @returns VBox strict informational status code for EM scheduling. No failures
1507	* will be returned here, those are for the caller only.
1508	*
1509	* @param pVM The cross context VM structure.
1510	* @param rcStrict The current accumulated recursive status code,
1511	* to be merged with i32RendezvousStatus and
1512	* returned.
1513	*/
1514	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1515	{
1516	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1517
1518	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1519	if (cReturned == pVM->cCpus - 1U)
1520	{
1521	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1522	AssertLogRelRC(rc);
1523	}
1524
1525	/*
1526	* Merge the status codes, ignoring error statuses in this code path.
1527	*/
1528	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1529	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1530	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1531	VERR_IPE_UNEXPECTED_INFO_STATUS);
1532
1533	if (RT_SUCCESS(rcStrict2))
1534	{
1535	if ( rcStrict2 != VINF_SUCCESS
1536	&& ( rcStrict == VINF_SUCCESS
1537	\|\| rcStrict > rcStrict2))
1538	rcStrict = rcStrict2;
1539	}
1540	return rcStrict;
1541	}
1542
1543
1544	/**
1545	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1546	*
1547	* @returns VBox strict informational status code for EM scheduling. No failures
1548	* will be returned here, those are for the caller only. When
1549	* fIsCaller is set, VINF_SUCCESS is always returned.
1550	*
1551	* @param pVM The cross context VM structure.
1552	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1553	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1554	* not.
1555	* @param fFlags The flags.
1556	* @param pfnRendezvous The callback.
1557	* @param pvUser The user argument for the callback.
1558	*/
1559	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1560	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1561	{
1562	int rc;
1563	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1564
1565	/*
1566	* Enter, the last EMT triggers the next callback phase.
1567	*/
1568	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1569	if (cEntered != pVM->cCpus)
1570	{
1571	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1572	{
1573	/* Wait for our turn. */
1574	for (;;)
1575	{
1576	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1577	AssertLogRelRC(rc);
1578	if (!pVM->vmm.s.fRendezvousRecursion)
1579	break;
1580	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1581	}
1582	}
1583	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1584	{
1585	/* Wait for the last EMT to arrive and wake everyone up. */
1586	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1587	AssertLogRelRC(rc);
1588	Assert(!pVM->vmm.s.fRendezvousRecursion);
1589	}
1590	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1591	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1592	{
1593	/* Wait for our turn. */
1594	for (;;)
1595	{
1596	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1597	AssertLogRelRC(rc);
1598	if (!pVM->vmm.s.fRendezvousRecursion)
1599	break;
1600	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1601	}
1602	}
1603	else
1604	{
1605	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1606
1607	/*
1608	* The execute once is handled specially to optimize the code flow.
1609	*
1610	* The last EMT to arrive will perform the callback and the other
1611	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1612	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1613	* returns, that EMT will initiate the normal return sequence.
1614	*/
1615	if (!fIsCaller)
1616	{
1617	for (;;)
1618	{
1619	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1620	AssertLogRelRC(rc);
1621	if (!pVM->vmm.s.fRendezvousRecursion)
1622	break;
1623	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1624	}
1625
1626	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1627	}
1628	return VINF_SUCCESS;
1629	}
1630	}
1631	else
1632	{
1633	/*
1634	* All EMTs are waiting, clear the FF and take action according to the
1635	* execution method.
1636	*/
1637	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1638
1639	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1640	{
1641	/* Wake up everyone. */
1642	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1643	AssertLogRelRC(rc);
1644	}
1645	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1646	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1647	{
1648	/* Figure out who to wake up and wake it up. If it's ourself, then
1649	it's easy otherwise wait for our turn. */
1650	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1651	? 0
1652	: pVM->cCpus - 1U;
1653	if (pVCpu->idCpu != iFirst)
1654	{
1655	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1656	AssertLogRelRC(rc);
1657	for (;;)
1658	{
1659	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1660	AssertLogRelRC(rc);
1661	if (!pVM->vmm.s.fRendezvousRecursion)
1662	break;
1663	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1664	}
1665	}
1666	}
1667	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1668	}
1669
1670
1671	/*
1672	* Do the callback and update the status if necessary.
1673	*/
1674	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1675	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1676	{
1677	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1678	if (rcStrict2 != VINF_SUCCESS)
1679	{
1680	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1681	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1682	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1683	int32_t i32RendezvousStatus;
1684	do
1685	{
1686	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1687	if ( rcStrict2 == i32RendezvousStatus
1688	\|\| RT_FAILURE(i32RendezvousStatus)
1689	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1690	&& rcStrict2 > i32RendezvousStatus))
1691	break;
1692	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1693	}
1694	}
1695
1696	/*
1697	* Increment the done counter and take action depending on whether we're
1698	* the last to finish callback execution.
1699	*/
1700	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1701	if ( cDone != pVM->cCpus
1702	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1703	{
1704	/* Signal the next EMT? */
1705	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1706	{
1707	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1708	AssertLogRelRC(rc);
1709	}
1710	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1711	{
1712	Assert(cDone == pVCpu->idCpu + 1U);
1713	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1714	AssertLogRelRC(rc);
1715	}
1716	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1717	{
1718	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1719	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1720	AssertLogRelRC(rc);
1721	}
1722
1723	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1724	if (!fIsCaller)
1725	{
1726	for (;;)
1727	{
1728	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1729	AssertLogRelRC(rc);
1730	if (!pVM->vmm.s.fRendezvousRecursion)
1731	break;
1732	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1733	}
1734	}
1735	}
1736	else
1737	{
1738	/* Callback execution is all done, tell the rest to return. */
1739	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1740	AssertLogRelRC(rc);
1741	}
1742
1743	if (!fIsCaller)
1744	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1745	return rcStrictRecursion;
1746	}
1747
1748
1749	/**
1750	* Called in response to VM_FF_EMT_RENDEZVOUS.
1751	*
1752	* @returns VBox strict status code - EM scheduling. No errors will be returned
1753	* here, nor will any non-EM scheduling status codes be returned.
1754	*
1755	* @param pVM The cross context VM structure.
1756	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1757	*
1758	* @thread EMT
1759	*/
1760	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1761	{
1762	Assert(!pVCpu->vmm.s.fInRendezvous);
1763	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1764	pVCpu->vmm.s.fInRendezvous = true;
1765	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1766	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1767	pVCpu->vmm.s.fInRendezvous = false;
1768	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1769	return VBOXSTRICTRC_TODO(rcStrict);
1770	}
1771
1772
1773	/**
1774	* Helper for resetting an single wakeup event sempahore.
1775	*
1776	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1777	* @param hEvt The event semaphore to reset.
1778	*/
1779	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1780	{
1781	for (uint32_t cLoops = 0; ; cLoops++)
1782	{
1783	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1784	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1785	return rc;
1786	}
1787	}
1788
1789
1790	/**
1791	* Worker for VMMR3EmtRendezvous that handles recursion.
1792	*
1793	* @returns VBox strict status code. This will be the first error,
1794	* VINF_SUCCESS, or an EM scheduling status code.
1795	*
1796	* @param pVM The cross context VM structure.
1797	* @param pVCpu The cross context virtual CPU structure of the
1798	* calling EMT.
1799	* @param fFlags Flags indicating execution methods. See
1800	* grp_VMMR3EmtRendezvous_fFlags.
1801	* @param pfnRendezvous The callback.
1802	* @param pvUser User argument for the callback.
1803	*
1804	* @thread EMT(pVCpu)
1805	*/
1806	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1807	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1808	{
1809	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1810	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1811	Assert(pVCpu->vmm.s.fInRendezvous);
1812
1813	/*
1814	* Save the current state.
1815	*/
1816	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1817	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1818	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1819	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1820	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1821
1822	/*
1823	* Check preconditions and save the current state.
1824	*/
1825	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1826	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1827	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1828	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1829	VERR_INTERNAL_ERROR);
1830	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1831	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1832
1833	/*
1834	* Reset the recursion prep and pop semaphores.
1835	*/
1836	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1837	AssertLogRelRCReturn(rc, rc);
1838	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1839	AssertLogRelRCReturn(rc, rc);
1840	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1841	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1842	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1843	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1844
1845	/*
1846	* Usher the other thread into the recursion routine.
1847	*/
1848	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1849	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1850
1851	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1852	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1853	while (cLeft-- > 0)
1854	{
1855	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1856	AssertLogRelRC(rc);
1857	}
1858	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1859	{
1860	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1861	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1862	{
1863	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1864	AssertLogRelRC(rc);
1865	}
1866	}
1867	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1868	{
1869	Assert(cLeft == pVCpu->idCpu);
1870	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1871	{
1872	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1873	AssertLogRelRC(rc);
1874	}
1875	}
1876	else
1877	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1878	VERR_INTERNAL_ERROR_4);
1879
1880	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1881	AssertLogRelRC(rc);
1882	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1883	AssertLogRelRC(rc);
1884
1885
1886	/*
1887	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1888	*/
1889	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1890	{
1891	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1892	AssertLogRelRC(rc);
1893	}
1894
1895	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1896
1897	/*
1898	* Clear the slate and setup the new rendezvous.
1899	*/
1900	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1901	{
1902	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1903	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1904	}
1905	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1906	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1907	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1908	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1909
1910	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1911	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1912	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1913	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1914	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1915	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1916	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1917	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1918
1919	/*
1920	* We're ready to go now, do normal rendezvous processing.
1921	*/
1922	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1923	AssertLogRelRC(rc);
1924
1925	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1926
1927	/*
1928	* The caller waits for the other EMTs to be done, return and waiting on the
1929	* pop semaphore.
1930	*/
1931	for (;;)
1932	{
1933	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1934	AssertLogRelRC(rc);
1935	if (!pVM->vmm.s.fRendezvousRecursion)
1936	break;
1937	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1938	}
1939
1940	/*
1941	* Get the return code and merge it with the above recursion status.
1942	*/
1943	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1944	if ( rcStrict2 != VINF_SUCCESS
1945	&& ( rcStrict == VINF_SUCCESS
1946	\|\| rcStrict > rcStrict2))
1947	rcStrict = rcStrict2;
1948
1949	/*
1950	* Restore the parent rendezvous state.
1951	*/
1952	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1953	{
1954	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1955	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1956	}
1957	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1958	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1959	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1960	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1961
1962	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1963	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1964	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1965	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1966	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1967	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1968	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1969
1970	/*
1971	* Usher the other EMTs back to their parent recursion routine, waiting
1972	* for them to all get there before we return (makes sure they've been
1973	* scheduled and are past the pop event sem, see below).
1974	*/
1975	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1976	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1977	AssertLogRelRC(rc);
1978
1979	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1980	{
1981	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1982	AssertLogRelRC(rc);
1983	}
1984
1985	/*
1986	* We must reset the pop semaphore on the way out (doing the pop caller too,
1987	* just in case). The parent may be another recursion.
1988	*/
1989	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1990	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1991
1992	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1993
1994	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1995	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1996	return rcStrict;
1997	}
1998
1999
2000	/**
2001	* EMT rendezvous.
2002	*
2003	* Gathers all the EMTs and execute some code on each of them, either in a one
2004	* by one fashion or all at once.
2005	*
2006	* @returns VBox strict status code. This will be the first error,
2007	* VINF_SUCCESS, or an EM scheduling status code.
2008	*
2009	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2010	* doesn't support it or if the recursion is too deep.
2011	*
2012	* @param pVM The cross context VM structure.
2013	* @param fFlags Flags indicating execution methods. See
2014	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2015	* descending and ascending rendezvous types support
2016	* recursion from inside @a pfnRendezvous.
2017	* @param pfnRendezvous The callback.
2018	* @param pvUser User argument for the callback.
2019	*
2020	* @thread Any.
2021	*/
2022	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2023	{
2024	/*
2025	* Validate input.
2026	*/
2027	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2028	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2029	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2030	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2031	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2032	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2033	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2034	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2035
2036	VBOXSTRICTRC rcStrict;
2037	PVMCPU pVCpu = VMMGetCpu(pVM);
2038	if (!pVCpu)
2039	{
2040	/*
2041	* Forward the request to an EMT thread.
2042	*/
2043	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2044	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2045	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2046	else
2047	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2048	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2049	}
2050	else if ( pVM->cCpus == 1
2051	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2052	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2053	{
2054	/*
2055	* Shortcut for the single EMT case.
2056	*
2057	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2058	* during vmR3Destroy after other emulation threads have started terminating.
2059	*/
2060	if (!pVCpu->vmm.s.fInRendezvous)
2061	{
2062	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2063	pVCpu->vmm.s.fInRendezvous = true;
2064	pVM->vmm.s.fRendezvousFlags = fFlags;
2065	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2066	pVCpu->vmm.s.fInRendezvous = false;
2067	}
2068	else
2069	{
2070	/* Recursion. Do the same checks as in the SMP case. */
2071	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2072	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2073	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2074	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2075	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2076	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2077	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2078	, VERR_DEADLOCK);
2079
2080	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2081	pVM->vmm.s.cRendezvousRecursions++;
2082	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2083	pVM->vmm.s.fRendezvousFlags = fFlags;
2084
2085	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2086
2087	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2088	pVM->vmm.s.cRendezvousRecursions--;
2089	}
2090	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2091	}
2092	else
2093	{
2094	/*
2095	* Spin lock. If busy, check for recursion, if not recursing wait for
2096	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2097	*/
2098	int rc;
2099	rcStrict = VINF_SUCCESS;
2100	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2101	{
2102	/* Allow recursion in some cases. */
2103	if ( pVCpu->vmm.s.fInRendezvous
2104	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2105	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2106	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2107	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2108	))
2109	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2110
2111	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2112	VERR_DEADLOCK);
2113
2114	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2115	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2116	{
2117	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2118	{
2119	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2120	if ( rc != VINF_SUCCESS
2121	&& ( rcStrict == VINF_SUCCESS
2122	\|\| rcStrict > rc))
2123	rcStrict = rc;
2124	/** @todo Perhaps deal with termination here? */
2125	}
2126	ASMNopPause();
2127	}
2128	}
2129
2130	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2131	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2132	Assert(!pVCpu->vmm.s.fInRendezvous);
2133	pVCpu->vmm.s.fInRendezvous = true;
2134
2135	/*
2136	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2137	*/
2138	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2139	{
2140	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2141	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2142	}
2143	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2144	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2145	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2146	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2147	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2148	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2149	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2150	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2151	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2152	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2153	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2154
2155	/*
2156	* Set the FF and poke the other EMTs.
2157	*/
2158	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2159	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2160
2161	/*
2162	* Do the same ourselves.
2163	*/
2164	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2165
2166	/*
2167	* The caller waits for the other EMTs to be done and return before doing
2168	* the cleanup. This makes away with wakeup / reset races we would otherwise
2169	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2170	*/
2171	for (;;)
2172	{
2173	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2174	AssertLogRelRC(rc);
2175	if (!pVM->vmm.s.fRendezvousRecursion)
2176	break;
2177	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2178	}
2179
2180	/*
2181	* Get the return code and clean up a little bit.
2182	*/
2183	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2184	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2185
2186	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2187	pVCpu->vmm.s.fInRendezvous = false;
2188
2189	/*
2190	* Merge rcStrict, rcStrict2 and rcStrict3.
2191	*/
2192	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2193	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2194	if ( rcStrict2 != VINF_SUCCESS
2195	&& ( rcStrict == VINF_SUCCESS
2196	\|\| rcStrict > rcStrict2))
2197	rcStrict = rcStrict2;
2198	if ( rcStrict3 != VINF_SUCCESS
2199	&& ( rcStrict == VINF_SUCCESS
2200	\|\| rcStrict > rcStrict3))
2201	rcStrict = rcStrict3;
2202	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2203	}
2204
2205	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2206	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2207	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2208	VERR_IPE_UNEXPECTED_INFO_STATUS);
2209	return VBOXSTRICTRC_VAL(rcStrict);
2210	}
2211
2212
2213	/**
2214	* Interface for vmR3SetHaltMethodU.
2215	*
2216	* @param pVCpu The cross context virtual CPU structure of the
2217	* calling EMT.
2218	* @param fMayHaltInRing0 The new state.
2219	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2220	* @thread EMT(pVCpu)
2221	*
2222	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2223	* component.
2224	*/
2225	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2226	{
2227	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2228	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2229	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2230	}
2231
2232
2233	/**
2234	* Read from the ring 0 jump buffer stack.
2235	*
2236	* @returns VBox status code.
2237	*
2238	* @param pVM The cross context VM structure.
2239	* @param idCpu The ID of the source CPU context (for the address).
2240	* @param R0Addr Where to start reading.
2241	* @param pvBuf Where to store the data we've read.
2242	* @param cbRead The number of bytes to read.
2243	*/
2244	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2245	{
2246	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2247	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2248	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2249
2250	/*
2251	* Hopefully we've got all the requested bits. If not supply what we
2252	* can and zero the remaining stuff.
2253	*/
2254	RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2255	if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2256	{
2257	size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2258	if (cbRead <= cbValid)
2259	{
2260	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2261	return VINF_SUCCESS;
2262	}
2263
2264	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2265	RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2266	}
2267	else
2268	RT_BZERO(pvBuf, cbRead);
2269
2270	/*
2271	* Supply the setjmp return RIP/EIP if requested.
2272	*/
2273	if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2274	&& pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2275	{
2276	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2277	size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2278	size_t offDst = 0;
2279	if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2280	offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2281	else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2282	{
2283	size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2284	Assert(offSrc < cbSrc);
2285	pbSrc -= offSrc;
2286	cbSrc -= offSrc;
2287	}
2288	if (cbSrc > cbRead - offDst)
2289	cbSrc = cbRead - offDst;
2290	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2291
2292	//if (cbSrc == cbRead)
2293	// rc = VINF_SUCCESS;
2294	}
2295
2296	return VINF_SUCCESS;
2297	}
2298
2299
2300	/**
2301	* Used by the DBGF stack unwinder to initialize the register state.
2302	*
2303	* @param pUVM The user mode VM handle.
2304	* @param idCpu The ID of the CPU being unwound.
2305	* @param pState The unwind state to initialize.
2306	*/
2307	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2308	{
2309	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2310	AssertReturnVoid(pVCpu);
2311
2312	/*
2313	* This is all we really need here if we had proper unwind info (win64 only)...
2314	*/
2315	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2316	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2317	pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2318
2319	/*
2320	* Locate the resume point on the stack.
2321	*/
2322	#ifdef RT_ARCH_AMD64
2323	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2324	uintptr_t off = 0;
2325	# ifdef RT_OS_WINDOWS
2326	off += 0xa0; /* XMM6 thru XMM15 */
2327	# endif
2328	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2329	off += 8;
2330	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2331	off += 8;
2332	# ifdef RT_OS_WINDOWS
2333	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2334	off += 8;
2335	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2336	off += 8;
2337	# endif
2338	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2339	off += 8;
2340	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2341	off += 8;
2342	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2343	off += 8;
2344	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2345	off += 8;
2346	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2347	off += 8;
2348	pState->uPc = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2349	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2350
2351	#elif defined(RT_ARCH_X86)
2352	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2353	uintptr_t off = 0;
2354	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2355	off += 4;
2356	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2357	off += 4;
2358	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2359	off += 4;
2360	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2361	off += 4;
2362	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2363	off += 4;
2364	pState->uPc = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2365	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2366
2367	#elif defined(RT_ARCH_ARM64)
2368	/** @todo PORTME: arm ring-0 */
2369
2370	#else
2371	# error "Port me"
2372	#endif
2373	}
2374
2375
2376	/**
2377	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2378	*
2379	* @returns VBox status code.
2380	* @param pVM The cross context VM structure.
2381	* @param uOperation Operation to execute.
2382	* @param u64Arg Constant argument.
2383	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2384	* details.
2385	*/
2386	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2387	{
2388	PVMCPU pVCpu = VMMGetCpu(pVM);
2389	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2390	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2391	}
2392
2393
2394	/**
2395	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2396	*
2397	* @returns VBox status code.
2398	* @param pVM The cross context VM structure.
2399	* @param pVCpu The cross context VM structure.
2400	* @param enmOperation Operation to execute.
2401	* @param u64Arg Constant argument.
2402	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2403	* details.
2404	*/
2405	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2406	{
2407	/*
2408	* Call ring-0.
2409	*/
2410	#ifdef NO_SUPCALLR0VMM
2411	int rc = VERR_GENERAL_FAILURE;
2412	#else
2413	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2414	#endif
2415
2416	/*
2417	* Flush the logs and deal with ring-0 assertions.
2418	*/
2419	#ifdef LOG_ENABLED
2420	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2421	#endif
2422	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2423	if (rc != VERR_VMM_RING0_ASSERTION)
2424	{
2425	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2426	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2427	VERR_IPE_UNEXPECTED_INFO_STATUS);
2428	return rc;
2429	}
2430	return vmmR3HandleRing0Assert(pVM, pVCpu);
2431	}
2432
2433
2434	/**
2435	* Logs a ring-0 assertion ASAP after returning to ring-3.
2436	*
2437	* @returns VBox status code.
2438	* @param pVM The cross context VM structure.
2439	* @param pVCpu The cross context virtual CPU structure.
2440	*/
2441	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2442	{
2443	RT_NOREF(pVCpu);
2444	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2445	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2446	return VERR_VMM_RING0_ASSERTION;
2447	}
2448
2449
2450	/**
2451	* Displays the Force action Flags.
2452	*
2453	* @param pVM The cross context VM structure.
2454	* @param pHlp The output helpers.
2455	* @param pszArgs The additional arguments (ignored).
2456	*/
2457	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2458	{
2459	int c;
2460	uint32_t f;
2461	NOREF(pszArgs);
2462
2463	#define PRINT_FLAG(prf,flag) do { \
2464	if (f & (prf##flag)) \
2465	{ \
2466	static const char *s_psz = #flag; \
2467	if (!(c % 6)) \
2468	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2469	else \
2470	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2471	c++; \
2472	f &= ~(prf##flag); \
2473	} \
2474	} while (0)
2475
2476	#define PRINT_GROUP(prf,grp,sfx) do { \
2477	if (f & (prf##grp##sfx)) \
2478	{ \
2479	static const char *s_psz = #grp; \
2480	if (!(c % 5)) \
2481	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2482	else \
2483	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2484	c++; \
2485	} \
2486	} while (0)
2487
2488	/*
2489	* The global flags.
2490	*/
2491	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2492	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2493
2494	/* show the flag mnemonics */
2495	c = 0;
2496	f = fGlobalForcedActions;
2497	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2498	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2499	PRINT_FLAG(VM_FF_,PDM_DMA);
2500	PRINT_FLAG(VM_FF_,DBGF);
2501	PRINT_FLAG(VM_FF_,REQUEST);
2502	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2503	PRINT_FLAG(VM_FF_,RESET);
2504	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2505	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2506	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2507	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2508	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2509	if (f)
2510	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2511	else
2512	pHlp->pfnPrintf(pHlp, "\n");
2513
2514	/* the groups */
2515	c = 0;
2516	f = fGlobalForcedActions;
2517	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2518	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2519	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2520	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2521	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2522	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2523	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2524	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2525	if (c)
2526	pHlp->pfnPrintf(pHlp, "\n");
2527
2528	/*
2529	* Per CPU flags.
2530	*/
2531	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2532	{
2533	PVMCPU pVCpu = pVM->apCpusR3[i];
2534	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2535	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2536
2537	/* show the flag mnemonics */
2538	c = 0;
2539	f = fLocalForcedActions;
2540	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2541	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2542	PRINT_FLAG(VMCPU_FF_,TIMER);
2543	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2544	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2545	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2546	PRINT_FLAG(VMCPU_FF_,UNHALT);
2547	PRINT_FLAG(VMCPU_FF_,IEM);
2548	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2549	PRINT_FLAG(VMCPU_FF_,DBGF);
2550	PRINT_FLAG(VMCPU_FF_,REQUEST);
2551	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2552	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2553	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2554	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2555	PRINT_FLAG(VMCPU_FF_,TO_R3);
2556	PRINT_FLAG(VMCPU_FF_,IOM);
2557	if (f)
2558	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2559	else
2560	pHlp->pfnPrintf(pHlp, "\n");
2561
2562	/* the groups */
2563	c = 0;
2564	f = fLocalForcedActions;
2565	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2566	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2567	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2568	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2569	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2570	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2571	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2572	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2573	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2574	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2575	if (c)
2576	pHlp->pfnPrintf(pHlp, "\n");
2577	}
2578
2579	#undef PRINT_FLAG
2580	#undef PRINT_GROUP
2581	}
2582

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 97178

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