VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 96880

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1/* $Id: VMM.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28//#define NO_SUPCALLR0VMM
29
30/** @page pg_vmm VMM - The Virtual Machine Monitor
31 *
32 * The VMM component is two things at the moment, it's a component doing a few
33 * management and routing tasks, and it's the whole virtual machine monitor
34 * thing. For hysterical reasons, it is not doing all the management that one
35 * would expect, this is instead done by @ref pg_vm. We'll address this
36 * misdesign eventually, maybe.
37 *
38 * VMM is made up of these components:
39 * - @subpage pg_cfgm
40 * - @subpage pg_cpum
41 * - @subpage pg_dbgf
42 * - @subpage pg_em
43 * - @subpage pg_gim
44 * - @subpage pg_gmm
45 * - @subpage pg_gvmm
46 * - @subpage pg_hm
47 * - @subpage pg_iem
48 * - @subpage pg_iom
49 * - @subpage pg_mm
50 * - @subpage pg_nem
51 * - @subpage pg_pdm
52 * - @subpage pg_pgm
53 * - @subpage pg_selm
54 * - @subpage pg_ssm
55 * - @subpage pg_stam
56 * - @subpage pg_tm
57 * - @subpage pg_trpm
58 * - @subpage pg_vm
59 *
60 *
61 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62 *
63 *
64 * @section sec_vmmstate VMM State
65 *
66 * @image html VM_Statechart_Diagram.gif
67 *
68 * To be written.
69 *
70 *
71 * @subsection subsec_vmm_init VMM Initialization
72 *
73 * To be written.
74 *
75 *
76 * @subsection subsec_vmm_term VMM Termination
77 *
78 * To be written.
79 *
80 *
81 * @section sec_vmm_limits VMM Limits
82 *
83 * There are various resource limits imposed by the VMM and it's
84 * sub-components. We'll list some of them here.
85 *
86 * On 64-bit hosts:
87 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88 * can be increased up to 64K - 1.
89 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91 * - A VM can be assigned all the memory we can use (16TB), however, the
92 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94 *
95 * On 32-bit hosts:
96 * - Max 127 VMs. Imposed by GMM's per page structure.
97 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98 * ROM pages. The limit is imposed by the 28-bit page ID used
99 * internally in GMM. It is also limited by PAE.
100 * - A VM can be assigned all the memory GMM can allocate, however, the
101 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103 *
104 */
105
106
107/*********************************************************************************************************************************
108* Header Files *
109*********************************************************************************************************************************/
110#define LOG_GROUP LOG_GROUP_VMM
111#include <VBox/vmm/vmm.h>
112#include <VBox/vmm/vmapi.h>
113#include <VBox/vmm/pgm.h>
114#include <VBox/vmm/cfgm.h>
115#include <VBox/vmm/pdmqueue.h>
116#include <VBox/vmm/pdmcritsect.h>
117#include <VBox/vmm/pdmcritsectrw.h>
118#include <VBox/vmm/pdmapi.h>
119#include <VBox/vmm/cpum.h>
120#include <VBox/vmm/gim.h>
121#include <VBox/vmm/mm.h>
122#include <VBox/vmm/nem.h>
123#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124# include <VBox/vmm/iem.h>
125#endif
126#include <VBox/vmm/iom.h>
127#include <VBox/vmm/trpm.h>
128#include <VBox/vmm/selm.h>
129#include <VBox/vmm/em.h>
130#include <VBox/sup.h>
131#include <VBox/vmm/dbgf.h>
132#include <VBox/vmm/apic.h>
133#include <VBox/vmm/ssm.h>
134#include <VBox/vmm/tm.h>
135#include "VMMInternal.h"
136#include <VBox/vmm/vmcc.h>
137
138#include <VBox/err.h>
139#include <VBox/param.h>
140#include <VBox/version.h>
141#include <VBox/vmm/hm.h>
142#include <iprt/assert.h>
143#include <iprt/alloc.h>
144#include <iprt/asm.h>
145#include <iprt/time.h>
146#include <iprt/semaphore.h>
147#include <iprt/stream.h>
148#include <iprt/string.h>
149#include <iprt/stdarg.h>
150#include <iprt/ctype.h>
151#include <iprt/x86.h>
152
153
154/*********************************************************************************************************************************
155* Defined Constants And Macros *
156*********************************************************************************************************************************/
157/** The saved state version. */
158#define VMM_SAVED_STATE_VERSION 4
159/** The saved state version used by v3.0 and earlier. (Teleportation) */
160#define VMM_SAVED_STATE_VERSION_3_0 3
161
162/** Macro for flushing the ring-0 logging. */
163#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
164 do { \
165 size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
166 if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
167 || (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
168 { /* likely? */ } \
169 else \
170 vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
171 } while (0)
172
173
174/*********************************************************************************************************************************
175* Internal Functions *
176*********************************************************************************************************************************/
177static void vmmR3InitRegisterStats(PVM pVM);
178static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
179static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
180#if 0 /* pointless when timers doesn't run on EMT */
181static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
182#endif
183static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
184 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
185static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
186static FNRTTHREAD vmmR3LogFlusher;
187static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
188 PRTLOGGER pDstLogger);
189static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
190
191
192
193/**
194 * Initializes the VMM.
195 *
196 * @returns VBox status code.
197 * @param pVM The cross context VM structure.
198 */
199VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
200{
201 LogFlow(("VMMR3Init\n"));
202
203 /*
204 * Assert alignment, sizes and order.
205 */
206 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
207 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
208
209 /*
210 * Init basic VM VMM members.
211 */
212 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
213 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
214 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
215 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
216 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
217 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
218 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
219 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
220 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
221 pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
222
223#if 0 /* pointless when timers doesn't run on EMT */
224 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
225 * The EMT yield interval. The EMT yielding is a hack we employ to play a
226 * bit nicer with the rest of the system (like for instance the GUI).
227 */
228 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
229 23 /* Value arrived at after experimenting with the grub boot prompt. */);
230 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
231#endif
232
233 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
234 * Controls whether we employ per-cpu preemption timers to limit the time
235 * spent executing guest code. This option is not available on all
236 * platforms and we will silently ignore this setting then. If we are
237 * running in VT-x mode, we will use the VMX-preemption timer instead of
238 * this one when possible.
239 */
240 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
241 int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
242 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
243
244 /*
245 * Initialize the VMM rendezvous semaphores.
246 */
247 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
248 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
249 return VERR_NO_MEMORY;
250 for (VMCPUID i = 0; i < pVM->cCpus; i++)
251 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
252 for (VMCPUID i = 0; i < pVM->cCpus; i++)
253 {
254 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
255 AssertRCReturn(rc, rc);
256 }
257 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
258 AssertRCReturn(rc, rc);
259 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
260 AssertRCReturn(rc, rc);
261 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
262 AssertRCReturn(rc, rc);
263 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
264 AssertRCReturn(rc, rc);
265 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
266 AssertRCReturn(rc, rc);
267 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
268 AssertRCReturn(rc, rc);
269 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
270 AssertRCReturn(rc, rc);
271 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
272 AssertRCReturn(rc, rc);
273
274 /*
275 * Register the saved state data unit.
276 */
277 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
278 NULL, NULL, NULL,
279 NULL, vmmR3Save, NULL,
280 NULL, vmmR3Load, NULL);
281 if (RT_FAILURE(rc))
282 return rc;
283
284 /*
285 * Register the Ring-0 VM handle with the session for fast ioctl calls.
286 */
287 bool const fDriverless = SUPR3IsDriverless();
288 if (!fDriverless)
289 {
290 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
291 if (RT_FAILURE(rc))
292 return rc;
293 }
294
295#ifdef VBOX_WITH_NMI
296 /*
297 * Allocate mapping for the host APIC.
298 */
299 rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
300 AssertRC(rc);
301#endif
302 if (RT_SUCCESS(rc))
303 {
304 /*
305 * Start the log flusher thread.
306 */
307 if (!fDriverless)
308 rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /*cbStack*/,
309 RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
310 if (RT_SUCCESS(rc))
311 {
312
313 /*
314 * Debug info and statistics.
315 */
316 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
317 vmmR3InitRegisterStats(pVM);
318 vmmInitFormatTypes();
319
320 return VINF_SUCCESS;
321 }
322 }
323 /** @todo Need failure cleanup? */
324
325 return rc;
326}
327
328
329/**
330 * VMMR3Init worker that register the statistics with STAM.
331 *
332 * @param pVM The cross context VM structure.
333 */
334static void vmmR3InitRegisterStats(PVM pVM)
335{
336 RT_NOREF_PV(pVM);
337
338 /* Nothing to do here in driverless mode. */
339 if (SUPR3IsDriverless())
340 return;
341
342 /*
343 * Statistics.
344 */
345 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
346 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
347 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
348 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
349 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
350 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
351 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
352 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
353 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
354 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
355 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
356 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
357 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
358 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
359 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
360 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
361 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
362 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
363 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
364 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
365 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
366 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
367 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
368 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
369 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
370 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
371 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
372 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
373 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
374 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
375 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
376 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
377 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
378 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
397
398 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
399 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
400
401 for (VMCPUID i = 0; i < pVM->cCpus; i++)
402 {
403 PVMCPU pVCpu = pVM->apCpusR3[i];
404 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
405 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
406 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
407 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
408 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
409 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
410 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
411 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
412 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
413 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
414 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
415 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
416 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
417 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
418 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
419 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
420 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
421
422 STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
423
424 PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
425 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
426 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
427 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
428 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
429 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
430 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
431 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
432 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
433
434 pShared = &pVCpu->vmm.s.u.s.RelLogger;
435 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
436 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
437 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
438 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
439 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
440 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
441 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
442 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
443 }
444}
445
446
447/**
448 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
449 *
450 * @returns VBox status code.
451 * @param pVM The cross context VM structure.
452 * @param pVCpu The cross context per CPU structure.
453 * @thread EMT(pVCpu)
454 */
455static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
456{
457 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
458}
459
460
461/**
462 * Initializes the R0 VMM.
463 *
464 * @returns VBox status code.
465 * @param pVM The cross context VM structure.
466 */
467VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
468{
469 int rc;
470 PVMCPU pVCpu = VMMGetCpu(pVM);
471 Assert(pVCpu && pVCpu->idCpu == 0);
472
473 /*
474 * Nothing to do here in driverless mode.
475 */
476 if (SUPR3IsDriverless())
477 return VINF_SUCCESS;
478
479 /*
480 * Make sure the ring-0 loggers are up to date.
481 */
482 rc = VMMR3UpdateLoggers(pVM);
483 if (RT_FAILURE(rc))
484 return rc;
485
486 /*
487 * Call Ring-0 entry with init code.
488 */
489#ifdef NO_SUPCALLR0VMM
490 //rc = VERR_GENERAL_FAILURE;
491 rc = VINF_SUCCESS;
492#else
493 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
494#endif
495
496 /*
497 * Flush the logs & deal with assertions.
498 */
499#ifdef LOG_ENABLED
500 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
501#endif
502 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
503 if (rc == VERR_VMM_RING0_ASSERTION)
504 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
505 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
506 {
507 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
508 if (RT_SUCCESS(rc))
509 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
510 }
511
512 /*
513 * Log stuff we learned in ring-0.
514 */
515 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
516 if (pVM->vmm.s.fIsUsingContextHooks)
517 LogRel(("VMM: Enabled thread-context hooks\n"));
518 else
519 LogRel(("VMM: Thread-context hooks unavailable\n"));
520
521 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
522 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
523 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
524 else
525 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
526 if (pVM->vmm.s.fIsPreemptPossible)
527 LogRel(("VMM: Kernel preemption is possible\n"));
528 else
529 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
530
531 /*
532 * Send all EMTs to ring-0 to get their logger initialized.
533 */
534 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
535 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
536
537 return rc;
538}
539
540
541/**
542 * Called when an init phase completes.
543 *
544 * @returns VBox status code.
545 * @param pVM The cross context VM structure.
546 * @param enmWhat Which init phase.
547 */
548VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
549{
550 int rc = VINF_SUCCESS;
551
552 switch (enmWhat)
553 {
554 case VMINITCOMPLETED_RING3:
555 {
556#if 0 /* pointless when timers doesn't run on EMT */
557 /*
558 * Create the EMT yield timer.
559 */
560 rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
561 "EMT Yielder", &pVM->vmm.s.hYieldTimer);
562 AssertRCReturn(rc, rc);
563
564 rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
565 AssertRCReturn(rc, rc);
566#endif
567 break;
568 }
569
570 case VMINITCOMPLETED_HM:
571 {
572 /*
573 * Disable the periodic preemption timers if we can use the
574 * VMX-preemption timer instead.
575 */
576 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
577 && HMR3IsVmxPreemptionTimerUsed(pVM))
578 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
579 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
580
581 /*
582 * Last chance for GIM to update its CPUID leaves if it requires
583 * knowledge/information from HM initialization.
584 */
585/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
586 rc = GIMR3InitCompleted(pVM);
587 AssertRCReturn(rc, rc);
588
589 /*
590 * CPUM's post-initialization (print CPUIDs).
591 */
592 CPUMR3LogCpuIdAndMsrFeatures(pVM);
593 break;
594 }
595
596 default: /* shuts up gcc */
597 break;
598 }
599
600 return rc;
601}
602
603
604/**
605 * Terminate the VMM bits.
606 *
607 * @returns VBox status code.
608 * @param pVM The cross context VM structure.
609 */
610VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
611{
612 PVMCPU pVCpu = VMMGetCpu(pVM);
613 Assert(pVCpu && pVCpu->idCpu == 0);
614
615 /*
616 * Call Ring-0 entry with termination code.
617 */
618 int rc = VINF_SUCCESS;
619 if (!SUPR3IsDriverless())
620 {
621#ifndef NO_SUPCALLR0VMM
622 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
623#endif
624 }
625
626 /*
627 * Flush the logs & deal with assertions.
628 */
629#ifdef LOG_ENABLED
630 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
631#endif
632 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
633 if (rc == VERR_VMM_RING0_ASSERTION)
634 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
635 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
636 {
637 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
638 if (RT_SUCCESS(rc))
639 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
640 }
641
642 /*
643 * Do clean ups.
644 */
645 for (VMCPUID i = 0; i < pVM->cCpus; i++)
646 {
647 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
648 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
649 }
650 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
651 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
652 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
653 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
654 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
655 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
656 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
657 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
658 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
659 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
660 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
661 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
662 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
663 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
664 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
665 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
666
667 vmmTermFormatTypes();
668
669 /*
670 * Wait for the log flusher thread to complete.
671 */
672 if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
673 {
674 int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
675 AssertLogRelRC(rc2);
676 if (RT_SUCCESS(rc2))
677 pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
678 }
679
680 return rc;
681}
682
683
684/**
685 * Applies relocations to data and code managed by this
686 * component. This function will be called at init and
687 * whenever the VMM need to relocate it self inside the GC.
688 *
689 * The VMM will need to apply relocations to the core code.
690 *
691 * @param pVM The cross context VM structure.
692 * @param offDelta The relocation delta.
693 */
694VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
695{
696 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
697 RT_NOREF(offDelta);
698
699 /*
700 * Update the logger.
701 */
702 VMMR3UpdateLoggers(pVM);
703}
704
705
706/**
707 * Worker for VMMR3UpdateLoggers.
708 */
709static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
710{
711 /*
712 * Get the group count.
713 */
714 uint32_t uGroupsCrc32 = 0;
715 uint32_t cGroups = 0;
716 uint64_t fFlags = 0;
717 int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
718 Assert(rc == VERR_BUFFER_OVERFLOW);
719
720 /*
721 * Allocate the request of the right size.
722 */
723 uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
724 PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
725 if (pReq)
726 {
727 pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
728 pReq->Hdr.cbReq = cbReq;
729 pReq->cGroups = cGroups;
730 rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
731 AssertRC(rc);
732 if (RT_SUCCESS(rc))
733 rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
734
735 RTMemFree(pReq);
736 }
737 else
738 rc = VERR_NO_MEMORY;
739 return rc;
740}
741
742
743/**
744 * Updates the settings for the RC and R0 loggers.
745 *
746 * @returns VBox status code.
747 * @param pVM The cross context VM structure.
748 * @thread EMT
749 */
750VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
751{
752 /* Nothing to do here if we're in driverless mode: */
753 if (SUPR3IsDriverless())
754 return VINF_SUCCESS;
755
756 PVMCPU pVCpu = VMMGetCpu(pVM);
757 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
758
759 /*
760 * Each EMT has each own logger instance.
761 */
762 /* Debug logging.*/
763 int rcDebug = VINF_SUCCESS;
764#ifdef LOG_ENABLED
765 PRTLOGGER const pDefault = RTLogDefaultInstance();
766 if (pDefault)
767 rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /*fReleaseLogger*/);
768#else
769 RT_NOREF(pVM);
770#endif
771
772 /* Release logging. */
773 int rcRelease = VINF_SUCCESS;
774 PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
775 if (pRelease)
776 rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /*fReleaseLogger*/);
777
778 return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
779}
780
781
782/**
783 * @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
784 */
785static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
786{
787 PVM const pVM = (PVM)pvUser;
788 RT_NOREF(hThreadSelf);
789
790 /* Reset the flusher state before we start: */
791 pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
792
793 /*
794 * The work loop.
795 */
796 for (;;)
797 {
798 /*
799 * Wait for work.
800 */
801 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
802 if (RT_SUCCESS(rc))
803 {
804 /* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
805 VMMLOGFLUSHERENTRY Item;
806 Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
807 if ( Item.s.idCpu < pVM->cCpus
808 && Item.s.idxLogger < VMMLOGGER_IDX_MAX
809 && Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
810 {
811 /*
812 * Verify the request.
813 */
814 PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
815 PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
816 uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
817 if (cbToFlush > 0)
818 {
819 if (cbToFlush <= pShared->cbBuf)
820 {
821 char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
822 if (pchBufR3)
823 {
824 /*
825 * Do the flushing.
826 */
827 PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
828 ? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
829 if (pLogger)
830 {
831 char szBefore[128];
832 RTStrPrintf(szBefore, sizeof(szBefore),
833 "*FLUSH* idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
834 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
835 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
836 RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "*FLUSH DONE*\n");
837 }
838 }
839 else
840 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
841 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
842 }
843 else
844 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
845 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
846 }
847 else
848 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
849 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
850
851 /*
852 * Mark the descriptor as flushed and set the request flag for same.
853 */
854 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
855 }
856 else
857 {
858 Assert(Item.s.idCpu == UINT16_MAX);
859 Assert(Item.s.idxLogger == UINT8_MAX);
860 Assert(Item.s.idxBuffer == UINT8_MAX);
861 }
862 }
863 /*
864 * Interrupted can happen, just ignore it.
865 */
866 else if (rc == VERR_INTERRUPTED)
867 { /* ignore*/ }
868 /*
869 * The ring-0 termination code will set the shutdown flag and wake us
870 * up, and we should return with object destroyed. In case there is
871 * some kind of race, we might also get sempahore destroyed.
872 */
873 else if ( rc == VERR_OBJECT_DESTROYED
874 || rc == VERR_SEM_DESTROYED
875 || rc == VERR_INVALID_HANDLE)
876 {
877 LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
878 return VINF_SUCCESS;
879 }
880 /*
881 * There shouldn't be any other errors...
882 */
883 else
884 {
885 LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
886 AssertRC(rc);
887 RTThreadSleep(1);
888 }
889 }
890}
891
892
893/**
894 * Helper for VMM_FLUSH_R0_LOG that does the flushing.
895 *
896 * @param pVM The cross context VM structure.
897 * @param pVCpu The cross context virtual CPU structure of the calling
898 * EMT.
899 * @param pShared The shared logger data.
900 * @param idxBuf The buffer to flush.
901 * @param pDstLogger The destination IPRT logger.
902 */
903static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
904{
905 uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
906 const char *pszBefore = cbToFlush < 256 ? NULL : "*FLUSH*\n";
907 const char *pszAfter = cbToFlush < 256 ? NULL : "*END*\n";
908
909#if VMMLOGGER_BUFFER_COUNT > 1
910 /*
911 * When we have more than one log buffer, the flusher thread may still be
912 * working on the previous buffer when we get here.
913 */
914 char szBefore[64];
915 if (pShared->cFlushing > 0)
916 {
917 STAM_REL_PROFILE_START(&pShared->StatRaces, a);
918 uint64_t const nsStart = RTTimeNanoTS();
919
920 /* A no-op, but it takes the lock and the hope is that we end up waiting
921 on the flusher to finish up. */
922 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
923 if (pShared->cFlushing != 0)
924 {
925 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
926
927 /* If no luck, go to ring-0 and to proper waiting. */
928 if (pShared->cFlushing != 0)
929 {
930 STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
931 SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
932 }
933 }
934
935 RTStrPrintf(szBefore, sizeof(szBefore), "*%sFLUSH* waited %'RU64 ns\n",
936 pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
937 pszBefore = szBefore;
938 STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
939 }
940#else
941 RT_NOREF(pVM, pVCpu);
942#endif
943
944 RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
945 pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
946}
947
948
949/**
950 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
951 *
952 * @returns Pointer to the buffer.
953 * @param pVM The cross context VM structure.
954 */
955VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
956{
957 return pVM->vmm.s.szRing0AssertMsg1;
958}
959
960
961/**
962 * Returns the VMCPU of the specified virtual CPU.
963 *
964 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
965 *
966 * @param pUVM The user mode VM handle.
967 * @param idCpu The ID of the virtual CPU.
968 */
969VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
970{
971 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
972 AssertReturn(idCpu < pUVM->cCpus, NULL);
973 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
974 return pUVM->pVM->apCpusR3[idCpu];
975}
976
977
978/**
979 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
980 *
981 * @returns Pointer to the buffer.
982 * @param pVM The cross context VM structure.
983 */
984VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
985{
986 return pVM->vmm.s.szRing0AssertMsg2;
987}
988
989
990/**
991 * Execute state save operation.
992 *
993 * @returns VBox status code.
994 * @param pVM The cross context VM structure.
995 * @param pSSM SSM operation handle.
996 */
997static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
998{
999 LogFlow(("vmmR3Save:\n"));
1000
1001 /*
1002 * Save the started/stopped state of all CPUs except 0 as it will always
1003 * be running. This avoids breaking the saved state version. :-)
1004 */
1005 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1006 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1007
1008 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1009}
1010
1011
1012/**
1013 * Execute state load operation.
1014 *
1015 * @returns VBox status code.
1016 * @param pVM The cross context VM structure.
1017 * @param pSSM SSM operation handle.
1018 * @param uVersion Data layout version.
1019 * @param uPass The data pass.
1020 */
1021static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1022{
1023 LogFlow(("vmmR3Load:\n"));
1024 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1025
1026 /*
1027 * Validate version.
1028 */
1029 if ( uVersion != VMM_SAVED_STATE_VERSION
1030 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1031 {
1032 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1033 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1034 }
1035
1036 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1037 {
1038 /* Ignore the stack bottom, stack pointer and stack bits. */
1039 RTRCPTR RCPtrIgnored;
1040 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1041 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1042#ifdef RT_OS_DARWIN
1043 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1044 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1045 && SSMR3HandleRevision(pSSM) >= 48858
1046 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1047 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1048 )
1049 SSMR3Skip(pSSM, 16384);
1050 else
1051 SSMR3Skip(pSSM, 8192);
1052#else
1053 SSMR3Skip(pSSM, 8192);
1054#endif
1055 }
1056
1057 /*
1058 * Restore the VMCPU states. VCPU 0 is always started.
1059 */
1060 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1061 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1062 {
1063 bool fStarted;
1064 int rc = SSMR3GetBool(pSSM, &fStarted);
1065 if (RT_FAILURE(rc))
1066 return rc;
1067 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1068 }
1069
1070 /* terminator */
1071 uint32_t u32;
1072 int rc = SSMR3GetU32(pSSM, &u32);
1073 if (RT_FAILURE(rc))
1074 return rc;
1075 if (u32 != UINT32_MAX)
1076 {
1077 AssertMsgFailed(("u32=%#x\n", u32));
1078 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1079 }
1080 return VINF_SUCCESS;
1081}
1082
1083
1084/**
1085 * Suspends the CPU yielder.
1086 *
1087 * @param pVM The cross context VM structure.
1088 */
1089VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1090{
1091#if 0 /* pointless when timers doesn't run on EMT */
1092 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1093 if (!pVM->vmm.s.cYieldResumeMillies)
1094 {
1095 uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1096 uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1097 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1098 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1099 else
1100 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1101 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1102 }
1103 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1104#else
1105 RT_NOREF(pVM);
1106#endif
1107}
1108
1109
1110/**
1111 * Stops the CPU yielder.
1112 *
1113 * @param pVM The cross context VM structure.
1114 */
1115VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1116{
1117#if 0 /* pointless when timers doesn't run on EMT */
1118 if (!pVM->vmm.s.cYieldResumeMillies)
1119 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1120 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1121 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1122#else
1123 RT_NOREF(pVM);
1124#endif
1125}
1126
1127
1128/**
1129 * Resumes the CPU yielder when it has been a suspended or stopped.
1130 *
1131 * @param pVM The cross context VM structure.
1132 */
1133VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1134{
1135#if 0 /* pointless when timers doesn't run on EMT */
1136 if (pVM->vmm.s.cYieldResumeMillies)
1137 {
1138 TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1139 pVM->vmm.s.cYieldResumeMillies = 0;
1140 }
1141#else
1142 RT_NOREF(pVM);
1143#endif
1144}
1145
1146
1147#if 0 /* pointless when timers doesn't run on EMT */
1148/**
1149 * @callback_method_impl{FNTMTIMERINT, EMT yielder}
1150 *
1151 * @todo This is a UNI core/thread thing, really... Should be reconsidered.
1152 */
1153static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1154{
1155 NOREF(pvUser);
1156
1157 /*
1158 * This really needs some careful tuning. While we shouldn't be too greedy since
1159 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1160 * because that'll cause us to stop up.
1161 *
1162 * The current logic is to use the default interval when there is no lag worth
1163 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1164 *
1165 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1166 * so the lag is up to date.)
1167 */
1168 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1169 if ( u64Lag < 50000000 /* 50ms */
1170 || ( u64Lag < 1000000000 /* 1s */
1171 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1172 )
1173 {
1174 uint64_t u64Elapsed = RTTimeNanoTS();
1175 pVM->vmm.s.u64LastYield = u64Elapsed;
1176
1177 RTThreadYield();
1178
1179#ifdef LOG_ENABLED
1180 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1181 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1182#endif
1183 }
1184 TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1185}
1186#endif
1187
1188
1189/**
1190 * Executes guest code (Intel VT-x and AMD-V).
1191 *
1192 * @param pVM The cross context VM structure.
1193 * @param pVCpu The cross context virtual CPU structure.
1194 */
1195VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1196{
1197 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1198
1199 int rc;
1200 do
1201 {
1202#ifdef NO_SUPCALLR0VMM
1203 rc = VERR_GENERAL_FAILURE;
1204#else
1205 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1206 if (RT_LIKELY(rc == VINF_SUCCESS))
1207 rc = pVCpu->vmm.s.iLastGZRc;
1208#endif
1209 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1210
1211#if 0 /** @todo triggers too often */
1212 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1213#endif
1214
1215 /*
1216 * Flush the logs
1217 */
1218#ifdef LOG_ENABLED
1219 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1220#endif
1221 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1222 if (rc != VERR_VMM_RING0_ASSERTION)
1223 {
1224 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1225 return rc;
1226 }
1227 return vmmR3HandleRing0Assert(pVM, pVCpu);
1228}
1229
1230
1231/**
1232 * Perform one of the fast I/O control VMMR0 operation.
1233 *
1234 * @returns VBox strict status code.
1235 * @param pVM The cross context VM structure.
1236 * @param pVCpu The cross context virtual CPU structure.
1237 * @param enmOperation The operation to perform.
1238 */
1239VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1240{
1241 VBOXSTRICTRC rcStrict;
1242 do
1243 {
1244#ifdef NO_SUPCALLR0VMM
1245 rcStrict = VERR_GENERAL_FAILURE;
1246#else
1247 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1248 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1249 rcStrict = pVCpu->vmm.s.iLastGZRc;
1250#endif
1251 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1252
1253 /*
1254 * Flush the logs
1255 */
1256#ifdef LOG_ENABLED
1257 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1258#endif
1259 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1260 if (rcStrict != VERR_VMM_RING0_ASSERTION)
1261 return rcStrict;
1262 return vmmR3HandleRing0Assert(pVM, pVCpu);
1263}
1264
1265
1266/**
1267 * VCPU worker for VMMR3SendStartupIpi.
1268 *
1269 * @param pVM The cross context VM structure.
1270 * @param idCpu Virtual CPU to perform SIPI on.
1271 * @param uVector The SIPI vector.
1272 */
1273static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1274{
1275 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1276 VMCPU_ASSERT_EMT(pVCpu);
1277
1278 /*
1279 * In the INIT state, the target CPU is only responsive to an SIPI.
1280 * This is also true for when when the CPU is in VMX non-root mode.
1281 *
1282 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1283 * See Intel spec. 26.6.2 "Activity State".
1284 */
1285 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1286 return VINF_SUCCESS;
1287
1288 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1289#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1290 if (CPUMIsGuestInVmxRootMode(pCtx))
1291 {
1292 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1293 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1294 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1295
1296 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1297 return VINF_SUCCESS;
1298 }
1299#endif
1300
1301 pCtx->cs.Sel = uVector << 8;
1302 pCtx->cs.ValidSel = uVector << 8;
1303 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1304 pCtx->cs.u64Base = uVector << 12;
1305 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1306 pCtx->rip = 0;
1307
1308 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1309
1310# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1311 EMSetState(pVCpu, EMSTATE_HALTED);
1312 return VINF_EM_RESCHEDULE;
1313# else /* And if we go the VMCPU::enmState way it can stay here. */
1314 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1315 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1316 return VINF_SUCCESS;
1317# endif
1318}
1319
1320
1321/**
1322 * VCPU worker for VMMR3SendInitIpi.
1323 *
1324 * @returns VBox status code.
1325 * @param pVM The cross context VM structure.
1326 * @param idCpu Virtual CPU to perform SIPI on.
1327 */
1328static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1329{
1330 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1331 VMCPU_ASSERT_EMT(pVCpu);
1332
1333 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1334
1335 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1336 * wait-for-SIPI state. Verify. */
1337
1338 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1339#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1340 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1341 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1342 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1343#endif
1344
1345 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1346 * IPI (e.g. SVM_EXIT_INIT). */
1347
1348 PGMR3ResetCpu(pVM, pVCpu);
1349 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1350 APICR3InitIpi(pVCpu);
1351 TRPMR3ResetCpu(pVCpu);
1352 CPUMR3ResetCpu(pVM, pVCpu);
1353 EMR3ResetCpu(pVCpu);
1354 HMR3ResetCpu(pVCpu);
1355 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1356
1357 /* This will trickle up on the target EMT. */
1358 return VINF_EM_WAIT_SIPI;
1359}
1360
1361
1362/**
1363 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1364 * vector-dependent state and unhalting processor.
1365 *
1366 * @param pVM The cross context VM structure.
1367 * @param idCpu Virtual CPU to perform SIPI on.
1368 * @param uVector SIPI vector.
1369 */
1370VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1371{
1372 AssertReturnVoid(idCpu < pVM->cCpus);
1373
1374 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1375 AssertRC(rc);
1376}
1377
1378
1379/**
1380 * Sends init IPI to the virtual CPU.
1381 *
1382 * @param pVM The cross context VM structure.
1383 * @param idCpu Virtual CPU to perform int IPI on.
1384 */
1385VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1386{
1387 AssertReturnVoid(idCpu < pVM->cCpus);
1388
1389 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1390 AssertRC(rc);
1391}
1392
1393
1394/**
1395 * Registers the guest memory range that can be used for patching.
1396 *
1397 * @returns VBox status code.
1398 * @param pVM The cross context VM structure.
1399 * @param pPatchMem Patch memory range.
1400 * @param cbPatchMem Size of the memory range.
1401 */
1402VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1403{
1404 VM_ASSERT_EMT(pVM);
1405 if (HMIsEnabled(pVM))
1406 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1407
1408 return VERR_NOT_SUPPORTED;
1409}
1410
1411
1412/**
1413 * Deregisters the guest memory range that can be used for patching.
1414 *
1415 * @returns VBox status code.
1416 * @param pVM The cross context VM structure.
1417 * @param pPatchMem Patch memory range.
1418 * @param cbPatchMem Size of the memory range.
1419 */
1420VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1421{
1422 if (HMIsEnabled(pVM))
1423 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1424
1425 return VINF_SUCCESS;
1426}
1427
1428
1429/**
1430 * Common recursion handler for the other EMTs.
1431 *
1432 * @returns Strict VBox status code.
1433 * @param pVM The cross context VM structure.
1434 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1435 * @param rcStrict Current status code to be combined with the one
1436 * from this recursion and returned.
1437 */
1438static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1439{
1440 int rc2;
1441
1442 /*
1443 * We wait here while the initiator of this recursion reconfigures
1444 * everything. The last EMT to get in signals the initiator.
1445 */
1446 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1447 {
1448 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1449 AssertLogRelRC(rc2);
1450 }
1451
1452 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1453 AssertLogRelRC(rc2);
1454
1455 /*
1456 * Do the normal rendezvous processing.
1457 */
1458 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1459 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1460
1461 /*
1462 * Wait for the initiator to restore everything.
1463 */
1464 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1465 AssertLogRelRC(rc2);
1466
1467 /*
1468 * Last thread out of here signals the initiator.
1469 */
1470 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1471 {
1472 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1473 AssertLogRelRC(rc2);
1474 }
1475
1476 /*
1477 * Merge status codes and return.
1478 */
1479 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1480 if ( rcStrict2 != VINF_SUCCESS
1481 && ( rcStrict == VINF_SUCCESS
1482 || rcStrict > rcStrict2))
1483 rcStrict = rcStrict2;
1484 return rcStrict;
1485}
1486
1487
1488/**
1489 * Count returns and have the last non-caller EMT wake up the caller.
1490 *
1491 * @returns VBox strict informational status code for EM scheduling. No failures
1492 * will be returned here, those are for the caller only.
1493 *
1494 * @param pVM The cross context VM structure.
1495 * @param rcStrict The current accumulated recursive status code,
1496 * to be merged with i32RendezvousStatus and
1497 * returned.
1498 */
1499DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1500{
1501 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1502
1503 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1504 if (cReturned == pVM->cCpus - 1U)
1505 {
1506 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1507 AssertLogRelRC(rc);
1508 }
1509
1510 /*
1511 * Merge the status codes, ignoring error statuses in this code path.
1512 */
1513 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1514 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1515 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1516 VERR_IPE_UNEXPECTED_INFO_STATUS);
1517
1518 if (RT_SUCCESS(rcStrict2))
1519 {
1520 if ( rcStrict2 != VINF_SUCCESS
1521 && ( rcStrict == VINF_SUCCESS
1522 || rcStrict > rcStrict2))
1523 rcStrict = rcStrict2;
1524 }
1525 return rcStrict;
1526}
1527
1528
1529/**
1530 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1531 *
1532 * @returns VBox strict informational status code for EM scheduling. No failures
1533 * will be returned here, those are for the caller only. When
1534 * fIsCaller is set, VINF_SUCCESS is always returned.
1535 *
1536 * @param pVM The cross context VM structure.
1537 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1538 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1539 * not.
1540 * @param fFlags The flags.
1541 * @param pfnRendezvous The callback.
1542 * @param pvUser The user argument for the callback.
1543 */
1544static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1545 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1546{
1547 int rc;
1548 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1549
1550 /*
1551 * Enter, the last EMT triggers the next callback phase.
1552 */
1553 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1554 if (cEntered != pVM->cCpus)
1555 {
1556 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1557 {
1558 /* Wait for our turn. */
1559 for (;;)
1560 {
1561 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1562 AssertLogRelRC(rc);
1563 if (!pVM->vmm.s.fRendezvousRecursion)
1564 break;
1565 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1566 }
1567 }
1568 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1569 {
1570 /* Wait for the last EMT to arrive and wake everyone up. */
1571 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1572 AssertLogRelRC(rc);
1573 Assert(!pVM->vmm.s.fRendezvousRecursion);
1574 }
1575 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1576 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1577 {
1578 /* Wait for our turn. */
1579 for (;;)
1580 {
1581 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1582 AssertLogRelRC(rc);
1583 if (!pVM->vmm.s.fRendezvousRecursion)
1584 break;
1585 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1586 }
1587 }
1588 else
1589 {
1590 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1591
1592 /*
1593 * The execute once is handled specially to optimize the code flow.
1594 *
1595 * The last EMT to arrive will perform the callback and the other
1596 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1597 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1598 * returns, that EMT will initiate the normal return sequence.
1599 */
1600 if (!fIsCaller)
1601 {
1602 for (;;)
1603 {
1604 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1605 AssertLogRelRC(rc);
1606 if (!pVM->vmm.s.fRendezvousRecursion)
1607 break;
1608 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1609 }
1610
1611 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1612 }
1613 return VINF_SUCCESS;
1614 }
1615 }
1616 else
1617 {
1618 /*
1619 * All EMTs are waiting, clear the FF and take action according to the
1620 * execution method.
1621 */
1622 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1623
1624 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1625 {
1626 /* Wake up everyone. */
1627 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1628 AssertLogRelRC(rc);
1629 }
1630 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1631 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1632 {
1633 /* Figure out who to wake up and wake it up. If it's ourself, then
1634 it's easy otherwise wait for our turn. */
1635 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1636 ? 0
1637 : pVM->cCpus - 1U;
1638 if (pVCpu->idCpu != iFirst)
1639 {
1640 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1641 AssertLogRelRC(rc);
1642 for (;;)
1643 {
1644 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1645 AssertLogRelRC(rc);
1646 if (!pVM->vmm.s.fRendezvousRecursion)
1647 break;
1648 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1649 }
1650 }
1651 }
1652 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1653 }
1654
1655
1656 /*
1657 * Do the callback and update the status if necessary.
1658 */
1659 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1660 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1661 {
1662 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1663 if (rcStrict2 != VINF_SUCCESS)
1664 {
1665 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1666 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1667 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1668 int32_t i32RendezvousStatus;
1669 do
1670 {
1671 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1672 if ( rcStrict2 == i32RendezvousStatus
1673 || RT_FAILURE(i32RendezvousStatus)
1674 || ( i32RendezvousStatus != VINF_SUCCESS
1675 && rcStrict2 > i32RendezvousStatus))
1676 break;
1677 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1678 }
1679 }
1680
1681 /*
1682 * Increment the done counter and take action depending on whether we're
1683 * the last to finish callback execution.
1684 */
1685 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1686 if ( cDone != pVM->cCpus
1687 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1688 {
1689 /* Signal the next EMT? */
1690 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1691 {
1692 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1693 AssertLogRelRC(rc);
1694 }
1695 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1696 {
1697 Assert(cDone == pVCpu->idCpu + 1U);
1698 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1699 AssertLogRelRC(rc);
1700 }
1701 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1702 {
1703 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1704 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1705 AssertLogRelRC(rc);
1706 }
1707
1708 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1709 if (!fIsCaller)
1710 {
1711 for (;;)
1712 {
1713 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1714 AssertLogRelRC(rc);
1715 if (!pVM->vmm.s.fRendezvousRecursion)
1716 break;
1717 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1718 }
1719 }
1720 }
1721 else
1722 {
1723 /* Callback execution is all done, tell the rest to return. */
1724 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1725 AssertLogRelRC(rc);
1726 }
1727
1728 if (!fIsCaller)
1729 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1730 return rcStrictRecursion;
1731}
1732
1733
1734/**
1735 * Called in response to VM_FF_EMT_RENDEZVOUS.
1736 *
1737 * @returns VBox strict status code - EM scheduling. No errors will be returned
1738 * here, nor will any non-EM scheduling status codes be returned.
1739 *
1740 * @param pVM The cross context VM structure.
1741 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1742 *
1743 * @thread EMT
1744 */
1745VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1746{
1747 Assert(!pVCpu->vmm.s.fInRendezvous);
1748 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1749 pVCpu->vmm.s.fInRendezvous = true;
1750 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1751 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1752 pVCpu->vmm.s.fInRendezvous = false;
1753 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1754 return VBOXSTRICTRC_TODO(rcStrict);
1755}
1756
1757
1758/**
1759 * Helper for resetting an single wakeup event sempahore.
1760 *
1761 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1762 * @param hEvt The event semaphore to reset.
1763 */
1764static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1765{
1766 for (uint32_t cLoops = 0; ; cLoops++)
1767 {
1768 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1769 if (rc != VINF_SUCCESS || cLoops > _4K)
1770 return rc;
1771 }
1772}
1773
1774
1775/**
1776 * Worker for VMMR3EmtRendezvous that handles recursion.
1777 *
1778 * @returns VBox strict status code. This will be the first error,
1779 * VINF_SUCCESS, or an EM scheduling status code.
1780 *
1781 * @param pVM The cross context VM structure.
1782 * @param pVCpu The cross context virtual CPU structure of the
1783 * calling EMT.
1784 * @param fFlags Flags indicating execution methods. See
1785 * grp_VMMR3EmtRendezvous_fFlags.
1786 * @param pfnRendezvous The callback.
1787 * @param pvUser User argument for the callback.
1788 *
1789 * @thread EMT(pVCpu)
1790 */
1791static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1792 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1793{
1794 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1795 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1796 Assert(pVCpu->vmm.s.fInRendezvous);
1797
1798 /*
1799 * Save the current state.
1800 */
1801 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1802 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1803 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1804 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1805 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1806
1807 /*
1808 * Check preconditions and save the current state.
1809 */
1810 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1811 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1812 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1813 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1814 VERR_INTERNAL_ERROR);
1815 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1816 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1817
1818 /*
1819 * Reset the recursion prep and pop semaphores.
1820 */
1821 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1822 AssertLogRelRCReturn(rc, rc);
1823 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1824 AssertLogRelRCReturn(rc, rc);
1825 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1826 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1827 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1828 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1829
1830 /*
1831 * Usher the other thread into the recursion routine.
1832 */
1833 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1834 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1835
1836 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1837 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1838 while (cLeft-- > 0)
1839 {
1840 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1841 AssertLogRelRC(rc);
1842 }
1843 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1844 {
1845 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1846 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1847 {
1848 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1849 AssertLogRelRC(rc);
1850 }
1851 }
1852 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1853 {
1854 Assert(cLeft == pVCpu->idCpu);
1855 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1856 {
1857 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1858 AssertLogRelRC(rc);
1859 }
1860 }
1861 else
1862 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1863 VERR_INTERNAL_ERROR_4);
1864
1865 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1866 AssertLogRelRC(rc);
1867 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1868 AssertLogRelRC(rc);
1869
1870
1871 /*
1872 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1873 */
1874 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1875 {
1876 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1877 AssertLogRelRC(rc);
1878 }
1879
1880 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1881
1882 /*
1883 * Clear the slate and setup the new rendezvous.
1884 */
1885 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1886 {
1887 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1888 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1889 }
1890 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1891 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1892 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1893 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1894
1895 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1896 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1897 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1898 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1899 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1900 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1901 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1902 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1903
1904 /*
1905 * We're ready to go now, do normal rendezvous processing.
1906 */
1907 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1908 AssertLogRelRC(rc);
1909
1910 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1911
1912 /*
1913 * The caller waits for the other EMTs to be done, return and waiting on the
1914 * pop semaphore.
1915 */
1916 for (;;)
1917 {
1918 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1919 AssertLogRelRC(rc);
1920 if (!pVM->vmm.s.fRendezvousRecursion)
1921 break;
1922 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1923 }
1924
1925 /*
1926 * Get the return code and merge it with the above recursion status.
1927 */
1928 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1929 if ( rcStrict2 != VINF_SUCCESS
1930 && ( rcStrict == VINF_SUCCESS
1931 || rcStrict > rcStrict2))
1932 rcStrict = rcStrict2;
1933
1934 /*
1935 * Restore the parent rendezvous state.
1936 */
1937 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1938 {
1939 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1940 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1941 }
1942 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1943 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1944 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1945 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1946
1947 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1948 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1949 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1950 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1951 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1952 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1953 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1954
1955 /*
1956 * Usher the other EMTs back to their parent recursion routine, waiting
1957 * for them to all get there before we return (makes sure they've been
1958 * scheduled and are past the pop event sem, see below).
1959 */
1960 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1961 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1962 AssertLogRelRC(rc);
1963
1964 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1965 {
1966 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1967 AssertLogRelRC(rc);
1968 }
1969
1970 /*
1971 * We must reset the pop semaphore on the way out (doing the pop caller too,
1972 * just in case). The parent may be another recursion.
1973 */
1974 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1975 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1976
1977 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1978
1979 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1980 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1981 return rcStrict;
1982}
1983
1984
1985/**
1986 * EMT rendezvous.
1987 *
1988 * Gathers all the EMTs and execute some code on each of them, either in a one
1989 * by one fashion or all at once.
1990 *
1991 * @returns VBox strict status code. This will be the first error,
1992 * VINF_SUCCESS, or an EM scheduling status code.
1993 *
1994 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1995 * doesn't support it or if the recursion is too deep.
1996 *
1997 * @param pVM The cross context VM structure.
1998 * @param fFlags Flags indicating execution methods. See
1999 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2000 * descending and ascending rendezvous types support
2001 * recursion from inside @a pfnRendezvous.
2002 * @param pfnRendezvous The callback.
2003 * @param pvUser User argument for the callback.
2004 *
2005 * @thread Any.
2006 */
2007VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2008{
2009 /*
2010 * Validate input.
2011 */
2012 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2013 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2014 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2015 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2016 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2017 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2018 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2019 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2020
2021 VBOXSTRICTRC rcStrict;
2022 PVMCPU pVCpu = VMMGetCpu(pVM);
2023 if (!pVCpu)
2024 {
2025 /*
2026 * Forward the request to an EMT thread.
2027 */
2028 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2029 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2030 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2031 else
2032 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2033 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2034 }
2035 else if ( pVM->cCpus == 1
2036 || ( pVM->enmVMState == VMSTATE_DESTROYING
2037 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2038 {
2039 /*
2040 * Shortcut for the single EMT case.
2041 *
2042 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2043 * during vmR3Destroy after other emulation threads have started terminating.
2044 */
2045 if (!pVCpu->vmm.s.fInRendezvous)
2046 {
2047 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2048 pVCpu->vmm.s.fInRendezvous = true;
2049 pVM->vmm.s.fRendezvousFlags = fFlags;
2050 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2051 pVCpu->vmm.s.fInRendezvous = false;
2052 }
2053 else
2054 {
2055 /* Recursion. Do the same checks as in the SMP case. */
2056 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2057 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2058 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2059 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2060 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2061 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2062 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2063 , VERR_DEADLOCK);
2064
2065 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2066 pVM->vmm.s.cRendezvousRecursions++;
2067 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2068 pVM->vmm.s.fRendezvousFlags = fFlags;
2069
2070 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2071
2072 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2073 pVM->vmm.s.cRendezvousRecursions--;
2074 }
2075 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2076 }
2077 else
2078 {
2079 /*
2080 * Spin lock. If busy, check for recursion, if not recursing wait for
2081 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2082 */
2083 int rc;
2084 rcStrict = VINF_SUCCESS;
2085 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2086 {
2087 /* Allow recursion in some cases. */
2088 if ( pVCpu->vmm.s.fInRendezvous
2089 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2090 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2091 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2092 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2093 ))
2094 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2095
2096 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2097 VERR_DEADLOCK);
2098
2099 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2100 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2101 {
2102 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2103 {
2104 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2105 if ( rc != VINF_SUCCESS
2106 && ( rcStrict == VINF_SUCCESS
2107 || rcStrict > rc))
2108 rcStrict = rc;
2109 /** @todo Perhaps deal with termination here? */
2110 }
2111 ASMNopPause();
2112 }
2113 }
2114
2115 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2116 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2117 Assert(!pVCpu->vmm.s.fInRendezvous);
2118 pVCpu->vmm.s.fInRendezvous = true;
2119
2120 /*
2121 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2122 */
2123 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2124 {
2125 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2126 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2127 }
2128 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2129 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2130 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2131 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2132 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2133 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2134 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2135 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2136 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2137 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2138 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2139
2140 /*
2141 * Set the FF and poke the other EMTs.
2142 */
2143 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2144 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2145
2146 /*
2147 * Do the same ourselves.
2148 */
2149 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2150
2151 /*
2152 * The caller waits for the other EMTs to be done and return before doing
2153 * the cleanup. This makes away with wakeup / reset races we would otherwise
2154 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2155 */
2156 for (;;)
2157 {
2158 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2159 AssertLogRelRC(rc);
2160 if (!pVM->vmm.s.fRendezvousRecursion)
2161 break;
2162 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2163 }
2164
2165 /*
2166 * Get the return code and clean up a little bit.
2167 */
2168 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2169 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2170
2171 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2172 pVCpu->vmm.s.fInRendezvous = false;
2173
2174 /*
2175 * Merge rcStrict, rcStrict2 and rcStrict3.
2176 */
2177 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2178 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2179 if ( rcStrict2 != VINF_SUCCESS
2180 && ( rcStrict == VINF_SUCCESS
2181 || rcStrict > rcStrict2))
2182 rcStrict = rcStrict2;
2183 if ( rcStrict3 != VINF_SUCCESS
2184 && ( rcStrict == VINF_SUCCESS
2185 || rcStrict > rcStrict3))
2186 rcStrict = rcStrict3;
2187 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2188 }
2189
2190 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2191 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2192 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2193 VERR_IPE_UNEXPECTED_INFO_STATUS);
2194 return VBOXSTRICTRC_VAL(rcStrict);
2195}
2196
2197
2198/**
2199 * Interface for vmR3SetHaltMethodU.
2200 *
2201 * @param pVCpu The cross context virtual CPU structure of the
2202 * calling EMT.
2203 * @param fMayHaltInRing0 The new state.
2204 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2205 * @thread EMT(pVCpu)
2206 *
2207 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2208 * component.
2209 */
2210VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2211{
2212 LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2213 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2214 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2215}
2216
2217
2218/**
2219 * Read from the ring 0 jump buffer stack.
2220 *
2221 * @returns VBox status code.
2222 *
2223 * @param pVM The cross context VM structure.
2224 * @param idCpu The ID of the source CPU context (for the address).
2225 * @param R0Addr Where to start reading.
2226 * @param pvBuf Where to store the data we've read.
2227 * @param cbRead The number of bytes to read.
2228 */
2229VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2230{
2231 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2232 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2233 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2234
2235 /*
2236 * Hopefully we've got all the requested bits. If not supply what we
2237 * can and zero the remaining stuff.
2238 */
2239 RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2240 if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2241 {
2242 size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2243 if (cbRead <= cbValid)
2244 {
2245 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2246 return VINF_SUCCESS;
2247 }
2248
2249 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2250 RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2251 }
2252 else
2253 RT_BZERO(pvBuf, cbRead);
2254
2255 /*
2256 * Supply the setjmp return RIP/EIP if requested.
2257 */
2258 if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2259 && pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2260 {
2261 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2262 size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2263 size_t offDst = 0;
2264 if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2265 offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2266 else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2267 {
2268 size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2269 Assert(offSrc < cbSrc);
2270 pbSrc -= offSrc;
2271 cbSrc -= offSrc;
2272 }
2273 if (cbSrc > cbRead - offDst)
2274 cbSrc = cbRead - offDst;
2275 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2276
2277 //if (cbSrc == cbRead)
2278 // rc = VINF_SUCCESS;
2279 }
2280
2281 return VINF_SUCCESS;
2282}
2283
2284
2285/**
2286 * Used by the DBGF stack unwinder to initialize the register state.
2287 *
2288 * @param pUVM The user mode VM handle.
2289 * @param idCpu The ID of the CPU being unwound.
2290 * @param pState The unwind state to initialize.
2291 */
2292VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2293{
2294 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2295 AssertReturnVoid(pVCpu);
2296
2297 /*
2298 * This is all we really need here if we had proper unwind info (win64 only)...
2299 */
2300 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2301 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2302 pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2303
2304 /*
2305 * Locate the resume point on the stack.
2306 */
2307#ifdef RT_ARCH_AMD64
2308 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2309 uintptr_t off = 0;
2310# ifdef RT_OS_WINDOWS
2311 off += 0xa0; /* XMM6 thru XMM15 */
2312# endif
2313 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2314 off += 8;
2315 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2316 off += 8;
2317# ifdef RT_OS_WINDOWS
2318 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2319 off += 8;
2320 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2321 off += 8;
2322# endif
2323 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2324 off += 8;
2325 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2326 off += 8;
2327 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2328 off += 8;
2329 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2330 off += 8;
2331 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2332 off += 8;
2333 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2334 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2335
2336#elif defined(RT_ARCH_X86)
2337 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2338 uintptr_t off = 0;
2339 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2340 off += 4;
2341 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2342 off += 4;
2343 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2344 off += 4;
2345 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2346 off += 4;
2347 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2348 off += 4;
2349 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2350 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2351
2352#elif defined(RT_ARCH_ARM64)
2353 /** @todo PORTME: arm ring-0 */
2354
2355#else
2356# error "Port me"
2357#endif
2358}
2359
2360
2361/**
2362 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2363 *
2364 * @returns VBox status code.
2365 * @param pVM The cross context VM structure.
2366 * @param uOperation Operation to execute.
2367 * @param u64Arg Constant argument.
2368 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2369 * details.
2370 */
2371VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2372{
2373 PVMCPU pVCpu = VMMGetCpu(pVM);
2374 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2375 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2376}
2377
2378
2379/**
2380 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2381 *
2382 * @returns VBox status code.
2383 * @param pVM The cross context VM structure.
2384 * @param pVCpu The cross context VM structure.
2385 * @param enmOperation Operation to execute.
2386 * @param u64Arg Constant argument.
2387 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2388 * details.
2389 */
2390VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2391{
2392 /*
2393 * Call ring-0.
2394 */
2395#ifdef NO_SUPCALLR0VMM
2396 int rc = VERR_GENERAL_FAILURE;
2397#else
2398 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2399#endif
2400
2401 /*
2402 * Flush the logs and deal with ring-0 assertions.
2403 */
2404#ifdef LOG_ENABLED
2405 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2406#endif
2407 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2408 if (rc != VERR_VMM_RING0_ASSERTION)
2409 {
2410 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2411 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2412 VERR_IPE_UNEXPECTED_INFO_STATUS);
2413 return rc;
2414 }
2415 return vmmR3HandleRing0Assert(pVM, pVCpu);
2416}
2417
2418
2419/**
2420 * Logs a ring-0 assertion ASAP after returning to ring-3.
2421 *
2422 * @returns VBox status code.
2423 * @param pVM The cross context VM structure.
2424 * @param pVCpu The cross context virtual CPU structure.
2425 */
2426static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2427{
2428 RT_NOREF(pVCpu);
2429 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2430 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2431 return VERR_VMM_RING0_ASSERTION;
2432}
2433
2434
2435/**
2436 * Displays the Force action Flags.
2437 *
2438 * @param pVM The cross context VM structure.
2439 * @param pHlp The output helpers.
2440 * @param pszArgs The additional arguments (ignored).
2441 */
2442static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2443{
2444 int c;
2445 uint32_t f;
2446 NOREF(pszArgs);
2447
2448#define PRINT_FLAG(prf,flag) do { \
2449 if (f & (prf##flag)) \
2450 { \
2451 static const char *s_psz = #flag; \
2452 if (!(c % 6)) \
2453 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2454 else \
2455 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2456 c++; \
2457 f &= ~(prf##flag); \
2458 } \
2459 } while (0)
2460
2461#define PRINT_GROUP(prf,grp,sfx) do { \
2462 if (f & (prf##grp##sfx)) \
2463 { \
2464 static const char *s_psz = #grp; \
2465 if (!(c % 5)) \
2466 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2467 else \
2468 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2469 c++; \
2470 } \
2471 } while (0)
2472
2473 /*
2474 * The global flags.
2475 */
2476 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2477 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2478
2479 /* show the flag mnemonics */
2480 c = 0;
2481 f = fGlobalForcedActions;
2482 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2483 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2484 PRINT_FLAG(VM_FF_,PDM_DMA);
2485 PRINT_FLAG(VM_FF_,DBGF);
2486 PRINT_FLAG(VM_FF_,REQUEST);
2487 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2488 PRINT_FLAG(VM_FF_,RESET);
2489 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2490 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2491 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2492 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2493 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2494 if (f)
2495 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2496 else
2497 pHlp->pfnPrintf(pHlp, "\n");
2498
2499 /* the groups */
2500 c = 0;
2501 f = fGlobalForcedActions;
2502 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2503 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2504 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2505 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2506 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2507 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2508 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2509 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2510 if (c)
2511 pHlp->pfnPrintf(pHlp, "\n");
2512
2513 /*
2514 * Per CPU flags.
2515 */
2516 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2517 {
2518 PVMCPU pVCpu = pVM->apCpusR3[i];
2519 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2520 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2521
2522 /* show the flag mnemonics */
2523 c = 0;
2524 f = fLocalForcedActions;
2525 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2526 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2527 PRINT_FLAG(VMCPU_FF_,TIMER);
2528 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2529 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2530 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2531 PRINT_FLAG(VMCPU_FF_,UNHALT);
2532 PRINT_FLAG(VMCPU_FF_,IEM);
2533 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2534 PRINT_FLAG(VMCPU_FF_,DBGF);
2535 PRINT_FLAG(VMCPU_FF_,REQUEST);
2536 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2537 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2538 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2539 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2540 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2541 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2542 PRINT_FLAG(VMCPU_FF_,TO_R3);
2543 PRINT_FLAG(VMCPU_FF_,IOM);
2544 if (f)
2545 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2546 else
2547 pHlp->pfnPrintf(pHlp, "\n");
2548
2549 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2550 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2551
2552 /* the groups */
2553 c = 0;
2554 f = fLocalForcedActions;
2555 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2556 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2557 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2558 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2559 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2560 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2561 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2562 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2563 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2564 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2565 if (c)
2566 pHlp->pfnPrintf(pHlp, "\n");
2567 }
2568
2569#undef PRINT_FLAG
2570#undef PRINT_GROUP
2571}
2572
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