VMM.cpp@ 91281

Last change on this file since 91281 was 91271, checked in by vboxsync, 3 years ago
VMM: bugref:10092 Moved the PAE PDPTEs out of PGM into CPUMCTX.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 109.3 KB

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1	/* $Id: VMM.cpp 91271 2021-09-16 07:42:37Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
154	do { \
155	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
156	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
157	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
158	{ /* likely? */ } \
159	else \
160	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
161	} while (0)
162
163
164	/*********************************************************************************************************************************
165	* Internal Functions *
166	*********************************************************************************************************************************/
167	static int vmmR3InitStacks(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	#if 0 /* pointless when timers doesn't run on EMT */
172	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173	#endif
174	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177	static FNRTTHREAD vmmR3LogFlusher;
178	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
179	PRTLOGGER pDstLogger);
180	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
181
182
183
184	/**
185	* Initializes the VMM.
186	*
187	* @returns VBox status code.
188	* @param pVM The cross context VM structure.
189	*/
190	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
191	{
192	LogFlow(("VMMR3Init\n"));
193
194	/*
195	* Assert alignment, sizes and order.
196	*/
197	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
198	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
199
200	/*
201	* Init basic VM VMM members.
202	*/
203	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
204	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
205	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
212	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
213
214	#if 0 /* pointless when timers doesn't run on EMT */
215	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
216	* The EMT yield interval. The EMT yielding is a hack we employ to play a
217	* bit nicer with the rest of the system (like for instance the GUI).
218	*/
219	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
220	23 /* Value arrived at after experimenting with the grub boot prompt. */);
221	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
222	#endif
223
224	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
225	* Controls whether we employ per-cpu preemption timers to limit the time
226	* spent executing guest code. This option is not available on all
227	* platforms and we will silently ignore this setting then. If we are
228	* running in VT-x mode, we will use the VMX-preemption timer instead of
229	* this one when possible.
230	*/
231	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
232	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
233	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
234
235	/*
236	* Initialize the VMM rendezvous semaphores.
237	*/
238	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
239	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
240	return VERR_NO_MEMORY;
241	for (VMCPUID i = 0; i < pVM->cCpus; i++)
242	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
243	for (VMCPUID i = 0; i < pVM->cCpus; i++)
244	{
245	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
246	AssertRCReturn(rc, rc);
247	}
248	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
249	AssertRCReturn(rc, rc);
250	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
251	AssertRCReturn(rc, rc);
252	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
253	AssertRCReturn(rc, rc);
254	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
255	AssertRCReturn(rc, rc);
256	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
257	AssertRCReturn(rc, rc);
258	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
259	AssertRCReturn(rc, rc);
260	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
261	AssertRCReturn(rc, rc);
262	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
263	AssertRCReturn(rc, rc);
264
265	/*
266	* Register the saved state data unit.
267	*/
268	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
269	NULL, NULL, NULL,
270	NULL, vmmR3Save, NULL,
271	NULL, vmmR3Load, NULL);
272	if (RT_FAILURE(rc))
273	return rc;
274
275	/*
276	* Register the Ring-0 VM handle with the session for fast ioctl calls.
277	*/
278	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
279	if (RT_FAILURE(rc))
280	return rc;
281
282	/*
283	* Init various sub-components.
284	*/
285	rc = vmmR3InitStacks(pVM);
286	if (RT_SUCCESS(rc))
287	{
288	#ifdef VBOX_WITH_NMI
289	/*
290	* Allocate mapping for the host APIC.
291	*/
292	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
293	AssertRC(rc);
294	#endif
295	if (RT_SUCCESS(rc))
296	{
297	/*
298	* Start the log flusher thread.
299	*/
300	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
301	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
302	if (RT_SUCCESS(rc))
303	{
304
305	/*
306	* Debug info and statistics.
307	*/
308	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
309	vmmR3InitRegisterStats(pVM);
310	vmmInitFormatTypes();
311
312	return VINF_SUCCESS;
313	}
314	}
315	}
316	/** @todo Need failure cleanup? */
317
318	return rc;
319	}
320
321
322	/**
323	* Allocate & setup the VMM RC stack(s) (for EMTs).
324	*
325	* The stacks are also used for long jumps in Ring-0.
326	*
327	* @returns VBox status code.
328	* @param pVM The cross context VM structure.
329	*
330	* @remarks The optional guard page gets it protection setup up during R3 init
331	* completion because of init order issues.
332	*/
333	static int vmmR3InitStacks(PVM pVM)
334	{
335	int rc = VINF_SUCCESS;
336	#ifdef VMM_R0_SWITCH_STACK
337	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
338	#else
339	uint32_t fFlags = 0;
340	#endif
341
342	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
343	{
344	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
345
346	#ifdef VBOX_STRICT_VMM_STACK
347	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
348	#else
349	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
350	#endif
351	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
352	if (RT_SUCCESS(rc))
353	{
354	#ifdef VBOX_STRICT_VMM_STACK
355	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
356	#endif
357	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
358
359	}
360	}
361
362	return rc;
363	}
364
365
366	/**
367	* VMMR3Init worker that register the statistics with STAM.
368	*
369	* @param pVM The cross context VM structure.
370	*/
371	static void vmmR3InitRegisterStats(PVM pVM)
372	{
373	RT_NOREF_PV(pVM);
374
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
433
434	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
435	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
436
437	#ifdef VBOX_WITH_STATISTICS
438	for (VMCPUID i = 0; i < pVM->cCpus; i++)
439	{
440	PVMCPU pVCpu = pVM->apCpusR3[i];
441	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
442	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
443	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
444	}
445	#endif
446	for (VMCPUID i = 0; i < pVM->cCpus; i++)
447	{
448	PVMCPU pVCpu = pVM->apCpusR3[i];
449	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
450	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
451	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
452	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
453	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
454	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
455	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
456	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
457	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
458	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
459	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
460	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
461	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
462	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
463	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
464	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
465	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
466
467	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
468
469	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
470	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
471	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
472	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
473	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
474	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
475	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
476	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
477	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
478
479	pShared = &pVCpu->vmm.s.u.s.RelLogger;
480	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
481	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
482	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
483	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
484	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
485	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
486	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
487	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
488	}
489	}
490
491
492	/**
493	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
494	*
495	* @returns VBox status code.
496	* @param pVM The cross context VM structure.
497	* @param pVCpu The cross context per CPU structure.
498	* @thread EMT(pVCpu)
499	*/
500	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
501	{
502	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
503	}
504
505
506	/**
507	* Initializes the R0 VMM.
508	*
509	* @returns VBox status code.
510	* @param pVM The cross context VM structure.
511	*/
512	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
513	{
514	int rc;
515	PVMCPU pVCpu = VMMGetCpu(pVM);
516	Assert(pVCpu && pVCpu->idCpu == 0);
517
518	/*
519	* Make sure the ring-0 loggers are up to date.
520	*/
521	rc = VMMR3UpdateLoggers(pVM);
522	if (RT_FAILURE(rc))
523	return rc;
524
525	/*
526	* Call Ring-0 entry with init code.
527	*/
528	for (;;)
529	{
530	#ifdef NO_SUPCALLR0VMM
531	//rc = VERR_GENERAL_FAILURE;
532	rc = VINF_SUCCESS;
533	#else
534	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
535	#endif
536	/*
537	* Flush the logs.
538	*/
539	#ifdef LOG_ENABLED
540	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
541	#endif
542	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
543	if (rc != VINF_VMM_CALL_HOST)
544	break;
545	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
546	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
547	break;
548	/* Resume R0 */
549	}
550
551	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
552	{
553	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
554	if (RT_SUCCESS(rc))
555	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
556	}
557
558	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
559	if (pVM->vmm.s.fIsUsingContextHooks)
560	LogRel(("VMM: Enabled thread-context hooks\n"));
561	else
562	LogRel(("VMM: Thread-context hooks unavailable\n"));
563
564	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
565	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
566	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
567	else
568	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
569	if (pVM->vmm.s.fIsPreemptPossible)
570	LogRel(("VMM: Kernel preemption is possible\n"));
571	else
572	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
573
574	/*
575	* Send all EMTs to ring-0 to get their logger initialized.
576	*/
577	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
578	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
579
580	return rc;
581	}
582
583
584	/**
585	* Called when an init phase completes.
586	*
587	* @returns VBox status code.
588	* @param pVM The cross context VM structure.
589	* @param enmWhat Which init phase.
590	*/
591	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
592	{
593	int rc = VINF_SUCCESS;
594
595	switch (enmWhat)
596	{
597	case VMINITCOMPLETED_RING3:
598	{
599	#if 0 /* pointless when timers doesn't run on EMT */
600	/*
601	* Create the EMT yield timer.
602	*/
603	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
604	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
605	AssertRCReturn(rc, rc);
606
607	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
608	AssertRCReturn(rc, rc);
609	#endif
610	break;
611	}
612
613	case VMINITCOMPLETED_HM:
614	{
615	/*
616	* Disable the periodic preemption timers if we can use the
617	* VMX-preemption timer instead.
618	*/
619	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
620	&& HMR3IsVmxPreemptionTimerUsed(pVM))
621	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
622	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
623
624	/*
625	* Last chance for GIM to update its CPUID leaves if it requires
626	* knowledge/information from HM initialization.
627	*/
628	rc = GIMR3InitCompleted(pVM);
629	AssertRCReturn(rc, rc);
630
631	/*
632	* CPUM's post-initialization (print CPUIDs).
633	*/
634	CPUMR3LogCpuIdAndMsrFeatures(pVM);
635	break;
636	}
637
638	default: /* shuts up gcc */
639	break;
640	}
641
642	return rc;
643	}
644
645
646	/**
647	* Terminate the VMM bits.
648	*
649	* @returns VBox status code.
650	* @param pVM The cross context VM structure.
651	*/
652	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
653	{
654	PVMCPU pVCpu = VMMGetCpu(pVM);
655	Assert(pVCpu && pVCpu->idCpu == 0);
656
657	/*
658	* Call Ring-0 entry with termination code.
659	*/
660	int rc;
661	for (;;)
662	{
663	#ifdef NO_SUPCALLR0VMM
664	//rc = VERR_GENERAL_FAILURE;
665	rc = VINF_SUCCESS;
666	#else
667	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
668	#endif
669	/*
670	* Flush the logs.
671	*/
672	#ifdef LOG_ENABLED
673	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
674	#endif
675	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
676	if (rc != VINF_VMM_CALL_HOST)
677	break;
678	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
679	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
680	break;
681	/* Resume R0 */
682	}
683	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
684	{
685	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
686	if (RT_SUCCESS(rc))
687	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
688	}
689
690	for (VMCPUID i = 0; i < pVM->cCpus; i++)
691	{
692	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
693	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
694	}
695	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
696	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
697	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
698	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
699	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
700	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
701	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
702	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
703	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
704	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
705	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
706	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
707	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
708	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
709	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
710	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
711
712	vmmTermFormatTypes();
713
714	/*
715	* Wait for the log flusher thread to complete.
716	*/
717	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
718	{
719	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
720	AssertLogRelRC(rc2);
721	if (RT_SUCCESS(rc2))
722	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
723	}
724
725	return rc;
726	}
727
728
729	/**
730	* Applies relocations to data and code managed by this
731	* component. This function will be called at init and
732	* whenever the VMM need to relocate it self inside the GC.
733	*
734	* The VMM will need to apply relocations to the core code.
735	*
736	* @param pVM The cross context VM structure.
737	* @param offDelta The relocation delta.
738	*/
739	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
740	{
741	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
742	RT_NOREF(offDelta);
743
744	/*
745	* Update the logger.
746	*/
747	VMMR3UpdateLoggers(pVM);
748	}
749
750
751	/**
752	* Worker for VMMR3UpdateLoggers.
753	*/
754	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
755	{
756	/*
757	* Get the group count.
758	*/
759	uint32_t uGroupsCrc32 = 0;
760	uint32_t cGroups = 0;
761	uint64_t fFlags = 0;
762	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
763	Assert(rc == VERR_BUFFER_OVERFLOW);
764
765	/*
766	* Allocate the request of the right size.
767	*/
768	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
769	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
770	if (pReq)
771	{
772	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
773	pReq->Hdr.cbReq = cbReq;
774	pReq->cGroups = cGroups;
775	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
776	AssertRC(rc);
777	if (RT_SUCCESS(rc))
778	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
779
780	RTMemFree(pReq);
781	}
782	else
783	rc = VERR_NO_MEMORY;
784	return rc;
785	}
786
787
788	/**
789	* Updates the settings for the RC and R0 loggers.
790	*
791	* @returns VBox status code.
792	* @param pVM The cross context VM structure.
793	* @thread EMT
794	*/
795	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
796	{
797	VM_ASSERT_EMT(pVM);
798	PVMCPU pVCpu = VMMGetCpu(pVM);
799	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
800
801	/*
802	* Each EMT has each own logger instance.
803	*/
804	/* Debug logging.*/
805	int rcDebug = VINF_SUCCESS;
806	#ifdef LOG_ENABLED
807	PRTLOGGER const pDefault = RTLogDefaultInstance();
808	if (pDefault)
809	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
810	#else
811	RT_NOREF(pVM);
812	#endif
813
814	/* Release logging. */
815	int rcRelease = VINF_SUCCESS;
816	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
817	if (pRelease)
818	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
819
820	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
821	}
822
823
824	/**
825	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
826	*/
827	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
828	{
829	PVM const pVM = (PVM)pvUser;
830	RT_NOREF(hThreadSelf);
831
832	/* Reset the flusher state before we start: */
833	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
834
835	/*
836	* The work loop.
837	*/
838	for (;;)
839	{
840	/*
841	* Wait for work.
842	*/
843	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
844	if (RT_SUCCESS(rc))
845	{
846	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
847	VMMLOGFLUSHERENTRY Item;
848	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
849	if ( Item.s.idCpu < pVM->cCpus
850	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
851	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
852	{
853	/*
854	* Verify the request.
855	*/
856	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
857	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
858	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
859	if (cbToFlush > 0)
860	{
861	if (cbToFlush <= pShared->cbBuf)
862	{
863	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
864	if (pchBufR3)
865	{
866	/*
867	* Do the flushing.
868	*/
869	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
870	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
871	if (pLogger)
872	{
873	char szBefore[128];
874	RTStrPrintf(szBefore, sizeof(szBefore),
875	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
876	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
877	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
878	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
879	}
880	}
881	else
882	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
883	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
884	}
885	else
886	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
887	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
888	}
889	else
890	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
891	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
892
893	/*
894	* Mark the descriptor as flushed and set the request flag for same.
895	*/
896	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
897	}
898	else
899	{
900	Assert(Item.s.idCpu == UINT16_MAX);
901	Assert(Item.s.idxLogger == UINT8_MAX);
902	Assert(Item.s.idxBuffer == UINT8_MAX);
903	}
904	}
905	/*
906	* Interrupted can happen, just ignore it.
907	*/
908	else if (rc == VERR_INTERRUPTED)
909	{ /* ignore*/ }
910	/*
911	* The ring-0 termination code will set the shutdown flag and wake us
912	* up, and we should return with object destroyed. In case there is
913	* some kind of race, we might also get sempahore destroyed.
914	*/
915	else if ( rc == VERR_OBJECT_DESTROYED
916	\|\| rc == VERR_SEM_DESTROYED
917	\|\| rc == VERR_INVALID_HANDLE)
918	{
919	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
920	return VINF_SUCCESS;
921	}
922	/*
923	* There shouldn't be any other errors...
924	*/
925	else
926	{
927	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
928	AssertRC(rc);
929	RTThreadSleep(1);
930	}
931	}
932	}
933
934
935	/**
936	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
937	*
938	* @param pVM The cross context VM structure.
939	* @param pVCpu The cross context virtual CPU structure of the calling
940	* EMT.
941	* @param pShared The shared logger data.
942	* @param idxBuf The buffer to flush.
943	* @param pDstLogger The destination IPRT logger.
944	*/
945	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
946	{
947	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
948	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
949	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
950
951	#if VMMLOGGER_BUFFER_COUNT > 1
952	/*
953	* When we have more than one log buffer, the flusher thread may still be
954	* working on the previous buffer when we get here.
955	*/
956	char szBefore[64];
957	if (pShared->cFlushing > 0)
958	{
959	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
960	uint64_t const nsStart = RTTimeNanoTS();
961
962	/* A no-op, but it takes the lock and the hope is that we end up waiting
963	on the flusher to finish up. */
964	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
965	if (pShared->cFlushing != 0)
966	{
967	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
968
969	/* If no luck, go to ring-0 and to proper waiting. */
970	if (pShared->cFlushing != 0)
971	{
972	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
973	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
974	}
975	}
976
977	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
978	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
979	pszBefore = szBefore;
980	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
981	}
982	#else
983	RT_NOREF(pVM, pVCpu);
984	#endif
985
986	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
987	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
988	}
989
990
991	/**
992	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
993	*
994	* @returns Pointer to the buffer.
995	* @param pVM The cross context VM structure.
996	*/
997	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
998	{
999	return pVM->vmm.s.szRing0AssertMsg1;
1000	}
1001
1002
1003	/**
1004	* Returns the VMCPU of the specified virtual CPU.
1005	*
1006	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1007	*
1008	* @param pUVM The user mode VM handle.
1009	* @param idCpu The ID of the virtual CPU.
1010	*/
1011	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1012	{
1013	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1014	AssertReturn(idCpu < pUVM->cCpus, NULL);
1015	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1016	return pUVM->pVM->apCpusR3[idCpu];
1017	}
1018
1019
1020	/**
1021	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1022	*
1023	* @returns Pointer to the buffer.
1024	* @param pVM The cross context VM structure.
1025	*/
1026	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1027	{
1028	return pVM->vmm.s.szRing0AssertMsg2;
1029	}
1030
1031
1032	/**
1033	* Execute state save operation.
1034	*
1035	* @returns VBox status code.
1036	* @param pVM The cross context VM structure.
1037	* @param pSSM SSM operation handle.
1038	*/
1039	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1040	{
1041	LogFlow(("vmmR3Save:\n"));
1042
1043	/*
1044	* Save the started/stopped state of all CPUs except 0 as it will always
1045	* be running. This avoids breaking the saved state version. :-)
1046	*/
1047	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1048	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1049
1050	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1051	}
1052
1053
1054	/**
1055	* Execute state load operation.
1056	*
1057	* @returns VBox status code.
1058	* @param pVM The cross context VM structure.
1059	* @param pSSM SSM operation handle.
1060	* @param uVersion Data layout version.
1061	* @param uPass The data pass.
1062	*/
1063	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1064	{
1065	LogFlow(("vmmR3Load:\n"));
1066	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1067
1068	/*
1069	* Validate version.
1070	*/
1071	if ( uVersion != VMM_SAVED_STATE_VERSION
1072	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1073	{
1074	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1075	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1076	}
1077
1078	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1079	{
1080	/* Ignore the stack bottom, stack pointer and stack bits. */
1081	RTRCPTR RCPtrIgnored;
1082	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1083	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1084	#ifdef RT_OS_DARWIN
1085	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1086	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1087	&& SSMR3HandleRevision(pSSM) >= 48858
1088	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1089	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1090	)
1091	SSMR3Skip(pSSM, 16384);
1092	else
1093	SSMR3Skip(pSSM, 8192);
1094	#else
1095	SSMR3Skip(pSSM, 8192);
1096	#endif
1097	}
1098
1099	/*
1100	* Restore the VMCPU states. VCPU 0 is always started.
1101	*/
1102	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1103	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1104	{
1105	bool fStarted;
1106	int rc = SSMR3GetBool(pSSM, &fStarted);
1107	if (RT_FAILURE(rc))
1108	return rc;
1109	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1110	}
1111
1112	/* terminator */
1113	uint32_t u32;
1114	int rc = SSMR3GetU32(pSSM, &u32);
1115	if (RT_FAILURE(rc))
1116	return rc;
1117	if (u32 != UINT32_MAX)
1118	{
1119	AssertMsgFailed(("u32=%#x\n", u32));
1120	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1121	}
1122	return VINF_SUCCESS;
1123	}
1124
1125
1126	/**
1127	* Suspends the CPU yielder.
1128	*
1129	* @param pVM The cross context VM structure.
1130	*/
1131	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1132	{
1133	#if 0 /* pointless when timers doesn't run on EMT */
1134	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1135	if (!pVM->vmm.s.cYieldResumeMillies)
1136	{
1137	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1138	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1139	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1140	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1141	else
1142	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1143	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1144	}
1145	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1146	#else
1147	RT_NOREF(pVM);
1148	#endif
1149	}
1150
1151
1152	/**
1153	* Stops the CPU yielder.
1154	*
1155	* @param pVM The cross context VM structure.
1156	*/
1157	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1158	{
1159	#if 0 /* pointless when timers doesn't run on EMT */
1160	if (!pVM->vmm.s.cYieldResumeMillies)
1161	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1162	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1163	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1164	#else
1165	RT_NOREF(pVM);
1166	#endif
1167	}
1168
1169
1170	/**
1171	* Resumes the CPU yielder when it has been a suspended or stopped.
1172	*
1173	* @param pVM The cross context VM structure.
1174	*/
1175	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1176	{
1177	#if 0 /* pointless when timers doesn't run on EMT */
1178	if (pVM->vmm.s.cYieldResumeMillies)
1179	{
1180	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1181	pVM->vmm.s.cYieldResumeMillies = 0;
1182	}
1183	#else
1184	RT_NOREF(pVM);
1185	#endif
1186	}
1187
1188
1189	#if 0 /* pointless when timers doesn't run on EMT */
1190	/**
1191	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1192	*
1193	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1194	*/
1195	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1196	{
1197	NOREF(pvUser);
1198
1199	/*
1200	* This really needs some careful tuning. While we shouldn't be too greedy since
1201	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1202	* because that'll cause us to stop up.
1203	*
1204	* The current logic is to use the default interval when there is no lag worth
1205	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1206	*
1207	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1208	* so the lag is up to date.)
1209	*/
1210	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1211	if ( u64Lag < 50000000 /* 50ms */
1212	\|\| ( u64Lag < 1000000000 /* 1s */
1213	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1214	)
1215	{
1216	uint64_t u64Elapsed = RTTimeNanoTS();
1217	pVM->vmm.s.u64LastYield = u64Elapsed;
1218
1219	RTThreadYield();
1220
1221	#ifdef LOG_ENABLED
1222	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1223	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1224	#endif
1225	}
1226	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1227	}
1228	#endif
1229
1230
1231	/**
1232	* Executes guest code (Intel VT-x and AMD-V).
1233	*
1234	* @param pVM The cross context VM structure.
1235	* @param pVCpu The cross context virtual CPU structure.
1236	*/
1237	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1238	{
1239	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1240
1241	for (;;)
1242	{
1243	int rc;
1244	do
1245	{
1246	#ifdef NO_SUPCALLR0VMM
1247	rc = VERR_GENERAL_FAILURE;
1248	#else
1249	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1250	if (RT_LIKELY(rc == VINF_SUCCESS))
1251	rc = pVCpu->vmm.s.iLastGZRc;
1252	#endif
1253	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1254
1255	#if 0 /** @todo triggers too often */
1256	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1257	#endif
1258
1259	/*
1260	* Flush the logs
1261	*/
1262	#ifdef LOG_ENABLED
1263	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1264	#endif
1265	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1266	if (rc != VINF_VMM_CALL_HOST)
1267	{
1268	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1269	return rc;
1270	}
1271	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1272	if (RT_FAILURE(rc))
1273	return rc;
1274	/* Resume R0 */
1275	}
1276	}
1277
1278
1279	/**
1280	* Perform one of the fast I/O control VMMR0 operation.
1281	*
1282	* @returns VBox strict status code.
1283	* @param pVM The cross context VM structure.
1284	* @param pVCpu The cross context virtual CPU structure.
1285	* @param enmOperation The operation to perform.
1286	*/
1287	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1288	{
1289	for (;;)
1290	{
1291	VBOXSTRICTRC rcStrict;
1292	do
1293	{
1294	#ifdef NO_SUPCALLR0VMM
1295	rcStrict = VERR_GENERAL_FAILURE;
1296	#else
1297	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1298	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1299	rcStrict = pVCpu->vmm.s.iLastGZRc;
1300	#endif
1301	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1302
1303	/*
1304	* Flush the logs
1305	*/
1306	#ifdef LOG_ENABLED
1307	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1308	#endif
1309	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1310	if (rcStrict != VINF_VMM_CALL_HOST)
1311	return rcStrict;
1312	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1313	if (RT_FAILURE(rc))
1314	return rc;
1315	/* Resume R0 */
1316	}
1317	}
1318
1319
1320	/**
1321	* VCPU worker for VMMR3SendStartupIpi.
1322	*
1323	* @param pVM The cross context VM structure.
1324	* @param idCpu Virtual CPU to perform SIPI on.
1325	* @param uVector The SIPI vector.
1326	*/
1327	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1328	{
1329	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1330	VMCPU_ASSERT_EMT(pVCpu);
1331
1332	/*
1333	* In the INIT state, the target CPU is only responsive to an SIPI.
1334	* This is also true for when when the CPU is in VMX non-root mode.
1335	*
1336	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1337	* See Intel spec. 26.6.2 "Activity State".
1338	*/
1339	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1340	return VINF_SUCCESS;
1341
1342	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1343	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1344	if (CPUMIsGuestInVmxRootMode(pCtx))
1345	{
1346	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1347	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1348	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1349
1350	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1351	return VINF_SUCCESS;
1352	}
1353	#endif
1354
1355	pCtx->cs.Sel = uVector << 8;
1356	pCtx->cs.ValidSel = uVector << 8;
1357	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1358	pCtx->cs.u64Base = uVector << 12;
1359	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1360	pCtx->rip = 0;
1361
1362	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1363
1364	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1365	EMSetState(pVCpu, EMSTATE_HALTED);
1366	return VINF_EM_RESCHEDULE;
1367	# else /* And if we go the VMCPU::enmState way it can stay here. */
1368	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1369	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1370	return VINF_SUCCESS;
1371	# endif
1372	}
1373
1374
1375	/**
1376	* VCPU worker for VMMR3SendInitIpi.
1377	*
1378	* @returns VBox status code.
1379	* @param pVM The cross context VM structure.
1380	* @param idCpu Virtual CPU to perform SIPI on.
1381	*/
1382	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1383	{
1384	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1385	VMCPU_ASSERT_EMT(pVCpu);
1386
1387	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1388
1389	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1390	* wait-for-SIPI state. Verify. */
1391
1392	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1393	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1394	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1395	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1396	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1397	#endif
1398
1399	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1400	* IPI (e.g. SVM_EXIT_INIT). */
1401
1402	PGMR3ResetCpu(pVM, pVCpu);
1403	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1404	APICR3InitIpi(pVCpu);
1405	TRPMR3ResetCpu(pVCpu);
1406	CPUMR3ResetCpu(pVM, pVCpu);
1407	EMR3ResetCpu(pVCpu);
1408	HMR3ResetCpu(pVCpu);
1409	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1410
1411	/* This will trickle up on the target EMT. */
1412	return VINF_EM_WAIT_SIPI;
1413	}
1414
1415
1416	/**
1417	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1418	* vector-dependent state and unhalting processor.
1419	*
1420	* @param pVM The cross context VM structure.
1421	* @param idCpu Virtual CPU to perform SIPI on.
1422	* @param uVector SIPI vector.
1423	*/
1424	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1425	{
1426	AssertReturnVoid(idCpu < pVM->cCpus);
1427
1428	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1429	AssertRC(rc);
1430	}
1431
1432
1433	/**
1434	* Sends init IPI to the virtual CPU.
1435	*
1436	* @param pVM The cross context VM structure.
1437	* @param idCpu Virtual CPU to perform int IPI on.
1438	*/
1439	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1440	{
1441	AssertReturnVoid(idCpu < pVM->cCpus);
1442
1443	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1444	AssertRC(rc);
1445	}
1446
1447
1448	/**
1449	* Registers the guest memory range that can be used for patching.
1450	*
1451	* @returns VBox status code.
1452	* @param pVM The cross context VM structure.
1453	* @param pPatchMem Patch memory range.
1454	* @param cbPatchMem Size of the memory range.
1455	*/
1456	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1457	{
1458	VM_ASSERT_EMT(pVM);
1459	if (HMIsEnabled(pVM))
1460	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1461
1462	return VERR_NOT_SUPPORTED;
1463	}
1464
1465
1466	/**
1467	* Deregisters the guest memory range that can be used for patching.
1468	*
1469	* @returns VBox status code.
1470	* @param pVM The cross context VM structure.
1471	* @param pPatchMem Patch memory range.
1472	* @param cbPatchMem Size of the memory range.
1473	*/
1474	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1475	{
1476	if (HMIsEnabled(pVM))
1477	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1478
1479	return VINF_SUCCESS;
1480	}
1481
1482
1483	/**
1484	* Common recursion handler for the other EMTs.
1485	*
1486	* @returns Strict VBox status code.
1487	* @param pVM The cross context VM structure.
1488	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1489	* @param rcStrict Current status code to be combined with the one
1490	* from this recursion and returned.
1491	*/
1492	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1493	{
1494	int rc2;
1495
1496	/*
1497	* We wait here while the initiator of this recursion reconfigures
1498	* everything. The last EMT to get in signals the initiator.
1499	*/
1500	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1501	{
1502	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1503	AssertLogRelRC(rc2);
1504	}
1505
1506	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1507	AssertLogRelRC(rc2);
1508
1509	/*
1510	* Do the normal rendezvous processing.
1511	*/
1512	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1513	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1514
1515	/*
1516	* Wait for the initiator to restore everything.
1517	*/
1518	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1519	AssertLogRelRC(rc2);
1520
1521	/*
1522	* Last thread out of here signals the initiator.
1523	*/
1524	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1525	{
1526	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1527	AssertLogRelRC(rc2);
1528	}
1529
1530	/*
1531	* Merge status codes and return.
1532	*/
1533	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1534	if ( rcStrict2 != VINF_SUCCESS
1535	&& ( rcStrict == VINF_SUCCESS
1536	\|\| rcStrict > rcStrict2))
1537	rcStrict = rcStrict2;
1538	return rcStrict;
1539	}
1540
1541
1542	/**
1543	* Count returns and have the last non-caller EMT wake up the caller.
1544	*
1545	* @returns VBox strict informational status code for EM scheduling. No failures
1546	* will be returned here, those are for the caller only.
1547	*
1548	* @param pVM The cross context VM structure.
1549	* @param rcStrict The current accumulated recursive status code,
1550	* to be merged with i32RendezvousStatus and
1551	* returned.
1552	*/
1553	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1554	{
1555	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1556
1557	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1558	if (cReturned == pVM->cCpus - 1U)
1559	{
1560	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1561	AssertLogRelRC(rc);
1562	}
1563
1564	/*
1565	* Merge the status codes, ignoring error statuses in this code path.
1566	*/
1567	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1568	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1569	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1570	VERR_IPE_UNEXPECTED_INFO_STATUS);
1571
1572	if (RT_SUCCESS(rcStrict2))
1573	{
1574	if ( rcStrict2 != VINF_SUCCESS
1575	&& ( rcStrict == VINF_SUCCESS
1576	\|\| rcStrict > rcStrict2))
1577	rcStrict = rcStrict2;
1578	}
1579	return rcStrict;
1580	}
1581
1582
1583	/**
1584	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1585	*
1586	* @returns VBox strict informational status code for EM scheduling. No failures
1587	* will be returned here, those are for the caller only. When
1588	* fIsCaller is set, VINF_SUCCESS is always returned.
1589	*
1590	* @param pVM The cross context VM structure.
1591	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1592	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1593	* not.
1594	* @param fFlags The flags.
1595	* @param pfnRendezvous The callback.
1596	* @param pvUser The user argument for the callback.
1597	*/
1598	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1599	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1600	{
1601	int rc;
1602	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1603
1604	/*
1605	* Enter, the last EMT triggers the next callback phase.
1606	*/
1607	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1608	if (cEntered != pVM->cCpus)
1609	{
1610	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1611	{
1612	/* Wait for our turn. */
1613	for (;;)
1614	{
1615	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1616	AssertLogRelRC(rc);
1617	if (!pVM->vmm.s.fRendezvousRecursion)
1618	break;
1619	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1620	}
1621	}
1622	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1623	{
1624	/* Wait for the last EMT to arrive and wake everyone up. */
1625	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1626	AssertLogRelRC(rc);
1627	Assert(!pVM->vmm.s.fRendezvousRecursion);
1628	}
1629	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1630	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1631	{
1632	/* Wait for our turn. */
1633	for (;;)
1634	{
1635	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1636	AssertLogRelRC(rc);
1637	if (!pVM->vmm.s.fRendezvousRecursion)
1638	break;
1639	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1640	}
1641	}
1642	else
1643	{
1644	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1645
1646	/*
1647	* The execute once is handled specially to optimize the code flow.
1648	*
1649	* The last EMT to arrive will perform the callback and the other
1650	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1651	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1652	* returns, that EMT will initiate the normal return sequence.
1653	*/
1654	if (!fIsCaller)
1655	{
1656	for (;;)
1657	{
1658	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1659	AssertLogRelRC(rc);
1660	if (!pVM->vmm.s.fRendezvousRecursion)
1661	break;
1662	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1663	}
1664
1665	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1666	}
1667	return VINF_SUCCESS;
1668	}
1669	}
1670	else
1671	{
1672	/*
1673	* All EMTs are waiting, clear the FF and take action according to the
1674	* execution method.
1675	*/
1676	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1677
1678	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1679	{
1680	/* Wake up everyone. */
1681	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1682	AssertLogRelRC(rc);
1683	}
1684	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1685	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1686	{
1687	/* Figure out who to wake up and wake it up. If it's ourself, then
1688	it's easy otherwise wait for our turn. */
1689	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1690	? 0
1691	: pVM->cCpus - 1U;
1692	if (pVCpu->idCpu != iFirst)
1693	{
1694	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1695	AssertLogRelRC(rc);
1696	for (;;)
1697	{
1698	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1699	AssertLogRelRC(rc);
1700	if (!pVM->vmm.s.fRendezvousRecursion)
1701	break;
1702	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1703	}
1704	}
1705	}
1706	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1707	}
1708
1709
1710	/*
1711	* Do the callback and update the status if necessary.
1712	*/
1713	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1714	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1715	{
1716	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1717	if (rcStrict2 != VINF_SUCCESS)
1718	{
1719	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1720	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1721	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1722	int32_t i32RendezvousStatus;
1723	do
1724	{
1725	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1726	if ( rcStrict2 == i32RendezvousStatus
1727	\|\| RT_FAILURE(i32RendezvousStatus)
1728	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1729	&& rcStrict2 > i32RendezvousStatus))
1730	break;
1731	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1732	}
1733	}
1734
1735	/*
1736	* Increment the done counter and take action depending on whether we're
1737	* the last to finish callback execution.
1738	*/
1739	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1740	if ( cDone != pVM->cCpus
1741	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1742	{
1743	/* Signal the next EMT? */
1744	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1745	{
1746	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1747	AssertLogRelRC(rc);
1748	}
1749	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1750	{
1751	Assert(cDone == pVCpu->idCpu + 1U);
1752	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1753	AssertLogRelRC(rc);
1754	}
1755	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1756	{
1757	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1758	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1759	AssertLogRelRC(rc);
1760	}
1761
1762	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1763	if (!fIsCaller)
1764	{
1765	for (;;)
1766	{
1767	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1768	AssertLogRelRC(rc);
1769	if (!pVM->vmm.s.fRendezvousRecursion)
1770	break;
1771	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1772	}
1773	}
1774	}
1775	else
1776	{
1777	/* Callback execution is all done, tell the rest to return. */
1778	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1779	AssertLogRelRC(rc);
1780	}
1781
1782	if (!fIsCaller)
1783	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1784	return rcStrictRecursion;
1785	}
1786
1787
1788	/**
1789	* Called in response to VM_FF_EMT_RENDEZVOUS.
1790	*
1791	* @returns VBox strict status code - EM scheduling. No errors will be returned
1792	* here, nor will any non-EM scheduling status codes be returned.
1793	*
1794	* @param pVM The cross context VM structure.
1795	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1796	*
1797	* @thread EMT
1798	*/
1799	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1800	{
1801	Assert(!pVCpu->vmm.s.fInRendezvous);
1802	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1803	pVCpu->vmm.s.fInRendezvous = true;
1804	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1805	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1806	pVCpu->vmm.s.fInRendezvous = false;
1807	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1808	return VBOXSTRICTRC_TODO(rcStrict);
1809	}
1810
1811
1812	/**
1813	* Helper for resetting an single wakeup event sempahore.
1814	*
1815	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1816	* @param hEvt The event semaphore to reset.
1817	*/
1818	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1819	{
1820	for (uint32_t cLoops = 0; ; cLoops++)
1821	{
1822	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1823	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1824	return rc;
1825	}
1826	}
1827
1828
1829	/**
1830	* Worker for VMMR3EmtRendezvous that handles recursion.
1831	*
1832	* @returns VBox strict status code. This will be the first error,
1833	* VINF_SUCCESS, or an EM scheduling status code.
1834	*
1835	* @param pVM The cross context VM structure.
1836	* @param pVCpu The cross context virtual CPU structure of the
1837	* calling EMT.
1838	* @param fFlags Flags indicating execution methods. See
1839	* grp_VMMR3EmtRendezvous_fFlags.
1840	* @param pfnRendezvous The callback.
1841	* @param pvUser User argument for the callback.
1842	*
1843	* @thread EMT(pVCpu)
1844	*/
1845	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1846	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1847	{
1848	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1849	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1850	Assert(pVCpu->vmm.s.fInRendezvous);
1851
1852	/*
1853	* Save the current state.
1854	*/
1855	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1856	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1857	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1858	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1859	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1860
1861	/*
1862	* Check preconditions and save the current state.
1863	*/
1864	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1865	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1866	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1867	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1868	VERR_INTERNAL_ERROR);
1869	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1870	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1871
1872	/*
1873	* Reset the recursion prep and pop semaphores.
1874	*/
1875	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1876	AssertLogRelRCReturn(rc, rc);
1877	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1878	AssertLogRelRCReturn(rc, rc);
1879	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1880	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1881	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1882	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1883
1884	/*
1885	* Usher the other thread into the recursion routine.
1886	*/
1887	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1888	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1889
1890	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1891	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1892	while (cLeft-- > 0)
1893	{
1894	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1895	AssertLogRelRC(rc);
1896	}
1897	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1898	{
1899	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1900	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1901	{
1902	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1903	AssertLogRelRC(rc);
1904	}
1905	}
1906	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1907	{
1908	Assert(cLeft == pVCpu->idCpu);
1909	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1910	{
1911	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1912	AssertLogRelRC(rc);
1913	}
1914	}
1915	else
1916	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1917	VERR_INTERNAL_ERROR_4);
1918
1919	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1920	AssertLogRelRC(rc);
1921	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1922	AssertLogRelRC(rc);
1923
1924
1925	/*
1926	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1927	*/
1928	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1929	{
1930	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1931	AssertLogRelRC(rc);
1932	}
1933
1934	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1935
1936	/*
1937	* Clear the slate and setup the new rendezvous.
1938	*/
1939	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1940	{
1941	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1942	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1943	}
1944	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1945	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1946	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1947	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1948
1949	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1950	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1951	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1952	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1953	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1954	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1955	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1956	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1957
1958	/*
1959	* We're ready to go now, do normal rendezvous processing.
1960	*/
1961	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1962	AssertLogRelRC(rc);
1963
1964	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1965
1966	/*
1967	* The caller waits for the other EMTs to be done, return and waiting on the
1968	* pop semaphore.
1969	*/
1970	for (;;)
1971	{
1972	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1973	AssertLogRelRC(rc);
1974	if (!pVM->vmm.s.fRendezvousRecursion)
1975	break;
1976	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1977	}
1978
1979	/*
1980	* Get the return code and merge it with the above recursion status.
1981	*/
1982	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1983	if ( rcStrict2 != VINF_SUCCESS
1984	&& ( rcStrict == VINF_SUCCESS
1985	\|\| rcStrict > rcStrict2))
1986	rcStrict = rcStrict2;
1987
1988	/*
1989	* Restore the parent rendezvous state.
1990	*/
1991	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1992	{
1993	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1994	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1995	}
1996	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1997	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1998	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1999	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2000
2001	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2002	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2003	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2004	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2005	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2006	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2007	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2008
2009	/*
2010	* Usher the other EMTs back to their parent recursion routine, waiting
2011	* for them to all get there before we return (makes sure they've been
2012	* scheduled and are past the pop event sem, see below).
2013	*/
2014	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2015	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2016	AssertLogRelRC(rc);
2017
2018	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2019	{
2020	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2021	AssertLogRelRC(rc);
2022	}
2023
2024	/*
2025	* We must reset the pop semaphore on the way out (doing the pop caller too,
2026	* just in case). The parent may be another recursion.
2027	*/
2028	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2029	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2030
2031	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2032
2033	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2034	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2035	return rcStrict;
2036	}
2037
2038
2039	/**
2040	* EMT rendezvous.
2041	*
2042	* Gathers all the EMTs and execute some code on each of them, either in a one
2043	* by one fashion or all at once.
2044	*
2045	* @returns VBox strict status code. This will be the first error,
2046	* VINF_SUCCESS, or an EM scheduling status code.
2047	*
2048	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2049	* doesn't support it or if the recursion is too deep.
2050	*
2051	* @param pVM The cross context VM structure.
2052	* @param fFlags Flags indicating execution methods. See
2053	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2054	* descending and ascending rendezvous types support
2055	* recursion from inside @a pfnRendezvous.
2056	* @param pfnRendezvous The callback.
2057	* @param pvUser User argument for the callback.
2058	*
2059	* @thread Any.
2060	*/
2061	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2062	{
2063	/*
2064	* Validate input.
2065	*/
2066	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2067	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2068	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2069	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2070	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2071	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2072	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2073	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2074
2075	VBOXSTRICTRC rcStrict;
2076	PVMCPU pVCpu = VMMGetCpu(pVM);
2077	if (!pVCpu)
2078	{
2079	/*
2080	* Forward the request to an EMT thread.
2081	*/
2082	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2083	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2084	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2085	else
2086	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2087	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2088	}
2089	else if ( pVM->cCpus == 1
2090	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2091	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2092	{
2093	/*
2094	* Shortcut for the single EMT case.
2095	*
2096	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2097	* during vmR3Destroy after other emulation threads have started terminating.
2098	*/
2099	if (!pVCpu->vmm.s.fInRendezvous)
2100	{
2101	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2102	pVCpu->vmm.s.fInRendezvous = true;
2103	pVM->vmm.s.fRendezvousFlags = fFlags;
2104	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2105	pVCpu->vmm.s.fInRendezvous = false;
2106	}
2107	else
2108	{
2109	/* Recursion. Do the same checks as in the SMP case. */
2110	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2111	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2112	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2113	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2114	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2115	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2116	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2117	, VERR_DEADLOCK);
2118
2119	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2120	pVM->vmm.s.cRendezvousRecursions++;
2121	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2122	pVM->vmm.s.fRendezvousFlags = fFlags;
2123
2124	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2125
2126	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2127	pVM->vmm.s.cRendezvousRecursions--;
2128	}
2129	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2130	}
2131	else
2132	{
2133	/*
2134	* Spin lock. If busy, check for recursion, if not recursing wait for
2135	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2136	*/
2137	int rc;
2138	rcStrict = VINF_SUCCESS;
2139	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2140	{
2141	/* Allow recursion in some cases. */
2142	if ( pVCpu->vmm.s.fInRendezvous
2143	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2144	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2145	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2146	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2147	))
2148	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2149
2150	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2151	VERR_DEADLOCK);
2152
2153	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2154	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2155	{
2156	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2157	{
2158	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2159	if ( rc != VINF_SUCCESS
2160	&& ( rcStrict == VINF_SUCCESS
2161	\|\| rcStrict > rc))
2162	rcStrict = rc;
2163	/** @todo Perhaps deal with termination here? */
2164	}
2165	ASMNopPause();
2166	}
2167	}
2168
2169	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2170	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2171	Assert(!pVCpu->vmm.s.fInRendezvous);
2172	pVCpu->vmm.s.fInRendezvous = true;
2173
2174	/*
2175	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2176	*/
2177	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2178	{
2179	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2180	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2181	}
2182	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2183	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2184	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2185	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2186	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2187	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2188	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2189	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2190	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2191	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2192	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2193
2194	/*
2195	* Set the FF and poke the other EMTs.
2196	*/
2197	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2198	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2199
2200	/*
2201	* Do the same ourselves.
2202	*/
2203	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2204
2205	/*
2206	* The caller waits for the other EMTs to be done and return before doing
2207	* the cleanup. This makes away with wakeup / reset races we would otherwise
2208	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2209	*/
2210	for (;;)
2211	{
2212	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2213	AssertLogRelRC(rc);
2214	if (!pVM->vmm.s.fRendezvousRecursion)
2215	break;
2216	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2217	}
2218
2219	/*
2220	* Get the return code and clean up a little bit.
2221	*/
2222	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2223	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2224
2225	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2226	pVCpu->vmm.s.fInRendezvous = false;
2227
2228	/*
2229	* Merge rcStrict, rcStrict2 and rcStrict3.
2230	*/
2231	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2232	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2233	if ( rcStrict2 != VINF_SUCCESS
2234	&& ( rcStrict == VINF_SUCCESS
2235	\|\| rcStrict > rcStrict2))
2236	rcStrict = rcStrict2;
2237	if ( rcStrict3 != VINF_SUCCESS
2238	&& ( rcStrict == VINF_SUCCESS
2239	\|\| rcStrict > rcStrict3))
2240	rcStrict = rcStrict3;
2241	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2242	}
2243
2244	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2245	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2246	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2247	VERR_IPE_UNEXPECTED_INFO_STATUS);
2248	return VBOXSTRICTRC_VAL(rcStrict);
2249	}
2250
2251
2252	/**
2253	* Interface for vmR3SetHaltMethodU.
2254	*
2255	* @param pVCpu The cross context virtual CPU structure of the
2256	* calling EMT.
2257	* @param fMayHaltInRing0 The new state.
2258	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2259	* @thread EMT(pVCpu)
2260	*
2261	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2262	* component.
2263	*/
2264	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2265	{
2266	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2267	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2268	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2269	}
2270
2271
2272	/**
2273	* Read from the ring 0 jump buffer stack.
2274	*
2275	* @returns VBox status code.
2276	*
2277	* @param pVM The cross context VM structure.
2278	* @param idCpu The ID of the source CPU context (for the address).
2279	* @param R0Addr Where to start reading.
2280	* @param pvBuf Where to store the data we've read.
2281	* @param cbRead The number of bytes to read.
2282	*/
2283	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2284	{
2285	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2286	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2287	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2288
2289	int rc;
2290	#ifdef VMM_R0_SWITCH_STACK
2291	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2292	#else
2293	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2294	#endif
2295	if ( off < VMM_STACK_SIZE
2296	&& off + cbRead <= VMM_STACK_SIZE)
2297	{
2298	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2299	rc = VINF_SUCCESS;
2300	}
2301	else
2302	rc = VERR_INVALID_POINTER;
2303
2304	/* Supply the setjmp return RIP/EIP. */
2305	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2306	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2307	{
2308	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2309	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2310	size_t offDst = 0;
2311	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2312	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2313	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2314	{
2315	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2316	Assert(offSrc < cbSrc);
2317	pbSrc -= offSrc;
2318	cbSrc -= offSrc;
2319	}
2320	if (cbSrc > cbRead - offDst)
2321	cbSrc = cbRead - offDst;
2322	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2323
2324	if (cbSrc == cbRead)
2325	rc = VINF_SUCCESS;
2326	}
2327
2328	return rc;
2329	}
2330
2331
2332	/**
2333	* Used by the DBGF stack unwinder to initialize the register state.
2334	*
2335	* @param pUVM The user mode VM handle.
2336	* @param idCpu The ID of the CPU being unwound.
2337	* @param pState The unwind state to initialize.
2338	*/
2339	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2340	{
2341	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2342	AssertReturnVoid(pVCpu);
2343
2344	/*
2345	* Locate the resume point on the stack.
2346	*/
2347	#ifdef VMM_R0_SWITCH_STACK
2348	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2349	AssertReturnVoid(off < VMM_STACK_SIZE);
2350	#else
2351	uintptr_t off = 0;
2352	#endif
2353
2354	#ifdef RT_ARCH_AMD64
2355	/*
2356	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2357	*/
2358	# ifdef VBOX_STRICT
2359	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2360	off += 8; /* RESUME_MAGIC */
2361	# endif
2362	# ifdef RT_OS_WINDOWS
2363	off += 0xa0; /* XMM6 thru XMM15 */
2364	# endif
2365	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2366	off += 8;
2367	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2368	off += 8;
2369	# ifdef RT_OS_WINDOWS
2370	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2371	off += 8;
2372	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2373	off += 8;
2374	# endif
2375	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2376	off += 8;
2377	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2378	off += 8;
2379	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2380	off += 8;
2381	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2382	off += 8;
2383	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2384	off += 8;
2385	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2386	off += 8;
2387
2388	#elif defined(RT_ARCH_X86)
2389	/*
2390	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2391	*/
2392	# ifdef VBOX_STRICT
2393	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2394	off += 4; /* RESUME_MAGIC */
2395	# endif
2396	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2397	off += 4;
2398	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2399	off += 4;
2400	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2401	off += 4;
2402	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2403	off += 4;
2404	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2405	off += 4;
2406	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2407	off += 4;
2408	#else
2409	# error "Port me"
2410	#endif
2411
2412	/*
2413	* This is all we really need here, though the above helps if the assembly
2414	* doesn't contain unwind info (currently only on win/64, so that is useful).
2415	*/
2416	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2417	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2418	}
2419
2420
2421	/**
2422	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2423	*
2424	* @returns VBox status code.
2425	* @param pVM The cross context VM structure.
2426	* @param uOperation Operation to execute.
2427	* @param u64Arg Constant argument.
2428	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2429	* details.
2430	*/
2431	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2432	{
2433	PVMCPU pVCpu = VMMGetCpu(pVM);
2434	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2435	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2436	}
2437
2438
2439	/**
2440	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2441	*
2442	* @returns VBox status code.
2443	* @param pVM The cross context VM structure.
2444	* @param pVCpu The cross context VM structure.
2445	* @param enmOperation Operation to execute.
2446	* @param u64Arg Constant argument.
2447	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2448	* details.
2449	*/
2450	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2451	{
2452	int rc;
2453	for (;;)
2454	{
2455	#ifdef NO_SUPCALLR0VMM
2456	rc = VERR_GENERAL_FAILURE;
2457	#else
2458	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2459	#endif
2460	/*
2461	* Flush the logs.
2462	*/
2463	#ifdef LOG_ENABLED
2464	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2465	#endif
2466	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2467	if (rc != VINF_VMM_CALL_HOST)
2468	break;
2469	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2470	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2471	break;
2472	/* Resume R0 */
2473	}
2474
2475	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2476	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2477	VERR_IPE_UNEXPECTED_INFO_STATUS);
2478	return rc;
2479	}
2480
2481
2482	/**
2483	* Service a call to the ring-3 host code.
2484	*
2485	* @returns VBox status code.
2486	* @param pVM The cross context VM structure.
2487	* @param pVCpu The cross context virtual CPU structure.
2488	* @remarks Careful with critsects.
2489	*/
2490	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2491	{
2492	/*
2493	* We must also check for pending critsect exits or else we can deadlock
2494	* when entering other critsects here.
2495	*/
2496	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2497	PDMCritSectBothFF(pVM, pVCpu);
2498
2499	switch (pVCpu->vmm.s.enmCallRing3Operation)
2500	{
2501	/*
2502	* Allocates more handy pages.
2503	*/
2504	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2505	{
2506	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2507	break;
2508	}
2509
2510	/*
2511	* Allocates a large page.
2512	*/
2513	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2514	{
2515	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargePage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2516	break;
2517	}
2518
2519	/*
2520	* Signal a ring 0 hypervisor assertion.
2521	* Cancel the longjmp operation that's in progress.
2522	*/
2523	case VMMCALLRING3_VM_R0_ASSERTION:
2524	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2525	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2526	#ifdef RT_ARCH_X86
2527	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2528	#else
2529	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2530	#endif
2531	#ifdef VMM_R0_SWITCH_STACK
2532	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2533	#endif
2534	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2535	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2536	return VERR_VMM_RING0_ASSERTION;
2537
2538	default:
2539	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2540	return VERR_VMM_UNKNOWN_RING3_CALL;
2541	}
2542
2543	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2544	return VINF_SUCCESS;
2545	}
2546
2547
2548	/**
2549	* Displays the Force action Flags.
2550	*
2551	* @param pVM The cross context VM structure.
2552	* @param pHlp The output helpers.
2553	* @param pszArgs The additional arguments (ignored).
2554	*/
2555	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2556	{
2557	int c;
2558	uint32_t f;
2559	NOREF(pszArgs);
2560
2561	#define PRINT_FLAG(prf,flag) do { \
2562	if (f & (prf##flag)) \
2563	{ \
2564	static const char *s_psz = #flag; \
2565	if (!(c % 6)) \
2566	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2567	else \
2568	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2569	c++; \
2570	f &= ~(prf##flag); \
2571	} \
2572	} while (0)
2573
2574	#define PRINT_GROUP(prf,grp,sfx) do { \
2575	if (f & (prf##grp##sfx)) \
2576	{ \
2577	static const char *s_psz = #grp; \
2578	if (!(c % 5)) \
2579	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2580	else \
2581	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2582	c++; \
2583	} \
2584	} while (0)
2585
2586	/*
2587	* The global flags.
2588	*/
2589	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2590	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2591
2592	/* show the flag mnemonics */
2593	c = 0;
2594	f = fGlobalForcedActions;
2595	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2596	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2597	PRINT_FLAG(VM_FF_,PDM_DMA);
2598	PRINT_FLAG(VM_FF_,DBGF);
2599	PRINT_FLAG(VM_FF_,REQUEST);
2600	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2601	PRINT_FLAG(VM_FF_,RESET);
2602	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2603	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2604	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2605	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2606	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2607	if (f)
2608	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2609	else
2610	pHlp->pfnPrintf(pHlp, "\n");
2611
2612	/* the groups */
2613	c = 0;
2614	f = fGlobalForcedActions;
2615	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2616	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2617	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2618	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2619	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2620	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2621	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2622	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2623	if (c)
2624	pHlp->pfnPrintf(pHlp, "\n");
2625
2626	/*
2627	* Per CPU flags.
2628	*/
2629	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2630	{
2631	PVMCPU pVCpu = pVM->apCpusR3[i];
2632	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2633	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2634
2635	/* show the flag mnemonics */
2636	c = 0;
2637	f = fLocalForcedActions;
2638	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2639	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2640	PRINT_FLAG(VMCPU_FF_,TIMER);
2641	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2642	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2643	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2644	PRINT_FLAG(VMCPU_FF_,UNHALT);
2645	PRINT_FLAG(VMCPU_FF_,IEM);
2646	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2647	PRINT_FLAG(VMCPU_FF_,DBGF);
2648	PRINT_FLAG(VMCPU_FF_,REQUEST);
2649	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2650	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2651	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2652	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2653	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2654	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2655	PRINT_FLAG(VMCPU_FF_,TO_R3);
2656	PRINT_FLAG(VMCPU_FF_,IOM);
2657	if (f)
2658	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2659	else
2660	pHlp->pfnPrintf(pHlp, "\n");
2661
2662	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2663	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2664
2665	/* the groups */
2666	c = 0;
2667	f = fLocalForcedActions;
2668	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2669	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2670	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2671	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2672	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2673	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2674	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2675	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2676	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2677	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2678	if (c)
2679	pHlp->pfnPrintf(pHlp, "\n");
2680	}
2681
2682	#undef PRINT_FLAG
2683	#undef PRINT_GROUP
2684	}
2685

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 91281

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