VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 80281

Last change on this file since 80281 was 80281, checked in by vboxsync, 5 years ago

VMM,++: Refactoring code to use VMMC & VMMCPUCC. bugref:9217

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1/* $Id: VMM.cpp 80281 2019-08-15 07:29:37Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_dbgf
32 * - @subpage pg_em
33 * - @subpage pg_gim
34 * - @subpage pg_gmm
35 * - @subpage pg_gvmm
36 * - @subpage pg_hm
37 * - @subpage pg_iem
38 * - @subpage pg_iom
39 * - @subpage pg_mm
40 * - @subpage pg_pdm
41 * - @subpage pg_pgm
42 * - @subpage pg_rem
43 * - @subpage pg_selm
44 * - @subpage pg_ssm
45 * - @subpage pg_stam
46 * - @subpage pg_tm
47 * - @subpage pg_trpm
48 * - @subpage pg_vm
49 *
50 *
51 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52 *
53 *
54 * @section sec_vmmstate VMM State
55 *
56 * @image html VM_Statechart_Diagram.gif
57 *
58 * To be written.
59 *
60 *
61 * @subsection subsec_vmm_init VMM Initialization
62 *
63 * To be written.
64 *
65 *
66 * @subsection subsec_vmm_term VMM Termination
67 *
68 * To be written.
69 *
70 *
71 * @section sec_vmm_limits VMM Limits
72 *
73 * There are various resource limits imposed by the VMM and it's
74 * sub-components. We'll list some of them here.
75 *
76 * On 64-bit hosts:
77 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78 * can be increased up to 64K - 1.
79 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81 * - A VM can be assigned all the memory we can use (16TB), however, the
82 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84 *
85 * On 32-bit hosts:
86 * - Max 127 VMs. Imposed by GMM's per page structure.
87 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88 * ROM pages. The limit is imposed by the 28-bit page ID used
89 * internally in GMM. It is also limited by PAE.
90 * - A VM can be assigned all the memory GMM can allocate, however, the
91 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93 *
94 */
95
96
97/*********************************************************************************************************************************
98* Header Files *
99*********************************************************************************************************************************/
100#define VBOX_BUGREF_9217_PART_I
101#define LOG_GROUP LOG_GROUP_VMM
102#include <VBox/vmm/vmm.h>
103#include <VBox/vmm/vmapi.h>
104#include <VBox/vmm/pgm.h>
105#include <VBox/vmm/cfgm.h>
106#include <VBox/vmm/pdmqueue.h>
107#include <VBox/vmm/pdmcritsect.h>
108#include <VBox/vmm/pdmcritsectrw.h>
109#include <VBox/vmm/pdmapi.h>
110#include <VBox/vmm/cpum.h>
111#include <VBox/vmm/gim.h>
112#include <VBox/vmm/mm.h>
113#include <VBox/vmm/nem.h>
114#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
115# include <VBox/vmm/iem.h>
116#endif
117#include <VBox/vmm/iom.h>
118#include <VBox/vmm/trpm.h>
119#include <VBox/vmm/selm.h>
120#include <VBox/vmm/em.h>
121#include <VBox/sup.h>
122#include <VBox/vmm/dbgf.h>
123#include <VBox/vmm/apic.h>
124#ifdef VBOX_WITH_REM
125# include <VBox/vmm/rem.h>
126#endif
127#include <VBox/vmm/ssm.h>
128#include <VBox/vmm/tm.h>
129#include "VMMInternal.h"
130#include <VBox/vmm/vmcc.h>
131
132#include <VBox/err.h>
133#include <VBox/param.h>
134#include <VBox/version.h>
135#include <VBox/vmm/hm.h>
136#include <iprt/assert.h>
137#include <iprt/alloc.h>
138#include <iprt/asm.h>
139#include <iprt/time.h>
140#include <iprt/semaphore.h>
141#include <iprt/stream.h>
142#include <iprt/string.h>
143#include <iprt/stdarg.h>
144#include <iprt/ctype.h>
145#include <iprt/x86.h>
146
147
148/*********************************************************************************************************************************
149* Defined Constants And Macros *
150*********************************************************************************************************************************/
151/** The saved state version. */
152#define VMM_SAVED_STATE_VERSION 4
153/** The saved state version used by v3.0 and earlier. (Teleportation) */
154#define VMM_SAVED_STATE_VERSION_3_0 3
155
156/** Macro for flushing the ring-0 logging. */
157#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
158 do { \
159 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
160 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
161 { /* likely? */ } \
162 else \
163 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
164 } while (0)
165
166
167/*********************************************************************************************************************************
168* Internal Functions *
169*********************************************************************************************************************************/
170static int vmmR3InitStacks(PVM pVM);
171static int vmmR3InitLoggers(PVM pVM);
172static void vmmR3InitRegisterStats(PVM pVM);
173static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
174static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
175static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
176static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
177 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
178static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
179static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
180
181
182/**
183 * Initializes the VMM.
184 *
185 * @returns VBox status code.
186 * @param pVM The cross context VM structure.
187 */
188VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
189{
190 LogFlow(("VMMR3Init\n"));
191
192 /*
193 * Assert alignment, sizes and order.
194 */
195 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
196 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
197
198 /*
199 * Init basic VM VMM members.
200 */
201 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
202 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
203 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
204 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
205 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
206 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
207 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
208 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
209 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
210
211 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
212 * The EMT yield interval. The EMT yielding is a hack we employ to play a
213 * bit nicer with the rest of the system (like for instance the GUI).
214 */
215 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
216 23 /* Value arrived at after experimenting with the grub boot prompt. */);
217 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
218
219
220 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
221 * Controls whether we employ per-cpu preemption timers to limit the time
222 * spent executing guest code. This option is not available on all
223 * platforms and we will silently ignore this setting then. If we are
224 * running in VT-x mode, we will use the VMX-preemption timer instead of
225 * this one when possible.
226 */
227 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
228 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
229 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
230
231 /*
232 * Initialize the VMM rendezvous semaphores.
233 */
234 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
235 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
236 return VERR_NO_MEMORY;
237 for (VMCPUID i = 0; i < pVM->cCpus; i++)
238 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
239 for (VMCPUID i = 0; i < pVM->cCpus; i++)
240 {
241 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
242 AssertRCReturn(rc, rc);
243 }
244 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
245 AssertRCReturn(rc, rc);
246 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
247 AssertRCReturn(rc, rc);
248 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
249 AssertRCReturn(rc, rc);
250 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
251 AssertRCReturn(rc, rc);
252 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
253 AssertRCReturn(rc, rc);
254 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
255 AssertRCReturn(rc, rc);
256 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
257 AssertRCReturn(rc, rc);
258 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
259 AssertRCReturn(rc, rc);
260
261 /*
262 * Register the saved state data unit.
263 */
264 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
265 NULL, NULL, NULL,
266 NULL, vmmR3Save, NULL,
267 NULL, vmmR3Load, NULL);
268 if (RT_FAILURE(rc))
269 return rc;
270
271 /*
272 * Register the Ring-0 VM handle with the session for fast ioctl calls.
273 */
274 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
275 if (RT_FAILURE(rc))
276 return rc;
277
278 /*
279 * Init various sub-components.
280 */
281 rc = vmmR3InitStacks(pVM);
282 if (RT_SUCCESS(rc))
283 {
284 rc = vmmR3InitLoggers(pVM);
285
286#ifdef VBOX_WITH_NMI
287 /*
288 * Allocate mapping for the host APIC.
289 */
290 if (RT_SUCCESS(rc))
291 {
292 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
293 AssertRC(rc);
294 }
295#endif
296 if (RT_SUCCESS(rc))
297 {
298 /*
299 * Debug info and statistics.
300 */
301 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
302 vmmR3InitRegisterStats(pVM);
303 vmmInitFormatTypes();
304
305 return VINF_SUCCESS;
306 }
307 }
308 /** @todo Need failure cleanup? */
309
310 return rc;
311}
312
313
314/**
315 * Allocate & setup the VMM RC stack(s) (for EMTs).
316 *
317 * The stacks are also used for long jumps in Ring-0.
318 *
319 * @returns VBox status code.
320 * @param pVM The cross context VM structure.
321 *
322 * @remarks The optional guard page gets it protection setup up during R3 init
323 * completion because of init order issues.
324 */
325static int vmmR3InitStacks(PVM pVM)
326{
327 int rc = VINF_SUCCESS;
328#ifdef VMM_R0_SWITCH_STACK
329 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
330#else
331 uint32_t fFlags = 0;
332#endif
333
334 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
335 {
336 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
337
338#ifdef VBOX_STRICT_VMM_STACK
339 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
340#else
341 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
342#endif
343 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
344 if (RT_SUCCESS(rc))
345 {
346#ifdef VBOX_STRICT_VMM_STACK
347 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
348#endif
349 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
350
351 }
352 }
353
354 return rc;
355}
356
357
358/**
359 * Initialize the loggers.
360 *
361 * @returns VBox status code.
362 * @param pVM The cross context VM structure.
363 */
364static int vmmR3InitLoggers(PVM pVM)
365{
366 int rc;
367#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
368
369 /*
370 * Allocate R0 Logger instance (finalized in the relocator).
371 */
372#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
373 PRTLOGGER pLogger = RTLogDefaultInstance();
374 if (pLogger)
375 {
376 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
377 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
378 {
379 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
380 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
381 (void **)&pVCpu->vmm.s.pR0LoggerR3);
382 if (RT_FAILURE(rc))
383 return rc;
384 pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
385 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
386 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
387 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
388 }
389 }
390#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
391
392 /*
393 * Release logging.
394 */
395 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
396 if (pRelLogger)
397 {
398 /*
399 * Ring-0 release logger.
400 */
401 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
402 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
403 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
404
405 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
406 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
407 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
408
409 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
410
411 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
412 {
413 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
414 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
415 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
416 if (RT_FAILURE(rc))
417 return rc;
418 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
419 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
420 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
421 pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
422 pVmmLogger->cbLogger = (uint32_t)cbLogger;
423 pVmmLogger->fCreated = false;
424 pVmmLogger->fFlushingDisabled = false;
425 pVmmLogger->fRegistered = false;
426 pVmmLogger->idCpu = idCpu;
427
428 char szR0ThreadName[16];
429 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
430 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
431 pfnLoggerWrapper, pfnLoggerFlush,
432 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
433 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
434
435 /* We only update the release log instance here. */
436 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
437 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
438 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
439
440 pVmmLogger->fCreated = true;
441 }
442 }
443
444 return VINF_SUCCESS;
445}
446
447
448/**
449 * VMMR3Init worker that register the statistics with STAM.
450 *
451 * @param pVM The cross context VM structure.
452 */
453static void vmmR3InitRegisterStats(PVM pVM)
454{
455 RT_NOREF_PV(pVM);
456
457 /*
458 * Statistics.
459 */
460 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
519 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
520 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
521 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
522 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
523 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
524
525#ifdef VBOX_WITH_STATISTICS
526 for (VMCPUID i = 0; i < pVM->cCpus; i++)
527 {
528 PVMCPU pVCpu = pVM->apCpusR3[i];
529 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
530 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
531 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
532 }
533#endif
534 for (VMCPUID i = 0; i < pVM->cCpus; i++)
535 {
536 PVMCPU pVCpu = pVM->apCpusR3[i];
537 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
538 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
539 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
540 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
541 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
542 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
543 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
544 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
545 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
546 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
547 }
548}
549
550
551/**
552 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
553 *
554 * @returns VBox status code.
555 * @param pVM The cross context VM structure.
556 * @param pVCpu The cross context per CPU structure.
557 * @thread EMT(pVCpu)
558 */
559static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
560{
561 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
562}
563
564
565/**
566 * Initializes the R0 VMM.
567 *
568 * @returns VBox status code.
569 * @param pVM The cross context VM structure.
570 */
571VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
572{
573 int rc;
574 PVMCPU pVCpu = VMMGetCpu(pVM);
575 Assert(pVCpu && pVCpu->idCpu == 0);
576
577#ifdef LOG_ENABLED
578 /*
579 * Initialize the ring-0 logger if we haven't done so yet.
580 */
581 if ( pVCpu->vmm.s.pR0LoggerR3
582 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
583 {
584 rc = VMMR3UpdateLoggers(pVM);
585 if (RT_FAILURE(rc))
586 return rc;
587 }
588#endif
589
590 /*
591 * Call Ring-0 entry with init code.
592 */
593 for (;;)
594 {
595#ifdef NO_SUPCALLR0VMM
596 //rc = VERR_GENERAL_FAILURE;
597 rc = VINF_SUCCESS;
598#else
599 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
600#endif
601 /*
602 * Flush the logs.
603 */
604#ifdef LOG_ENABLED
605 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
606#endif
607 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
608 if (rc != VINF_VMM_CALL_HOST)
609 break;
610 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
611 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
612 break;
613 /* Resume R0 */
614 }
615
616 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
617 {
618 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
619 if (RT_SUCCESS(rc))
620 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
621 }
622
623 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
624 if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
625 LogRel(("VMM: Enabled thread-context hooks\n"));
626 else
627 LogRel(("VMM: Thread-context hooks unavailable\n"));
628
629 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
630 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
631 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
632 else
633 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
634 if (pVM->vmm.s.fIsPreemptPossible)
635 LogRel(("VMM: Kernel preemption is possible\n"));
636 else
637 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
638
639 /*
640 * Send all EMTs to ring-0 to get their logger initialized.
641 */
642 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
643 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
644
645 return rc;
646}
647
648
649/**
650 * Called when an init phase completes.
651 *
652 * @returns VBox status code.
653 * @param pVM The cross context VM structure.
654 * @param enmWhat Which init phase.
655 */
656VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
657{
658 int rc = VINF_SUCCESS;
659
660 switch (enmWhat)
661 {
662 case VMINITCOMPLETED_RING3:
663 {
664 /*
665 * Create the EMT yield timer.
666 */
667 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
668 AssertRCReturn(rc, rc);
669
670 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
671 AssertRCReturn(rc, rc);
672 break;
673 }
674
675 case VMINITCOMPLETED_HM:
676 {
677 /*
678 * Disable the periodic preemption timers if we can use the
679 * VMX-preemption timer instead.
680 */
681 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
682 && HMR3IsVmxPreemptionTimerUsed(pVM))
683 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
684 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
685
686 /*
687 * Last chance for GIM to update its CPUID leaves if it requires
688 * knowledge/information from HM initialization.
689 */
690 rc = GIMR3InitCompleted(pVM);
691 AssertRCReturn(rc, rc);
692
693 /*
694 * CPUM's post-initialization (print CPUIDs).
695 */
696 CPUMR3LogCpuIdAndMsrFeatures(pVM);
697 break;
698 }
699
700 default: /* shuts up gcc */
701 break;
702 }
703
704 return rc;
705}
706
707
708/**
709 * Terminate the VMM bits.
710 *
711 * @returns VBox status code.
712 * @param pVM The cross context VM structure.
713 */
714VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
715{
716 PVMCPU pVCpu = VMMGetCpu(pVM);
717 Assert(pVCpu && pVCpu->idCpu == 0);
718
719 /*
720 * Call Ring-0 entry with termination code.
721 */
722 int rc;
723 for (;;)
724 {
725#ifdef NO_SUPCALLR0VMM
726 //rc = VERR_GENERAL_FAILURE;
727 rc = VINF_SUCCESS;
728#else
729 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
730#endif
731 /*
732 * Flush the logs.
733 */
734#ifdef LOG_ENABLED
735 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
736#endif
737 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
738 if (rc != VINF_VMM_CALL_HOST)
739 break;
740 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
741 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
742 break;
743 /* Resume R0 */
744 }
745 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
746 {
747 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
748 if (RT_SUCCESS(rc))
749 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
750 }
751
752 for (VMCPUID i = 0; i < pVM->cCpus; i++)
753 {
754 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
755 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
756 }
757 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
758 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
759 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
760 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
761 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
762 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
763 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
764 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
765 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
766 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
767 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
768 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
769 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
770 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
771 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
772 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
773
774 vmmTermFormatTypes();
775 return rc;
776}
777
778
779/**
780 * Applies relocations to data and code managed by this
781 * component. This function will be called at init and
782 * whenever the VMM need to relocate it self inside the GC.
783 *
784 * The VMM will need to apply relocations to the core code.
785 *
786 * @param pVM The cross context VM structure.
787 * @param offDelta The relocation delta.
788 */
789VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
790{
791 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
792 RT_NOREF(offDelta);
793
794 /*
795 * Update the logger.
796 */
797 VMMR3UpdateLoggers(pVM);
798}
799
800
801/**
802 * Updates the settings for the RC and R0 loggers.
803 *
804 * @returns VBox status code.
805 * @param pVM The cross context VM structure.
806 */
807VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
808{
809 int rc = VINF_SUCCESS;
810
811#ifdef LOG_ENABLED
812 /*
813 * For the ring-0 EMT logger, we use a per-thread logger instance
814 * in ring-0. Only initialize it once.
815 */
816 PRTLOGGER const pDefault = RTLogDefaultInstance();
817 for (VMCPUID i = 0; i < pVM->cCpus; i++)
818 {
819 PVMCPU pVCpu = pVM->apCpusR3[i];
820 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
821 if (pR0LoggerR3)
822 {
823 if (!pR0LoggerR3->fCreated)
824 {
825 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
826 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
827 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
828
829 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
830 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
831 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
832
833 char szR0ThreadName[16];
834 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
835 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
836 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
837 pfnLoggerWrapper, pfnLoggerFlush,
838 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
839 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
840
841 pR0LoggerR3->idCpu = i;
842 pR0LoggerR3->fCreated = true;
843 pR0LoggerR3->fFlushingDisabled = false;
844 }
845
846 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
847 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
848 AssertRC(rc);
849 }
850 }
851#else
852 RT_NOREF(pVM);
853#endif
854
855 return rc;
856}
857
858
859/**
860 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
861 *
862 * @returns Pointer to the buffer.
863 * @param pVM The cross context VM structure.
864 */
865VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
866{
867 return pVM->vmm.s.szRing0AssertMsg1;
868}
869
870
871/**
872 * Returns the VMCPU of the specified virtual CPU.
873 *
874 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
875 *
876 * @param pUVM The user mode VM handle.
877 * @param idCpu The ID of the virtual CPU.
878 */
879VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
880{
881 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
882 AssertReturn(idCpu < pUVM->cCpus, NULL);
883 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
884 return pUVM->pVM->apCpusR3[idCpu];
885}
886
887
888/**
889 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
890 *
891 * @returns Pointer to the buffer.
892 * @param pVM The cross context VM structure.
893 */
894VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
895{
896 return pVM->vmm.s.szRing0AssertMsg2;
897}
898
899
900/**
901 * Execute state save operation.
902 *
903 * @returns VBox status code.
904 * @param pVM The cross context VM structure.
905 * @param pSSM SSM operation handle.
906 */
907static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
908{
909 LogFlow(("vmmR3Save:\n"));
910
911 /*
912 * Save the started/stopped state of all CPUs except 0 as it will always
913 * be running. This avoids breaking the saved state version. :-)
914 */
915 for (VMCPUID i = 1; i < pVM->cCpus; i++)
916 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
917
918 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
919}
920
921
922/**
923 * Execute state load operation.
924 *
925 * @returns VBox status code.
926 * @param pVM The cross context VM structure.
927 * @param pSSM SSM operation handle.
928 * @param uVersion Data layout version.
929 * @param uPass The data pass.
930 */
931static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
932{
933 LogFlow(("vmmR3Load:\n"));
934 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
935
936 /*
937 * Validate version.
938 */
939 if ( uVersion != VMM_SAVED_STATE_VERSION
940 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
941 {
942 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
943 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
944 }
945
946 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
947 {
948 /* Ignore the stack bottom, stack pointer and stack bits. */
949 RTRCPTR RCPtrIgnored;
950 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
951 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
952#ifdef RT_OS_DARWIN
953 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
954 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
955 && SSMR3HandleRevision(pSSM) >= 48858
956 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
957 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
958 )
959 SSMR3Skip(pSSM, 16384);
960 else
961 SSMR3Skip(pSSM, 8192);
962#else
963 SSMR3Skip(pSSM, 8192);
964#endif
965 }
966
967 /*
968 * Restore the VMCPU states. VCPU 0 is always started.
969 */
970 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
971 for (VMCPUID i = 1; i < pVM->cCpus; i++)
972 {
973 bool fStarted;
974 int rc = SSMR3GetBool(pSSM, &fStarted);
975 if (RT_FAILURE(rc))
976 return rc;
977 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
978 }
979
980 /* terminator */
981 uint32_t u32;
982 int rc = SSMR3GetU32(pSSM, &u32);
983 if (RT_FAILURE(rc))
984 return rc;
985 if (u32 != UINT32_MAX)
986 {
987 AssertMsgFailed(("u32=%#x\n", u32));
988 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
989 }
990 return VINF_SUCCESS;
991}
992
993
994/**
995 * Suspends the CPU yielder.
996 *
997 * @param pVM The cross context VM structure.
998 */
999VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1000{
1001 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1002 if (!pVM->vmm.s.cYieldResumeMillies)
1003 {
1004 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1005 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1006 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1007 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1008 else
1009 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1010 TMTimerStop(pVM->vmm.s.pYieldTimer);
1011 }
1012 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1013}
1014
1015
1016/**
1017 * Stops the CPU yielder.
1018 *
1019 * @param pVM The cross context VM structure.
1020 */
1021VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1022{
1023 if (!pVM->vmm.s.cYieldResumeMillies)
1024 TMTimerStop(pVM->vmm.s.pYieldTimer);
1025 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1026 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1027}
1028
1029
1030/**
1031 * Resumes the CPU yielder when it has been a suspended or stopped.
1032 *
1033 * @param pVM The cross context VM structure.
1034 */
1035VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1036{
1037 if (pVM->vmm.s.cYieldResumeMillies)
1038 {
1039 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1040 pVM->vmm.s.cYieldResumeMillies = 0;
1041 }
1042}
1043
1044
1045/**
1046 * Internal timer callback function.
1047 *
1048 * @param pVM The cross context VM structure.
1049 * @param pTimer The timer handle.
1050 * @param pvUser User argument specified upon timer creation.
1051 */
1052static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1053{
1054 NOREF(pvUser);
1055
1056 /*
1057 * This really needs some careful tuning. While we shouldn't be too greedy since
1058 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1059 * because that'll cause us to stop up.
1060 *
1061 * The current logic is to use the default interval when there is no lag worth
1062 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1063 *
1064 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1065 * so the lag is up to date.)
1066 */
1067 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1068 if ( u64Lag < 50000000 /* 50ms */
1069 || ( u64Lag < 1000000000 /* 1s */
1070 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1071 )
1072 {
1073 uint64_t u64Elapsed = RTTimeNanoTS();
1074 pVM->vmm.s.u64LastYield = u64Elapsed;
1075
1076 RTThreadYield();
1077
1078#ifdef LOG_ENABLED
1079 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1080 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1081#endif
1082 }
1083 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1084}
1085
1086
1087/**
1088 * Executes guest code (Intel VT-x and AMD-V).
1089 *
1090 * @param pVM The cross context VM structure.
1091 * @param pVCpu The cross context virtual CPU structure.
1092 */
1093VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1094{
1095 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1096
1097 for (;;)
1098 {
1099 int rc;
1100 do
1101 {
1102#ifdef NO_SUPCALLR0VMM
1103 rc = VERR_GENERAL_FAILURE;
1104#else
1105 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1106 if (RT_LIKELY(rc == VINF_SUCCESS))
1107 rc = pVCpu->vmm.s.iLastGZRc;
1108#endif
1109 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1110
1111#if 0 /** @todo triggers too often */
1112 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1113#endif
1114
1115 /*
1116 * Flush the logs
1117 */
1118#ifdef LOG_ENABLED
1119 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1120#endif
1121 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1122 if (rc != VINF_VMM_CALL_HOST)
1123 {
1124 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1125 return rc;
1126 }
1127 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1128 if (RT_FAILURE(rc))
1129 return rc;
1130 /* Resume R0 */
1131 }
1132}
1133
1134
1135/**
1136 * Perform one of the fast I/O control VMMR0 operation.
1137 *
1138 * @returns VBox strict status code.
1139 * @param pVM The cross context VM structure.
1140 * @param pVCpu The cross context virtual CPU structure.
1141 * @param enmOperation The operation to perform.
1142 */
1143VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1144{
1145 for (;;)
1146 {
1147 VBOXSTRICTRC rcStrict;
1148 do
1149 {
1150#ifdef NO_SUPCALLR0VMM
1151 rcStrict = VERR_GENERAL_FAILURE;
1152#else
1153 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1154 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1155 rcStrict = pVCpu->vmm.s.iLastGZRc;
1156#endif
1157 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1158
1159 /*
1160 * Flush the logs
1161 */
1162#ifdef LOG_ENABLED
1163 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1164#endif
1165 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1166 if (rcStrict != VINF_VMM_CALL_HOST)
1167 return rcStrict;
1168 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1169 if (RT_FAILURE(rc))
1170 return rc;
1171 /* Resume R0 */
1172 }
1173}
1174
1175
1176/**
1177 * VCPU worker for VMMR3SendStartupIpi.
1178 *
1179 * @param pVM The cross context VM structure.
1180 * @param idCpu Virtual CPU to perform SIPI on.
1181 * @param uVector The SIPI vector.
1182 */
1183static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1184{
1185 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1186 VMCPU_ASSERT_EMT(pVCpu);
1187
1188 /*
1189 * In the INIT state, the target CPU is only responsive to an SIPI.
1190 * This is also true for when when the CPU is in VMX non-root mode.
1191 *
1192 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1193 * See Intel spec. 26.6.2 "Activity State".
1194 */
1195 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1196 return VINF_SUCCESS;
1197
1198 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1199#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1200 if (CPUMIsGuestInVmxRootMode(pCtx))
1201 {
1202 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1203 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1204 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1205
1206 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1207 return VINF_SUCCESS;
1208 }
1209#endif
1210
1211 pCtx->cs.Sel = uVector << 8;
1212 pCtx->cs.ValidSel = uVector << 8;
1213 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1214 pCtx->cs.u64Base = uVector << 12;
1215 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1216 pCtx->rip = 0;
1217
1218 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1219
1220# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1221 EMSetState(pVCpu, EMSTATE_HALTED);
1222 return VINF_EM_RESCHEDULE;
1223# else /* And if we go the VMCPU::enmState way it can stay here. */
1224 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1225 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1226 return VINF_SUCCESS;
1227# endif
1228}
1229
1230
1231/**
1232 * VCPU worker for VMMR3SendInitIpi.
1233 *
1234 * @returns VBox status code.
1235 * @param pVM The cross context VM structure.
1236 * @param idCpu Virtual CPU to perform SIPI on.
1237 */
1238static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1239{
1240 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1241 VMCPU_ASSERT_EMT(pVCpu);
1242
1243 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1244
1245 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1246 * wait-for-SIPI state. Verify. */
1247
1248 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1249#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1250 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1251 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1252 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1253#endif
1254
1255 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1256 * IPI (e.g. SVM_EXIT_INIT). */
1257
1258 PGMR3ResetCpu(pVM, pVCpu);
1259 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1260 APICR3InitIpi(pVCpu);
1261 TRPMR3ResetCpu(pVCpu);
1262 CPUMR3ResetCpu(pVM, pVCpu);
1263 EMR3ResetCpu(pVCpu);
1264 HMR3ResetCpu(pVCpu);
1265 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1266
1267 /* This will trickle up on the target EMT. */
1268 return VINF_EM_WAIT_SIPI;
1269}
1270
1271
1272/**
1273 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1274 * vector-dependent state and unhalting processor.
1275 *
1276 * @param pVM The cross context VM structure.
1277 * @param idCpu Virtual CPU to perform SIPI on.
1278 * @param uVector SIPI vector.
1279 */
1280VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1281{
1282 AssertReturnVoid(idCpu < pVM->cCpus);
1283
1284 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1285 AssertRC(rc);
1286}
1287
1288
1289/**
1290 * Sends init IPI to the virtual CPU.
1291 *
1292 * @param pVM The cross context VM structure.
1293 * @param idCpu Virtual CPU to perform int IPI on.
1294 */
1295VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1296{
1297 AssertReturnVoid(idCpu < pVM->cCpus);
1298
1299 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1300 AssertRC(rc);
1301}
1302
1303
1304/**
1305 * Registers the guest memory range that can be used for patching.
1306 *
1307 * @returns VBox status code.
1308 * @param pVM The cross context VM structure.
1309 * @param pPatchMem Patch memory range.
1310 * @param cbPatchMem Size of the memory range.
1311 */
1312VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1313{
1314 VM_ASSERT_EMT(pVM);
1315 if (HMIsEnabled(pVM))
1316 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1317
1318 return VERR_NOT_SUPPORTED;
1319}
1320
1321
1322/**
1323 * Deregisters the guest memory range that can be used for patching.
1324 *
1325 * @returns VBox status code.
1326 * @param pVM The cross context VM structure.
1327 * @param pPatchMem Patch memory range.
1328 * @param cbPatchMem Size of the memory range.
1329 */
1330VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1331{
1332 if (HMIsEnabled(pVM))
1333 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1334
1335 return VINF_SUCCESS;
1336}
1337
1338
1339/**
1340 * Common recursion handler for the other EMTs.
1341 *
1342 * @returns Strict VBox status code.
1343 * @param pVM The cross context VM structure.
1344 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1345 * @param rcStrict Current status code to be combined with the one
1346 * from this recursion and returned.
1347 */
1348static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1349{
1350 int rc2;
1351
1352 /*
1353 * We wait here while the initiator of this recursion reconfigures
1354 * everything. The last EMT to get in signals the initiator.
1355 */
1356 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1357 {
1358 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1359 AssertLogRelRC(rc2);
1360 }
1361
1362 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1363 AssertLogRelRC(rc2);
1364
1365 /*
1366 * Do the normal rendezvous processing.
1367 */
1368 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1369 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1370
1371 /*
1372 * Wait for the initiator to restore everything.
1373 */
1374 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1375 AssertLogRelRC(rc2);
1376
1377 /*
1378 * Last thread out of here signals the initiator.
1379 */
1380 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1381 {
1382 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1383 AssertLogRelRC(rc2);
1384 }
1385
1386 /*
1387 * Merge status codes and return.
1388 */
1389 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1390 if ( rcStrict2 != VINF_SUCCESS
1391 && ( rcStrict == VINF_SUCCESS
1392 || rcStrict > rcStrict2))
1393 rcStrict = rcStrict2;
1394 return rcStrict;
1395}
1396
1397
1398/**
1399 * Count returns and have the last non-caller EMT wake up the caller.
1400 *
1401 * @returns VBox strict informational status code for EM scheduling. No failures
1402 * will be returned here, those are for the caller only.
1403 *
1404 * @param pVM The cross context VM structure.
1405 * @param rcStrict The current accumulated recursive status code,
1406 * to be merged with i32RendezvousStatus and
1407 * returned.
1408 */
1409DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1410{
1411 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1412
1413 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1414 if (cReturned == pVM->cCpus - 1U)
1415 {
1416 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1417 AssertLogRelRC(rc);
1418 }
1419
1420 /*
1421 * Merge the status codes, ignoring error statuses in this code path.
1422 */
1423 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1424 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1425 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1426 VERR_IPE_UNEXPECTED_INFO_STATUS);
1427
1428 if (RT_SUCCESS(rcStrict2))
1429 {
1430 if ( rcStrict2 != VINF_SUCCESS
1431 && ( rcStrict == VINF_SUCCESS
1432 || rcStrict > rcStrict2))
1433 rcStrict = rcStrict2;
1434 }
1435 return rcStrict;
1436}
1437
1438
1439/**
1440 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1441 *
1442 * @returns VBox strict informational status code for EM scheduling. No failures
1443 * will be returned here, those are for the caller only. When
1444 * fIsCaller is set, VINF_SUCCESS is always returned.
1445 *
1446 * @param pVM The cross context VM structure.
1447 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1448 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1449 * not.
1450 * @param fFlags The flags.
1451 * @param pfnRendezvous The callback.
1452 * @param pvUser The user argument for the callback.
1453 */
1454static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1455 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1456{
1457 int rc;
1458 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1459
1460 /*
1461 * Enter, the last EMT triggers the next callback phase.
1462 */
1463 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1464 if (cEntered != pVM->cCpus)
1465 {
1466 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1467 {
1468 /* Wait for our turn. */
1469 for (;;)
1470 {
1471 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1472 AssertLogRelRC(rc);
1473 if (!pVM->vmm.s.fRendezvousRecursion)
1474 break;
1475 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1476 }
1477 }
1478 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1479 {
1480 /* Wait for the last EMT to arrive and wake everyone up. */
1481 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1482 AssertLogRelRC(rc);
1483 Assert(!pVM->vmm.s.fRendezvousRecursion);
1484 }
1485 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1486 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1487 {
1488 /* Wait for our turn. */
1489 for (;;)
1490 {
1491 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1492 AssertLogRelRC(rc);
1493 if (!pVM->vmm.s.fRendezvousRecursion)
1494 break;
1495 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1496 }
1497 }
1498 else
1499 {
1500 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1501
1502 /*
1503 * The execute once is handled specially to optimize the code flow.
1504 *
1505 * The last EMT to arrive will perform the callback and the other
1506 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1507 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1508 * returns, that EMT will initiate the normal return sequence.
1509 */
1510 if (!fIsCaller)
1511 {
1512 for (;;)
1513 {
1514 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1515 AssertLogRelRC(rc);
1516 if (!pVM->vmm.s.fRendezvousRecursion)
1517 break;
1518 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1519 }
1520
1521 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1522 }
1523 return VINF_SUCCESS;
1524 }
1525 }
1526 else
1527 {
1528 /*
1529 * All EMTs are waiting, clear the FF and take action according to the
1530 * execution method.
1531 */
1532 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1533
1534 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1535 {
1536 /* Wake up everyone. */
1537 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1538 AssertLogRelRC(rc);
1539 }
1540 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1541 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1542 {
1543 /* Figure out who to wake up and wake it up. If it's ourself, then
1544 it's easy otherwise wait for our turn. */
1545 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1546 ? 0
1547 : pVM->cCpus - 1U;
1548 if (pVCpu->idCpu != iFirst)
1549 {
1550 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1551 AssertLogRelRC(rc);
1552 for (;;)
1553 {
1554 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1555 AssertLogRelRC(rc);
1556 if (!pVM->vmm.s.fRendezvousRecursion)
1557 break;
1558 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1559 }
1560 }
1561 }
1562 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1563 }
1564
1565
1566 /*
1567 * Do the callback and update the status if necessary.
1568 */
1569 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1570 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1571 {
1572 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1573 if (rcStrict2 != VINF_SUCCESS)
1574 {
1575 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1576 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1577 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1578 int32_t i32RendezvousStatus;
1579 do
1580 {
1581 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1582 if ( rcStrict2 == i32RendezvousStatus
1583 || RT_FAILURE(i32RendezvousStatus)
1584 || ( i32RendezvousStatus != VINF_SUCCESS
1585 && rcStrict2 > i32RendezvousStatus))
1586 break;
1587 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1588 }
1589 }
1590
1591 /*
1592 * Increment the done counter and take action depending on whether we're
1593 * the last to finish callback execution.
1594 */
1595 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1596 if ( cDone != pVM->cCpus
1597 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1598 {
1599 /* Signal the next EMT? */
1600 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1601 {
1602 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1603 AssertLogRelRC(rc);
1604 }
1605 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1606 {
1607 Assert(cDone == pVCpu->idCpu + 1U);
1608 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1609 AssertLogRelRC(rc);
1610 }
1611 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1612 {
1613 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1614 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1615 AssertLogRelRC(rc);
1616 }
1617
1618 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1619 if (!fIsCaller)
1620 {
1621 for (;;)
1622 {
1623 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1624 AssertLogRelRC(rc);
1625 if (!pVM->vmm.s.fRendezvousRecursion)
1626 break;
1627 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1628 }
1629 }
1630 }
1631 else
1632 {
1633 /* Callback execution is all done, tell the rest to return. */
1634 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1635 AssertLogRelRC(rc);
1636 }
1637
1638 if (!fIsCaller)
1639 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1640 return rcStrictRecursion;
1641}
1642
1643
1644/**
1645 * Called in response to VM_FF_EMT_RENDEZVOUS.
1646 *
1647 * @returns VBox strict status code - EM scheduling. No errors will be returned
1648 * here, nor will any non-EM scheduling status codes be returned.
1649 *
1650 * @param pVM The cross context VM structure.
1651 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1652 *
1653 * @thread EMT
1654 */
1655VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1656{
1657 Assert(!pVCpu->vmm.s.fInRendezvous);
1658 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1659 pVCpu->vmm.s.fInRendezvous = true;
1660 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1661 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1662 pVCpu->vmm.s.fInRendezvous = false;
1663 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1664 return VBOXSTRICTRC_TODO(rcStrict);
1665}
1666
1667
1668/**
1669 * Helper for resetting an single wakeup event sempahore.
1670 *
1671 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1672 * @param hEvt The event semaphore to reset.
1673 */
1674static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1675{
1676 for (uint32_t cLoops = 0; ; cLoops++)
1677 {
1678 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1679 if (rc != VINF_SUCCESS || cLoops > _4K)
1680 return rc;
1681 }
1682}
1683
1684
1685/**
1686 * Worker for VMMR3EmtRendezvous that handles recursion.
1687 *
1688 * @returns VBox strict status code. This will be the first error,
1689 * VINF_SUCCESS, or an EM scheduling status code.
1690 *
1691 * @param pVM The cross context VM structure.
1692 * @param pVCpu The cross context virtual CPU structure of the
1693 * calling EMT.
1694 * @param fFlags Flags indicating execution methods. See
1695 * grp_VMMR3EmtRendezvous_fFlags.
1696 * @param pfnRendezvous The callback.
1697 * @param pvUser User argument for the callback.
1698 *
1699 * @thread EMT(pVCpu)
1700 */
1701static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1702 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1703{
1704 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1705 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1706 Assert(pVCpu->vmm.s.fInRendezvous);
1707
1708 /*
1709 * Save the current state.
1710 */
1711 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1712 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1713 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1714 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1715 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1716
1717 /*
1718 * Check preconditions and save the current state.
1719 */
1720 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1721 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1722 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1723 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1724 VERR_INTERNAL_ERROR);
1725 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1726 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1727
1728 /*
1729 * Reset the recursion prep and pop semaphores.
1730 */
1731 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1732 AssertLogRelRCReturn(rc, rc);
1733 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1734 AssertLogRelRCReturn(rc, rc);
1735 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1736 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1737 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1738 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1739
1740 /*
1741 * Usher the other thread into the recursion routine.
1742 */
1743 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1744 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1745
1746 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1747 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1748 while (cLeft-- > 0)
1749 {
1750 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1751 AssertLogRelRC(rc);
1752 }
1753 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1754 {
1755 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1756 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1757 {
1758 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1759 AssertLogRelRC(rc);
1760 }
1761 }
1762 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1763 {
1764 Assert(cLeft == pVCpu->idCpu);
1765 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1766 {
1767 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1768 AssertLogRelRC(rc);
1769 }
1770 }
1771 else
1772 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1773 VERR_INTERNAL_ERROR_4);
1774
1775 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1776 AssertLogRelRC(rc);
1777 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1778 AssertLogRelRC(rc);
1779
1780
1781 /*
1782 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1783 */
1784 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1785 {
1786 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1787 AssertLogRelRC(rc);
1788 }
1789
1790 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1791
1792 /*
1793 * Clear the slate and setup the new rendezvous.
1794 */
1795 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1796 {
1797 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1798 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1799 }
1800 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1801 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1802 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1803 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1804
1805 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1806 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1807 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1808 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1809 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1810 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1811 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1812 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1813
1814 /*
1815 * We're ready to go now, do normal rendezvous processing.
1816 */
1817 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1818 AssertLogRelRC(rc);
1819
1820 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1821
1822 /*
1823 * The caller waits for the other EMTs to be done, return and waiting on the
1824 * pop semaphore.
1825 */
1826 for (;;)
1827 {
1828 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1829 AssertLogRelRC(rc);
1830 if (!pVM->vmm.s.fRendezvousRecursion)
1831 break;
1832 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1833 }
1834
1835 /*
1836 * Get the return code and merge it with the above recursion status.
1837 */
1838 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1839 if ( rcStrict2 != VINF_SUCCESS
1840 && ( rcStrict == VINF_SUCCESS
1841 || rcStrict > rcStrict2))
1842 rcStrict = rcStrict2;
1843
1844 /*
1845 * Restore the parent rendezvous state.
1846 */
1847 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1848 {
1849 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1850 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1851 }
1852 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1853 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1854 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1855 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1856
1857 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1858 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1859 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1860 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1861 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1862 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1863 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1864
1865 /*
1866 * Usher the other EMTs back to their parent recursion routine, waiting
1867 * for them to all get there before we return (makes sure they've been
1868 * scheduled and are past the pop event sem, see below).
1869 */
1870 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1871 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1872 AssertLogRelRC(rc);
1873
1874 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1875 {
1876 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1877 AssertLogRelRC(rc);
1878 }
1879
1880 /*
1881 * We must reset the pop semaphore on the way out (doing the pop caller too,
1882 * just in case). The parent may be another recursion.
1883 */
1884 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1885 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1886
1887 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1888
1889 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1890 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1891 return rcStrict;
1892}
1893
1894
1895/**
1896 * EMT rendezvous.
1897 *
1898 * Gathers all the EMTs and execute some code on each of them, either in a one
1899 * by one fashion or all at once.
1900 *
1901 * @returns VBox strict status code. This will be the first error,
1902 * VINF_SUCCESS, or an EM scheduling status code.
1903 *
1904 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1905 * doesn't support it or if the recursion is too deep.
1906 *
1907 * @param pVM The cross context VM structure.
1908 * @param fFlags Flags indicating execution methods. See
1909 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1910 * descending and ascending rendezvous types support
1911 * recursion from inside @a pfnRendezvous.
1912 * @param pfnRendezvous The callback.
1913 * @param pvUser User argument for the callback.
1914 *
1915 * @thread Any.
1916 */
1917VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1918{
1919 /*
1920 * Validate input.
1921 */
1922 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1923 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1924 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1925 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1926 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1927 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1928 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1929 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1930
1931 VBOXSTRICTRC rcStrict;
1932 PVMCPU pVCpu = VMMGetCpu(pVM);
1933 if (!pVCpu)
1934 {
1935 /*
1936 * Forward the request to an EMT thread.
1937 */
1938 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1939 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1940 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1941 else
1942 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1943 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1944 }
1945 else if ( pVM->cCpus == 1
1946 || ( pVM->enmVMState == VMSTATE_DESTROYING
1947 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1948 {
1949 /*
1950 * Shortcut for the single EMT case.
1951 *
1952 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1953 * during vmR3Destroy after other emulation threads have started terminating.
1954 */
1955 if (!pVCpu->vmm.s.fInRendezvous)
1956 {
1957 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1958 pVCpu->vmm.s.fInRendezvous = true;
1959 pVM->vmm.s.fRendezvousFlags = fFlags;
1960 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1961 pVCpu->vmm.s.fInRendezvous = false;
1962 }
1963 else
1964 {
1965 /* Recursion. Do the same checks as in the SMP case. */
1966 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1967 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1968 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1969 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1970 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1971 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1972 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1973 , VERR_DEADLOCK);
1974
1975 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1976 pVM->vmm.s.cRendezvousRecursions++;
1977 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1978 pVM->vmm.s.fRendezvousFlags = fFlags;
1979
1980 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1981
1982 pVM->vmm.s.fRendezvousFlags = fParentFlags;
1983 pVM->vmm.s.cRendezvousRecursions--;
1984 }
1985 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1986 }
1987 else
1988 {
1989 /*
1990 * Spin lock. If busy, check for recursion, if not recursing wait for
1991 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1992 */
1993 int rc;
1994 rcStrict = VINF_SUCCESS;
1995 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1996 {
1997 /* Allow recursion in some cases. */
1998 if ( pVCpu->vmm.s.fInRendezvous
1999 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2000 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2001 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2002 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2003 ))
2004 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2005
2006 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2007 VERR_DEADLOCK);
2008
2009 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2010 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2011 {
2012 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2013 {
2014 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2015 if ( rc != VINF_SUCCESS
2016 && ( rcStrict == VINF_SUCCESS
2017 || rcStrict > rc))
2018 rcStrict = rc;
2019 /** @todo Perhaps deal with termination here? */
2020 }
2021 ASMNopPause();
2022 }
2023 }
2024
2025 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2026 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2027 Assert(!pVCpu->vmm.s.fInRendezvous);
2028 pVCpu->vmm.s.fInRendezvous = true;
2029
2030 /*
2031 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2032 */
2033 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2034 {
2035 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2036 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2037 }
2038 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2039 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2040 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2041 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2042 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2043 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2044 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2045 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2046 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2047 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2048 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2049
2050 /*
2051 * Set the FF and poke the other EMTs.
2052 */
2053 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2054 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2055
2056 /*
2057 * Do the same ourselves.
2058 */
2059 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2060
2061 /*
2062 * The caller waits for the other EMTs to be done and return before doing
2063 * the cleanup. This makes away with wakeup / reset races we would otherwise
2064 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2065 */
2066 for (;;)
2067 {
2068 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2069 AssertLogRelRC(rc);
2070 if (!pVM->vmm.s.fRendezvousRecursion)
2071 break;
2072 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2073 }
2074
2075 /*
2076 * Get the return code and clean up a little bit.
2077 */
2078 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2079 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2080
2081 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2082 pVCpu->vmm.s.fInRendezvous = false;
2083
2084 /*
2085 * Merge rcStrict, rcStrict2 and rcStrict3.
2086 */
2087 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2088 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2089 if ( rcStrict2 != VINF_SUCCESS
2090 && ( rcStrict == VINF_SUCCESS
2091 || rcStrict > rcStrict2))
2092 rcStrict = rcStrict2;
2093 if ( rcStrict3 != VINF_SUCCESS
2094 && ( rcStrict == VINF_SUCCESS
2095 || rcStrict > rcStrict3))
2096 rcStrict = rcStrict3;
2097 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2098 }
2099
2100 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2101 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2102 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2103 VERR_IPE_UNEXPECTED_INFO_STATUS);
2104 return VBOXSTRICTRC_VAL(rcStrict);
2105}
2106
2107
2108/**
2109 * Interface for vmR3SetHaltMethodU.
2110 *
2111 * @param pVCpu The cross context virtual CPU structure of the
2112 * calling EMT.
2113 * @param fMayHaltInRing0 The new state.
2114 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2115 * @thread EMT(pVCpu)
2116 *
2117 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2118 * component.
2119 */
2120VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2121{
2122 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2123 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2124}
2125
2126
2127/**
2128 * Read from the ring 0 jump buffer stack.
2129 *
2130 * @returns VBox status code.
2131 *
2132 * @param pVM The cross context VM structure.
2133 * @param idCpu The ID of the source CPU context (for the address).
2134 * @param R0Addr Where to start reading.
2135 * @param pvBuf Where to store the data we've read.
2136 * @param cbRead The number of bytes to read.
2137 */
2138VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2139{
2140 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2141 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2142 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2143
2144 int rc;
2145#ifdef VMM_R0_SWITCH_STACK
2146 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2147#else
2148 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2149#endif
2150 if ( off < VMM_STACK_SIZE
2151 && off + cbRead <= VMM_STACK_SIZE)
2152 {
2153 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2154 rc = VINF_SUCCESS;
2155 }
2156 else
2157 rc = VERR_INVALID_POINTER;
2158
2159 /* Supply the setjmp return RIP/EIP. */
2160 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2161 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2162 {
2163 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2164 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2165 size_t offDst = 0;
2166 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2167 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2168 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2169 {
2170 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2171 Assert(offSrc < cbSrc);
2172 pbSrc -= offSrc;
2173 cbSrc -= offSrc;
2174 }
2175 if (cbSrc > cbRead - offDst)
2176 cbSrc = cbRead - offDst;
2177 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2178
2179 if (cbSrc == cbRead)
2180 rc = VINF_SUCCESS;
2181 }
2182
2183 return rc;
2184}
2185
2186
2187/**
2188 * Used by the DBGF stack unwinder to initialize the register state.
2189 *
2190 * @param pUVM The user mode VM handle.
2191 * @param idCpu The ID of the CPU being unwound.
2192 * @param pState The unwind state to initialize.
2193 */
2194VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2195{
2196 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2197 AssertReturnVoid(pVCpu);
2198
2199 /*
2200 * Locate the resume point on the stack.
2201 */
2202#ifdef VMM_R0_SWITCH_STACK
2203 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2204 AssertReturnVoid(off < VMM_STACK_SIZE);
2205#else
2206 uintptr_t off = 0;
2207#endif
2208
2209#ifdef RT_ARCH_AMD64
2210 /*
2211 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2212 */
2213# ifdef VBOX_STRICT
2214 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2215 off += 8; /* RESUME_MAGIC */
2216# endif
2217# ifdef RT_OS_WINDOWS
2218 off += 0xa0; /* XMM6 thru XMM15 */
2219# endif
2220 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2221 off += 8;
2222 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2223 off += 8;
2224# ifdef RT_OS_WINDOWS
2225 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2226 off += 8;
2227 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2228 off += 8;
2229# endif
2230 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2231 off += 8;
2232 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2233 off += 8;
2234 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2235 off += 8;
2236 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2237 off += 8;
2238 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2239 off += 8;
2240 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2241 off += 8;
2242
2243#elif defined(RT_ARCH_X86)
2244 /*
2245 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2246 */
2247# ifdef VBOX_STRICT
2248 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2249 off += 4; /* RESUME_MAGIC */
2250# endif
2251 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2252 off += 4;
2253 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2254 off += 4;
2255 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2256 off += 4;
2257 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2258 off += 4;
2259 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2260 off += 4;
2261 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2262 off += 4;
2263#else
2264# error "Port me"
2265#endif
2266
2267 /*
2268 * This is all we really need here, though the above helps if the assembly
2269 * doesn't contain unwind info (currently only on win/64, so that is useful).
2270 */
2271 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2272 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2273}
2274
2275
2276/**
2277 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2278 *
2279 * @returns VBox status code.
2280 * @param pVM The cross context VM structure.
2281 * @param uOperation Operation to execute.
2282 * @param u64Arg Constant argument.
2283 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2284 * details.
2285 */
2286VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2287{
2288 PVMCPU pVCpu = VMMGetCpu(pVM);
2289 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2290 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2291}
2292
2293
2294/**
2295 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2296 *
2297 * @returns VBox status code.
2298 * @param pVM The cross context VM structure.
2299 * @param pVCpu The cross context VM structure.
2300 * @param enmOperation Operation to execute.
2301 * @param u64Arg Constant argument.
2302 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2303 * details.
2304 */
2305VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2306{
2307 int rc;
2308 for (;;)
2309 {
2310#ifdef NO_SUPCALLR0VMM
2311 rc = VERR_GENERAL_FAILURE;
2312#else
2313 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2314#endif
2315 /*
2316 * Flush the logs.
2317 */
2318#ifdef LOG_ENABLED
2319 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2320#endif
2321 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2322 if (rc != VINF_VMM_CALL_HOST)
2323 break;
2324 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2325 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2326 break;
2327 /* Resume R0 */
2328 }
2329
2330 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2331 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2332 VERR_IPE_UNEXPECTED_INFO_STATUS);
2333 return rc;
2334}
2335
2336
2337/**
2338 * Service a call to the ring-3 host code.
2339 *
2340 * @returns VBox status code.
2341 * @param pVM The cross context VM structure.
2342 * @param pVCpu The cross context virtual CPU structure.
2343 * @remarks Careful with critsects.
2344 */
2345static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2346{
2347 /*
2348 * We must also check for pending critsect exits or else we can deadlock
2349 * when entering other critsects here.
2350 */
2351 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2352 PDMCritSectBothFF(pVCpu);
2353
2354 switch (pVCpu->vmm.s.enmCallRing3Operation)
2355 {
2356 /*
2357 * Acquire a critical section.
2358 */
2359 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2360 {
2361 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2362 true /*fCallRing3*/);
2363 break;
2364 }
2365
2366 /*
2367 * Enter a r/w critical section exclusively.
2368 */
2369 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2370 {
2371 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2372 true /*fCallRing3*/);
2373 break;
2374 }
2375
2376 /*
2377 * Enter a r/w critical section shared.
2378 */
2379 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2380 {
2381 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2382 true /*fCallRing3*/);
2383 break;
2384 }
2385
2386 /*
2387 * Acquire the PDM lock.
2388 */
2389 case VMMCALLRING3_PDM_LOCK:
2390 {
2391 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2392 break;
2393 }
2394
2395 /*
2396 * Grow the PGM pool.
2397 */
2398 case VMMCALLRING3_PGM_POOL_GROW:
2399 {
2400 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2401 break;
2402 }
2403
2404 /*
2405 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2406 */
2407 case VMMCALLRING3_PGM_MAP_CHUNK:
2408 {
2409 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2410 break;
2411 }
2412
2413 /*
2414 * Allocates more handy pages.
2415 */
2416 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2417 {
2418 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2419 break;
2420 }
2421
2422 /*
2423 * Allocates a large page.
2424 */
2425 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2426 {
2427 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2428 break;
2429 }
2430
2431 /*
2432 * Acquire the PGM lock.
2433 */
2434 case VMMCALLRING3_PGM_LOCK:
2435 {
2436 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2437 break;
2438 }
2439
2440 /*
2441 * Acquire the MM hypervisor heap lock.
2442 */
2443 case VMMCALLRING3_MMHYPER_LOCK:
2444 {
2445 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2446 break;
2447 }
2448
2449#ifdef VBOX_WITH_REM
2450 /*
2451 * Flush REM handler notifications.
2452 */
2453 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2454 {
2455 REMR3ReplayHandlerNotifications(pVM);
2456 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2457 break;
2458 }
2459#endif
2460
2461 /*
2462 * This is a noop. We just take this route to avoid unnecessary
2463 * tests in the loops.
2464 */
2465 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2466 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2467 LogAlways(("*FLUSH*\n"));
2468 break;
2469
2470 /*
2471 * Set the VM error message.
2472 */
2473 case VMMCALLRING3_VM_SET_ERROR:
2474 VMR3SetErrorWorker(pVM);
2475 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2476 break;
2477
2478 /*
2479 * Set the VM runtime error message.
2480 */
2481 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2482 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2483 break;
2484
2485 /*
2486 * Signal a ring 0 hypervisor assertion.
2487 * Cancel the longjmp operation that's in progress.
2488 */
2489 case VMMCALLRING3_VM_R0_ASSERTION:
2490 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2491 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2492#ifdef RT_ARCH_X86
2493 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2494#else
2495 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2496#endif
2497#ifdef VMM_R0_SWITCH_STACK
2498 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2499#endif
2500 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2501 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2502 return VERR_VMM_RING0_ASSERTION;
2503
2504 /*
2505 * A forced switch to ring 0 for preemption purposes.
2506 */
2507 case VMMCALLRING3_VM_R0_PREEMPT:
2508 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2509 break;
2510
2511 default:
2512 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2513 return VERR_VMM_UNKNOWN_RING3_CALL;
2514 }
2515
2516 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2517 return VINF_SUCCESS;
2518}
2519
2520
2521/**
2522 * Displays the Force action Flags.
2523 *
2524 * @param pVM The cross context VM structure.
2525 * @param pHlp The output helpers.
2526 * @param pszArgs The additional arguments (ignored).
2527 */
2528static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2529{
2530 int c;
2531 uint32_t f;
2532 NOREF(pszArgs);
2533
2534#define PRINT_FLAG(prf,flag) do { \
2535 if (f & (prf##flag)) \
2536 { \
2537 static const char *s_psz = #flag; \
2538 if (!(c % 6)) \
2539 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2540 else \
2541 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2542 c++; \
2543 f &= ~(prf##flag); \
2544 } \
2545 } while (0)
2546
2547#define PRINT_GROUP(prf,grp,sfx) do { \
2548 if (f & (prf##grp##sfx)) \
2549 { \
2550 static const char *s_psz = #grp; \
2551 if (!(c % 5)) \
2552 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2553 else \
2554 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2555 c++; \
2556 } \
2557 } while (0)
2558
2559 /*
2560 * The global flags.
2561 */
2562 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2563 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2564
2565 /* show the flag mnemonics */
2566 c = 0;
2567 f = fGlobalForcedActions;
2568 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2569 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2570 PRINT_FLAG(VM_FF_,PDM_DMA);
2571 PRINT_FLAG(VM_FF_,DBGF);
2572 PRINT_FLAG(VM_FF_,REQUEST);
2573 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2574 PRINT_FLAG(VM_FF_,RESET);
2575 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2576 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2577 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2578 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2579 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2580 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2581 if (f)
2582 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2583 else
2584 pHlp->pfnPrintf(pHlp, "\n");
2585
2586 /* the groups */
2587 c = 0;
2588 f = fGlobalForcedActions;
2589 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2590 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2591 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2592 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2593 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2594 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2595 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2596 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2597 if (c)
2598 pHlp->pfnPrintf(pHlp, "\n");
2599
2600 /*
2601 * Per CPU flags.
2602 */
2603 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2604 {
2605 PVMCPU pVCpu = pVM->apCpusR3[i];
2606 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2607 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2608
2609 /* show the flag mnemonics */
2610 c = 0;
2611 f = fLocalForcedActions;
2612 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2613 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2614 PRINT_FLAG(VMCPU_FF_,TIMER);
2615 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2616 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2617 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2618 PRINT_FLAG(VMCPU_FF_,UNHALT);
2619 PRINT_FLAG(VMCPU_FF_,IEM);
2620 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2621 PRINT_FLAG(VMCPU_FF_,DBGF);
2622 PRINT_FLAG(VMCPU_FF_,REQUEST);
2623 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2624 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2625 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2626 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2627 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2628 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2629 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2630 PRINT_FLAG(VMCPU_FF_,TO_R3);
2631 PRINT_FLAG(VMCPU_FF_,IOM);
2632 if (f)
2633 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2634 else
2635 pHlp->pfnPrintf(pHlp, "\n");
2636
2637 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2638 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2639
2640 /* the groups */
2641 c = 0;
2642 f = fLocalForcedActions;
2643 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2644 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2645 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2646 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2647 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2648 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2649 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2650 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2651 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2652 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2653 if (c)
2654 pHlp->pfnPrintf(pHlp, "\n");
2655 }
2656
2657#undef PRINT_FLAG
2658#undef PRINT_GROUP
2659}
2660
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