VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 80191

Last change on this file since 80191 was 80191, checked in by vboxsync, 5 years ago

VMM/r3: Refactored VMCPU enumeration in preparation that aCpus will be replaced with a pointer array. Removed two raw-mode offset members from the CPUM and CPUMCPU sub-structures. bugref:9217 bugref:9517

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1/* $Id: VMM.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_dbgf
32 * - @subpage pg_em
33 * - @subpage pg_gim
34 * - @subpage pg_gmm
35 * - @subpage pg_gvmm
36 * - @subpage pg_hm
37 * - @subpage pg_iem
38 * - @subpage pg_iom
39 * - @subpage pg_mm
40 * - @subpage pg_pdm
41 * - @subpage pg_pgm
42 * - @subpage pg_rem
43 * - @subpage pg_selm
44 * - @subpage pg_ssm
45 * - @subpage pg_stam
46 * - @subpage pg_tm
47 * - @subpage pg_trpm
48 * - @subpage pg_vm
49 *
50 *
51 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52 *
53 *
54 * @section sec_vmmstate VMM State
55 *
56 * @image html VM_Statechart_Diagram.gif
57 *
58 * To be written.
59 *
60 *
61 * @subsection subsec_vmm_init VMM Initialization
62 *
63 * To be written.
64 *
65 *
66 * @subsection subsec_vmm_term VMM Termination
67 *
68 * To be written.
69 *
70 *
71 * @section sec_vmm_limits VMM Limits
72 *
73 * There are various resource limits imposed by the VMM and it's
74 * sub-components. We'll list some of them here.
75 *
76 * On 64-bit hosts:
77 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78 * can be increased up to 64K - 1.
79 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81 * - A VM can be assigned all the memory we can use (16TB), however, the
82 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84 *
85 * On 32-bit hosts:
86 * - Max 127 VMs. Imposed by GMM's per page structure.
87 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88 * ROM pages. The limit is imposed by the 28-bit page ID used
89 * internally in GMM. It is also limited by PAE.
90 * - A VM can be assigned all the memory GMM can allocate, however, the
91 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93 *
94 */
95
96
97/*********************************************************************************************************************************
98* Header Files *
99*********************************************************************************************************************************/
100#define VBOX_BUGREF_9217_PART_I
101#define LOG_GROUP LOG_GROUP_VMM
102#include <VBox/vmm/vmm.h>
103#include <VBox/vmm/vmapi.h>
104#include <VBox/vmm/pgm.h>
105#include <VBox/vmm/cfgm.h>
106#include <VBox/vmm/pdmqueue.h>
107#include <VBox/vmm/pdmcritsect.h>
108#include <VBox/vmm/pdmcritsectrw.h>
109#include <VBox/vmm/pdmapi.h>
110#include <VBox/vmm/cpum.h>
111#include <VBox/vmm/gim.h>
112#include <VBox/vmm/mm.h>
113#include <VBox/vmm/nem.h>
114#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
115# include <VBox/vmm/iem.h>
116#endif
117#include <VBox/vmm/iom.h>
118#include <VBox/vmm/trpm.h>
119#include <VBox/vmm/selm.h>
120#include <VBox/vmm/em.h>
121#include <VBox/sup.h>
122#include <VBox/vmm/dbgf.h>
123#include <VBox/vmm/apic.h>
124#ifdef VBOX_WITH_REM
125# include <VBox/vmm/rem.h>
126#endif
127#include <VBox/vmm/ssm.h>
128#include <VBox/vmm/tm.h>
129#include "VMMInternal.h"
130#include <VBox/vmm/vm.h>
131#include <VBox/vmm/uvm.h>
132
133#include <VBox/err.h>
134#include <VBox/param.h>
135#include <VBox/version.h>
136#include <VBox/vmm/hm.h>
137#include <iprt/assert.h>
138#include <iprt/alloc.h>
139#include <iprt/asm.h>
140#include <iprt/time.h>
141#include <iprt/semaphore.h>
142#include <iprt/stream.h>
143#include <iprt/string.h>
144#include <iprt/stdarg.h>
145#include <iprt/ctype.h>
146#include <iprt/x86.h>
147
148
149/*********************************************************************************************************************************
150* Defined Constants And Macros *
151*********************************************************************************************************************************/
152/** The saved state version. */
153#define VMM_SAVED_STATE_VERSION 4
154/** The saved state version used by v3.0 and earlier. (Teleportation) */
155#define VMM_SAVED_STATE_VERSION_3_0 3
156
157/** Macro for flushing the ring-0 logging. */
158#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
159 do { \
160 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
161 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
162 { /* likely? */ } \
163 else \
164 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
165 } while (0)
166
167
168/*********************************************************************************************************************************
169* Internal Functions *
170*********************************************************************************************************************************/
171static int vmmR3InitStacks(PVM pVM);
172static int vmmR3InitLoggers(PVM pVM);
173static void vmmR3InitRegisterStats(PVM pVM);
174static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
175static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
176static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
177static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
178 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
179static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
180static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
181
182
183/**
184 * Initializes the VMM.
185 *
186 * @returns VBox status code.
187 * @param pVM The cross context VM structure.
188 */
189VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
190{
191 LogFlow(("VMMR3Init\n"));
192
193 /*
194 * Assert alignment, sizes and order.
195 */
196 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
197 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
198
199 /*
200 * Init basic VM VMM members.
201 */
202 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
203 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
204 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
205 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
206 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
207 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
208 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
209 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
210 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
211
212 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
213 * The EMT yield interval. The EMT yielding is a hack we employ to play a
214 * bit nicer with the rest of the system (like for instance the GUI).
215 */
216 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
217 23 /* Value arrived at after experimenting with the grub boot prompt. */);
218 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
219
220
221 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
222 * Controls whether we employ per-cpu preemption timers to limit the time
223 * spent executing guest code. This option is not available on all
224 * platforms and we will silently ignore this setting then. If we are
225 * running in VT-x mode, we will use the VMX-preemption timer instead of
226 * this one when possible.
227 */
228 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
229 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
230 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
231
232 /*
233 * Initialize the VMM rendezvous semaphores.
234 */
235 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
236 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
237 return VERR_NO_MEMORY;
238 for (VMCPUID i = 0; i < pVM->cCpus; i++)
239 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
240 for (VMCPUID i = 0; i < pVM->cCpus; i++)
241 {
242 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
243 AssertRCReturn(rc, rc);
244 }
245 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
246 AssertRCReturn(rc, rc);
247 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
248 AssertRCReturn(rc, rc);
249 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
250 AssertRCReturn(rc, rc);
251 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
252 AssertRCReturn(rc, rc);
253 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
254 AssertRCReturn(rc, rc);
255 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
256 AssertRCReturn(rc, rc);
257 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
258 AssertRCReturn(rc, rc);
259 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
260 AssertRCReturn(rc, rc);
261
262 /*
263 * Register the saved state data unit.
264 */
265 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
266 NULL, NULL, NULL,
267 NULL, vmmR3Save, NULL,
268 NULL, vmmR3Load, NULL);
269 if (RT_FAILURE(rc))
270 return rc;
271
272 /*
273 * Register the Ring-0 VM handle with the session for fast ioctl calls.
274 */
275 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
276 if (RT_FAILURE(rc))
277 return rc;
278
279 /*
280 * Init various sub-components.
281 */
282 rc = vmmR3InitStacks(pVM);
283 if (RT_SUCCESS(rc))
284 {
285 rc = vmmR3InitLoggers(pVM);
286
287#ifdef VBOX_WITH_NMI
288 /*
289 * Allocate mapping for the host APIC.
290 */
291 if (RT_SUCCESS(rc))
292 {
293 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
294 AssertRC(rc);
295 }
296#endif
297 if (RT_SUCCESS(rc))
298 {
299 /*
300 * Debug info and statistics.
301 */
302 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
303 vmmR3InitRegisterStats(pVM);
304 vmmInitFormatTypes();
305
306 return VINF_SUCCESS;
307 }
308 }
309 /** @todo Need failure cleanup? */
310
311 return rc;
312}
313
314
315/**
316 * Allocate & setup the VMM RC stack(s) (for EMTs).
317 *
318 * The stacks are also used for long jumps in Ring-0.
319 *
320 * @returns VBox status code.
321 * @param pVM The cross context VM structure.
322 *
323 * @remarks The optional guard page gets it protection setup up during R3 init
324 * completion because of init order issues.
325 */
326static int vmmR3InitStacks(PVM pVM)
327{
328 int rc = VINF_SUCCESS;
329#ifdef VMM_R0_SWITCH_STACK
330 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
331#else
332 uint32_t fFlags = 0;
333#endif
334
335 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
336 {
337 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
338
339#ifdef VBOX_STRICT_VMM_STACK
340 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
341#else
342 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
343#endif
344 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
345 if (RT_SUCCESS(rc))
346 {
347#ifdef VBOX_STRICT_VMM_STACK
348 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
349#endif
350 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
351
352 }
353 }
354
355 return rc;
356}
357
358
359/**
360 * Initialize the loggers.
361 *
362 * @returns VBox status code.
363 * @param pVM The cross context VM structure.
364 */
365static int vmmR3InitLoggers(PVM pVM)
366{
367 int rc;
368#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
369
370 /*
371 * Allocate R0 Logger instance (finalized in the relocator).
372 */
373#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
374 PRTLOGGER pLogger = RTLogDefaultInstance();
375 if (pLogger)
376 {
377 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
378 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
379 {
380 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
381 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
382 (void **)&pVCpu->vmm.s.pR0LoggerR3);
383 if (RT_FAILURE(rc))
384 return rc;
385 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
386 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
387 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
388 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
389 }
390 }
391#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
392
393 /*
394 * Release logging.
395 */
396 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
397 if (pRelLogger)
398 {
399 /*
400 * Ring-0 release logger.
401 */
402 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
403 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
404 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
405
406 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
407 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
408 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
409
410 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
411
412 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
413 {
414 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
415 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
416 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
417 if (RT_FAILURE(rc))
418 return rc;
419 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
420 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
421 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
422 pVmmLogger->pVM = pVM->pVMR0;
423 pVmmLogger->cbLogger = (uint32_t)cbLogger;
424 pVmmLogger->fCreated = false;
425 pVmmLogger->fFlushingDisabled = false;
426 pVmmLogger->fRegistered = false;
427 pVmmLogger->idCpu = idCpu;
428
429 char szR0ThreadName[16];
430 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
431 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
432 pfnLoggerWrapper, pfnLoggerFlush,
433 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
434 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
435
436 /* We only update the release log instance here. */
437 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
438 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
439 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
440
441 pVmmLogger->fCreated = true;
442 }
443 }
444
445 return VINF_SUCCESS;
446}
447
448
449/**
450 * VMMR3Init worker that register the statistics with STAM.
451 *
452 * @param pVM The cross context VM structure.
453 */
454static void vmmR3InitRegisterStats(PVM pVM)
455{
456 RT_NOREF_PV(pVM);
457
458 /*
459 * Statistics.
460 */
461 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
519 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
520 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
521 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
522 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
523 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
524 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
525
526#ifdef VBOX_WITH_STATISTICS
527 for (VMCPUID i = 0; i < pVM->cCpus; i++)
528 {
529 PVMCPU pVCpu = pVM->apCpusR3[i];
530 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
531 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
532 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
533 }
534#endif
535 for (VMCPUID i = 0; i < pVM->cCpus; i++)
536 {
537 PVMCPU pVCpu = pVM->apCpusR3[i];
538 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
539 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
540 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
541 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
542 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
543 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
544 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
545 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
546 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
547 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
548 }
549}
550
551
552/**
553 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
554 *
555 * @returns VBox status code.
556 * @param pVM The cross context VM structure.
557 * @param pVCpu The cross context per CPU structure.
558 * @thread EMT(pVCpu)
559 */
560static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
561{
562 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
563}
564
565
566/**
567 * Initializes the R0 VMM.
568 *
569 * @returns VBox status code.
570 * @param pVM The cross context VM structure.
571 */
572VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
573{
574 int rc;
575 PVMCPU pVCpu = VMMGetCpu(pVM);
576 Assert(pVCpu && pVCpu->idCpu == 0);
577
578#ifdef LOG_ENABLED
579 /*
580 * Initialize the ring-0 logger if we haven't done so yet.
581 */
582 if ( pVCpu->vmm.s.pR0LoggerR3
583 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
584 {
585 rc = VMMR3UpdateLoggers(pVM);
586 if (RT_FAILURE(rc))
587 return rc;
588 }
589#endif
590
591 /*
592 * Call Ring-0 entry with init code.
593 */
594 for (;;)
595 {
596#ifdef NO_SUPCALLR0VMM
597 //rc = VERR_GENERAL_FAILURE;
598 rc = VINF_SUCCESS;
599#else
600 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
601#endif
602 /*
603 * Flush the logs.
604 */
605#ifdef LOG_ENABLED
606 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
607#endif
608 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
609 if (rc != VINF_VMM_CALL_HOST)
610 break;
611 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
612 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
613 break;
614 /* Resume R0 */
615 }
616
617 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
618 {
619 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
620 if (RT_SUCCESS(rc))
621 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
622 }
623
624 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
625 if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
626 LogRel(("VMM: Enabled thread-context hooks\n"));
627 else
628 LogRel(("VMM: Thread-context hooks unavailable\n"));
629
630 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
631 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
632 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
633 else
634 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
635 if (pVM->vmm.s.fIsPreemptPossible)
636 LogRel(("VMM: Kernel preemption is possible\n"));
637 else
638 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
639
640 /*
641 * Send all EMTs to ring-0 to get their logger initialized.
642 */
643 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
644 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
645
646 return rc;
647}
648
649
650/**
651 * Called when an init phase completes.
652 *
653 * @returns VBox status code.
654 * @param pVM The cross context VM structure.
655 * @param enmWhat Which init phase.
656 */
657VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
658{
659 int rc = VINF_SUCCESS;
660
661 switch (enmWhat)
662 {
663 case VMINITCOMPLETED_RING3:
664 {
665 /*
666 * Create the EMT yield timer.
667 */
668 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
669 AssertRCReturn(rc, rc);
670
671 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
672 AssertRCReturn(rc, rc);
673 break;
674 }
675
676 case VMINITCOMPLETED_HM:
677 {
678 /*
679 * Disable the periodic preemption timers if we can use the
680 * VMX-preemption timer instead.
681 */
682 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
683 && HMR3IsVmxPreemptionTimerUsed(pVM))
684 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
685 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
686
687 /*
688 * Last chance for GIM to update its CPUID leaves if it requires
689 * knowledge/information from HM initialization.
690 */
691 rc = GIMR3InitCompleted(pVM);
692 AssertRCReturn(rc, rc);
693
694 /*
695 * CPUM's post-initialization (print CPUIDs).
696 */
697 CPUMR3LogCpuIdAndMsrFeatures(pVM);
698 break;
699 }
700
701 default: /* shuts up gcc */
702 break;
703 }
704
705 return rc;
706}
707
708
709/**
710 * Terminate the VMM bits.
711 *
712 * @returns VBox status code.
713 * @param pVM The cross context VM structure.
714 */
715VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
716{
717 PVMCPU pVCpu = VMMGetCpu(pVM);
718 Assert(pVCpu && pVCpu->idCpu == 0);
719
720 /*
721 * Call Ring-0 entry with termination code.
722 */
723 int rc;
724 for (;;)
725 {
726#ifdef NO_SUPCALLR0VMM
727 //rc = VERR_GENERAL_FAILURE;
728 rc = VINF_SUCCESS;
729#else
730 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
731#endif
732 /*
733 * Flush the logs.
734 */
735#ifdef LOG_ENABLED
736 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
737#endif
738 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
739 if (rc != VINF_VMM_CALL_HOST)
740 break;
741 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
742 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
743 break;
744 /* Resume R0 */
745 }
746 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
747 {
748 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
749 if (RT_SUCCESS(rc))
750 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
751 }
752
753 for (VMCPUID i = 0; i < pVM->cCpus; i++)
754 {
755 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
756 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
757 }
758 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
759 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
760 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
761 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
762 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
763 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
764 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
765 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
766 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
767 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
768 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
769 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
770 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
771 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
772 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
773 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
774
775 vmmTermFormatTypes();
776 return rc;
777}
778
779
780/**
781 * Applies relocations to data and code managed by this
782 * component. This function will be called at init and
783 * whenever the VMM need to relocate it self inside the GC.
784 *
785 * The VMM will need to apply relocations to the core code.
786 *
787 * @param pVM The cross context VM structure.
788 * @param offDelta The relocation delta.
789 */
790VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
791{
792 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
793 RT_NOREF(offDelta);
794
795 /*
796 * Update the logger.
797 */
798 VMMR3UpdateLoggers(pVM);
799}
800
801
802/**
803 * Updates the settings for the RC and R0 loggers.
804 *
805 * @returns VBox status code.
806 * @param pVM The cross context VM structure.
807 */
808VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
809{
810 int rc = VINF_SUCCESS;
811
812#ifdef LOG_ENABLED
813 /*
814 * For the ring-0 EMT logger, we use a per-thread logger instance
815 * in ring-0. Only initialize it once.
816 */
817 PRTLOGGER const pDefault = RTLogDefaultInstance();
818 for (VMCPUID i = 0; i < pVM->cCpus; i++)
819 {
820 PVMCPU pVCpu = pVM->apCpusR3[i];
821 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
822 if (pR0LoggerR3)
823 {
824 if (!pR0LoggerR3->fCreated)
825 {
826 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
827 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
828 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
829
830 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
831 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
832 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
833
834 char szR0ThreadName[16];
835 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
836 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
837 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
838 pfnLoggerWrapper, pfnLoggerFlush,
839 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
840 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
841
842 pR0LoggerR3->idCpu = i;
843 pR0LoggerR3->fCreated = true;
844 pR0LoggerR3->fFlushingDisabled = false;
845 }
846
847 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
848 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
849 AssertRC(rc);
850 }
851 }
852#else
853 RT_NOREF(pVM);
854#endif
855
856 return rc;
857}
858
859
860/**
861 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
862 *
863 * @returns Pointer to the buffer.
864 * @param pVM The cross context VM structure.
865 */
866VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
867{
868 return pVM->vmm.s.szRing0AssertMsg1;
869}
870
871
872/**
873 * Returns the VMCPU of the specified virtual CPU.
874 *
875 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
876 *
877 * @param pUVM The user mode VM handle.
878 * @param idCpu The ID of the virtual CPU.
879 */
880VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
881{
882 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
883 AssertReturn(idCpu < pUVM->cCpus, NULL);
884 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
885 return pUVM->pVM->apCpusR3[idCpu];
886}
887
888
889/**
890 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
891 *
892 * @returns Pointer to the buffer.
893 * @param pVM The cross context VM structure.
894 */
895VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
896{
897 return pVM->vmm.s.szRing0AssertMsg2;
898}
899
900
901/**
902 * Execute state save operation.
903 *
904 * @returns VBox status code.
905 * @param pVM The cross context VM structure.
906 * @param pSSM SSM operation handle.
907 */
908static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
909{
910 LogFlow(("vmmR3Save:\n"));
911
912 /*
913 * Save the started/stopped state of all CPUs except 0 as it will always
914 * be running. This avoids breaking the saved state version. :-)
915 */
916 for (VMCPUID i = 1; i < pVM->cCpus; i++)
917 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
918
919 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
920}
921
922
923/**
924 * Execute state load operation.
925 *
926 * @returns VBox status code.
927 * @param pVM The cross context VM structure.
928 * @param pSSM SSM operation handle.
929 * @param uVersion Data layout version.
930 * @param uPass The data pass.
931 */
932static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
933{
934 LogFlow(("vmmR3Load:\n"));
935 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
936
937 /*
938 * Validate version.
939 */
940 if ( uVersion != VMM_SAVED_STATE_VERSION
941 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
942 {
943 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
944 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
945 }
946
947 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
948 {
949 /* Ignore the stack bottom, stack pointer and stack bits. */
950 RTRCPTR RCPtrIgnored;
951 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
952 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
953#ifdef RT_OS_DARWIN
954 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
955 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
956 && SSMR3HandleRevision(pSSM) >= 48858
957 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
958 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
959 )
960 SSMR3Skip(pSSM, 16384);
961 else
962 SSMR3Skip(pSSM, 8192);
963#else
964 SSMR3Skip(pSSM, 8192);
965#endif
966 }
967
968 /*
969 * Restore the VMCPU states. VCPU 0 is always started.
970 */
971 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
972 for (VMCPUID i = 1; i < pVM->cCpus; i++)
973 {
974 bool fStarted;
975 int rc = SSMR3GetBool(pSSM, &fStarted);
976 if (RT_FAILURE(rc))
977 return rc;
978 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
979 }
980
981 /* terminator */
982 uint32_t u32;
983 int rc = SSMR3GetU32(pSSM, &u32);
984 if (RT_FAILURE(rc))
985 return rc;
986 if (u32 != UINT32_MAX)
987 {
988 AssertMsgFailed(("u32=%#x\n", u32));
989 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
990 }
991 return VINF_SUCCESS;
992}
993
994
995/**
996 * Suspends the CPU yielder.
997 *
998 * @param pVM The cross context VM structure.
999 */
1000VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1001{
1002 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1003 if (!pVM->vmm.s.cYieldResumeMillies)
1004 {
1005 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1006 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1007 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1008 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1009 else
1010 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1011 TMTimerStop(pVM->vmm.s.pYieldTimer);
1012 }
1013 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1014}
1015
1016
1017/**
1018 * Stops the CPU yielder.
1019 *
1020 * @param pVM The cross context VM structure.
1021 */
1022VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1023{
1024 if (!pVM->vmm.s.cYieldResumeMillies)
1025 TMTimerStop(pVM->vmm.s.pYieldTimer);
1026 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1027 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1028}
1029
1030
1031/**
1032 * Resumes the CPU yielder when it has been a suspended or stopped.
1033 *
1034 * @param pVM The cross context VM structure.
1035 */
1036VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1037{
1038 if (pVM->vmm.s.cYieldResumeMillies)
1039 {
1040 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1041 pVM->vmm.s.cYieldResumeMillies = 0;
1042 }
1043}
1044
1045
1046/**
1047 * Internal timer callback function.
1048 *
1049 * @param pVM The cross context VM structure.
1050 * @param pTimer The timer handle.
1051 * @param pvUser User argument specified upon timer creation.
1052 */
1053static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1054{
1055 NOREF(pvUser);
1056
1057 /*
1058 * This really needs some careful tuning. While we shouldn't be too greedy since
1059 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1060 * because that'll cause us to stop up.
1061 *
1062 * The current logic is to use the default interval when there is no lag worth
1063 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1064 *
1065 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1066 * so the lag is up to date.)
1067 */
1068 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1069 if ( u64Lag < 50000000 /* 50ms */
1070 || ( u64Lag < 1000000000 /* 1s */
1071 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1072 )
1073 {
1074 uint64_t u64Elapsed = RTTimeNanoTS();
1075 pVM->vmm.s.u64LastYield = u64Elapsed;
1076
1077 RTThreadYield();
1078
1079#ifdef LOG_ENABLED
1080 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1081 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1082#endif
1083 }
1084 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1085}
1086
1087
1088/**
1089 * Executes guest code (Intel VT-x and AMD-V).
1090 *
1091 * @param pVM The cross context VM structure.
1092 * @param pVCpu The cross context virtual CPU structure.
1093 */
1094VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1095{
1096 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1097
1098 for (;;)
1099 {
1100 int rc;
1101 do
1102 {
1103#ifdef NO_SUPCALLR0VMM
1104 rc = VERR_GENERAL_FAILURE;
1105#else
1106 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1107 if (RT_LIKELY(rc == VINF_SUCCESS))
1108 rc = pVCpu->vmm.s.iLastGZRc;
1109#endif
1110 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1111
1112#if 0 /** @todo triggers too often */
1113 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1114#endif
1115
1116 /*
1117 * Flush the logs
1118 */
1119#ifdef LOG_ENABLED
1120 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1121#endif
1122 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1123 if (rc != VINF_VMM_CALL_HOST)
1124 {
1125 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1126 return rc;
1127 }
1128 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1129 if (RT_FAILURE(rc))
1130 return rc;
1131 /* Resume R0 */
1132 }
1133}
1134
1135
1136/**
1137 * Perform one of the fast I/O control VMMR0 operation.
1138 *
1139 * @returns VBox strict status code.
1140 * @param pVM The cross context VM structure.
1141 * @param pVCpu The cross context virtual CPU structure.
1142 * @param enmOperation The operation to perform.
1143 */
1144VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1145{
1146 for (;;)
1147 {
1148 VBOXSTRICTRC rcStrict;
1149 do
1150 {
1151#ifdef NO_SUPCALLR0VMM
1152 rcStrict = VERR_GENERAL_FAILURE;
1153#else
1154 rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1155 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1156 rcStrict = pVCpu->vmm.s.iLastGZRc;
1157#endif
1158 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1159
1160 /*
1161 * Flush the logs
1162 */
1163#ifdef LOG_ENABLED
1164 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1165#endif
1166 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1167 if (rcStrict != VINF_VMM_CALL_HOST)
1168 return rcStrict;
1169 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1170 if (RT_FAILURE(rc))
1171 return rc;
1172 /* Resume R0 */
1173 }
1174}
1175
1176
1177/**
1178 * VCPU worker for VMMR3SendStartupIpi.
1179 *
1180 * @param pVM The cross context VM structure.
1181 * @param idCpu Virtual CPU to perform SIPI on.
1182 * @param uVector The SIPI vector.
1183 */
1184static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1185{
1186 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1187 VMCPU_ASSERT_EMT(pVCpu);
1188
1189 /*
1190 * In the INIT state, the target CPU is only responsive to an SIPI.
1191 * This is also true for when when the CPU is in VMX non-root mode.
1192 *
1193 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1194 * See Intel spec. 26.6.2 "Activity State".
1195 */
1196 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1197 return VINF_SUCCESS;
1198
1199 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1200#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1201 if (CPUMIsGuestInVmxRootMode(pCtx))
1202 {
1203 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1204 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1205 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1206
1207 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1208 return VINF_SUCCESS;
1209 }
1210#endif
1211
1212 pCtx->cs.Sel = uVector << 8;
1213 pCtx->cs.ValidSel = uVector << 8;
1214 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1215 pCtx->cs.u64Base = uVector << 12;
1216 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1217 pCtx->rip = 0;
1218
1219 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1220
1221# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1222 EMSetState(pVCpu, EMSTATE_HALTED);
1223 return VINF_EM_RESCHEDULE;
1224# else /* And if we go the VMCPU::enmState way it can stay here. */
1225 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1226 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1227 return VINF_SUCCESS;
1228# endif
1229}
1230
1231
1232/**
1233 * VCPU worker for VMMR3SendInitIpi.
1234 *
1235 * @returns VBox status code.
1236 * @param pVM The cross context VM structure.
1237 * @param idCpu Virtual CPU to perform SIPI on.
1238 */
1239static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1240{
1241 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1242 VMCPU_ASSERT_EMT(pVCpu);
1243
1244 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1245
1246 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1247 * wait-for-SIPI state. Verify. */
1248
1249 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1250#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1251 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1252 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1253 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1254#endif
1255
1256 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1257 * IPI (e.g. SVM_EXIT_INIT). */
1258
1259 PGMR3ResetCpu(pVM, pVCpu);
1260 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1261 APICR3InitIpi(pVCpu);
1262 TRPMR3ResetCpu(pVCpu);
1263 CPUMR3ResetCpu(pVM, pVCpu);
1264 EMR3ResetCpu(pVCpu);
1265 HMR3ResetCpu(pVCpu);
1266 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1267
1268 /* This will trickle up on the target EMT. */
1269 return VINF_EM_WAIT_SIPI;
1270}
1271
1272
1273/**
1274 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1275 * vector-dependent state and unhalting processor.
1276 *
1277 * @param pVM The cross context VM structure.
1278 * @param idCpu Virtual CPU to perform SIPI on.
1279 * @param uVector SIPI vector.
1280 */
1281VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1282{
1283 AssertReturnVoid(idCpu < pVM->cCpus);
1284
1285 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1286 AssertRC(rc);
1287}
1288
1289
1290/**
1291 * Sends init IPI to the virtual CPU.
1292 *
1293 * @param pVM The cross context VM structure.
1294 * @param idCpu Virtual CPU to perform int IPI on.
1295 */
1296VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1297{
1298 AssertReturnVoid(idCpu < pVM->cCpus);
1299
1300 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1301 AssertRC(rc);
1302}
1303
1304
1305/**
1306 * Registers the guest memory range that can be used for patching.
1307 *
1308 * @returns VBox status code.
1309 * @param pVM The cross context VM structure.
1310 * @param pPatchMem Patch memory range.
1311 * @param cbPatchMem Size of the memory range.
1312 */
1313VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1314{
1315 VM_ASSERT_EMT(pVM);
1316 if (HMIsEnabled(pVM))
1317 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1318
1319 return VERR_NOT_SUPPORTED;
1320}
1321
1322
1323/**
1324 * Deregisters the guest memory range that can be used for patching.
1325 *
1326 * @returns VBox status code.
1327 * @param pVM The cross context VM structure.
1328 * @param pPatchMem Patch memory range.
1329 * @param cbPatchMem Size of the memory range.
1330 */
1331VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1332{
1333 if (HMIsEnabled(pVM))
1334 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1335
1336 return VINF_SUCCESS;
1337}
1338
1339
1340/**
1341 * Common recursion handler for the other EMTs.
1342 *
1343 * @returns Strict VBox status code.
1344 * @param pVM The cross context VM structure.
1345 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1346 * @param rcStrict Current status code to be combined with the one
1347 * from this recursion and returned.
1348 */
1349static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1350{
1351 int rc2;
1352
1353 /*
1354 * We wait here while the initiator of this recursion reconfigures
1355 * everything. The last EMT to get in signals the initiator.
1356 */
1357 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1358 {
1359 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1360 AssertLogRelRC(rc2);
1361 }
1362
1363 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1364 AssertLogRelRC(rc2);
1365
1366 /*
1367 * Do the normal rendezvous processing.
1368 */
1369 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1370 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1371
1372 /*
1373 * Wait for the initiator to restore everything.
1374 */
1375 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1376 AssertLogRelRC(rc2);
1377
1378 /*
1379 * Last thread out of here signals the initiator.
1380 */
1381 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1382 {
1383 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1384 AssertLogRelRC(rc2);
1385 }
1386
1387 /*
1388 * Merge status codes and return.
1389 */
1390 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1391 if ( rcStrict2 != VINF_SUCCESS
1392 && ( rcStrict == VINF_SUCCESS
1393 || rcStrict > rcStrict2))
1394 rcStrict = rcStrict2;
1395 return rcStrict;
1396}
1397
1398
1399/**
1400 * Count returns and have the last non-caller EMT wake up the caller.
1401 *
1402 * @returns VBox strict informational status code for EM scheduling. No failures
1403 * will be returned here, those are for the caller only.
1404 *
1405 * @param pVM The cross context VM structure.
1406 * @param rcStrict The current accumulated recursive status code,
1407 * to be merged with i32RendezvousStatus and
1408 * returned.
1409 */
1410DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1411{
1412 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1413
1414 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1415 if (cReturned == pVM->cCpus - 1U)
1416 {
1417 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1418 AssertLogRelRC(rc);
1419 }
1420
1421 /*
1422 * Merge the status codes, ignoring error statuses in this code path.
1423 */
1424 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1425 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1426 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1427 VERR_IPE_UNEXPECTED_INFO_STATUS);
1428
1429 if (RT_SUCCESS(rcStrict2))
1430 {
1431 if ( rcStrict2 != VINF_SUCCESS
1432 && ( rcStrict == VINF_SUCCESS
1433 || rcStrict > rcStrict2))
1434 rcStrict = rcStrict2;
1435 }
1436 return rcStrict;
1437}
1438
1439
1440/**
1441 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1442 *
1443 * @returns VBox strict informational status code for EM scheduling. No failures
1444 * will be returned here, those are for the caller only. When
1445 * fIsCaller is set, VINF_SUCCESS is always returned.
1446 *
1447 * @param pVM The cross context VM structure.
1448 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1449 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1450 * not.
1451 * @param fFlags The flags.
1452 * @param pfnRendezvous The callback.
1453 * @param pvUser The user argument for the callback.
1454 */
1455static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1456 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1457{
1458 int rc;
1459 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1460
1461 /*
1462 * Enter, the last EMT triggers the next callback phase.
1463 */
1464 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1465 if (cEntered != pVM->cCpus)
1466 {
1467 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1468 {
1469 /* Wait for our turn. */
1470 for (;;)
1471 {
1472 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1473 AssertLogRelRC(rc);
1474 if (!pVM->vmm.s.fRendezvousRecursion)
1475 break;
1476 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1477 }
1478 }
1479 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1480 {
1481 /* Wait for the last EMT to arrive and wake everyone up. */
1482 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1483 AssertLogRelRC(rc);
1484 Assert(!pVM->vmm.s.fRendezvousRecursion);
1485 }
1486 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1487 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1488 {
1489 /* Wait for our turn. */
1490 for (;;)
1491 {
1492 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1493 AssertLogRelRC(rc);
1494 if (!pVM->vmm.s.fRendezvousRecursion)
1495 break;
1496 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1497 }
1498 }
1499 else
1500 {
1501 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1502
1503 /*
1504 * The execute once is handled specially to optimize the code flow.
1505 *
1506 * The last EMT to arrive will perform the callback and the other
1507 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1508 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1509 * returns, that EMT will initiate the normal return sequence.
1510 */
1511 if (!fIsCaller)
1512 {
1513 for (;;)
1514 {
1515 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1516 AssertLogRelRC(rc);
1517 if (!pVM->vmm.s.fRendezvousRecursion)
1518 break;
1519 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1520 }
1521
1522 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1523 }
1524 return VINF_SUCCESS;
1525 }
1526 }
1527 else
1528 {
1529 /*
1530 * All EMTs are waiting, clear the FF and take action according to the
1531 * execution method.
1532 */
1533 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1534
1535 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1536 {
1537 /* Wake up everyone. */
1538 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1539 AssertLogRelRC(rc);
1540 }
1541 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1542 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1543 {
1544 /* Figure out who to wake up and wake it up. If it's ourself, then
1545 it's easy otherwise wait for our turn. */
1546 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1547 ? 0
1548 : pVM->cCpus - 1U;
1549 if (pVCpu->idCpu != iFirst)
1550 {
1551 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1552 AssertLogRelRC(rc);
1553 for (;;)
1554 {
1555 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1556 AssertLogRelRC(rc);
1557 if (!pVM->vmm.s.fRendezvousRecursion)
1558 break;
1559 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1560 }
1561 }
1562 }
1563 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1564 }
1565
1566
1567 /*
1568 * Do the callback and update the status if necessary.
1569 */
1570 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1571 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1572 {
1573 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1574 if (rcStrict2 != VINF_SUCCESS)
1575 {
1576 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1577 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1578 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1579 int32_t i32RendezvousStatus;
1580 do
1581 {
1582 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1583 if ( rcStrict2 == i32RendezvousStatus
1584 || RT_FAILURE(i32RendezvousStatus)
1585 || ( i32RendezvousStatus != VINF_SUCCESS
1586 && rcStrict2 > i32RendezvousStatus))
1587 break;
1588 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1589 }
1590 }
1591
1592 /*
1593 * Increment the done counter and take action depending on whether we're
1594 * the last to finish callback execution.
1595 */
1596 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1597 if ( cDone != pVM->cCpus
1598 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1599 {
1600 /* Signal the next EMT? */
1601 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1602 {
1603 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1604 AssertLogRelRC(rc);
1605 }
1606 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1607 {
1608 Assert(cDone == pVCpu->idCpu + 1U);
1609 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1610 AssertLogRelRC(rc);
1611 }
1612 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1613 {
1614 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1615 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1616 AssertLogRelRC(rc);
1617 }
1618
1619 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1620 if (!fIsCaller)
1621 {
1622 for (;;)
1623 {
1624 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1625 AssertLogRelRC(rc);
1626 if (!pVM->vmm.s.fRendezvousRecursion)
1627 break;
1628 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1629 }
1630 }
1631 }
1632 else
1633 {
1634 /* Callback execution is all done, tell the rest to return. */
1635 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1636 AssertLogRelRC(rc);
1637 }
1638
1639 if (!fIsCaller)
1640 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1641 return rcStrictRecursion;
1642}
1643
1644
1645/**
1646 * Called in response to VM_FF_EMT_RENDEZVOUS.
1647 *
1648 * @returns VBox strict status code - EM scheduling. No errors will be returned
1649 * here, nor will any non-EM scheduling status codes be returned.
1650 *
1651 * @param pVM The cross context VM structure.
1652 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1653 *
1654 * @thread EMT
1655 */
1656VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1657{
1658 Assert(!pVCpu->vmm.s.fInRendezvous);
1659 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1660 pVCpu->vmm.s.fInRendezvous = true;
1661 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1662 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1663 pVCpu->vmm.s.fInRendezvous = false;
1664 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1665 return VBOXSTRICTRC_TODO(rcStrict);
1666}
1667
1668
1669/**
1670 * Helper for resetting an single wakeup event sempahore.
1671 *
1672 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1673 * @param hEvt The event semaphore to reset.
1674 */
1675static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1676{
1677 for (uint32_t cLoops = 0; ; cLoops++)
1678 {
1679 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1680 if (rc != VINF_SUCCESS || cLoops > _4K)
1681 return rc;
1682 }
1683}
1684
1685
1686/**
1687 * Worker for VMMR3EmtRendezvous that handles recursion.
1688 *
1689 * @returns VBox strict status code. This will be the first error,
1690 * VINF_SUCCESS, or an EM scheduling status code.
1691 *
1692 * @param pVM The cross context VM structure.
1693 * @param pVCpu The cross context virtual CPU structure of the
1694 * calling EMT.
1695 * @param fFlags Flags indicating execution methods. See
1696 * grp_VMMR3EmtRendezvous_fFlags.
1697 * @param pfnRendezvous The callback.
1698 * @param pvUser User argument for the callback.
1699 *
1700 * @thread EMT(pVCpu)
1701 */
1702static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1703 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1704{
1705 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1706 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1707 Assert(pVCpu->vmm.s.fInRendezvous);
1708
1709 /*
1710 * Save the current state.
1711 */
1712 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1713 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1714 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1715 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1716 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1717
1718 /*
1719 * Check preconditions and save the current state.
1720 */
1721 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1722 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1723 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1724 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1725 VERR_INTERNAL_ERROR);
1726 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1727 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1728
1729 /*
1730 * Reset the recursion prep and pop semaphores.
1731 */
1732 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1733 AssertLogRelRCReturn(rc, rc);
1734 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1735 AssertLogRelRCReturn(rc, rc);
1736 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1737 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1738 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1739 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1740
1741 /*
1742 * Usher the other thread into the recursion routine.
1743 */
1744 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1745 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1746
1747 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1748 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1749 while (cLeft-- > 0)
1750 {
1751 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1752 AssertLogRelRC(rc);
1753 }
1754 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1755 {
1756 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1757 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1758 {
1759 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1760 AssertLogRelRC(rc);
1761 }
1762 }
1763 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1764 {
1765 Assert(cLeft == pVCpu->idCpu);
1766 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1767 {
1768 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1769 AssertLogRelRC(rc);
1770 }
1771 }
1772 else
1773 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1774 VERR_INTERNAL_ERROR_4);
1775
1776 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1777 AssertLogRelRC(rc);
1778 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1779 AssertLogRelRC(rc);
1780
1781
1782 /*
1783 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1784 */
1785 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1786 {
1787 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1788 AssertLogRelRC(rc);
1789 }
1790
1791 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1792
1793 /*
1794 * Clear the slate and setup the new rendezvous.
1795 */
1796 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1797 {
1798 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1799 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1800 }
1801 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1802 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1803 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1804 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1805
1806 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1807 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1808 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1809 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1810 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1811 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1812 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1813 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1814
1815 /*
1816 * We're ready to go now, do normal rendezvous processing.
1817 */
1818 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1819 AssertLogRelRC(rc);
1820
1821 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1822
1823 /*
1824 * The caller waits for the other EMTs to be done, return and waiting on the
1825 * pop semaphore.
1826 */
1827 for (;;)
1828 {
1829 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1830 AssertLogRelRC(rc);
1831 if (!pVM->vmm.s.fRendezvousRecursion)
1832 break;
1833 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1834 }
1835
1836 /*
1837 * Get the return code and merge it with the above recursion status.
1838 */
1839 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1840 if ( rcStrict2 != VINF_SUCCESS
1841 && ( rcStrict == VINF_SUCCESS
1842 || rcStrict > rcStrict2))
1843 rcStrict = rcStrict2;
1844
1845 /*
1846 * Restore the parent rendezvous state.
1847 */
1848 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1849 {
1850 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1851 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1852 }
1853 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1854 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1855 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1856 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1857
1858 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1859 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1860 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1861 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1862 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1863 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1864 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1865
1866 /*
1867 * Usher the other EMTs back to their parent recursion routine, waiting
1868 * for them to all get there before we return (makes sure they've been
1869 * scheduled and are past the pop event sem, see below).
1870 */
1871 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1872 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1873 AssertLogRelRC(rc);
1874
1875 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1876 {
1877 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1878 AssertLogRelRC(rc);
1879 }
1880
1881 /*
1882 * We must reset the pop semaphore on the way out (doing the pop caller too,
1883 * just in case). The parent may be another recursion.
1884 */
1885 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1886 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1887
1888 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1889
1890 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1891 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1892 return rcStrict;
1893}
1894
1895
1896/**
1897 * EMT rendezvous.
1898 *
1899 * Gathers all the EMTs and execute some code on each of them, either in a one
1900 * by one fashion or all at once.
1901 *
1902 * @returns VBox strict status code. This will be the first error,
1903 * VINF_SUCCESS, or an EM scheduling status code.
1904 *
1905 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1906 * doesn't support it or if the recursion is too deep.
1907 *
1908 * @param pVM The cross context VM structure.
1909 * @param fFlags Flags indicating execution methods. See
1910 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1911 * descending and ascending rendezvous types support
1912 * recursion from inside @a pfnRendezvous.
1913 * @param pfnRendezvous The callback.
1914 * @param pvUser User argument for the callback.
1915 *
1916 * @thread Any.
1917 */
1918VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1919{
1920 /*
1921 * Validate input.
1922 */
1923 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1924 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1925 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1926 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1927 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1928 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1929 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1930 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1931
1932 VBOXSTRICTRC rcStrict;
1933 PVMCPU pVCpu = VMMGetCpu(pVM);
1934 if (!pVCpu)
1935 {
1936 /*
1937 * Forward the request to an EMT thread.
1938 */
1939 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1940 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1941 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1942 else
1943 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1944 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1945 }
1946 else if ( pVM->cCpus == 1
1947 || ( pVM->enmVMState == VMSTATE_DESTROYING
1948 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1949 {
1950 /*
1951 * Shortcut for the single EMT case.
1952 *
1953 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1954 * during vmR3Destroy after other emulation threads have started terminating.
1955 */
1956 if (!pVCpu->vmm.s.fInRendezvous)
1957 {
1958 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1959 pVCpu->vmm.s.fInRendezvous = true;
1960 pVM->vmm.s.fRendezvousFlags = fFlags;
1961 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1962 pVCpu->vmm.s.fInRendezvous = false;
1963 }
1964 else
1965 {
1966 /* Recursion. Do the same checks as in the SMP case. */
1967 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1968 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1969 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1970 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1971 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1972 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1973 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1974 , VERR_DEADLOCK);
1975
1976 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1977 pVM->vmm.s.cRendezvousRecursions++;
1978 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1979 pVM->vmm.s.fRendezvousFlags = fFlags;
1980
1981 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1982
1983 pVM->vmm.s.fRendezvousFlags = fParentFlags;
1984 pVM->vmm.s.cRendezvousRecursions--;
1985 }
1986 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1987 }
1988 else
1989 {
1990 /*
1991 * Spin lock. If busy, check for recursion, if not recursing wait for
1992 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1993 */
1994 int rc;
1995 rcStrict = VINF_SUCCESS;
1996 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1997 {
1998 /* Allow recursion in some cases. */
1999 if ( pVCpu->vmm.s.fInRendezvous
2000 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2001 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2002 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2003 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2004 ))
2005 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2006
2007 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2008 VERR_DEADLOCK);
2009
2010 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2011 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2012 {
2013 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2014 {
2015 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2016 if ( rc != VINF_SUCCESS
2017 && ( rcStrict == VINF_SUCCESS
2018 || rcStrict > rc))
2019 rcStrict = rc;
2020 /** @todo Perhaps deal with termination here? */
2021 }
2022 ASMNopPause();
2023 }
2024 }
2025
2026 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2027 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2028 Assert(!pVCpu->vmm.s.fInRendezvous);
2029 pVCpu->vmm.s.fInRendezvous = true;
2030
2031 /*
2032 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2033 */
2034 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2035 {
2036 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2037 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2038 }
2039 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2040 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2041 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2042 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2043 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2044 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2045 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2046 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2047 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2048 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2049 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2050
2051 /*
2052 * Set the FF and poke the other EMTs.
2053 */
2054 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2055 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2056
2057 /*
2058 * Do the same ourselves.
2059 */
2060 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2061
2062 /*
2063 * The caller waits for the other EMTs to be done and return before doing
2064 * the cleanup. This makes away with wakeup / reset races we would otherwise
2065 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2066 */
2067 for (;;)
2068 {
2069 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2070 AssertLogRelRC(rc);
2071 if (!pVM->vmm.s.fRendezvousRecursion)
2072 break;
2073 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2074 }
2075
2076 /*
2077 * Get the return code and clean up a little bit.
2078 */
2079 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2080 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2081
2082 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2083 pVCpu->vmm.s.fInRendezvous = false;
2084
2085 /*
2086 * Merge rcStrict, rcStrict2 and rcStrict3.
2087 */
2088 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2089 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2090 if ( rcStrict2 != VINF_SUCCESS
2091 && ( rcStrict == VINF_SUCCESS
2092 || rcStrict > rcStrict2))
2093 rcStrict = rcStrict2;
2094 if ( rcStrict3 != VINF_SUCCESS
2095 && ( rcStrict == VINF_SUCCESS
2096 || rcStrict > rcStrict3))
2097 rcStrict = rcStrict3;
2098 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2099 }
2100
2101 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2102 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2103 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2104 VERR_IPE_UNEXPECTED_INFO_STATUS);
2105 return VBOXSTRICTRC_VAL(rcStrict);
2106}
2107
2108
2109/**
2110 * Interface for vmR3SetHaltMethodU.
2111 *
2112 * @param pVCpu The cross context virtual CPU structure of the
2113 * calling EMT.
2114 * @param fMayHaltInRing0 The new state.
2115 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2116 * @thread EMT(pVCpu)
2117 *
2118 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2119 * component.
2120 */
2121VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2122{
2123 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2124 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2125}
2126
2127
2128/**
2129 * Read from the ring 0 jump buffer stack.
2130 *
2131 * @returns VBox status code.
2132 *
2133 * @param pVM The cross context VM structure.
2134 * @param idCpu The ID of the source CPU context (for the address).
2135 * @param R0Addr Where to start reading.
2136 * @param pvBuf Where to store the data we've read.
2137 * @param cbRead The number of bytes to read.
2138 */
2139VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2140{
2141 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2142 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2143 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2144
2145 int rc;
2146#ifdef VMM_R0_SWITCH_STACK
2147 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2148#else
2149 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2150#endif
2151 if ( off < VMM_STACK_SIZE
2152 && off + cbRead <= VMM_STACK_SIZE)
2153 {
2154 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2155 rc = VINF_SUCCESS;
2156 }
2157 else
2158 rc = VERR_INVALID_POINTER;
2159
2160 /* Supply the setjmp return RIP/EIP. */
2161 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2162 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2163 {
2164 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2165 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2166 size_t offDst = 0;
2167 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2168 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2169 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2170 {
2171 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2172 Assert(offSrc < cbSrc);
2173 pbSrc -= offSrc;
2174 cbSrc -= offSrc;
2175 }
2176 if (cbSrc > cbRead - offDst)
2177 cbSrc = cbRead - offDst;
2178 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2179
2180 if (cbSrc == cbRead)
2181 rc = VINF_SUCCESS;
2182 }
2183
2184 return rc;
2185}
2186
2187
2188/**
2189 * Used by the DBGF stack unwinder to initialize the register state.
2190 *
2191 * @param pUVM The user mode VM handle.
2192 * @param idCpu The ID of the CPU being unwound.
2193 * @param pState The unwind state to initialize.
2194 */
2195VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2196{
2197 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2198 AssertReturnVoid(pVCpu);
2199
2200 /*
2201 * Locate the resume point on the stack.
2202 */
2203#ifdef VMM_R0_SWITCH_STACK
2204 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2205 AssertReturnVoid(off < VMM_STACK_SIZE);
2206#else
2207 uintptr_t off = 0;
2208#endif
2209
2210#ifdef RT_ARCH_AMD64
2211 /*
2212 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2213 */
2214# ifdef VBOX_STRICT
2215 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2216 off += 8; /* RESUME_MAGIC */
2217# endif
2218# ifdef RT_OS_WINDOWS
2219 off += 0xa0; /* XMM6 thru XMM15 */
2220# endif
2221 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2222 off += 8;
2223 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2224 off += 8;
2225# ifdef RT_OS_WINDOWS
2226 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2227 off += 8;
2228 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2229 off += 8;
2230# endif
2231 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2232 off += 8;
2233 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2234 off += 8;
2235 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2236 off += 8;
2237 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2238 off += 8;
2239 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2240 off += 8;
2241 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2242 off += 8;
2243
2244#elif defined(RT_ARCH_X86)
2245 /*
2246 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2247 */
2248# ifdef VBOX_STRICT
2249 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2250 off += 4; /* RESUME_MAGIC */
2251# endif
2252 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2253 off += 4;
2254 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2255 off += 4;
2256 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2257 off += 4;
2258 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2259 off += 4;
2260 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2261 off += 4;
2262 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2263 off += 4;
2264#else
2265# error "Port me"
2266#endif
2267
2268 /*
2269 * This is all we really need here, though the above helps if the assembly
2270 * doesn't contain unwind info (currently only on win/64, so that is useful).
2271 */
2272 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2273 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2274}
2275
2276
2277/**
2278 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2279 *
2280 * @returns VBox status code.
2281 * @param pVM The cross context VM structure.
2282 * @param uOperation Operation to execute.
2283 * @param u64Arg Constant argument.
2284 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2285 * details.
2286 */
2287VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2288{
2289 PVMCPU pVCpu = VMMGetCpu(pVM);
2290 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2291 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2292}
2293
2294
2295/**
2296 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2297 *
2298 * @returns VBox status code.
2299 * @param pVM The cross context VM structure.
2300 * @param pVCpu The cross context VM structure.
2301 * @param enmOperation Operation to execute.
2302 * @param u64Arg Constant argument.
2303 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2304 * details.
2305 */
2306VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2307{
2308 int rc;
2309 for (;;)
2310 {
2311#ifdef NO_SUPCALLR0VMM
2312 rc = VERR_GENERAL_FAILURE;
2313#else
2314 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2315#endif
2316 /*
2317 * Flush the logs.
2318 */
2319#ifdef LOG_ENABLED
2320 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2321#endif
2322 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2323 if (rc != VINF_VMM_CALL_HOST)
2324 break;
2325 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2326 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2327 break;
2328 /* Resume R0 */
2329 }
2330
2331 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2332 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2333 VERR_IPE_UNEXPECTED_INFO_STATUS);
2334 return rc;
2335}
2336
2337
2338/**
2339 * Service a call to the ring-3 host code.
2340 *
2341 * @returns VBox status code.
2342 * @param pVM The cross context VM structure.
2343 * @param pVCpu The cross context virtual CPU structure.
2344 * @remarks Careful with critsects.
2345 */
2346static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2347{
2348 /*
2349 * We must also check for pending critsect exits or else we can deadlock
2350 * when entering other critsects here.
2351 */
2352 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2353 PDMCritSectBothFF(pVCpu);
2354
2355 switch (pVCpu->vmm.s.enmCallRing3Operation)
2356 {
2357 /*
2358 * Acquire a critical section.
2359 */
2360 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2361 {
2362 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2363 true /*fCallRing3*/);
2364 break;
2365 }
2366
2367 /*
2368 * Enter a r/w critical section exclusively.
2369 */
2370 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2371 {
2372 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2373 true /*fCallRing3*/);
2374 break;
2375 }
2376
2377 /*
2378 * Enter a r/w critical section shared.
2379 */
2380 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2381 {
2382 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2383 true /*fCallRing3*/);
2384 break;
2385 }
2386
2387 /*
2388 * Acquire the PDM lock.
2389 */
2390 case VMMCALLRING3_PDM_LOCK:
2391 {
2392 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2393 break;
2394 }
2395
2396 /*
2397 * Grow the PGM pool.
2398 */
2399 case VMMCALLRING3_PGM_POOL_GROW:
2400 {
2401 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2402 break;
2403 }
2404
2405 /*
2406 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2407 */
2408 case VMMCALLRING3_PGM_MAP_CHUNK:
2409 {
2410 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2411 break;
2412 }
2413
2414 /*
2415 * Allocates more handy pages.
2416 */
2417 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2418 {
2419 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2420 break;
2421 }
2422
2423 /*
2424 * Allocates a large page.
2425 */
2426 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2427 {
2428 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2429 break;
2430 }
2431
2432 /*
2433 * Acquire the PGM lock.
2434 */
2435 case VMMCALLRING3_PGM_LOCK:
2436 {
2437 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2438 break;
2439 }
2440
2441 /*
2442 * Acquire the MM hypervisor heap lock.
2443 */
2444 case VMMCALLRING3_MMHYPER_LOCK:
2445 {
2446 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2447 break;
2448 }
2449
2450#ifdef VBOX_WITH_REM
2451 /*
2452 * Flush REM handler notifications.
2453 */
2454 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2455 {
2456 REMR3ReplayHandlerNotifications(pVM);
2457 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2458 break;
2459 }
2460#endif
2461
2462 /*
2463 * This is a noop. We just take this route to avoid unnecessary
2464 * tests in the loops.
2465 */
2466 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2467 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2468 LogAlways(("*FLUSH*\n"));
2469 break;
2470
2471 /*
2472 * Set the VM error message.
2473 */
2474 case VMMCALLRING3_VM_SET_ERROR:
2475 VMR3SetErrorWorker(pVM);
2476 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2477 break;
2478
2479 /*
2480 * Set the VM runtime error message.
2481 */
2482 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2483 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2484 break;
2485
2486 /*
2487 * Signal a ring 0 hypervisor assertion.
2488 * Cancel the longjmp operation that's in progress.
2489 */
2490 case VMMCALLRING3_VM_R0_ASSERTION:
2491 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2492 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2493#ifdef RT_ARCH_X86
2494 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2495#else
2496 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2497#endif
2498#ifdef VMM_R0_SWITCH_STACK
2499 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2500#endif
2501 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2502 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2503 return VERR_VMM_RING0_ASSERTION;
2504
2505 /*
2506 * A forced switch to ring 0 for preemption purposes.
2507 */
2508 case VMMCALLRING3_VM_R0_PREEMPT:
2509 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2510 break;
2511
2512 default:
2513 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2514 return VERR_VMM_UNKNOWN_RING3_CALL;
2515 }
2516
2517 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2518 return VINF_SUCCESS;
2519}
2520
2521
2522/**
2523 * Displays the Force action Flags.
2524 *
2525 * @param pVM The cross context VM structure.
2526 * @param pHlp The output helpers.
2527 * @param pszArgs The additional arguments (ignored).
2528 */
2529static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2530{
2531 int c;
2532 uint32_t f;
2533 NOREF(pszArgs);
2534
2535#define PRINT_FLAG(prf,flag) do { \
2536 if (f & (prf##flag)) \
2537 { \
2538 static const char *s_psz = #flag; \
2539 if (!(c % 6)) \
2540 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2541 else \
2542 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2543 c++; \
2544 f &= ~(prf##flag); \
2545 } \
2546 } while (0)
2547
2548#define PRINT_GROUP(prf,grp,sfx) do { \
2549 if (f & (prf##grp##sfx)) \
2550 { \
2551 static const char *s_psz = #grp; \
2552 if (!(c % 5)) \
2553 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2554 else \
2555 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2556 c++; \
2557 } \
2558 } while (0)
2559
2560 /*
2561 * The global flags.
2562 */
2563 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2564 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2565
2566 /* show the flag mnemonics */
2567 c = 0;
2568 f = fGlobalForcedActions;
2569 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2570 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2571 PRINT_FLAG(VM_FF_,PDM_DMA);
2572 PRINT_FLAG(VM_FF_,DBGF);
2573 PRINT_FLAG(VM_FF_,REQUEST);
2574 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2575 PRINT_FLAG(VM_FF_,RESET);
2576 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2577 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2578 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2579 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2580 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2581 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2582 if (f)
2583 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2584 else
2585 pHlp->pfnPrintf(pHlp, "\n");
2586
2587 /* the groups */
2588 c = 0;
2589 f = fGlobalForcedActions;
2590 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2591 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2592 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2593 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2594 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2595 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2596 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2597 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2598 if (c)
2599 pHlp->pfnPrintf(pHlp, "\n");
2600
2601 /*
2602 * Per CPU flags.
2603 */
2604 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2605 {
2606 PVMCPU pVCpu = pVM->apCpusR3[i];
2607 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2608 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2609
2610 /* show the flag mnemonics */
2611 c = 0;
2612 f = fLocalForcedActions;
2613 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2614 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2615 PRINT_FLAG(VMCPU_FF_,TIMER);
2616 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2617 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2618 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2619 PRINT_FLAG(VMCPU_FF_,UNHALT);
2620 PRINT_FLAG(VMCPU_FF_,IEM);
2621 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2622 PRINT_FLAG(VMCPU_FF_,DBGF);
2623 PRINT_FLAG(VMCPU_FF_,REQUEST);
2624 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2625 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2626 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2627 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2628 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2629 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2630 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2631 PRINT_FLAG(VMCPU_FF_,TO_R3);
2632 PRINT_FLAG(VMCPU_FF_,IOM);
2633 if (f)
2634 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2635 else
2636 pHlp->pfnPrintf(pHlp, "\n");
2637
2638 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2639 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2640
2641 /* the groups */
2642 c = 0;
2643 f = fLocalForcedActions;
2644 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2645 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2646 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2647 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2648 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2649 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2650 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2651 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2652 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2653 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2654 if (c)
2655 pHlp->pfnPrintf(pHlp, "\n");
2656 }
2657
2658#undef PRINT_FLAG
2659#undef PRINT_GROUP
2660}
2661
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