VMM.cpp@ 80161

Last change on this file since 80161 was 80074, checked in by vboxsync, 5 years ago
VMM,Main,++: Retired the unfinished FTM component.
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1	/* $Id: VMM.cpp 80074 2019-07-31 14:18:34Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_pdm
41	* - @subpage pg_pgm
42	* - @subpage pg_rem
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#ifdef VBOX_WITH_REM
124	# include <VBox/vmm/rem.h>
125	#endif
126	#include <VBox/vmm/ssm.h>
127	#include <VBox/vmm/tm.h>
128	#include "VMMInternal.h"
129	#include <VBox/vmm/vm.h>
130	#include <VBox/vmm/uvm.h>
131
132	#include <VBox/err.h>
133	#include <VBox/param.h>
134	#include <VBox/version.h>
135	#include <VBox/vmm/hm.h>
136	#include <iprt/assert.h>
137	#include <iprt/alloc.h>
138	#include <iprt/asm.h>
139	#include <iprt/time.h>
140	#include <iprt/semaphore.h>
141	#include <iprt/stream.h>
142	#include <iprt/string.h>
143	#include <iprt/stdarg.h>
144	#include <iprt/ctype.h>
145	#include <iprt/x86.h>
146
147
148	/*********************************************************************************************************************************
149	* Defined Constants And Macros *
150	*********************************************************************************************************************************/
151	/** The saved state version. */
152	#define VMM_SAVED_STATE_VERSION 4
153	/** The saved state version used by v3.0 and earlier. (Teleportation) */
154	#define VMM_SAVED_STATE_VERSION_3_0 3
155
156	/** Macro for flushing the ring-0 logging. */
157	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
158	do { \
159	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
160	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
161	{ /* likely? */ } \
162	else \
163	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
164	} while (0)
165
166
167	/*********************************************************************************************************************************
168	* Internal Functions *
169	*********************************************************************************************************************************/
170	static int vmmR3InitStacks(PVM pVM);
171	static int vmmR3InitLoggers(PVM pVM);
172	static void vmmR3InitRegisterStats(PVM pVM);
173	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
174	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
175	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
176	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
177	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
178	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
179	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
180
181
182	/**
183	* Initializes the VMM.
184	*
185	* @returns VBox status code.
186	* @param pVM The cross context VM structure.
187	*/
188	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
189	{
190	LogFlow(("VMMR3Init\n"));
191
192	/*
193	* Assert alignment, sizes and order.
194	*/
195	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
196	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
197
198	/*
199	* Init basic VM VMM members.
200	*/
201	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
202	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
203	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
204	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
205	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
206	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
208	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
209	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
210
211	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
212	* The EMT yield interval. The EMT yielding is a hack we employ to play a
213	* bit nicer with the rest of the system (like for instance the GUI).
214	*/
215	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
216	23 /* Value arrived at after experimenting with the grub boot prompt. */);
217	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
218
219
220	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
221	* Controls whether we employ per-cpu preemption timers to limit the time
222	* spent executing guest code. This option is not available on all
223	* platforms and we will silently ignore this setting then. If we are
224	* running in VT-x mode, we will use the VMX-preemption timer instead of
225	* this one when possible.
226	*/
227	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
228	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
229	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
230
231	/*
232	* Initialize the VMM rendezvous semaphores.
233	*/
234	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
235	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
236	return VERR_NO_MEMORY;
237	for (VMCPUID i = 0; i < pVM->cCpus; i++)
238	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
239	for (VMCPUID i = 0; i < pVM->cCpus; i++)
240	{
241	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
242	AssertRCReturn(rc, rc);
243	}
244	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
245	AssertRCReturn(rc, rc);
246	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
247	AssertRCReturn(rc, rc);
248	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
249	AssertRCReturn(rc, rc);
250	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
251	AssertRCReturn(rc, rc);
252	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
253	AssertRCReturn(rc, rc);
254	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
255	AssertRCReturn(rc, rc);
256	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
257	AssertRCReturn(rc, rc);
258	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
259	AssertRCReturn(rc, rc);
260
261	/*
262	* Register the saved state data unit.
263	*/
264	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
265	NULL, NULL, NULL,
266	NULL, vmmR3Save, NULL,
267	NULL, vmmR3Load, NULL);
268	if (RT_FAILURE(rc))
269	return rc;
270
271	/*
272	* Register the Ring-0 VM handle with the session for fast ioctl calls.
273	*/
274	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
275	if (RT_FAILURE(rc))
276	return rc;
277
278	/*
279	* Init various sub-components.
280	*/
281	rc = vmmR3InitStacks(pVM);
282	if (RT_SUCCESS(rc))
283	{
284	rc = vmmR3InitLoggers(pVM);
285
286	#ifdef VBOX_WITH_NMI
287	/*
288	* Allocate mapping for the host APIC.
289	*/
290	if (RT_SUCCESS(rc))
291	{
292	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
293	AssertRC(rc);
294	}
295	#endif
296	if (RT_SUCCESS(rc))
297	{
298	/*
299	* Debug info and statistics.
300	*/
301	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
302	vmmR3InitRegisterStats(pVM);
303	vmmInitFormatTypes();
304
305	return VINF_SUCCESS;
306	}
307	}
308	/** @todo Need failure cleanup? */
309
310	return rc;
311	}
312
313
314	/**
315	* Allocate & setup the VMM RC stack(s) (for EMTs).
316	*
317	* The stacks are also used for long jumps in Ring-0.
318	*
319	* @returns VBox status code.
320	* @param pVM The cross context VM structure.
321	*
322	* @remarks The optional guard page gets it protection setup up during R3 init
323	* completion because of init order issues.
324	*/
325	static int vmmR3InitStacks(PVM pVM)
326	{
327	int rc = VINF_SUCCESS;
328	#ifdef VMM_R0_SWITCH_STACK
329	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
330	#else
331	uint32_t fFlags = 0;
332	#endif
333
334	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
335	{
336	PVMCPU pVCpu = &pVM->aCpus[idCpu];
337
338	#ifdef VBOX_STRICT_VMM_STACK
339	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
340	#else
341	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
342	#endif
343	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
344	if (RT_SUCCESS(rc))
345	{
346	#ifdef VBOX_STRICT_VMM_STACK
347	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
348	#endif
349	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
350
351	}
352	}
353
354	return rc;
355	}
356
357
358	/**
359	* Initialize the loggers.
360	*
361	* @returns VBox status code.
362	* @param pVM The cross context VM structure.
363	*/
364	static int vmmR3InitLoggers(PVM pVM)
365	{
366	int rc;
367	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
368
369	/*
370	* Allocate R0 Logger instance (finalized in the relocator).
371	*/
372	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
373	PRTLOGGER pLogger = RTLogDefaultInstance();
374	if (pLogger)
375	{
376	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
377	for (VMCPUID i = 0; i < pVM->cCpus; i++)
378	{
379	PVMCPU pVCpu = &pVM->aCpus[i];
380	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
381	(void **)&pVCpu->vmm.s.pR0LoggerR3);
382	if (RT_FAILURE(rc))
383	return rc;
384	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
385	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
386	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
387	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
388	}
389	}
390	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
391
392	/*
393	* Release logging.
394	*/
395	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
396	if (pRelLogger)
397	{
398	/*
399	* Ring-0 release logger.
400	*/
401	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
402	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
403	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
404
405	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
406	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
407	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
408
409	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
410
411	for (VMCPUID i = 0; i < pVM->cCpus; i++)
412	{
413	PVMCPU pVCpu = &pVM->aCpus[i];
414	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
415	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
416	if (RT_FAILURE(rc))
417	return rc;
418	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
419	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
420	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
421	pVmmLogger->pVM = pVM->pVMR0;
422	pVmmLogger->cbLogger = (uint32_t)cbLogger;
423	pVmmLogger->fCreated = false;
424	pVmmLogger->fFlushingDisabled = false;
425	pVmmLogger->fRegistered = false;
426	pVmmLogger->idCpu = i;
427
428	char szR0ThreadName[16];
429	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
430	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
431	pfnLoggerWrapper, pfnLoggerFlush,
432	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
433	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
434
435	/* We only update the release log instance here. */
436	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
437	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
438	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
439
440	pVmmLogger->fCreated = true;
441	}
442	}
443
444	return VINF_SUCCESS;
445	}
446
447
448	/**
449	* VMMR3Init worker that register the statistics with STAM.
450	*
451	* @param pVM The cross context VM structure.
452	*/
453	static void vmmR3InitRegisterStats(PVM pVM)
454	{
455	RT_NOREF_PV(pVM);
456
457	/*
458	* Statistics.
459	*/
460	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
467	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
468	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
469	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
522	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
523	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
524
525	#ifdef VBOX_WITH_STATISTICS
526	for (VMCPUID i = 0; i < pVM->cCpus; i++)
527	{
528	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
529	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
530	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
531	}
532	#endif
533	for (VMCPUID i = 0; i < pVM->cCpus; i++)
534	{
535	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
536	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
537	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
538	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
539	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
540	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
541	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
542	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
543	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
544	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
545	}
546	}
547
548
549	/**
550	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
551	*
552	* @returns VBox status code.
553	* @param pVM The cross context VM structure.
554	* @param pVCpu The cross context per CPU structure.
555	* @thread EMT(pVCpu)
556	*/
557	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
558	{
559	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
560	}
561
562
563	/**
564	* Initializes the R0 VMM.
565	*
566	* @returns VBox status code.
567	* @param pVM The cross context VM structure.
568	*/
569	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
570	{
571	int rc;
572	PVMCPU pVCpu = VMMGetCpu(pVM);
573	Assert(pVCpu && pVCpu->idCpu == 0);
574
575	#ifdef LOG_ENABLED
576	/*
577	* Initialize the ring-0 logger if we haven't done so yet.
578	*/
579	if ( pVCpu->vmm.s.pR0LoggerR3
580	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
581	{
582	rc = VMMR3UpdateLoggers(pVM);
583	if (RT_FAILURE(rc))
584	return rc;
585	}
586	#endif
587
588	/*
589	* Call Ring-0 entry with init code.
590	*/
591	for (;;)
592	{
593	#ifdef NO_SUPCALLR0VMM
594	//rc = VERR_GENERAL_FAILURE;
595	rc = VINF_SUCCESS;
596	#else
597	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
598	#endif
599	/*
600	* Flush the logs.
601	*/
602	#ifdef LOG_ENABLED
603	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
604	#endif
605	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
606	if (rc != VINF_VMM_CALL_HOST)
607	break;
608	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
609	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
610	break;
611	/* Resume R0 */
612	}
613
614	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
615	{
616	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
617	if (RT_SUCCESS(rc))
618	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
619	}
620
621	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
622	if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
623	LogRel(("VMM: Enabled thread-context hooks\n"));
624	else
625	LogRel(("VMM: Thread-context hooks unavailable\n"));
626
627	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
628	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
629	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
630	else
631	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
632	if (pVM->vmm.s.fIsPreemptPossible)
633	LogRel(("VMM: Kernel preemption is possible\n"));
634	else
635	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
636
637	/*
638	* Send all EMTs to ring-0 to get their logger initialized.
639	*/
640	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
641	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
642
643	return rc;
644	}
645
646
647	/**
648	* Called when an init phase completes.
649	*
650	* @returns VBox status code.
651	* @param pVM The cross context VM structure.
652	* @param enmWhat Which init phase.
653	*/
654	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
655	{
656	int rc = VINF_SUCCESS;
657
658	switch (enmWhat)
659	{
660	case VMINITCOMPLETED_RING3:
661	{
662	/*
663	* Create the EMT yield timer.
664	*/
665	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
666	AssertRCReturn(rc, rc);
667
668	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
669	AssertRCReturn(rc, rc);
670	break;
671	}
672
673	case VMINITCOMPLETED_HM:
674	{
675	/*
676	* Disable the periodic preemption timers if we can use the
677	* VMX-preemption timer instead.
678	*/
679	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
680	&& HMR3IsVmxPreemptionTimerUsed(pVM))
681	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
682	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
683
684	/*
685	* Last chance for GIM to update its CPUID leaves if it requires
686	* knowledge/information from HM initialization.
687	*/
688	rc = GIMR3InitCompleted(pVM);
689	AssertRCReturn(rc, rc);
690
691	/*
692	* CPUM's post-initialization (print CPUIDs).
693	*/
694	CPUMR3LogCpuIdAndMsrFeatures(pVM);
695	break;
696	}
697
698	default: /* shuts up gcc */
699	break;
700	}
701
702	return rc;
703	}
704
705
706	/**
707	* Terminate the VMM bits.
708	*
709	* @returns VBox status code.
710	* @param pVM The cross context VM structure.
711	*/
712	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
713	{
714	PVMCPU pVCpu = VMMGetCpu(pVM);
715	Assert(pVCpu && pVCpu->idCpu == 0);
716
717	/*
718	* Call Ring-0 entry with termination code.
719	*/
720	int rc;
721	for (;;)
722	{
723	#ifdef NO_SUPCALLR0VMM
724	//rc = VERR_GENERAL_FAILURE;
725	rc = VINF_SUCCESS;
726	#else
727	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
728	#endif
729	/*
730	* Flush the logs.
731	*/
732	#ifdef LOG_ENABLED
733	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
734	#endif
735	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
736	if (rc != VINF_VMM_CALL_HOST)
737	break;
738	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
739	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
740	break;
741	/* Resume R0 */
742	}
743	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
744	{
745	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
746	if (RT_SUCCESS(rc))
747	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
748	}
749
750	for (VMCPUID i = 0; i < pVM->cCpus; i++)
751	{
752	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
753	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
754	}
755	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
756	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
757	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
758	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
759	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
760	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
761	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
762	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
763	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
764	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
765	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
766	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
767	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
768	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
769	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
770	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
771
772	vmmTermFormatTypes();
773	return rc;
774	}
775
776
777	/**
778	* Applies relocations to data and code managed by this
779	* component. This function will be called at init and
780	* whenever the VMM need to relocate it self inside the GC.
781	*
782	* The VMM will need to apply relocations to the core code.
783	*
784	* @param pVM The cross context VM structure.
785	* @param offDelta The relocation delta.
786	*/
787	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
788	{
789	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
790	RT_NOREF(offDelta);
791
792	/*
793	* Update the logger.
794	*/
795	VMMR3UpdateLoggers(pVM);
796	}
797
798
799	/**
800	* Updates the settings for the RC and R0 loggers.
801	*
802	* @returns VBox status code.
803	* @param pVM The cross context VM structure.
804	*/
805	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
806	{
807	int rc = VINF_SUCCESS;
808
809	#ifdef LOG_ENABLED
810	/*
811	* For the ring-0 EMT logger, we use a per-thread logger instance
812	* in ring-0. Only initialize it once.
813	*/
814	PRTLOGGER const pDefault = RTLogDefaultInstance();
815	for (VMCPUID i = 0; i < pVM->cCpus; i++)
816	{
817	PVMCPU pVCpu = &pVM->aCpus[i];
818	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
819	if (pR0LoggerR3)
820	{
821	if (!pR0LoggerR3->fCreated)
822	{
823	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
824	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
825	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
826
827	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
828	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
829	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
830
831	char szR0ThreadName[16];
832	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
833	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
834	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
835	pfnLoggerWrapper, pfnLoggerFlush,
836	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
837	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
838
839	pR0LoggerR3->idCpu = i;
840	pR0LoggerR3->fCreated = true;
841	pR0LoggerR3->fFlushingDisabled = false;
842	}
843
844	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
845	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
846	AssertRC(rc);
847	}
848	}
849	#else
850	RT_NOREF(pVM);
851	#endif
852
853	return rc;
854	}
855
856
857	/**
858	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
859	*
860	* @returns Pointer to the buffer.
861	* @param pVM The cross context VM structure.
862	*/
863	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
864	{
865	return pVM->vmm.s.szRing0AssertMsg1;
866	}
867
868
869	/**
870	* Returns the VMCPU of the specified virtual CPU.
871	*
872	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
873	*
874	* @param pUVM The user mode VM handle.
875	* @param idCpu The ID of the virtual CPU.
876	*/
877	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
878	{
879	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
880	AssertReturn(idCpu < pUVM->cCpus, NULL);
881	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
882	return &pUVM->pVM->aCpus[idCpu];
883	}
884
885
886	/**
887	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
888	*
889	* @returns Pointer to the buffer.
890	* @param pVM The cross context VM structure.
891	*/
892	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
893	{
894	return pVM->vmm.s.szRing0AssertMsg2;
895	}
896
897
898	/**
899	* Execute state save operation.
900	*
901	* @returns VBox status code.
902	* @param pVM The cross context VM structure.
903	* @param pSSM SSM operation handle.
904	*/
905	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
906	{
907	LogFlow(("vmmR3Save:\n"));
908
909	/*
910	* Save the started/stopped state of all CPUs except 0 as it will always
911	* be running. This avoids breaking the saved state version. :-)
912	*/
913	for (VMCPUID i = 1; i < pVM->cCpus; i++)
914	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
915
916	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
917	}
918
919
920	/**
921	* Execute state load operation.
922	*
923	* @returns VBox status code.
924	* @param pVM The cross context VM structure.
925	* @param pSSM SSM operation handle.
926	* @param uVersion Data layout version.
927	* @param uPass The data pass.
928	*/
929	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
930	{
931	LogFlow(("vmmR3Load:\n"));
932	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
933
934	/*
935	* Validate version.
936	*/
937	if ( uVersion != VMM_SAVED_STATE_VERSION
938	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
939	{
940	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
941	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
942	}
943
944	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
945	{
946	/* Ignore the stack bottom, stack pointer and stack bits. */
947	RTRCPTR RCPtrIgnored;
948	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
949	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
950	#ifdef RT_OS_DARWIN
951	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
952	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
953	&& SSMR3HandleRevision(pSSM) >= 48858
954	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
955	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
956	)
957	SSMR3Skip(pSSM, 16384);
958	else
959	SSMR3Skip(pSSM, 8192);
960	#else
961	SSMR3Skip(pSSM, 8192);
962	#endif
963	}
964
965	/*
966	* Restore the VMCPU states. VCPU 0 is always started.
967	*/
968	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
969	for (VMCPUID i = 1; i < pVM->cCpus; i++)
970	{
971	bool fStarted;
972	int rc = SSMR3GetBool(pSSM, &fStarted);
973	if (RT_FAILURE(rc))
974	return rc;
975	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
976	}
977
978	/* terminator */
979	uint32_t u32;
980	int rc = SSMR3GetU32(pSSM, &u32);
981	if (RT_FAILURE(rc))
982	return rc;
983	if (u32 != UINT32_MAX)
984	{
985	AssertMsgFailed(("u32=%#x\n", u32));
986	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
987	}
988	return VINF_SUCCESS;
989	}
990
991
992	/**
993	* Suspends the CPU yielder.
994	*
995	* @param pVM The cross context VM structure.
996	*/
997	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
998	{
999	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1000	if (!pVM->vmm.s.cYieldResumeMillies)
1001	{
1002	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1003	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1004	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1005	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1006	else
1007	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1008	TMTimerStop(pVM->vmm.s.pYieldTimer);
1009	}
1010	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1011	}
1012
1013
1014	/**
1015	* Stops the CPU yielder.
1016	*
1017	* @param pVM The cross context VM structure.
1018	*/
1019	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1020	{
1021	if (!pVM->vmm.s.cYieldResumeMillies)
1022	TMTimerStop(pVM->vmm.s.pYieldTimer);
1023	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1024	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1025	}
1026
1027
1028	/**
1029	* Resumes the CPU yielder when it has been a suspended or stopped.
1030	*
1031	* @param pVM The cross context VM structure.
1032	*/
1033	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1034	{
1035	if (pVM->vmm.s.cYieldResumeMillies)
1036	{
1037	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1038	pVM->vmm.s.cYieldResumeMillies = 0;
1039	}
1040	}
1041
1042
1043	/**
1044	* Internal timer callback function.
1045	*
1046	* @param pVM The cross context VM structure.
1047	* @param pTimer The timer handle.
1048	* @param pvUser User argument specified upon timer creation.
1049	*/
1050	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1051	{
1052	NOREF(pvUser);
1053
1054	/*
1055	* This really needs some careful tuning. While we shouldn't be too greedy since
1056	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1057	* because that'll cause us to stop up.
1058	*
1059	* The current logic is to use the default interval when there is no lag worth
1060	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1061	*
1062	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1063	* so the lag is up to date.)
1064	*/
1065	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1066	if ( u64Lag < 50000000 /* 50ms */
1067	\|\| ( u64Lag < 1000000000 /* 1s */
1068	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1069	)
1070	{
1071	uint64_t u64Elapsed = RTTimeNanoTS();
1072	pVM->vmm.s.u64LastYield = u64Elapsed;
1073
1074	RTThreadYield();
1075
1076	#ifdef LOG_ENABLED
1077	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1078	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1079	#endif
1080	}
1081	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1082	}
1083
1084
1085	/**
1086	* Executes guest code (Intel VT-x and AMD-V).
1087	*
1088	* @param pVM The cross context VM structure.
1089	* @param pVCpu The cross context virtual CPU structure.
1090	*/
1091	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1092	{
1093	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1094
1095	for (;;)
1096	{
1097	int rc;
1098	do
1099	{
1100	#ifdef NO_SUPCALLR0VMM
1101	rc = VERR_GENERAL_FAILURE;
1102	#else
1103	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1104	if (RT_LIKELY(rc == VINF_SUCCESS))
1105	rc = pVCpu->vmm.s.iLastGZRc;
1106	#endif
1107	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1108
1109	#if 0 /** @todo triggers too often */
1110	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1111	#endif
1112
1113	/*
1114	* Flush the logs
1115	*/
1116	#ifdef LOG_ENABLED
1117	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1118	#endif
1119	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1120	if (rc != VINF_VMM_CALL_HOST)
1121	{
1122	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1123	return rc;
1124	}
1125	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1126	if (RT_FAILURE(rc))
1127	return rc;
1128	/* Resume R0 */
1129	}
1130	}
1131
1132
1133	/**
1134	* Perform one of the fast I/O control VMMR0 operation.
1135	*
1136	* @returns VBox strict status code.
1137	* @param pVM The cross context VM structure.
1138	* @param pVCpu The cross context virtual CPU structure.
1139	* @param enmOperation The operation to perform.
1140	*/
1141	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1142	{
1143	for (;;)
1144	{
1145	VBOXSTRICTRC rcStrict;
1146	do
1147	{
1148	#ifdef NO_SUPCALLR0VMM
1149	rcStrict = VERR_GENERAL_FAILURE;
1150	#else
1151	rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1152	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1153	rcStrict = pVCpu->vmm.s.iLastGZRc;
1154	#endif
1155	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1156
1157	/*
1158	* Flush the logs
1159	*/
1160	#ifdef LOG_ENABLED
1161	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1162	#endif
1163	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1164	if (rcStrict != VINF_VMM_CALL_HOST)
1165	return rcStrict;
1166	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1167	if (RT_FAILURE(rc))
1168	return rc;
1169	/* Resume R0 */
1170	}
1171	}
1172
1173
1174	/**
1175	* VCPU worker for VMMR3SendStartupIpi.
1176	*
1177	* @param pVM The cross context VM structure.
1178	* @param idCpu Virtual CPU to perform SIPI on.
1179	* @param uVector The SIPI vector.
1180	*/
1181	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1182	{
1183	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1184	VMCPU_ASSERT_EMT(pVCpu);
1185
1186	/*
1187	* In the INIT state, the target CPU is only responsive to an SIPI.
1188	* This is also true for when when the CPU is in VMX non-root mode.
1189	*
1190	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1191	* See Intel spec. 26.6.2 "Activity State".
1192	*/
1193	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1194	return VINF_SUCCESS;
1195
1196	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1197	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1198	if (CPUMIsGuestInVmxRootMode(pCtx))
1199	{
1200	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1201	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1202	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1203
1204	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1205	return VINF_SUCCESS;
1206	}
1207	#endif
1208
1209	pCtx->cs.Sel = uVector << 8;
1210	pCtx->cs.ValidSel = uVector << 8;
1211	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1212	pCtx->cs.u64Base = uVector << 12;
1213	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1214	pCtx->rip = 0;
1215
1216	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1217
1218	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1219	EMSetState(pVCpu, EMSTATE_HALTED);
1220	return VINF_EM_RESCHEDULE;
1221	# else /* And if we go the VMCPU::enmState way it can stay here. */
1222	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1223	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1224	return VINF_SUCCESS;
1225	# endif
1226	}
1227
1228
1229	/**
1230	* VCPU worker for VMMR3SendInitIpi.
1231	*
1232	* @returns VBox status code.
1233	* @param pVM The cross context VM structure.
1234	* @param idCpu Virtual CPU to perform SIPI on.
1235	*/
1236	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1237	{
1238	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1239	VMCPU_ASSERT_EMT(pVCpu);
1240
1241	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1242
1243	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1244	* wait-for-SIPI state. Verify. */
1245
1246	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1247	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1248	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1249	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1250	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1251	#endif
1252
1253	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1254	* IPI (e.g. SVM_EXIT_INIT). */
1255
1256	PGMR3ResetCpu(pVM, pVCpu);
1257	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1258	APICR3InitIpi(pVCpu);
1259	TRPMR3ResetCpu(pVCpu);
1260	CPUMR3ResetCpu(pVM, pVCpu);
1261	EMR3ResetCpu(pVCpu);
1262	HMR3ResetCpu(pVCpu);
1263	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1264
1265	/* This will trickle up on the target EMT. */
1266	return VINF_EM_WAIT_SIPI;
1267	}
1268
1269
1270	/**
1271	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1272	* vector-dependent state and unhalting processor.
1273	*
1274	* @param pVM The cross context VM structure.
1275	* @param idCpu Virtual CPU to perform SIPI on.
1276	* @param uVector SIPI vector.
1277	*/
1278	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1279	{
1280	AssertReturnVoid(idCpu < pVM->cCpus);
1281
1282	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1283	AssertRC(rc);
1284	}
1285
1286
1287	/**
1288	* Sends init IPI to the virtual CPU.
1289	*
1290	* @param pVM The cross context VM structure.
1291	* @param idCpu Virtual CPU to perform int IPI on.
1292	*/
1293	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1294	{
1295	AssertReturnVoid(idCpu < pVM->cCpus);
1296
1297	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1298	AssertRC(rc);
1299	}
1300
1301
1302	/**
1303	* Registers the guest memory range that can be used for patching.
1304	*
1305	* @returns VBox status code.
1306	* @param pVM The cross context VM structure.
1307	* @param pPatchMem Patch memory range.
1308	* @param cbPatchMem Size of the memory range.
1309	*/
1310	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1311	{
1312	VM_ASSERT_EMT(pVM);
1313	if (HMIsEnabled(pVM))
1314	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1315
1316	return VERR_NOT_SUPPORTED;
1317	}
1318
1319
1320	/**
1321	* Deregisters the guest memory range that can be used for patching.
1322	*
1323	* @returns VBox status code.
1324	* @param pVM The cross context VM structure.
1325	* @param pPatchMem Patch memory range.
1326	* @param cbPatchMem Size of the memory range.
1327	*/
1328	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1329	{
1330	if (HMIsEnabled(pVM))
1331	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1332
1333	return VINF_SUCCESS;
1334	}
1335
1336
1337	/**
1338	* Common recursion handler for the other EMTs.
1339	*
1340	* @returns Strict VBox status code.
1341	* @param pVM The cross context VM structure.
1342	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1343	* @param rcStrict Current status code to be combined with the one
1344	* from this recursion and returned.
1345	*/
1346	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1347	{
1348	int rc2;
1349
1350	/*
1351	* We wait here while the initiator of this recursion reconfigures
1352	* everything. The last EMT to get in signals the initiator.
1353	*/
1354	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1355	{
1356	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1357	AssertLogRelRC(rc2);
1358	}
1359
1360	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1361	AssertLogRelRC(rc2);
1362
1363	/*
1364	* Do the normal rendezvous processing.
1365	*/
1366	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1367	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1368
1369	/*
1370	* Wait for the initiator to restore everything.
1371	*/
1372	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1373	AssertLogRelRC(rc2);
1374
1375	/*
1376	* Last thread out of here signals the initiator.
1377	*/
1378	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1379	{
1380	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1381	AssertLogRelRC(rc2);
1382	}
1383
1384	/*
1385	* Merge status codes and return.
1386	*/
1387	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1388	if ( rcStrict2 != VINF_SUCCESS
1389	&& ( rcStrict == VINF_SUCCESS
1390	\|\| rcStrict > rcStrict2))
1391	rcStrict = rcStrict2;
1392	return rcStrict;
1393	}
1394
1395
1396	/**
1397	* Count returns and have the last non-caller EMT wake up the caller.
1398	*
1399	* @returns VBox strict informational status code for EM scheduling. No failures
1400	* will be returned here, those are for the caller only.
1401	*
1402	* @param pVM The cross context VM structure.
1403	* @param rcStrict The current accumulated recursive status code,
1404	* to be merged with i32RendezvousStatus and
1405	* returned.
1406	*/
1407	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1408	{
1409	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1410
1411	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1412	if (cReturned == pVM->cCpus - 1U)
1413	{
1414	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1415	AssertLogRelRC(rc);
1416	}
1417
1418	/*
1419	* Merge the status codes, ignoring error statuses in this code path.
1420	*/
1421	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1422	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1423	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1424	VERR_IPE_UNEXPECTED_INFO_STATUS);
1425
1426	if (RT_SUCCESS(rcStrict2))
1427	{
1428	if ( rcStrict2 != VINF_SUCCESS
1429	&& ( rcStrict == VINF_SUCCESS
1430	\|\| rcStrict > rcStrict2))
1431	rcStrict = rcStrict2;
1432	}
1433	return rcStrict;
1434	}
1435
1436
1437	/**
1438	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1439	*
1440	* @returns VBox strict informational status code for EM scheduling. No failures
1441	* will be returned here, those are for the caller only. When
1442	* fIsCaller is set, VINF_SUCCESS is always returned.
1443	*
1444	* @param pVM The cross context VM structure.
1445	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1446	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1447	* not.
1448	* @param fFlags The flags.
1449	* @param pfnRendezvous The callback.
1450	* @param pvUser The user argument for the callback.
1451	*/
1452	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1453	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1454	{
1455	int rc;
1456	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1457
1458	/*
1459	* Enter, the last EMT triggers the next callback phase.
1460	*/
1461	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1462	if (cEntered != pVM->cCpus)
1463	{
1464	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1465	{
1466	/* Wait for our turn. */
1467	for (;;)
1468	{
1469	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1470	AssertLogRelRC(rc);
1471	if (!pVM->vmm.s.fRendezvousRecursion)
1472	break;
1473	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1474	}
1475	}
1476	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1477	{
1478	/* Wait for the last EMT to arrive and wake everyone up. */
1479	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1480	AssertLogRelRC(rc);
1481	Assert(!pVM->vmm.s.fRendezvousRecursion);
1482	}
1483	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1484	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1485	{
1486	/* Wait for our turn. */
1487	for (;;)
1488	{
1489	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1490	AssertLogRelRC(rc);
1491	if (!pVM->vmm.s.fRendezvousRecursion)
1492	break;
1493	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1494	}
1495	}
1496	else
1497	{
1498	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1499
1500	/*
1501	* The execute once is handled specially to optimize the code flow.
1502	*
1503	* The last EMT to arrive will perform the callback and the other
1504	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1505	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1506	* returns, that EMT will initiate the normal return sequence.
1507	*/
1508	if (!fIsCaller)
1509	{
1510	for (;;)
1511	{
1512	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1513	AssertLogRelRC(rc);
1514	if (!pVM->vmm.s.fRendezvousRecursion)
1515	break;
1516	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1517	}
1518
1519	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1520	}
1521	return VINF_SUCCESS;
1522	}
1523	}
1524	else
1525	{
1526	/*
1527	* All EMTs are waiting, clear the FF and take action according to the
1528	* execution method.
1529	*/
1530	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1531
1532	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1533	{
1534	/* Wake up everyone. */
1535	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1536	AssertLogRelRC(rc);
1537	}
1538	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1539	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1540	{
1541	/* Figure out who to wake up and wake it up. If it's ourself, then
1542	it's easy otherwise wait for our turn. */
1543	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1544	? 0
1545	: pVM->cCpus - 1U;
1546	if (pVCpu->idCpu != iFirst)
1547	{
1548	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1549	AssertLogRelRC(rc);
1550	for (;;)
1551	{
1552	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1553	AssertLogRelRC(rc);
1554	if (!pVM->vmm.s.fRendezvousRecursion)
1555	break;
1556	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1557	}
1558	}
1559	}
1560	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1561	}
1562
1563
1564	/*
1565	* Do the callback and update the status if necessary.
1566	*/
1567	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1568	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1569	{
1570	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1571	if (rcStrict2 != VINF_SUCCESS)
1572	{
1573	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1574	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1575	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1576	int32_t i32RendezvousStatus;
1577	do
1578	{
1579	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1580	if ( rcStrict2 == i32RendezvousStatus
1581	\|\| RT_FAILURE(i32RendezvousStatus)
1582	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1583	&& rcStrict2 > i32RendezvousStatus))
1584	break;
1585	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1586	}
1587	}
1588
1589	/*
1590	* Increment the done counter and take action depending on whether we're
1591	* the last to finish callback execution.
1592	*/
1593	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1594	if ( cDone != pVM->cCpus
1595	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1596	{
1597	/* Signal the next EMT? */
1598	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1599	{
1600	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1601	AssertLogRelRC(rc);
1602	}
1603	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1604	{
1605	Assert(cDone == pVCpu->idCpu + 1U);
1606	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1607	AssertLogRelRC(rc);
1608	}
1609	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1610	{
1611	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1612	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1613	AssertLogRelRC(rc);
1614	}
1615
1616	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1617	if (!fIsCaller)
1618	{
1619	for (;;)
1620	{
1621	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1622	AssertLogRelRC(rc);
1623	if (!pVM->vmm.s.fRendezvousRecursion)
1624	break;
1625	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1626	}
1627	}
1628	}
1629	else
1630	{
1631	/* Callback execution is all done, tell the rest to return. */
1632	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1633	AssertLogRelRC(rc);
1634	}
1635
1636	if (!fIsCaller)
1637	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1638	return rcStrictRecursion;
1639	}
1640
1641
1642	/**
1643	* Called in response to VM_FF_EMT_RENDEZVOUS.
1644	*
1645	* @returns VBox strict status code - EM scheduling. No errors will be returned
1646	* here, nor will any non-EM scheduling status codes be returned.
1647	*
1648	* @param pVM The cross context VM structure.
1649	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1650	*
1651	* @thread EMT
1652	*/
1653	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1654	{
1655	Assert(!pVCpu->vmm.s.fInRendezvous);
1656	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1657	pVCpu->vmm.s.fInRendezvous = true;
1658	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1659	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1660	pVCpu->vmm.s.fInRendezvous = false;
1661	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1662	return VBOXSTRICTRC_TODO(rcStrict);
1663	}
1664
1665
1666	/**
1667	* Helper for resetting an single wakeup event sempahore.
1668	*
1669	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1670	* @param hEvt The event semaphore to reset.
1671	*/
1672	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1673	{
1674	for (uint32_t cLoops = 0; ; cLoops++)
1675	{
1676	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1677	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1678	return rc;
1679	}
1680	}
1681
1682
1683	/**
1684	* Worker for VMMR3EmtRendezvous that handles recursion.
1685	*
1686	* @returns VBox strict status code. This will be the first error,
1687	* VINF_SUCCESS, or an EM scheduling status code.
1688	*
1689	* @param pVM The cross context VM structure.
1690	* @param pVCpu The cross context virtual CPU structure of the
1691	* calling EMT.
1692	* @param fFlags Flags indicating execution methods. See
1693	* grp_VMMR3EmtRendezvous_fFlags.
1694	* @param pfnRendezvous The callback.
1695	* @param pvUser User argument for the callback.
1696	*
1697	* @thread EMT(pVCpu)
1698	*/
1699	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1700	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1701	{
1702	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1703	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1704	Assert(pVCpu->vmm.s.fInRendezvous);
1705
1706	/*
1707	* Save the current state.
1708	*/
1709	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1710	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1711	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1712	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1713	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1714
1715	/*
1716	* Check preconditions and save the current state.
1717	*/
1718	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1719	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1720	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1721	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1722	VERR_INTERNAL_ERROR);
1723	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1724	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1725
1726	/*
1727	* Reset the recursion prep and pop semaphores.
1728	*/
1729	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1730	AssertLogRelRCReturn(rc, rc);
1731	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1732	AssertLogRelRCReturn(rc, rc);
1733	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1734	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1735	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1736	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1737
1738	/*
1739	* Usher the other thread into the recursion routine.
1740	*/
1741	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1742	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1743
1744	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1745	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1746	while (cLeft-- > 0)
1747	{
1748	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1749	AssertLogRelRC(rc);
1750	}
1751	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1752	{
1753	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1754	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1755	{
1756	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1757	AssertLogRelRC(rc);
1758	}
1759	}
1760	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1761	{
1762	Assert(cLeft == pVCpu->idCpu);
1763	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1764	{
1765	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1766	AssertLogRelRC(rc);
1767	}
1768	}
1769	else
1770	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1771	VERR_INTERNAL_ERROR_4);
1772
1773	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1774	AssertLogRelRC(rc);
1775	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1776	AssertLogRelRC(rc);
1777
1778
1779	/*
1780	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1781	*/
1782	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1783	{
1784	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1785	AssertLogRelRC(rc);
1786	}
1787
1788	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1789
1790	/*
1791	* Clear the slate and setup the new rendezvous.
1792	*/
1793	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1794	{
1795	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1796	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1797	}
1798	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1799	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1800	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1801	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1802
1803	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1804	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1805	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1806	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1807	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1808	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1809	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1810	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1811
1812	/*
1813	* We're ready to go now, do normal rendezvous processing.
1814	*/
1815	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1816	AssertLogRelRC(rc);
1817
1818	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1819
1820	/*
1821	* The caller waits for the other EMTs to be done, return and waiting on the
1822	* pop semaphore.
1823	*/
1824	for (;;)
1825	{
1826	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1827	AssertLogRelRC(rc);
1828	if (!pVM->vmm.s.fRendezvousRecursion)
1829	break;
1830	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1831	}
1832
1833	/*
1834	* Get the return code and merge it with the above recursion status.
1835	*/
1836	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1837	if ( rcStrict2 != VINF_SUCCESS
1838	&& ( rcStrict == VINF_SUCCESS
1839	\|\| rcStrict > rcStrict2))
1840	rcStrict = rcStrict2;
1841
1842	/*
1843	* Restore the parent rendezvous state.
1844	*/
1845	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1846	{
1847	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1848	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1849	}
1850	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1851	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1852	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1853	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1854
1855	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1856	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1857	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1858	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1859	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1860	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1861	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1862
1863	/*
1864	* Usher the other EMTs back to their parent recursion routine, waiting
1865	* for them to all get there before we return (makes sure they've been
1866	* scheduled and are past the pop event sem, see below).
1867	*/
1868	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1869	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1870	AssertLogRelRC(rc);
1871
1872	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1873	{
1874	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1875	AssertLogRelRC(rc);
1876	}
1877
1878	/*
1879	* We must reset the pop semaphore on the way out (doing the pop caller too,
1880	* just in case). The parent may be another recursion.
1881	*/
1882	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1883	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1884
1885	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1886
1887	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1888	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1889	return rcStrict;
1890	}
1891
1892
1893	/**
1894	* EMT rendezvous.
1895	*
1896	* Gathers all the EMTs and execute some code on each of them, either in a one
1897	* by one fashion or all at once.
1898	*
1899	* @returns VBox strict status code. This will be the first error,
1900	* VINF_SUCCESS, or an EM scheduling status code.
1901	*
1902	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1903	* doesn't support it or if the recursion is too deep.
1904	*
1905	* @param pVM The cross context VM structure.
1906	* @param fFlags Flags indicating execution methods. See
1907	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1908	* descending and ascending rendezvous types support
1909	* recursion from inside @a pfnRendezvous.
1910	* @param pfnRendezvous The callback.
1911	* @param pvUser User argument for the callback.
1912	*
1913	* @thread Any.
1914	*/
1915	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1916	{
1917	/*
1918	* Validate input.
1919	*/
1920	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1921	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1922	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1923	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1924	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1925	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1926	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1927	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1928
1929	VBOXSTRICTRC rcStrict;
1930	PVMCPU pVCpu = VMMGetCpu(pVM);
1931	if (!pVCpu)
1932	{
1933	/*
1934	* Forward the request to an EMT thread.
1935	*/
1936	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1937	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1938	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1939	else
1940	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1941	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1942	}
1943	else if ( pVM->cCpus == 1
1944	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
1945	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1946	{
1947	/*
1948	* Shortcut for the single EMT case.
1949	*
1950	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1951	* during vmR3Destroy after other emulation threads have started terminating.
1952	*/
1953	if (!pVCpu->vmm.s.fInRendezvous)
1954	{
1955	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1956	pVCpu->vmm.s.fInRendezvous = true;
1957	pVM->vmm.s.fRendezvousFlags = fFlags;
1958	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1959	pVCpu->vmm.s.fInRendezvous = false;
1960	}
1961	else
1962	{
1963	/* Recursion. Do the same checks as in the SMP case. */
1964	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1965	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1966	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1967	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1968	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1969	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1970	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1971	, VERR_DEADLOCK);
1972
1973	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1974	pVM->vmm.s.cRendezvousRecursions++;
1975	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1976	pVM->vmm.s.fRendezvousFlags = fFlags;
1977
1978	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1979
1980	pVM->vmm.s.fRendezvousFlags = fParentFlags;
1981	pVM->vmm.s.cRendezvousRecursions--;
1982	}
1983	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1984	}
1985	else
1986	{
1987	/*
1988	* Spin lock. If busy, check for recursion, if not recursing wait for
1989	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1990	*/
1991	int rc;
1992	rcStrict = VINF_SUCCESS;
1993	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1994	{
1995	/* Allow recursion in some cases. */
1996	if ( pVCpu->vmm.s.fInRendezvous
1997	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1998	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1999	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2000	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2001	))
2002	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2003
2004	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2005	VERR_DEADLOCK);
2006
2007	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2008	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2009	{
2010	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2011	{
2012	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2013	if ( rc != VINF_SUCCESS
2014	&& ( rcStrict == VINF_SUCCESS
2015	\|\| rcStrict > rc))
2016	rcStrict = rc;
2017	/** @todo Perhaps deal with termination here? */
2018	}
2019	ASMNopPause();
2020	}
2021	}
2022
2023	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2024	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2025	Assert(!pVCpu->vmm.s.fInRendezvous);
2026	pVCpu->vmm.s.fInRendezvous = true;
2027
2028	/*
2029	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2030	*/
2031	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2032	{
2033	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2034	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2035	}
2036	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2037	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2038	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2039	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2040	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2041	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2042	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2043	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2044	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2045	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2046	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2047
2048	/*
2049	* Set the FF and poke the other EMTs.
2050	*/
2051	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2052	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2053
2054	/*
2055	* Do the same ourselves.
2056	*/
2057	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2058
2059	/*
2060	* The caller waits for the other EMTs to be done and return before doing
2061	* the cleanup. This makes away with wakeup / reset races we would otherwise
2062	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2063	*/
2064	for (;;)
2065	{
2066	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2067	AssertLogRelRC(rc);
2068	if (!pVM->vmm.s.fRendezvousRecursion)
2069	break;
2070	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2071	}
2072
2073	/*
2074	* Get the return code and clean up a little bit.
2075	*/
2076	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2077	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2078
2079	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2080	pVCpu->vmm.s.fInRendezvous = false;
2081
2082	/*
2083	* Merge rcStrict, rcStrict2 and rcStrict3.
2084	*/
2085	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2086	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2087	if ( rcStrict2 != VINF_SUCCESS
2088	&& ( rcStrict == VINF_SUCCESS
2089	\|\| rcStrict > rcStrict2))
2090	rcStrict = rcStrict2;
2091	if ( rcStrict3 != VINF_SUCCESS
2092	&& ( rcStrict == VINF_SUCCESS
2093	\|\| rcStrict > rcStrict3))
2094	rcStrict = rcStrict3;
2095	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2096	}
2097
2098	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2099	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2100	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2101	VERR_IPE_UNEXPECTED_INFO_STATUS);
2102	return VBOXSTRICTRC_VAL(rcStrict);
2103	}
2104
2105
2106	/**
2107	* Interface for vmR3SetHaltMethodU.
2108	*
2109	* @param pVCpu The cross context virtual CPU structure of the
2110	* calling EMT.
2111	* @param fMayHaltInRing0 The new state.
2112	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2113	* @thread EMT(pVCpu)
2114	*
2115	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2116	* component.
2117	*/
2118	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2119	{
2120	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2121	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2122	}
2123
2124
2125	/**
2126	* Read from the ring 0 jump buffer stack.
2127	*
2128	* @returns VBox status code.
2129	*
2130	* @param pVM The cross context VM structure.
2131	* @param idCpu The ID of the source CPU context (for the address).
2132	* @param R0Addr Where to start reading.
2133	* @param pvBuf Where to store the data we've read.
2134	* @param cbRead The number of bytes to read.
2135	*/
2136	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2137	{
2138	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2139	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2140	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2141
2142	int rc;
2143	#ifdef VMM_R0_SWITCH_STACK
2144	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2145	#else
2146	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2147	#endif
2148	if ( off < VMM_STACK_SIZE
2149	&& off + cbRead <= VMM_STACK_SIZE)
2150	{
2151	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2152	rc = VINF_SUCCESS;
2153	}
2154	else
2155	rc = VERR_INVALID_POINTER;
2156
2157	/* Supply the setjmp return RIP/EIP. */
2158	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2159	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2160	{
2161	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2162	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2163	size_t offDst = 0;
2164	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2165	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2166	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2167	{
2168	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2169	Assert(offSrc < cbSrc);
2170	pbSrc -= offSrc;
2171	cbSrc -= offSrc;
2172	}
2173	if (cbSrc > cbRead - offDst)
2174	cbSrc = cbRead - offDst;
2175	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2176
2177	if (cbSrc == cbRead)
2178	rc = VINF_SUCCESS;
2179	}
2180
2181	return rc;
2182	}
2183
2184
2185	/**
2186	* Used by the DBGF stack unwinder to initialize the register state.
2187	*
2188	* @param pUVM The user mode VM handle.
2189	* @param idCpu The ID of the CPU being unwound.
2190	* @param pState The unwind state to initialize.
2191	*/
2192	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2193	{
2194	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2195	AssertReturnVoid(pVCpu);
2196
2197	/*
2198	* Locate the resume point on the stack.
2199	*/
2200	#ifdef VMM_R0_SWITCH_STACK
2201	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2202	AssertReturnVoid(off < VMM_STACK_SIZE);
2203	#else
2204	uintptr_t off = 0;
2205	#endif
2206
2207	#ifdef RT_ARCH_AMD64
2208	/*
2209	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2210	*/
2211	# ifdef VBOX_STRICT
2212	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2213	off += 8; /* RESUME_MAGIC */
2214	# endif
2215	# ifdef RT_OS_WINDOWS
2216	off += 0xa0; /* XMM6 thru XMM15 */
2217	# endif
2218	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2219	off += 8;
2220	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2221	off += 8;
2222	# ifdef RT_OS_WINDOWS
2223	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2224	off += 8;
2225	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2226	off += 8;
2227	# endif
2228	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2229	off += 8;
2230	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2231	off += 8;
2232	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2233	off += 8;
2234	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2235	off += 8;
2236	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2237	off += 8;
2238	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2239	off += 8;
2240
2241	#elif defined(RT_ARCH_X86)
2242	/*
2243	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2244	*/
2245	# ifdef VBOX_STRICT
2246	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2247	off += 4; /* RESUME_MAGIC */
2248	# endif
2249	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2250	off += 4;
2251	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2252	off += 4;
2253	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2254	off += 4;
2255	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2256	off += 4;
2257	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2258	off += 4;
2259	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2260	off += 4;
2261	#else
2262	# error "Port me"
2263	#endif
2264
2265	/*
2266	* This is all we really need here, though the above helps if the assembly
2267	* doesn't contain unwind info (currently only on win/64, so that is useful).
2268	*/
2269	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2270	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2271	}
2272
2273
2274	/**
2275	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2276	*
2277	* @returns VBox status code.
2278	* @param pVM The cross context VM structure.
2279	* @param uOperation Operation to execute.
2280	* @param u64Arg Constant argument.
2281	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2282	* details.
2283	*/
2284	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2285	{
2286	PVMCPU pVCpu = VMMGetCpu(pVM);
2287	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2288	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2289	}
2290
2291
2292	/**
2293	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2294	*
2295	* @returns VBox status code.
2296	* @param pVM The cross context VM structure.
2297	* @param pVCpu The cross context VM structure.
2298	* @param enmOperation Operation to execute.
2299	* @param u64Arg Constant argument.
2300	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2301	* details.
2302	*/
2303	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2304	{
2305	int rc;
2306	for (;;)
2307	{
2308	#ifdef NO_SUPCALLR0VMM
2309	rc = VERR_GENERAL_FAILURE;
2310	#else
2311	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2312	#endif
2313	/*
2314	* Flush the logs.
2315	*/
2316	#ifdef LOG_ENABLED
2317	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2318	#endif
2319	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2320	if (rc != VINF_VMM_CALL_HOST)
2321	break;
2322	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2323	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2324	break;
2325	/* Resume R0 */
2326	}
2327
2328	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2329	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2330	VERR_IPE_UNEXPECTED_INFO_STATUS);
2331	return rc;
2332	}
2333
2334
2335	/**
2336	* Service a call to the ring-3 host code.
2337	*
2338	* @returns VBox status code.
2339	* @param pVM The cross context VM structure.
2340	* @param pVCpu The cross context virtual CPU structure.
2341	* @remarks Careful with critsects.
2342	*/
2343	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2344	{
2345	/*
2346	* We must also check for pending critsect exits or else we can deadlock
2347	* when entering other critsects here.
2348	*/
2349	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2350	PDMCritSectBothFF(pVCpu);
2351
2352	switch (pVCpu->vmm.s.enmCallRing3Operation)
2353	{
2354	/*
2355	* Acquire a critical section.
2356	*/
2357	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2358	{
2359	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2360	true /fCallRing3/);
2361	break;
2362	}
2363
2364	/*
2365	* Enter a r/w critical section exclusively.
2366	*/
2367	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2368	{
2369	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2370	true /fCallRing3/);
2371	break;
2372	}
2373
2374	/*
2375	* Enter a r/w critical section shared.
2376	*/
2377	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2378	{
2379	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2380	true /fCallRing3/);
2381	break;
2382	}
2383
2384	/*
2385	* Acquire the PDM lock.
2386	*/
2387	case VMMCALLRING3_PDM_LOCK:
2388	{
2389	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2390	break;
2391	}
2392
2393	/*
2394	* Grow the PGM pool.
2395	*/
2396	case VMMCALLRING3_PGM_POOL_GROW:
2397	{
2398	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2399	break;
2400	}
2401
2402	/*
2403	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2404	*/
2405	case VMMCALLRING3_PGM_MAP_CHUNK:
2406	{
2407	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2408	break;
2409	}
2410
2411	/*
2412	* Allocates more handy pages.
2413	*/
2414	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2415	{
2416	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2417	break;
2418	}
2419
2420	/*
2421	* Allocates a large page.
2422	*/
2423	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2424	{
2425	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2426	break;
2427	}
2428
2429	/*
2430	* Acquire the PGM lock.
2431	*/
2432	case VMMCALLRING3_PGM_LOCK:
2433	{
2434	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2435	break;
2436	}
2437
2438	/*
2439	* Acquire the MM hypervisor heap lock.
2440	*/
2441	case VMMCALLRING3_MMHYPER_LOCK:
2442	{
2443	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2444	break;
2445	}
2446
2447	#ifdef VBOX_WITH_REM
2448	/*
2449	* Flush REM handler notifications.
2450	*/
2451	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2452	{
2453	REMR3ReplayHandlerNotifications(pVM);
2454	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2455	break;
2456	}
2457	#endif
2458
2459	/*
2460	* This is a noop. We just take this route to avoid unnecessary
2461	* tests in the loops.
2462	*/
2463	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2464	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2465	LogAlways(("FLUSH\n"));
2466	break;
2467
2468	/*
2469	* Set the VM error message.
2470	*/
2471	case VMMCALLRING3_VM_SET_ERROR:
2472	VMR3SetErrorWorker(pVM);
2473	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2474	break;
2475
2476	/*
2477	* Set the VM runtime error message.
2478	*/
2479	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2480	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2481	break;
2482
2483	/*
2484	* Signal a ring 0 hypervisor assertion.
2485	* Cancel the longjmp operation that's in progress.
2486	*/
2487	case VMMCALLRING3_VM_R0_ASSERTION:
2488	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2489	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2490	#ifdef RT_ARCH_X86
2491	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2492	#else
2493	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2494	#endif
2495	#ifdef VMM_R0_SWITCH_STACK
2496	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2497	#endif
2498	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2499	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2500	return VERR_VMM_RING0_ASSERTION;
2501
2502	/*
2503	* A forced switch to ring 0 for preemption purposes.
2504	*/
2505	case VMMCALLRING3_VM_R0_PREEMPT:
2506	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2507	break;
2508
2509	default:
2510	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2511	return VERR_VMM_UNKNOWN_RING3_CALL;
2512	}
2513
2514	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2515	return VINF_SUCCESS;
2516	}
2517
2518
2519	/**
2520	* Displays the Force action Flags.
2521	*
2522	* @param pVM The cross context VM structure.
2523	* @param pHlp The output helpers.
2524	* @param pszArgs The additional arguments (ignored).
2525	*/
2526	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2527	{
2528	int c;
2529	uint32_t f;
2530	NOREF(pszArgs);
2531
2532	#define PRINT_FLAG(prf,flag) do { \
2533	if (f & (prf##flag)) \
2534	{ \
2535	static const char *s_psz = #flag; \
2536	if (!(c % 6)) \
2537	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2538	else \
2539	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2540	c++; \
2541	f &= ~(prf##flag); \
2542	} \
2543	} while (0)
2544
2545	#define PRINT_GROUP(prf,grp,sfx) do { \
2546	if (f & (prf##grp##sfx)) \
2547	{ \
2548	static const char *s_psz = #grp; \
2549	if (!(c % 5)) \
2550	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2551	else \
2552	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2553	c++; \
2554	} \
2555	} while (0)
2556
2557	/*
2558	* The global flags.
2559	*/
2560	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2561	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2562
2563	/* show the flag mnemonics */
2564	c = 0;
2565	f = fGlobalForcedActions;
2566	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2567	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2568	PRINT_FLAG(VM_FF_,PDM_DMA);
2569	PRINT_FLAG(VM_FF_,DBGF);
2570	PRINT_FLAG(VM_FF_,REQUEST);
2571	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2572	PRINT_FLAG(VM_FF_,RESET);
2573	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2574	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2575	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2576	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2577	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2578	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2579	if (f)
2580	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2581	else
2582	pHlp->pfnPrintf(pHlp, "\n");
2583
2584	/* the groups */
2585	c = 0;
2586	f = fGlobalForcedActions;
2587	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2588	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2589	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2590	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2591	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2592	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2593	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2594	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2595	if (c)
2596	pHlp->pfnPrintf(pHlp, "\n");
2597
2598	/*
2599	* Per CPU flags.
2600	*/
2601	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2602	{
2603	const uint64_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2604	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2605
2606	/* show the flag mnemonics */
2607	c = 0;
2608	f = fLocalForcedActions;
2609	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2610	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2611	PRINT_FLAG(VMCPU_FF_,TIMER);
2612	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2613	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2614	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2615	PRINT_FLAG(VMCPU_FF_,UNHALT);
2616	PRINT_FLAG(VMCPU_FF_,IEM);
2617	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2618	PRINT_FLAG(VMCPU_FF_,DBGF);
2619	PRINT_FLAG(VMCPU_FF_,REQUEST);
2620	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2621	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2622	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2623	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2624	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2625	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2626	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2627	PRINT_FLAG(VMCPU_FF_,TO_R3);
2628	PRINT_FLAG(VMCPU_FF_,IOM);
2629	if (f)
2630	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2631	else
2632	pHlp->pfnPrintf(pHlp, "\n");
2633
2634	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2635	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2636
2637	/* the groups */
2638	c = 0;
2639	f = fLocalForcedActions;
2640	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2641	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2642	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2643	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2644	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2645	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2646	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2647	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2648	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2649	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2650	if (c)
2651	pHlp->pfnPrintf(pHlp, "\n");
2652	}
2653
2654	#undef PRINT_FLAG
2655	#undef PRINT_GROUP
2656	}
2657

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 80161

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