VMM.cpp@ 46420

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1	/* $Id: VMM.cpp 46420 2013-06-06 16:27:25Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55	* can be increased up to 64K - 1.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmcritsectrw.h>
84	#include <VBox/vmm/pdmapi.h>
85	#include <VBox/vmm/cpum.h>
86	#include <VBox/vmm/mm.h>
87	#include <VBox/vmm/iom.h>
88	#include <VBox/vmm/trpm.h>
89	#include <VBox/vmm/selm.h>
90	#include <VBox/vmm/em.h>
91	#include <VBox/sup.h>
92	#include <VBox/vmm/dbgf.h>
93	#include <VBox/vmm/csam.h>
94	#include <VBox/vmm/patm.h>
95	#ifdef VBOX_WITH_REM
96	# include <VBox/vmm/rem.h>
97	#endif
98	#include <VBox/vmm/ssm.h>
99	#include <VBox/vmm/ftm.h>
100	#include <VBox/vmm/tm.h>
101	#include "VMMInternal.h"
102	#include "VMMSwitcher.h"
103	#include <VBox/vmm/vm.h>
104	#include <VBox/vmm/uvm.h>
105
106	#include <VBox/err.h>
107	#include <VBox/param.h>
108	#include <VBox/version.h>
109	#include <VBox/vmm/hm.h>
110	#include <iprt/assert.h>
111	#include <iprt/alloc.h>
112	#include <iprt/asm.h>
113	#include <iprt/time.h>
114	#include <iprt/semaphore.h>
115	#include <iprt/stream.h>
116	#include <iprt/string.h>
117	#include <iprt/stdarg.h>
118	#include <iprt/ctype.h>
119	#include <iprt/x86.h>
120
121
122
123	/*******************************************************************************
124	* Defined Constants And Macros *
125	*******************************************************************************/
126	/** The saved state version. */
127	#define VMM_SAVED_STATE_VERSION 4
128	/** The saved state version used by v3.0 and earlier. (Teleportation) */
129	#define VMM_SAVED_STATE_VERSION_3_0 3
130
131
132	/*******************************************************************************
133	* Internal Functions *
134	*******************************************************************************/
135	static int vmmR3InitStacks(PVM pVM);
136	static int vmmR3InitLoggers(PVM pVM);
137	static void vmmR3InitRegisterStats(PVM pVM);
138	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
139	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
140	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
141	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
142	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
143
144
145	/**
146	* Initializes the VMM.
147	*
148	* @returns VBox status code.
149	* @param pVM Pointer to the VM.
150	*/
151	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
152	{
153	LogFlow(("VMMR3Init\n"));
154
155	/*
156	* Assert alignment, sizes and order.
157	*/
158	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
159	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
160	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
161
162	/*
163	* Init basic VM VMM members.
164	*/
165	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
166	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
167	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
168	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
169	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
170	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
171
172	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
173	* The EMT yield interval. The EMT yielding is a hack we employ to play a
174	* bit nicer with the rest of the system (like for instance the GUI).
175	*/
176	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
177	23 /* Value arrived at after experimenting with the grub boot prompt. */);
178	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
179
180
181	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
182	* Controls whether we employ per-cpu preemption timers to limit the time
183	* spent executing guest code. This option is not available on all
184	* platforms and we will silently ignore this setting then. If we are
185	* running in VT-x mode, we will use the VMX-preemption timer instead of
186	* this one when possible.
187	*/
188	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
189	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
190	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
191
192	/*
193	* Initialize the VMM rendezvous semaphores.
194	*/
195	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
196	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
197	return VERR_NO_MEMORY;
198	for (VMCPUID i = 0; i < pVM->cCpus; i++)
199	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
200	for (VMCPUID i = 0; i < pVM->cCpus; i++)
201	{
202	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
203	AssertRCReturn(rc, rc);
204	}
205	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
206	AssertRCReturn(rc, rc);
207	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
208	AssertRCReturn(rc, rc);
209	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
210	AssertRCReturn(rc, rc);
211	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
212	AssertRCReturn(rc, rc);
213
214	/*
215	* Register the saved state data unit.
216	*/
217	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
218	NULL, NULL, NULL,
219	NULL, vmmR3Save, NULL,
220	NULL, vmmR3Load, NULL);
221	if (RT_FAILURE(rc))
222	return rc;
223
224	/*
225	* Register the Ring-0 VM handle with the session for fast ioctl calls.
226	*/
227	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
228	if (RT_FAILURE(rc))
229	return rc;
230
231	/*
232	* Init various sub-components.
233	*/
234	rc = vmmR3SwitcherInit(pVM);
235	if (RT_SUCCESS(rc))
236	{
237	rc = vmmR3InitStacks(pVM);
238	if (RT_SUCCESS(rc))
239	{
240	rc = vmmR3InitLoggers(pVM);
241
242	#ifdef VBOX_WITH_NMI
243	/*
244	* Allocate mapping for the host APIC.
245	*/
246	if (RT_SUCCESS(rc))
247	{
248	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
249	AssertRC(rc);
250	}
251	#endif
252	if (RT_SUCCESS(rc))
253	{
254	/*
255	* Debug info and statistics.
256	*/
257	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
258	vmmR3InitRegisterStats(pVM);
259	vmmInitFormatTypes();
260
261	return VINF_SUCCESS;
262	}
263	}
264	/** @todo: Need failure cleanup. */
265
266	//more todo in here?
267	//if (RT_SUCCESS(rc))
268	//{
269	//}
270	//int rc2 = vmmR3TermCoreCode(pVM);
271	//AssertRC(rc2));
272	}
273
274	return rc;
275	}
276
277
278	/**
279	* Allocate & setup the VMM RC stack(s) (for EMTs).
280	*
281	* The stacks are also used for long jumps in Ring-0.
282	*
283	* @returns VBox status code.
284	* @param pVM Pointer to the VM.
285	*
286	* @remarks The optional guard page gets it protection setup up during R3 init
287	* completion because of init order issues.
288	*/
289	static int vmmR3InitStacks(PVM pVM)
290	{
291	int rc = VINF_SUCCESS;
292	#ifdef VMM_R0_SWITCH_STACK
293	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
294	#else
295	uint32_t fFlags = 0;
296	#endif
297
298	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
299	{
300	PVMCPU pVCpu = &pVM->aCpus[idCpu];
301
302	#ifdef VBOX_STRICT_VMM_STACK
303	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
304	#else
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
306	#endif
307	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
308	if (RT_SUCCESS(rc))
309	{
310	#ifdef VBOX_STRICT_VMM_STACK
311	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
312	#endif
313	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
314	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
315	if (!HMIsEnabled(pVM))
316	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
317	else
318	#endif
319	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
320	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
321	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
322	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
323
324	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
325	}
326	}
327
328	return rc;
329	}
330
331
332	/**
333	* Initialize the loggers.
334	*
335	* @returns VBox status code.
336	* @param pVM Pointer to the VM.
337	*/
338	static int vmmR3InitLoggers(PVM pVM)
339	{
340	int rc;
341	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
342
343	/*
344	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
345	*/
346	#ifdef LOG_ENABLED
347	PRTLOGGER pLogger = RTLogDefaultInstance();
348	if (pLogger)
349	{
350	if (!HMIsEnabled(pVM))
351	{
352	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
353	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
354	if (RT_FAILURE(rc))
355	return rc;
356	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
357	}
358
359	# ifdef VBOX_WITH_R0_LOGGING
360	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
361	for (VMCPUID i = 0; i < pVM->cCpus; i++)
362	{
363	PVMCPU pVCpu = &pVM->aCpus[i];
364	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
365	(void **)&pVCpu->vmm.s.pR0LoggerR3);
366	if (RT_FAILURE(rc))
367	return rc;
368	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
369	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
370	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
371	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
372	}
373	# endif
374	}
375	#endif /* LOG_ENABLED */
376
377	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
378	/*
379	* Allocate RC release logger instances (finalized in the relocator).
380	*/
381	if (!HMIsEnabled(pVM))
382	{
383	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
384	if (pRelLogger)
385	{
386	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
387	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
388	if (RT_FAILURE(rc))
389	return rc;
390	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
391	}
392	}
393	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
394	return VINF_SUCCESS;
395	}
396
397
398	/**
399	* VMMR3Init worker that register the statistics with STAM.
400	*
401	* @param pVM The shared VM structure.
402	*/
403	static void vmmR3InitRegisterStats(PVM pVM)
404	{
405	/*
406	* Statistics.
407	*/
408	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
467
468	#ifdef VBOX_WITH_STATISTICS
469	for (VMCPUID i = 0; i < pVM->cCpus; i++)
470	{
471	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
472	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
473	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
474	}
475	#endif
476	}
477
478
479	/**
480	* Initializes the R0 VMM.
481	*
482	* @returns VBox status code.
483	* @param pVM Pointer to the VM.
484	*/
485	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
486	{
487	int rc;
488	PVMCPU pVCpu = VMMGetCpu(pVM);
489	Assert(pVCpu && pVCpu->idCpu == 0);
490
491	#ifdef LOG_ENABLED
492	/*
493	* Initialize the ring-0 logger if we haven't done so yet.
494	*/
495	if ( pVCpu->vmm.s.pR0LoggerR3
496	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
497	{
498	rc = VMMR3UpdateLoggers(pVM);
499	if (RT_FAILURE(rc))
500	return rc;
501	}
502	#endif
503
504	/*
505	* Call Ring-0 entry with init code.
506	*/
507	for (;;)
508	{
509	#ifdef NO_SUPCALLR0VMM
510	//rc = VERR_GENERAL_FAILURE;
511	rc = VINF_SUCCESS;
512	#else
513	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
514	#endif
515	/*
516	* Flush the logs.
517	*/
518	#ifdef LOG_ENABLED
519	if ( pVCpu->vmm.s.pR0LoggerR3
520	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
521	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
522	#endif
523	if (rc != VINF_VMM_CALL_HOST)
524	break;
525	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
526	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
527	break;
528	/* Resume R0 */
529	}
530
531	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
532	{
533	LogRel(("R0 init failed, rc=%Rra\n", rc));
534	if (RT_SUCCESS(rc))
535	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
536	}
537	return rc;
538	}
539
540
541	#ifdef VBOX_WITH_RAW_MODE
542	/**
543	* Initializes the RC VMM.
544	*
545	* @returns VBox status code.
546	* @param pVM Pointer to the VM.
547	*/
548	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
549	{
550	PVMCPU pVCpu = VMMGetCpu(pVM);
551	Assert(pVCpu && pVCpu->idCpu == 0);
552
553	/* In VMX mode, there's no need to init RC. */
554	if (HMIsEnabled(pVM))
555	return VINF_SUCCESS;
556
557	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
558
559	/*
560	* Call VMMGCInit():
561	* -# resolve the address.
562	* -# setup stackframe and EIP to use the trampoline.
563	* -# do a generic hypervisor call.
564	*/
565	RTRCPTR RCPtrEP;
566	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
567	if (RT_SUCCESS(rc))
568	{
569	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
570	uint64_t u64TS = RTTimeProgramStartNanoTS();
571	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
572	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
573	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
574	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
575	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
576	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
577	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
578	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
579	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
580
581	for (;;)
582	{
583	#ifdef NO_SUPCALLR0VMM
584	//rc = VERR_GENERAL_FAILURE;
585	rc = VINF_SUCCESS;
586	#else
587	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
588	#endif
589	#ifdef LOG_ENABLED
590	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
591	if ( pLogger
592	&& pLogger->offScratch > 0)
593	RTLogFlushRC(NULL, pLogger);
594	#endif
595	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
596	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
597	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
598	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
599	#endif
600	if (rc != VINF_VMM_CALL_HOST)
601	break;
602	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
603	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
604	break;
605	}
606
607	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
608	{
609	VMMR3FatalDump(pVM, pVCpu, rc);
610	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
611	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
612	}
613	AssertRC(rc);
614	}
615	return rc;
616	}
617	#endif /* VBOX_WITH_RAW_MODE */
618
619
620	/**
621	* Called when an init phase completes.
622	*
623	* @returns VBox status code.
624	* @param pVM Pointer to the VM.
625	* @param enmWhat Which init phase.
626	*/
627	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
628	{
629	int rc = VINF_SUCCESS;
630
631	switch (enmWhat)
632	{
633	case VMINITCOMPLETED_RING3:
634	{
635	/*
636	* CPUM's post-initialization (APIC base MSR caching).
637	*/
638	rc = CPUMR3InitCompleted(pVM);
639	AssertRCReturn(rc, rc);
640
641	/*
642	* Set page attributes to r/w for stack pages.
643	*/
644	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
645	{
646	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
647	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
648	AssertRCReturn(rc, rc);
649	}
650
651	/*
652	* Create the EMT yield timer.
653	*/
654	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
655	AssertRCReturn(rc, rc);
656
657	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
658	AssertRCReturn(rc, rc);
659
660	#ifdef VBOX_WITH_NMI
661	/*
662	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
663	*/
664	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
665	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
666	AssertRCReturn(rc, rc);
667	#endif
668
669	#ifdef VBOX_STRICT_VMM_STACK
670	/*
671	* Setup the stack guard pages: Two inaccessible pages at each sides of the
672	* stack to catch over/under-flows.
673	*/
674	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
675	{
676	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
677
678	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
679	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
680
681	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
682	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
683	}
684	pVM->vmm.s.fStackGuardsStationed = true;
685	#endif
686	break;
687	}
688
689	case VMINITCOMPLETED_HM:
690	{
691	/*
692	* Disable the periodic preemption timers if we can use the
693	* VMX-preemption timer instead.
694	*/
695	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
696	&& HMR3IsVmxPreemptionTimerUsed(pVM))
697	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
698	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
699
700	/*
701	* CPUM's post-initialization (print CPUIDs).
702	*/
703	CPUMR3LogCpuIds(pVM);
704	break;
705	}
706
707	default: /* shuts up gcc */
708	break;
709	}
710
711	return rc;
712	}
713
714
715	/**
716	* Terminate the VMM bits.
717	*
718	* @returns VINF_SUCCESS.
719	* @param pVM Pointer to the VM.
720	*/
721	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
722	{
723	PVMCPU pVCpu = VMMGetCpu(pVM);
724	Assert(pVCpu && pVCpu->idCpu == 0);
725
726	/*
727	* Call Ring-0 entry with termination code.
728	*/
729	int rc;
730	for (;;)
731	{
732	#ifdef NO_SUPCALLR0VMM
733	//rc = VERR_GENERAL_FAILURE;
734	rc = VINF_SUCCESS;
735	#else
736	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
737	#endif
738	/*
739	* Flush the logs.
740	*/
741	#ifdef LOG_ENABLED
742	if ( pVCpu->vmm.s.pR0LoggerR3
743	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
744	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
745	#endif
746	if (rc != VINF_VMM_CALL_HOST)
747	break;
748	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
749	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
750	break;
751	/* Resume R0 */
752	}
753	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
754	{
755	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
756	if (RT_SUCCESS(rc))
757	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
758	}
759
760	for (VMCPUID i = 0; i < pVM->cCpus; i++)
761	{
762	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
763	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
764	}
765	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
766	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
767	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
768	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
769	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
770	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
771	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
772	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
773
774	#ifdef VBOX_STRICT_VMM_STACK
775	/*
776	* Make the two stack guard pages present again.
777	*/
778	if (pVM->vmm.s.fStackGuardsStationed)
779	{
780	for (VMCPUID i = 0; i < pVM->cCpus; i++)
781	{
782	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
783	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
784	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
785	}
786	pVM->vmm.s.fStackGuardsStationed = false;
787	}
788	#endif
789
790	vmmTermFormatTypes();
791	return rc;
792	}
793
794
795	/**
796	* Applies relocations to data and code managed by this
797	* component. This function will be called at init and
798	* whenever the VMM need to relocate it self inside the GC.
799	*
800	* The VMM will need to apply relocations to the core code.
801	*
802	* @param pVM Pointer to the VM.
803	* @param offDelta The relocation delta.
804	*/
805	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
806	{
807	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
808
809	/*
810	* Recalc the RC address.
811	*/
812	#ifdef VBOX_WITH_RAW_MODE
813	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
814	#endif
815
816	/*
817	* The stack.
818	*/
819	for (VMCPUID i = 0; i < pVM->cCpus; i++)
820	{
821	PVMCPU pVCpu = &pVM->aCpus[i];
822
823	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
824
825	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
826	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
827	}
828
829	/*
830	* All the switchers.
831	*/
832	vmmR3SwitcherRelocate(pVM, offDelta);
833
834	/*
835	* Get other RC entry points.
836	*/
837	if (!HMIsEnabled(pVM))
838	{
839	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
840	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
841
842	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
843	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
844	}
845
846	/*
847	* Update the logger.
848	*/
849	VMMR3UpdateLoggers(pVM);
850	}
851
852
853	/**
854	* Updates the settings for the RC and R0 loggers.
855	*
856	* @returns VBox status code.
857	* @param pVM Pointer to the VM.
858	*/
859	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
860	{
861	/*
862	* Simply clone the logger instance (for RC).
863	*/
864	int rc = VINF_SUCCESS;
865	RTRCPTR RCPtrLoggerFlush = 0;
866
867	if ( pVM->vmm.s.pRCLoggerR3
868	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
869	\|\| pVM->vmm.s.pRCRelLoggerR3
870	#endif
871	)
872	{
873	Assert(!HMIsEnabled(pVM));
874	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
875	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
876	}
877
878	if (pVM->vmm.s.pRCLoggerR3)
879	{
880	Assert(!HMIsEnabled(pVM));
881	RTRCPTR RCPtrLoggerWrapper = 0;
882	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
883	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
884
885	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
886	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
887	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
888	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
889	}
890
891	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
892	if (pVM->vmm.s.pRCRelLoggerR3)
893	{
894	Assert(!HMIsEnabled(pVM));
895	RTRCPTR RCPtrLoggerWrapper = 0;
896	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
897	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
898
899	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
900	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
901	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
902	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
903	}
904	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
905
906	#ifdef LOG_ENABLED
907	/*
908	* For the ring-0 EMT logger, we use a per-thread logger instance
909	* in ring-0. Only initialize it once.
910	*/
911	PRTLOGGER const pDefault = RTLogDefaultInstance();
912	for (VMCPUID i = 0; i < pVM->cCpus; i++)
913	{
914	PVMCPU pVCpu = &pVM->aCpus[i];
915	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
916	if (pR0LoggerR3)
917	{
918	if (!pR0LoggerR3->fCreated)
919	{
920	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
921	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
922	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
923
924	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
925	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
926	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
927
928	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
929	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
930	pfnLoggerWrapper, pfnLoggerFlush,
931	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
932	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
933
934	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
935	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
936	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
937	rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
938	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
939	pfnLoggerPrefix, NIL_RTR0PTR);
940	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
941
942	pR0LoggerR3->idCpu = i;
943	pR0LoggerR3->fCreated = true;
944	pR0LoggerR3->fFlushingDisabled = false;
945
946	}
947
948	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
949	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
950	AssertRC(rc);
951	}
952	}
953	#endif
954	return rc;
955	}
956
957
958	/**
959	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
960	*
961	* @returns Pointer to the buffer.
962	* @param pVM Pointer to the VM.
963	*/
964	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
965	{
966	if (HMIsEnabled(pVM))
967	return pVM->vmm.s.szRing0AssertMsg1;
968
969	RTRCPTR RCPtr;
970	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
971	if (RT_SUCCESS(rc))
972	return (const char *)MMHyperRCToR3(pVM, RCPtr);
973
974	return NULL;
975	}
976
977
978	/**
979	* Returns the VMCPU of the specified virtual CPU.
980	*
981	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
982	*
983	* @param pUVM The user mode VM handle.
984	* @param idCpu The ID of the virtual CPU.
985	*/
986	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
987	{
988	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
989	AssertReturn(idCpu < pUVM->cCpus, NULL);
990	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
991	return &pUVM->pVM->aCpus[idCpu];
992	}
993
994
995	/**
996	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
997	*
998	* @returns Pointer to the buffer.
999	* @param pVM Pointer to the VM.
1000	*/
1001	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1002	{
1003	if (HMIsEnabled(pVM))
1004	return pVM->vmm.s.szRing0AssertMsg2;
1005
1006	RTRCPTR RCPtr;
1007	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1008	if (RT_SUCCESS(rc))
1009	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1010
1011	return NULL;
1012	}
1013
1014
1015	/**
1016	* Execute state save operation.
1017	*
1018	* @returns VBox status code.
1019	* @param pVM Pointer to the VM.
1020	* @param pSSM SSM operation handle.
1021	*/
1022	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1023	{
1024	LogFlow(("vmmR3Save:\n"));
1025
1026	/*
1027	* Save the started/stopped state of all CPUs except 0 as it will always
1028	* be running. This avoids breaking the saved state version. :-)
1029	*/
1030	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1031	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1032
1033	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1034	}
1035
1036
1037	/**
1038	* Execute state load operation.
1039	*
1040	* @returns VBox status code.
1041	* @param pVM Pointer to the VM.
1042	* @param pSSM SSM operation handle.
1043	* @param uVersion Data layout version.
1044	* @param uPass The data pass.
1045	*/
1046	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1047	{
1048	LogFlow(("vmmR3Load:\n"));
1049	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1050
1051	/*
1052	* Validate version.
1053	*/
1054	if ( uVersion != VMM_SAVED_STATE_VERSION
1055	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1056	{
1057	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1058	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1059	}
1060
1061	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1062	{
1063	/* Ignore the stack bottom, stack pointer and stack bits. */
1064	RTRCPTR RCPtrIgnored;
1065	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1066	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1067	#ifdef RT_OS_DARWIN
1068	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1069	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1070	&& SSMR3HandleRevision(pSSM) >= 48858
1071	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1072	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1073	)
1074	SSMR3Skip(pSSM, 16384);
1075	else
1076	SSMR3Skip(pSSM, 8192);
1077	#else
1078	SSMR3Skip(pSSM, 8192);
1079	#endif
1080	}
1081
1082	/*
1083	* Restore the VMCPU states. VCPU 0 is always started.
1084	*/
1085	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1086	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1087	{
1088	bool fStarted;
1089	int rc = SSMR3GetBool(pSSM, &fStarted);
1090	if (RT_FAILURE(rc))
1091	return rc;
1092	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1093	}
1094
1095	/* terminator */
1096	uint32_t u32;
1097	int rc = SSMR3GetU32(pSSM, &u32);
1098	if (RT_FAILURE(rc))
1099	return rc;
1100	if (u32 != UINT32_MAX)
1101	{
1102	AssertMsgFailed(("u32=%#x\n", u32));
1103	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1104	}
1105	return VINF_SUCCESS;
1106	}
1107
1108
1109	#ifdef VBOX_WITH_RAW_MODE
1110	/**
1111	* Resolve a builtin RC symbol.
1112	*
1113	* Called by PDM when loading or relocating RC modules.
1114	*
1115	* @returns VBox status
1116	* @param pVM Pointer to the VM.
1117	* @param pszSymbol Symbol to resolv
1118	* @param pRCPtrValue Where to store the symbol value.
1119	*
1120	* @remark This has to work before VMMR3Relocate() is called.
1121	*/
1122	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1123	{
1124	if (!strcmp(pszSymbol, "g_Logger"))
1125	{
1126	if (pVM->vmm.s.pRCLoggerR3)
1127	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1128	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1129	}
1130	else if (!strcmp(pszSymbol, "g_RelLogger"))
1131	{
1132	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1133	if (pVM->vmm.s.pRCRelLoggerR3)
1134	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1135	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1136	# else
1137	*pRCPtrValue = NIL_RTRCPTR;
1138	# endif
1139	}
1140	else
1141	return VERR_SYMBOL_NOT_FOUND;
1142	return VINF_SUCCESS;
1143	}
1144	#endif /* VBOX_WITH_RAW_MODE */
1145
1146
1147	/**
1148	* Suspends the CPU yielder.
1149	*
1150	* @param pVM Pointer to the VM.
1151	*/
1152	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1153	{
1154	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1155	if (!pVM->vmm.s.cYieldResumeMillies)
1156	{
1157	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1158	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1159	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1160	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1161	else
1162	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1163	TMTimerStop(pVM->vmm.s.pYieldTimer);
1164	}
1165	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1166	}
1167
1168
1169	/**
1170	* Stops the CPU yielder.
1171	*
1172	* @param pVM Pointer to the VM.
1173	*/
1174	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1175	{
1176	if (!pVM->vmm.s.cYieldResumeMillies)
1177	TMTimerStop(pVM->vmm.s.pYieldTimer);
1178	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1179	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1180	}
1181
1182
1183	/**
1184	* Resumes the CPU yielder when it has been a suspended or stopped.
1185	*
1186	* @param pVM Pointer to the VM.
1187	*/
1188	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1189	{
1190	if (pVM->vmm.s.cYieldResumeMillies)
1191	{
1192	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1193	pVM->vmm.s.cYieldResumeMillies = 0;
1194	}
1195	}
1196
1197
1198	/**
1199	* Internal timer callback function.
1200	*
1201	* @param pVM The VM.
1202	* @param pTimer The timer handle.
1203	* @param pvUser User argument specified upon timer creation.
1204	*/
1205	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1206	{
1207	NOREF(pvUser);
1208
1209	/*
1210	* This really needs some careful tuning. While we shouldn't be too greedy since
1211	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1212	* because that'll cause us to stop up.
1213	*
1214	* The current logic is to use the default interval when there is no lag worth
1215	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1216	*
1217	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1218	* so the lag is up to date.)
1219	*/
1220	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1221	if ( u64Lag < 50000000 /* 50ms */
1222	\|\| ( u64Lag < 1000000000 /* 1s */
1223	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1224	)
1225	{
1226	uint64_t u64Elapsed = RTTimeNanoTS();
1227	pVM->vmm.s.u64LastYield = u64Elapsed;
1228
1229	RTThreadYield();
1230
1231	#ifdef LOG_ENABLED
1232	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1233	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1234	#endif
1235	}
1236	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1237	}
1238
1239
1240	#ifdef VBOX_WITH_RAW_MODE
1241	/**
1242	* Executes guest code in the raw-mode context.
1243	*
1244	* @param pVM Pointer to the VM.
1245	* @param pVCpu Pointer to the VMCPU.
1246	*/
1247	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1248	{
1249	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1250
1251	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1252
1253	/*
1254	* Set the hypervisor to resume executing a CPUM resume function
1255	* in CPUMRCA.asm.
1256	*/
1257	CPUMSetHyperState(pVCpu,
1258	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1259	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1260	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1261	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1262	0, /* eax */
1263	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1264
1265	/*
1266	* We hide log flushes (outer) and hypervisor interrupts (inner).
1267	*/
1268	for (;;)
1269	{
1270	#ifdef VBOX_STRICT
1271	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1272	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1273	PGMMapCheck(pVM);
1274	# ifdef VBOX_WITH_SAFE_STR
1275	SELMR3CheckShadowTR(pVM);
1276	# endif
1277	#endif
1278	int rc;
1279	do
1280	{
1281	#ifdef NO_SUPCALLR0VMM
1282	rc = VERR_GENERAL_FAILURE;
1283	#else
1284	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1285	if (RT_LIKELY(rc == VINF_SUCCESS))
1286	rc = pVCpu->vmm.s.iLastGZRc;
1287	#endif
1288	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1289
1290	/*
1291	* Flush the logs.
1292	*/
1293	#ifdef LOG_ENABLED
1294	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1295	if ( pLogger
1296	&& pLogger->offScratch > 0)
1297	RTLogFlushRC(NULL, pLogger);
1298	#endif
1299	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1300	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1301	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1302	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1303	#endif
1304	if (rc != VINF_VMM_CALL_HOST)
1305	{
1306	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1307	return rc;
1308	}
1309	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1310	if (RT_FAILURE(rc))
1311	return rc;
1312	/* Resume GC */
1313	}
1314	}
1315	#endif /* VBOX_WITH_RAW_MODE */
1316
1317
1318	/**
1319	* Executes guest code (Intel VT-x and AMD-V).
1320	*
1321	* @param pVM Pointer to the VM.
1322	* @param pVCpu Pointer to the VMCPU.
1323	*/
1324	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1325	{
1326	Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1327
1328	for (;;)
1329	{
1330	int rc;
1331	do
1332	{
1333	#ifdef NO_SUPCALLR0VMM
1334	rc = VERR_GENERAL_FAILURE;
1335	#else
1336	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1337	if (RT_LIKELY(rc == VINF_SUCCESS))
1338	rc = pVCpu->vmm.s.iLastGZRc;
1339	#endif
1340	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1341
1342	#if 0 /* todo triggers too often */
1343	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1344	#endif
1345
1346	#ifdef LOG_ENABLED
1347	/*
1348	* Flush the log
1349	*/
1350	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1351	if ( pR0LoggerR3
1352	&& pR0LoggerR3->Logger.offScratch > 0)
1353	RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1354	#endif /* !LOG_ENABLED */
1355	if (rc != VINF_VMM_CALL_HOST)
1356	{
1357	Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1358	return rc;
1359	}
1360	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1361	if (RT_FAILURE(rc))
1362	return rc;
1363	/* Resume R0 */
1364	}
1365	}
1366
1367	/**
1368	* VCPU worker for VMMSendSipi.
1369	*
1370	* @param pVM Pointer to the VM.
1371	* @param idCpu Virtual CPU to perform SIPI on
1372	* @param uVector SIPI vector
1373	*/
1374	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1375	{
1376	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1377	VMCPU_ASSERT_EMT(pVCpu);
1378
1379	/** @todo what are we supposed to do if the processor is already running? */
1380	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1381	return VERR_ACCESS_DENIED;
1382
1383
1384	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1385
1386	pCtx->cs.Sel = uVector << 8;
1387	pCtx->cs.ValidSel = uVector << 8;
1388	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1389	pCtx->cs.u64Base = uVector << 12;
1390	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1391	pCtx->rip = 0;
1392
1393	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1394
1395	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1396	EMSetState(pVCpu, EMSTATE_HALTED);
1397	return VINF_EM_RESCHEDULE;
1398	# else /* And if we go the VMCPU::enmState way it can stay here. */
1399	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1400	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1401	return VINF_SUCCESS;
1402	# endif
1403	}
1404
1405	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1406	{
1407	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1408	VMCPU_ASSERT_EMT(pVCpu);
1409
1410	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1411
1412	PGMR3ResetCpu(pVM, pVCpu);
1413	CPUMR3ResetCpu(pVCpu);
1414
1415	return VINF_EM_WAIT_SIPI;
1416	}
1417
1418	/**
1419	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1420	* and unhalting processor
1421	*
1422	* @param pVM Pointer to the VM.
1423	* @param idCpu Virtual CPU to perform SIPI on
1424	* @param uVector SIPI vector
1425	*/
1426	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1427	{
1428	AssertReturnVoid(idCpu < pVM->cCpus);
1429
1430	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1431	AssertRC(rc);
1432	}
1433
1434	/**
1435	* Sends init IPI to the virtual CPU.
1436	*
1437	* @param pVM Pointer to the VM.
1438	* @param idCpu Virtual CPU to perform int IPI on
1439	*/
1440	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1441	{
1442	AssertReturnVoid(idCpu < pVM->cCpus);
1443
1444	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1445	AssertRC(rc);
1446	}
1447
1448	/**
1449	* Registers the guest memory range that can be used for patching
1450	*
1451	* @returns VBox status code.
1452	* @param pVM Pointer to the VM.
1453	* @param pPatchMem Patch memory range
1454	* @param cbPatchMem Size of the memory range
1455	*/
1456	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1457	{
1458	VM_ASSERT_EMT(pVM);
1459	if (HMIsEnabled(pVM))
1460	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1461
1462	return VERR_NOT_SUPPORTED;
1463	}
1464
1465	/**
1466	* Deregisters the guest memory range that can be used for patching
1467	*
1468	* @returns VBox status code.
1469	* @param pVM Pointer to the VM.
1470	* @param pPatchMem Patch memory range
1471	* @param cbPatchMem Size of the memory range
1472	*/
1473	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1474	{
1475	if (HMIsEnabled(pVM))
1476	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1477
1478	return VINF_SUCCESS;
1479	}
1480
1481
1482	/**
1483	* Count returns and have the last non-caller EMT wake up the caller.
1484	*
1485	* @returns VBox strict informational status code for EM scheduling. No failures
1486	* will be returned here, those are for the caller only.
1487	*
1488	* @param pVM Pointer to the VM.
1489	*/
1490	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1491	{
1492	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1493	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1494	if (cReturned == pVM->cCpus - 1U)
1495	{
1496	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1497	AssertLogRelRC(rc);
1498	}
1499
1500	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1501	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1502	("%Rrc\n", rcRet),
1503	VERR_IPE_UNEXPECTED_INFO_STATUS);
1504	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1505	}
1506
1507
1508	/**
1509	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1510	*
1511	* @returns VBox strict informational status code for EM scheduling. No failures
1512	* will be returned here, those are for the caller only. When
1513	* fIsCaller is set, VINF_SUCCESS is always returned.
1514	*
1515	* @param pVM Pointer to the VM.
1516	* @param pVCpu The VMCPU structure for the calling EMT.
1517	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1518	* not.
1519	* @param fFlags The flags.
1520	* @param pfnRendezvous The callback.
1521	* @param pvUser The user argument for the callback.
1522	*/
1523	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1524	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1525	{
1526	int rc;
1527
1528	/*
1529	* Enter, the last EMT triggers the next callback phase.
1530	*/
1531	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1532	if (cEntered != pVM->cCpus)
1533	{
1534	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1535	{
1536	/* Wait for our turn. */
1537	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1538	AssertLogRelRC(rc);
1539	}
1540	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1541	{
1542	/* Wait for the last EMT to arrive and wake everyone up. */
1543	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1544	AssertLogRelRC(rc);
1545	}
1546	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1547	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1548	{
1549	/* Wait for our turn. */
1550	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1551	AssertLogRelRC(rc);
1552	}
1553	else
1554	{
1555	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1556
1557	/*
1558	* The execute once is handled specially to optimize the code flow.
1559	*
1560	* The last EMT to arrive will perform the callback and the other
1561	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1562	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1563	* returns, that EMT will initiate the normal return sequence.
1564	*/
1565	if (!fIsCaller)
1566	{
1567	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1568	AssertLogRelRC(rc);
1569
1570	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1571	}
1572	return VINF_SUCCESS;
1573	}
1574	}
1575	else
1576	{
1577	/*
1578	* All EMTs are waiting, clear the FF and take action according to the
1579	* execution method.
1580	*/
1581	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1582
1583	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1584	{
1585	/* Wake up everyone. */
1586	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1587	AssertLogRelRC(rc);
1588	}
1589	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1590	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1591	{
1592	/* Figure out who to wake up and wake it up. If it's ourself, then
1593	it's easy otherwise wait for our turn. */
1594	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1595	? 0
1596	: pVM->cCpus - 1U;
1597	if (pVCpu->idCpu != iFirst)
1598	{
1599	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1600	AssertLogRelRC(rc);
1601	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1602	AssertLogRelRC(rc);
1603	}
1604	}
1605	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1606	}
1607
1608
1609	/*
1610	* Do the callback and update the status if necessary.
1611	*/
1612	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1613	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1614	{
1615	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1616	if (rcStrict != VINF_SUCCESS)
1617	{
1618	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1619	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1620	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1621	int32_t i32RendezvousStatus;
1622	do
1623	{
1624	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1625	if ( rcStrict == i32RendezvousStatus
1626	\|\| RT_FAILURE(i32RendezvousStatus)
1627	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1628	&& rcStrict > i32RendezvousStatus))
1629	break;
1630	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1631	}
1632	}
1633
1634	/*
1635	* Increment the done counter and take action depending on whether we're
1636	* the last to finish callback execution.
1637	*/
1638	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1639	if ( cDone != pVM->cCpus
1640	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1641	{
1642	/* Signal the next EMT? */
1643	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1644	{
1645	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1646	AssertLogRelRC(rc);
1647	}
1648	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1649	{
1650	Assert(cDone == pVCpu->idCpu + 1U);
1651	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1652	AssertLogRelRC(rc);
1653	}
1654	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1655	{
1656	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1657	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1658	AssertLogRelRC(rc);
1659	}
1660
1661	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1662	if (!fIsCaller)
1663	{
1664	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1665	AssertLogRelRC(rc);
1666	}
1667	}
1668	else
1669	{
1670	/* Callback execution is all done, tell the rest to return. */
1671	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1672	AssertLogRelRC(rc);
1673	}
1674
1675	if (!fIsCaller)
1676	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1677	return VINF_SUCCESS;
1678	}
1679
1680
1681	/**
1682	* Called in response to VM_FF_EMT_RENDEZVOUS.
1683	*
1684	* @returns VBox strict status code - EM scheduling. No errors will be returned
1685	* here, nor will any non-EM scheduling status codes be returned.
1686	*
1687	* @param pVM Pointer to the VM.
1688	* @param pVCpu The handle of the calling EMT.
1689	*
1690	* @thread EMT
1691	*/
1692	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1693	{
1694	Assert(!pVCpu->vmm.s.fInRendezvous);
1695	pVCpu->vmm.s.fInRendezvous = true;
1696	int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1697	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1698	pVCpu->vmm.s.fInRendezvous = false;
1699	return rc;
1700	}
1701
1702
1703	/**
1704	* EMT rendezvous.
1705	*
1706	* Gathers all the EMTs and execute some code on each of them, either in a one
1707	* by one fashion or all at once.
1708	*
1709	* @returns VBox strict status code. This will be the first error,
1710	* VINF_SUCCESS, or an EM scheduling status code.
1711	*
1712	* @param pVM Pointer to the VM.
1713	* @param fFlags Flags indicating execution methods. See
1714	* grp_VMMR3EmtRendezvous_fFlags.
1715	* @param pfnRendezvous The callback.
1716	* @param pvUser User argument for the callback.
1717	*
1718	* @thread Any.
1719	*/
1720	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1721	{
1722	/*
1723	* Validate input.
1724	*/
1725	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1726	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1727	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1728	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1729	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1730	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1731	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1732	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1733
1734	VBOXSTRICTRC rcStrict;
1735	PVMCPU pVCpu = VMMGetCpu(pVM);
1736	if (!pVCpu)
1737	/*
1738	* Forward the request to an EMT thread.
1739	*/
1740	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1741	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1742	else if (pVM->cCpus == 1)
1743	{
1744	/*
1745	* Shortcut for the single EMT case.
1746	*/
1747	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1748	pVCpu->vmm.s.fInRendezvous = true;
1749	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1750	pVCpu->vmm.s.fInRendezvous = false;
1751	}
1752	else
1753	{
1754	/*
1755	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1756	* lookout of the RENDEZVOUS FF.
1757	*/
1758	int rc;
1759	rcStrict = VINF_SUCCESS;
1760	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1761	{
1762	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1763
1764	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1765	{
1766	if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1767	{
1768	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1769	if ( rc != VINF_SUCCESS
1770	&& ( rcStrict == VINF_SUCCESS
1771	\|\| rcStrict > rc))
1772	rcStrict = rc;
1773	/** @todo Perhaps deal with termination here? */
1774	}
1775	ASMNopPause();
1776	}
1777	}
1778	Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1779	Assert(!pVCpu->vmm.s.fInRendezvous);
1780	pVCpu->vmm.s.fInRendezvous = true;
1781
1782	/*
1783	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1784	*/
1785	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1786	{
1787	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1788	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1789	}
1790	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1791	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1792	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1793	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1794	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1795	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1796	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1797	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1798	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1799	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1800	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1801
1802	/*
1803	* Set the FF and poke the other EMTs.
1804	*/
1805	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1806	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1807
1808	/*
1809	* Do the same ourselves.
1810	*/
1811	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1812
1813	/*
1814	* The caller waits for the other EMTs to be done and return before doing
1815	* the cleanup. This makes away with wakeup / reset races we would otherwise
1816	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1817	*/
1818	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1819	AssertLogRelRC(rc);
1820
1821	/*
1822	* Get the return code and clean up a little bit.
1823	*/
1824	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1825	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1826
1827	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1828	pVCpu->vmm.s.fInRendezvous = false;
1829
1830	/*
1831	* Merge rcStrict and rcMy.
1832	*/
1833	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1834	if ( rcMy != VINF_SUCCESS
1835	&& ( rcStrict == VINF_SUCCESS
1836	\|\| rcStrict > rcMy))
1837	rcStrict = rcMy;
1838	}
1839
1840	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1841	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1842	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1843	VERR_IPE_UNEXPECTED_INFO_STATUS);
1844	return VBOXSTRICTRC_VAL(rcStrict);
1845	}
1846
1847
1848	/**
1849	* Disables/enables EMT rendezvous.
1850	*
1851	* This is used to make sure EMT rendezvous does not take place while
1852	* processing a priority request.
1853	*
1854	* @returns Old rendezvous-disabled state.
1855	* @param pVCpu The handle of the calling EMT.
1856	* @param fDisabled True if disabled, false if enabled.
1857	*/
1858	VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1859	{
1860	VMCPU_ASSERT_EMT(pVCpu);
1861	bool fOld = pVCpu->vmm.s.fInRendezvous;
1862	pVCpu->vmm.s.fInRendezvous = fDisabled;
1863	return fOld;
1864	}
1865
1866
1867	/**
1868	* Read from the ring 0 jump buffer stack
1869	*
1870	* @returns VBox status code.
1871	*
1872	* @param pVM Pointer to the VM.
1873	* @param idCpu The ID of the source CPU context (for the address).
1874	* @param R0Addr Where to start reading.
1875	* @param pvBuf Where to store the data we've read.
1876	* @param cbRead The number of bytes to read.
1877	*/
1878	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1879	{
1880	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1881	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1882
1883	#ifdef VMM_R0_SWITCH_STACK
1884	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1885	#else
1886	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1887	#endif
1888	if ( off > VMM_STACK_SIZE
1889	\|\| off + cbRead >= VMM_STACK_SIZE)
1890	return VERR_INVALID_POINTER;
1891
1892	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1893	return VINF_SUCCESS;
1894	}
1895
1896	#ifdef VBOX_WITH_RAW_MODE
1897
1898	/**
1899	* Calls a RC function.
1900	*
1901	* @param pVM Pointer to the VM.
1902	* @param RCPtrEntry The address of the RC function.
1903	* @param cArgs The number of arguments in the ....
1904	* @param ... Arguments to the function.
1905	*/
1906	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1907	{
1908	va_list args;
1909	va_start(args, cArgs);
1910	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1911	va_end(args);
1912	return rc;
1913	}
1914
1915
1916	/**
1917	* Calls a RC function.
1918	*
1919	* @param pVM Pointer to the VM.
1920	* @param RCPtrEntry The address of the RC function.
1921	* @param cArgs The number of arguments in the ....
1922	* @param args Arguments to the function.
1923	*/
1924	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1925	{
1926	/* Raw mode implies 1 VCPU. */
1927	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1928	PVMCPU pVCpu = &pVM->aCpus[0];
1929
1930	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1931
1932	/*
1933	* Setup the call frame using the trampoline.
1934	*/
1935	CPUMSetHyperState(pVCpu,
1936	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1937	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1938	RCPtrEntry, /* eax */
1939	cArgs /* edx */
1940	);
1941
1942	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1943	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1944	int i = cArgs;
1945	while (i-- > 0)
1946	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1947
1948	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1949	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1950
1951	/*
1952	* We hide log flushes (outer) and hypervisor interrupts (inner).
1953	*/
1954	for (;;)
1955	{
1956	int rc;
1957	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1958	do
1959	{
1960	#ifdef NO_SUPCALLR0VMM
1961	rc = VERR_GENERAL_FAILURE;
1962	#else
1963	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1964	if (RT_LIKELY(rc == VINF_SUCCESS))
1965	rc = pVCpu->vmm.s.iLastGZRc;
1966	#endif
1967	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1968
1969	/*
1970	* Flush the loggers.
1971	*/
1972	#ifdef LOG_ENABLED
1973	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1974	if ( pLogger
1975	&& pLogger->offScratch > 0)
1976	RTLogFlushRC(NULL, pLogger);
1977	#endif
1978	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1979	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1980	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1981	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1982	#endif
1983	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1984	VMMR3FatalDump(pVM, pVCpu, rc);
1985	if (rc != VINF_VMM_CALL_HOST)
1986	{
1987	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1988	return rc;
1989	}
1990	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1991	if (RT_FAILURE(rc))
1992	return rc;
1993	}
1994	}
1995
1996	#endif /* VBOX_WITH_RAW_MODE */
1997
1998	/**
1999	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2000	*
2001	* @returns VBox status code.
2002	* @param pVM Pointer to the VM.
2003	* @param uOperation Operation to execute.
2004	* @param u64Arg Constant argument.
2005	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2006	* details.
2007	*/
2008	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2009	{
2010	PVMCPU pVCpu = VMMGetCpu(pVM);
2011	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2012
2013	/*
2014	* Call Ring-0 entry with init code.
2015	*/
2016	int rc;
2017	for (;;)
2018	{
2019	#ifdef NO_SUPCALLR0VMM
2020	rc = VERR_GENERAL_FAILURE;
2021	#else
2022	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2023	#endif
2024	/*
2025	* Flush the logs.
2026	*/
2027	#ifdef LOG_ENABLED
2028	if ( pVCpu->vmm.s.pR0LoggerR3
2029	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2030	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2031	#endif
2032	if (rc != VINF_VMM_CALL_HOST)
2033	break;
2034	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2035	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2036	break;
2037	/* Resume R0 */
2038	}
2039
2040	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2041	("uOperation=%u rc=%Rrc\n", uOperation, rc),
2042	VERR_IPE_UNEXPECTED_INFO_STATUS);
2043	return rc;
2044	}
2045
2046
2047	#ifdef VBOX_WITH_RAW_MODE
2048	/**
2049	* Resumes executing hypervisor code when interrupted by a queue flush or a
2050	* debug event.
2051	*
2052	* @returns VBox status code.
2053	* @param pVM Pointer to the VM.
2054	* @param pVCpu Pointer to the VMCPU.
2055	*/
2056	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2057	{
2058	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2059	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2060
2061	/*
2062	* We hide log flushes (outer) and hypervisor interrupts (inner).
2063	*/
2064	for (;;)
2065	{
2066	int rc;
2067	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2068	do
2069	{
2070	# ifdef NO_SUPCALLR0VMM
2071	rc = VERR_GENERAL_FAILURE;
2072	# else
2073	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2074	if (RT_LIKELY(rc == VINF_SUCCESS))
2075	rc = pVCpu->vmm.s.iLastGZRc;
2076	# endif
2077	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2078
2079	/*
2080	* Flush the loggers.
2081	*/
2082	# ifdef LOG_ENABLED
2083	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2084	if ( pLogger
2085	&& pLogger->offScratch > 0)
2086	RTLogFlushRC(NULL, pLogger);
2087	# endif
2088	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2089	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2090	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2091	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2092	# endif
2093	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2094	VMMR3FatalDump(pVM, pVCpu, rc);
2095	if (rc != VINF_VMM_CALL_HOST)
2096	{
2097	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2098	return rc;
2099	}
2100	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2101	if (RT_FAILURE(rc))
2102	return rc;
2103	}
2104	}
2105	#endif /* VBOX_WITH_RAW_MODE */
2106
2107
2108	/**
2109	* Service a call to the ring-3 host code.
2110	*
2111	* @returns VBox status code.
2112	* @param pVM Pointer to the VM.
2113	* @param pVCpu Pointer to the VMCPU.
2114	* @remark Careful with critsects.
2115	*/
2116	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2117	{
2118	/*
2119	* We must also check for pending critsect exits or else we can deadlock
2120	* when entering other critsects here.
2121	*/
2122	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2123	PDMCritSectBothFF(pVCpu);
2124
2125	switch (pVCpu->vmm.s.enmCallRing3Operation)
2126	{
2127	/*
2128	* Acquire a critical section.
2129	*/
2130	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2131	{
2132	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2133	true /fCallRing3/);
2134	break;
2135	}
2136
2137	/*
2138	* Enter a r/w critical section exclusively.
2139	*/
2140	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2141	{
2142	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2143	true /fCallRing3/);
2144	break;
2145	}
2146
2147	/*
2148	* Enter a r/w critical section shared.
2149	*/
2150	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2151	{
2152	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2153	true /fCallRing3/);
2154	break;
2155	}
2156
2157	/*
2158	* Acquire the PDM lock.
2159	*/
2160	case VMMCALLRING3_PDM_LOCK:
2161	{
2162	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2163	break;
2164	}
2165
2166	/*
2167	* Grow the PGM pool.
2168	*/
2169	case VMMCALLRING3_PGM_POOL_GROW:
2170	{
2171	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2172	break;
2173	}
2174
2175	/*
2176	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2177	*/
2178	case VMMCALLRING3_PGM_MAP_CHUNK:
2179	{
2180	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2181	break;
2182	}
2183
2184	/*
2185	* Allocates more handy pages.
2186	*/
2187	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2188	{
2189	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2190	break;
2191	}
2192
2193	/*
2194	* Allocates a large page.
2195	*/
2196	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2197	{
2198	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2199	break;
2200	}
2201
2202	/*
2203	* Acquire the PGM lock.
2204	*/
2205	case VMMCALLRING3_PGM_LOCK:
2206	{
2207	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2208	break;
2209	}
2210
2211	/*
2212	* Acquire the MM hypervisor heap lock.
2213	*/
2214	case VMMCALLRING3_MMHYPER_LOCK:
2215	{
2216	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2217	break;
2218	}
2219
2220	#ifdef VBOX_WITH_REM
2221	/*
2222	* Flush REM handler notifications.
2223	*/
2224	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2225	{
2226	REMR3ReplayHandlerNotifications(pVM);
2227	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2228	break;
2229	}
2230	#endif
2231
2232	/*
2233	* This is a noop. We just take this route to avoid unnecessary
2234	* tests in the loops.
2235	*/
2236	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2237	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2238	LogAlways(("FLUSH\n"));
2239	break;
2240
2241	/*
2242	* Set the VM error message.
2243	*/
2244	case VMMCALLRING3_VM_SET_ERROR:
2245	VMR3SetErrorWorker(pVM);
2246	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2247	break;
2248
2249	/*
2250	* Set the VM runtime error message.
2251	*/
2252	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2253	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2254	break;
2255
2256	/*
2257	* Signal a ring 0 hypervisor assertion.
2258	* Cancel the longjmp operation that's in progress.
2259	*/
2260	case VMMCALLRING3_VM_R0_ASSERTION:
2261	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2262	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2263	#ifdef RT_ARCH_X86
2264	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2265	#else
2266	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2267	#endif
2268	#ifdef VMM_R0_SWITCH_STACK
2269	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2270	#endif
2271	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2272	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2273	return VERR_VMM_RING0_ASSERTION;
2274
2275	/*
2276	* A forced switch to ring 0 for preemption purposes.
2277	*/
2278	case VMMCALLRING3_VM_R0_PREEMPT:
2279	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2280	break;
2281
2282	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2283	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2284	break;
2285
2286	default:
2287	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2288	return VERR_VMM_UNKNOWN_RING3_CALL;
2289	}
2290
2291	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2292	return VINF_SUCCESS;
2293	}
2294
2295
2296	/**
2297	* Displays the Force action Flags.
2298	*
2299	* @param pVM Pointer to the VM.
2300	* @param pHlp The output helpers.
2301	* @param pszArgs The additional arguments (ignored).
2302	*/
2303	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2304	{
2305	int c;
2306	uint32_t f;
2307	NOREF(pszArgs);
2308
2309	#define PRINT_FLAG(prf,flag) do { \
2310	if (f & (prf##flag)) \
2311	{ \
2312	static const char *s_psz = #flag; \
2313	if (!(c % 6)) \
2314	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2315	else \
2316	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2317	c++; \
2318	f &= ~(prf##flag); \
2319	} \
2320	} while (0)
2321
2322	#define PRINT_GROUP(prf,grp,sfx) do { \
2323	if (f & (prf##grp##sfx)) \
2324	{ \
2325	static const char *s_psz = #grp; \
2326	if (!(c % 5)) \
2327	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2328	else \
2329	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2330	c++; \
2331	} \
2332	} while (0)
2333
2334	/*
2335	* The global flags.
2336	*/
2337	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2338	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2339
2340	/* show the flag mnemonics */
2341	c = 0;
2342	f = fGlobalForcedActions;
2343	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2344	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2345	PRINT_FLAG(VM_FF_,PDM_DMA);
2346	PRINT_FLAG(VM_FF_,DBGF);
2347	PRINT_FLAG(VM_FF_,REQUEST);
2348	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2349	PRINT_FLAG(VM_FF_,RESET);
2350	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2351	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2352	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2353	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2354	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2355	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2356	if (f)
2357	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2358	else
2359	pHlp->pfnPrintf(pHlp, "\n");
2360
2361	/* the groups */
2362	c = 0;
2363	f = fGlobalForcedActions;
2364	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2365	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2366	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2367	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2368	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2369	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2370	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2371	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2372	if (c)
2373	pHlp->pfnPrintf(pHlp, "\n");
2374
2375	/*
2376	* Per CPU flags.
2377	*/
2378	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2379	{
2380	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2381	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2382
2383	/* show the flag mnemonics */
2384	c = 0;
2385	f = fLocalForcedActions;
2386	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2387	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2388	PRINT_FLAG(VMCPU_FF_,TIMER);
2389	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2390	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2391	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2392	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2393	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2394	PRINT_FLAG(VMCPU_FF_,TO_R3);
2395	#ifdef VBOX_WITH_RAW_MODE
2396	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2397	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2398	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2399	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2400	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2401	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2402	#endif
2403	if (f)
2404	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2405	else
2406	pHlp->pfnPrintf(pHlp, "\n");
2407
2408	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2409	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2410
2411	/* the groups */
2412	c = 0;
2413	f = fLocalForcedActions;
2414	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2415	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2416	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2417	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2418	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2419	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2420	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2421	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2422	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2423	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2424	if (c)
2425	pHlp->pfnPrintf(pHlp, "\n");
2426	}
2427
2428	#undef PRINT_FLAG
2429	#undef PRINT_GROUP
2430	}
2431

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 46420

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