VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 45530

Last change on this file since 45530 was 45525, checked in by vboxsync, 12 years ago

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1/* $Id: VMM.cpp 45525 2013-04-12 16:47:57Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmcritsectrw.h>
84#include <VBox/vmm/pdmapi.h>
85#include <VBox/vmm/cpum.h>
86#include <VBox/vmm/mm.h>
87#include <VBox/vmm/iom.h>
88#include <VBox/vmm/trpm.h>
89#include <VBox/vmm/selm.h>
90#include <VBox/vmm/em.h>
91#include <VBox/sup.h>
92#include <VBox/vmm/dbgf.h>
93#include <VBox/vmm/csam.h>
94#include <VBox/vmm/patm.h>
95#ifdef VBOX_WITH_REM
96# include <VBox/vmm/rem.h>
97#endif
98#include <VBox/vmm/ssm.h>
99#include <VBox/vmm/ftm.h>
100#include <VBox/vmm/tm.h>
101#include "VMMInternal.h"
102#include "VMMSwitcher.h"
103#include <VBox/vmm/vm.h>
104#include <VBox/vmm/uvm.h>
105
106#include <VBox/err.h>
107#include <VBox/param.h>
108#include <VBox/version.h>
109#include <VBox/vmm/hm.h>
110#include <iprt/assert.h>
111#include <iprt/alloc.h>
112#include <iprt/asm.h>
113#include <iprt/time.h>
114#include <iprt/semaphore.h>
115#include <iprt/stream.h>
116#include <iprt/string.h>
117#include <iprt/stdarg.h>
118#include <iprt/ctype.h>
119#include <iprt/x86.h>
120
121
122
123/*******************************************************************************
124* Defined Constants And Macros *
125*******************************************************************************/
126/** The saved state version. */
127#define VMM_SAVED_STATE_VERSION 4
128/** The saved state version used by v3.0 and earlier. (Teleportation) */
129#define VMM_SAVED_STATE_VERSION_3_0 3
130
131
132/*******************************************************************************
133* Internal Functions *
134*******************************************************************************/
135static int vmmR3InitStacks(PVM pVM);
136static int vmmR3InitLoggers(PVM pVM);
137static void vmmR3InitRegisterStats(PVM pVM);
138static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
139static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
140static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
141static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
142static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
143
144
145/**
146 * Initializes the VMM.
147 *
148 * @returns VBox status code.
149 * @param pVM Pointer to the VM.
150 */
151VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
152{
153 LogFlow(("VMMR3Init\n"));
154
155 /*
156 * Assert alignment, sizes and order.
157 */
158 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
159 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
160 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
161
162 /*
163 * Init basic VM VMM members.
164 */
165 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
166 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
167 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
168 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
169 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
170 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
171
172 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
173 * The EMT yield interval. The EMT yielding is a hack we employ to play a
174 * bit nicer with the rest of the system (like for instance the GUI).
175 */
176 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
177 23 /* Value arrived at after experimenting with the grub boot prompt. */);
178 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
179
180
181 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
182 * Controls whether we employ per-cpu preemption timers to limit the time
183 * spent executing guest code. This option is not available on all
184 * platforms and we will silently ignore this setting then. If we are
185 * running in VT-x mode, we will use the VMX-preemption timer instead of
186 * this one when possible.
187 */
188 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
189 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
190 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
191
192 /*
193 * Initialize the VMM rendezvous semaphores.
194 */
195 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
196 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
197 return VERR_NO_MEMORY;
198 for (VMCPUID i = 0; i < pVM->cCpus; i++)
199 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
200 for (VMCPUID i = 0; i < pVM->cCpus; i++)
201 {
202 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
203 AssertRCReturn(rc, rc);
204 }
205 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
208 AssertRCReturn(rc, rc);
209 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
210 AssertRCReturn(rc, rc);
211 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
212 AssertRCReturn(rc, rc);
213
214 /* GC switchers are enabled by default. Turned off by HM. */
215 pVM->vmm.s.fSwitcherDisabled = false;
216
217 /*
218 * Register the saved state data unit.
219 */
220 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
221 NULL, NULL, NULL,
222 NULL, vmmR3Save, NULL,
223 NULL, vmmR3Load, NULL);
224 if (RT_FAILURE(rc))
225 return rc;
226
227 /*
228 * Register the Ring-0 VM handle with the session for fast ioctl calls.
229 */
230 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
231 if (RT_FAILURE(rc))
232 return rc;
233
234 /*
235 * Init various sub-components.
236 */
237 rc = vmmR3SwitcherInit(pVM);
238 if (RT_SUCCESS(rc))
239 {
240 rc = vmmR3InitStacks(pVM);
241 if (RT_SUCCESS(rc))
242 {
243 rc = vmmR3InitLoggers(pVM);
244
245#ifdef VBOX_WITH_NMI
246 /*
247 * Allocate mapping for the host APIC.
248 */
249 if (RT_SUCCESS(rc))
250 {
251 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
252 AssertRC(rc);
253 }
254#endif
255 if (RT_SUCCESS(rc))
256 {
257 /*
258 * Debug info and statistics.
259 */
260 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
261 vmmR3InitRegisterStats(pVM);
262 vmmInitFormatTypes();
263
264 return VINF_SUCCESS;
265 }
266 }
267 /** @todo: Need failure cleanup. */
268
269 //more todo in here?
270 //if (RT_SUCCESS(rc))
271 //{
272 //}
273 //int rc2 = vmmR3TermCoreCode(pVM);
274 //AssertRC(rc2));
275 }
276
277 return rc;
278}
279
280
281/**
282 * Allocate & setup the VMM RC stack(s) (for EMTs).
283 *
284 * The stacks are also used for long jumps in Ring-0.
285 *
286 * @returns VBox status code.
287 * @param pVM Pointer to the VM.
288 *
289 * @remarks The optional guard page gets it protection setup up during R3 init
290 * completion because of init order issues.
291 */
292static int vmmR3InitStacks(PVM pVM)
293{
294 int rc = VINF_SUCCESS;
295#ifdef VMM_R0_SWITCH_STACK
296 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
297#else
298 uint32_t fFlags = 0;
299#endif
300
301 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
302 {
303 PVMCPU pVCpu = &pVM->aCpus[idCpu];
304
305#ifdef VBOX_STRICT_VMM_STACK
306 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
307#else
308 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
309#endif
310 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
311 if (RT_SUCCESS(rc))
312 {
313#ifdef VBOX_STRICT_VMM_STACK
314 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
315#endif
316#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
317 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
318 if (!VMMIsHwVirtExtForced(pVM))
319 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
320 else
321#endif
322 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
323 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
324 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
325 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
326
327 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
328 }
329 }
330
331 return rc;
332}
333
334
335/**
336 * Initialize the loggers.
337 *
338 * @returns VBox status code.
339 * @param pVM Pointer to the VM.
340 */
341static int vmmR3InitLoggers(PVM pVM)
342{
343 int rc;
344#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
345
346 /*
347 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
348 */
349#ifdef LOG_ENABLED
350 PRTLOGGER pLogger = RTLogDefaultInstance();
351 if (pLogger)
352 {
353 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
354 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
355 if (RT_FAILURE(rc))
356 return rc;
357 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
358
359# ifdef VBOX_WITH_R0_LOGGING
360 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
361 for (VMCPUID i = 0; i < pVM->cCpus; i++)
362 {
363 PVMCPU pVCpu = &pVM->aCpus[i];
364 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
365 (void **)&pVCpu->vmm.s.pR0LoggerR3);
366 if (RT_FAILURE(rc))
367 return rc;
368 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
369 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
370 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
371 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
372 }
373# endif
374 }
375#endif /* LOG_ENABLED */
376
377#ifdef VBOX_WITH_RC_RELEASE_LOGGING
378 /*
379 * Allocate RC release logger instances (finalized in the relocator).
380 */
381 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
382 if (pRelLogger)
383 {
384 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
385 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
386 if (RT_FAILURE(rc))
387 return rc;
388 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
389 }
390#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
391 return VINF_SUCCESS;
392}
393
394
395/**
396 * VMMR3Init worker that register the statistics with STAM.
397 *
398 * @param pVM The shared VM structure.
399 */
400static void vmmR3InitRegisterStats(PVM pVM)
401{
402 /*
403 * Statistics.
404 */
405 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
464
465#ifdef VBOX_WITH_STATISTICS
466 for (VMCPUID i = 0; i < pVM->cCpus; i++)
467 {
468 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
469 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
470 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
471 }
472#endif
473}
474
475
476/**
477 * Initializes the R0 VMM.
478 *
479 * @returns VBox status code.
480 * @param pVM Pointer to the VM.
481 */
482VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
483{
484 int rc;
485 PVMCPU pVCpu = VMMGetCpu(pVM);
486 Assert(pVCpu && pVCpu->idCpu == 0);
487
488#ifdef LOG_ENABLED
489 /*
490 * Initialize the ring-0 logger if we haven't done so yet.
491 */
492 if ( pVCpu->vmm.s.pR0LoggerR3
493 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
494 {
495 rc = VMMR3UpdateLoggers(pVM);
496 if (RT_FAILURE(rc))
497 return rc;
498 }
499#endif
500
501 /*
502 * Call Ring-0 entry with init code.
503 */
504 for (;;)
505 {
506#ifdef NO_SUPCALLR0VMM
507 //rc = VERR_GENERAL_FAILURE;
508 rc = VINF_SUCCESS;
509#else
510 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
511#endif
512 /*
513 * Flush the logs.
514 */
515#ifdef LOG_ENABLED
516 if ( pVCpu->vmm.s.pR0LoggerR3
517 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
518 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
519#endif
520 if (rc != VINF_VMM_CALL_HOST)
521 break;
522 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
523 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
524 break;
525 /* Resume R0 */
526 }
527
528 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
529 {
530 LogRel(("R0 init failed, rc=%Rra\n", rc));
531 if (RT_SUCCESS(rc))
532 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
533 }
534 return rc;
535}
536
537
538#ifdef VBOX_WITH_RAW_MODE
539/**
540 * Initializes the RC VMM.
541 *
542 * @returns VBox status code.
543 * @param pVM Pointer to the VM.
544 */
545VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
546{
547 PVMCPU pVCpu = VMMGetCpu(pVM);
548 Assert(pVCpu && pVCpu->idCpu == 0);
549
550 /* In VMX mode, there's no need to init RC. */
551 if (pVM->vmm.s.fSwitcherDisabled)
552 return VINF_SUCCESS;
553
554 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
555
556 /*
557 * Call VMMGCInit():
558 * -# resolve the address.
559 * -# setup stackframe and EIP to use the trampoline.
560 * -# do a generic hypervisor call.
561 */
562 RTRCPTR RCPtrEP;
563 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
564 if (RT_SUCCESS(rc))
565 {
566 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
567 uint64_t u64TS = RTTimeProgramStartNanoTS();
568 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
569 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
570 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
571 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
572 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
573 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
574 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
575 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
576 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
577
578 for (;;)
579 {
580#ifdef NO_SUPCALLR0VMM
581 //rc = VERR_GENERAL_FAILURE;
582 rc = VINF_SUCCESS;
583#else
584 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
585#endif
586#ifdef LOG_ENABLED
587 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
588 if ( pLogger
589 && pLogger->offScratch > 0)
590 RTLogFlushRC(NULL, pLogger);
591#endif
592#ifdef VBOX_WITH_RC_RELEASE_LOGGING
593 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
594 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
595 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
596#endif
597 if (rc != VINF_VMM_CALL_HOST)
598 break;
599 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
600 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
601 break;
602 }
603
604 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
605 {
606 VMMR3FatalDump(pVM, pVCpu, rc);
607 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
608 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
609 }
610 AssertRC(rc);
611 }
612 return rc;
613}
614#endif /* VBOX_WITH_RAW_MODE */
615
616
617/**
618 * Called when an init phase completes.
619 *
620 * @returns VBox status code.
621 * @param pVM Pointer to the VM.
622 * @param enmWhat Which init phase.
623 */
624VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
625{
626 int rc = VINF_SUCCESS;
627
628 switch (enmWhat)
629 {
630 case VMINITCOMPLETED_RING3:
631 {
632 /*
633 * CPUM's post-initialization (APIC base MSR caching).
634 */
635 rc = CPUMR3InitCompleted(pVM);
636 AssertRCReturn(rc, rc);
637
638 /*
639 * Set page attributes to r/w for stack pages.
640 */
641 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
642 {
643 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
644 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
645 AssertRCReturn(rc, rc);
646 }
647
648 /*
649 * Create the EMT yield timer.
650 */
651 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
652 AssertRCReturn(rc, rc);
653
654 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
655 AssertRCReturn(rc, rc);
656
657#ifdef VBOX_WITH_NMI
658 /*
659 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
660 */
661 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
662 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
663 AssertRCReturn(rc, rc);
664#endif
665
666#ifdef VBOX_STRICT_VMM_STACK
667 /*
668 * Setup the stack guard pages: Two inaccessible pages at each sides of the
669 * stack to catch over/under-flows.
670 */
671 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
672 {
673 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
674
675 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
676 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
677
678 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
679 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
680 }
681 pVM->vmm.s.fStackGuardsStationed = true;
682#endif
683 break;
684 }
685
686 case VMINITCOMPLETED_RING0:
687 {
688 /*
689 * Disable the periodic preemption timers if we can use the
690 * VMX-preemption timer instead.
691 */
692 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
693 && HMR3IsVmxPreemptionTimerUsed(pVM))
694 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
695 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
696
697 /*
698 * CPUM's post-initialization (print CPUIDs).
699 */
700 CPUMR3LogCpuIds(pVM);
701 break;
702 }
703
704 default: /* shuts up gcc */
705 break;
706 }
707
708 return rc;
709}
710
711
712/**
713 * Terminate the VMM bits.
714 *
715 * @returns VINF_SUCCESS.
716 * @param pVM Pointer to the VM.
717 */
718VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
719{
720 PVMCPU pVCpu = VMMGetCpu(pVM);
721 Assert(pVCpu && pVCpu->idCpu == 0);
722
723 /*
724 * Call Ring-0 entry with termination code.
725 */
726 int rc;
727 for (;;)
728 {
729#ifdef NO_SUPCALLR0VMM
730 //rc = VERR_GENERAL_FAILURE;
731 rc = VINF_SUCCESS;
732#else
733 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
734#endif
735 /*
736 * Flush the logs.
737 */
738#ifdef LOG_ENABLED
739 if ( pVCpu->vmm.s.pR0LoggerR3
740 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
741 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
742#endif
743 if (rc != VINF_VMM_CALL_HOST)
744 break;
745 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
746 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
747 break;
748 /* Resume R0 */
749 }
750 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
751 {
752 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
753 if (RT_SUCCESS(rc))
754 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
755 }
756
757 for (VMCPUID i = 0; i < pVM->cCpus; i++)
758 {
759 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
760 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
761 }
762 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
763 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
764 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
765 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
766 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
767 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
768 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
769 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
770
771#ifdef VBOX_STRICT_VMM_STACK
772 /*
773 * Make the two stack guard pages present again.
774 */
775 if (pVM->vmm.s.fStackGuardsStationed)
776 {
777 for (VMCPUID i = 0; i < pVM->cCpus; i++)
778 {
779 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
780 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
781 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
782 }
783 pVM->vmm.s.fStackGuardsStationed = false;
784 }
785#endif
786
787 vmmTermFormatTypes();
788 return rc;
789}
790
791
792/**
793 * Applies relocations to data and code managed by this
794 * component. This function will be called at init and
795 * whenever the VMM need to relocate it self inside the GC.
796 *
797 * The VMM will need to apply relocations to the core code.
798 *
799 * @param pVM Pointer to the VM.
800 * @param offDelta The relocation delta.
801 */
802VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
803{
804 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
805
806 /*
807 * Recalc the RC address.
808 */
809#ifdef VBOX_WITH_RAW_MODE
810 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
811#endif
812
813 /*
814 * The stack.
815 */
816 for (VMCPUID i = 0; i < pVM->cCpus; i++)
817 {
818 PVMCPU pVCpu = &pVM->aCpus[i];
819
820 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
821
822 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
823 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
824 }
825
826 /*
827 * All the switchers.
828 */
829 vmmR3SwitcherRelocate(pVM, offDelta);
830
831 /*
832 * Get other RC entry points.
833 */
834 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
835 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
836
837 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
838 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
839
840 /*
841 * Update the logger.
842 */
843 VMMR3UpdateLoggers(pVM);
844}
845
846
847/**
848 * Updates the settings for the RC and R0 loggers.
849 *
850 * @returns VBox status code.
851 * @param pVM Pointer to the VM.
852 */
853VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
854{
855 /*
856 * Simply clone the logger instance (for RC).
857 */
858 int rc = VINF_SUCCESS;
859 RTRCPTR RCPtrLoggerFlush = 0;
860
861 if (pVM->vmm.s.pRCLoggerR3
862#ifdef VBOX_WITH_RC_RELEASE_LOGGING
863 || pVM->vmm.s.pRCRelLoggerR3
864#endif
865 )
866 {
867 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
868 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
869 }
870
871 if (pVM->vmm.s.pRCLoggerR3)
872 {
873 RTRCPTR RCPtrLoggerWrapper = 0;
874 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
875 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
876
877 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
878 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
879 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
880 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
881 }
882
883#ifdef VBOX_WITH_RC_RELEASE_LOGGING
884 if (pVM->vmm.s.pRCRelLoggerR3)
885 {
886 RTRCPTR RCPtrLoggerWrapper = 0;
887 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
888 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
889
890 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
891 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
892 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
893 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
894 }
895#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
896
897#ifdef LOG_ENABLED
898 /*
899 * For the ring-0 EMT logger, we use a per-thread logger instance
900 * in ring-0. Only initialize it once.
901 */
902 PRTLOGGER const pDefault = RTLogDefaultInstance();
903 for (VMCPUID i = 0; i < pVM->cCpus; i++)
904 {
905 PVMCPU pVCpu = &pVM->aCpus[i];
906 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
907 if (pR0LoggerR3)
908 {
909 if (!pR0LoggerR3->fCreated)
910 {
911 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
912 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
913 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
914
915 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
916 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
917 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
918
919 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
920 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
921 pfnLoggerWrapper, pfnLoggerFlush,
922 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
923 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
924
925 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
926 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
927 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
928 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
929 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
930 pfnLoggerPrefix, NIL_RTR0PTR);
931 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
932
933 pR0LoggerR3->idCpu = i;
934 pR0LoggerR3->fCreated = true;
935 pR0LoggerR3->fFlushingDisabled = false;
936
937 }
938
939 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
940 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
941 AssertRC(rc);
942 }
943 }
944#endif
945 return rc;
946}
947
948
949/**
950 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
951 *
952 * @returns Pointer to the buffer.
953 * @param pVM Pointer to the VM.
954 */
955VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
956{
957 if (HMIsEnabled(pVM))
958 return pVM->vmm.s.szRing0AssertMsg1;
959
960 RTRCPTR RCPtr;
961 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
962 if (RT_SUCCESS(rc))
963 return (const char *)MMHyperRCToR3(pVM, RCPtr);
964
965 return NULL;
966}
967
968
969/**
970 * Returns the VMCPU of the specified virtual CPU.
971 *
972 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
973 *
974 * @param pUVM The user mode VM handle.
975 * @param idCpu The ID of the virtual CPU.
976 */
977VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
978{
979 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
980 AssertReturn(idCpu < pUVM->cCpus, NULL);
981 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
982 return &pUVM->pVM->aCpus[idCpu];
983}
984
985
986/**
987 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
988 *
989 * @returns Pointer to the buffer.
990 * @param pVM Pointer to the VM.
991 */
992VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
993{
994 if (HMIsEnabled(pVM))
995 return pVM->vmm.s.szRing0AssertMsg2;
996
997 RTRCPTR RCPtr;
998 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
999 if (RT_SUCCESS(rc))
1000 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1001
1002 return NULL;
1003}
1004
1005
1006/**
1007 * Execute state save operation.
1008 *
1009 * @returns VBox status code.
1010 * @param pVM Pointer to the VM.
1011 * @param pSSM SSM operation handle.
1012 */
1013static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1014{
1015 LogFlow(("vmmR3Save:\n"));
1016
1017 /*
1018 * Save the started/stopped state of all CPUs except 0 as it will always
1019 * be running. This avoids breaking the saved state version. :-)
1020 */
1021 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1022 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1023
1024 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1025}
1026
1027
1028/**
1029 * Execute state load operation.
1030 *
1031 * @returns VBox status code.
1032 * @param pVM Pointer to the VM.
1033 * @param pSSM SSM operation handle.
1034 * @param uVersion Data layout version.
1035 * @param uPass The data pass.
1036 */
1037static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1038{
1039 LogFlow(("vmmR3Load:\n"));
1040 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1041
1042 /*
1043 * Validate version.
1044 */
1045 if ( uVersion != VMM_SAVED_STATE_VERSION
1046 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1047 {
1048 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1049 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1050 }
1051
1052 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1053 {
1054 /* Ignore the stack bottom, stack pointer and stack bits. */
1055 RTRCPTR RCPtrIgnored;
1056 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1057 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1058#ifdef RT_OS_DARWIN
1059 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1060 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1061 && SSMR3HandleRevision(pSSM) >= 48858
1062 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1063 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1064 )
1065 SSMR3Skip(pSSM, 16384);
1066 else
1067 SSMR3Skip(pSSM, 8192);
1068#else
1069 SSMR3Skip(pSSM, 8192);
1070#endif
1071 }
1072
1073 /*
1074 * Restore the VMCPU states. VCPU 0 is always started.
1075 */
1076 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1077 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1078 {
1079 bool fStarted;
1080 int rc = SSMR3GetBool(pSSM, &fStarted);
1081 if (RT_FAILURE(rc))
1082 return rc;
1083 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1084 }
1085
1086 /* terminator */
1087 uint32_t u32;
1088 int rc = SSMR3GetU32(pSSM, &u32);
1089 if (RT_FAILURE(rc))
1090 return rc;
1091 if (u32 != UINT32_MAX)
1092 {
1093 AssertMsgFailed(("u32=%#x\n", u32));
1094 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1095 }
1096 return VINF_SUCCESS;
1097}
1098
1099
1100#ifdef VBOX_WITH_RAW_MODE
1101/**
1102 * Resolve a builtin RC symbol.
1103 *
1104 * Called by PDM when loading or relocating RC modules.
1105 *
1106 * @returns VBox status
1107 * @param pVM Pointer to the VM.
1108 * @param pszSymbol Symbol to resolv
1109 * @param pRCPtrValue Where to store the symbol value.
1110 *
1111 * @remark This has to work before VMMR3Relocate() is called.
1112 */
1113VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1114{
1115 if (!strcmp(pszSymbol, "g_Logger"))
1116 {
1117 if (pVM->vmm.s.pRCLoggerR3)
1118 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1119 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1120 }
1121 else if (!strcmp(pszSymbol, "g_RelLogger"))
1122 {
1123# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1124 if (pVM->vmm.s.pRCRelLoggerR3)
1125 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1126 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1127# else
1128 *pRCPtrValue = NIL_RTRCPTR;
1129# endif
1130 }
1131 else
1132 return VERR_SYMBOL_NOT_FOUND;
1133 return VINF_SUCCESS;
1134}
1135#endif /* VBOX_WITH_RAW_MODE */
1136
1137
1138/**
1139 * Suspends the CPU yielder.
1140 *
1141 * @param pVM Pointer to the VM.
1142 */
1143VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1144{
1145 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1146 if (!pVM->vmm.s.cYieldResumeMillies)
1147 {
1148 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1149 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1150 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1151 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1152 else
1153 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1154 TMTimerStop(pVM->vmm.s.pYieldTimer);
1155 }
1156 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1157}
1158
1159
1160/**
1161 * Stops the CPU yielder.
1162 *
1163 * @param pVM Pointer to the VM.
1164 */
1165VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1166{
1167 if (!pVM->vmm.s.cYieldResumeMillies)
1168 TMTimerStop(pVM->vmm.s.pYieldTimer);
1169 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1170 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1171}
1172
1173
1174/**
1175 * Resumes the CPU yielder when it has been a suspended or stopped.
1176 *
1177 * @param pVM Pointer to the VM.
1178 */
1179VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1180{
1181 if (pVM->vmm.s.cYieldResumeMillies)
1182 {
1183 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1184 pVM->vmm.s.cYieldResumeMillies = 0;
1185 }
1186}
1187
1188
1189/**
1190 * Internal timer callback function.
1191 *
1192 * @param pVM The VM.
1193 * @param pTimer The timer handle.
1194 * @param pvUser User argument specified upon timer creation.
1195 */
1196static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1197{
1198 NOREF(pvUser);
1199
1200 /*
1201 * This really needs some careful tuning. While we shouldn't be too greedy since
1202 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1203 * because that'll cause us to stop up.
1204 *
1205 * The current logic is to use the default interval when there is no lag worth
1206 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1207 *
1208 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1209 * so the lag is up to date.)
1210 */
1211 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1212 if ( u64Lag < 50000000 /* 50ms */
1213 || ( u64Lag < 1000000000 /* 1s */
1214 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1215 )
1216 {
1217 uint64_t u64Elapsed = RTTimeNanoTS();
1218 pVM->vmm.s.u64LastYield = u64Elapsed;
1219
1220 RTThreadYield();
1221
1222#ifdef LOG_ENABLED
1223 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1224 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1225#endif
1226 }
1227 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1228}
1229
1230
1231#ifdef VBOX_WITH_RAW_MODE
1232/**
1233 * Executes guest code in the raw-mode context.
1234 *
1235 * @param pVM Pointer to the VM.
1236 * @param pVCpu Pointer to the VMCPU.
1237 */
1238VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1239{
1240 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1241
1242 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1243
1244 /*
1245 * Set the hypervisor to resume executing a CPUM resume function
1246 * in CPUMRCA.asm.
1247 */
1248 CPUMSetHyperState(pVCpu,
1249 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1250 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1251 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1252 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1253 0, /* eax */
1254 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1255
1256 /*
1257 * We hide log flushes (outer) and hypervisor interrupts (inner).
1258 */
1259 for (;;)
1260 {
1261#ifdef VBOX_STRICT
1262 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1263 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1264 PGMMapCheck(pVM);
1265# ifdef VBOX_WITH_SAFE_STR
1266 SELMR3CheckShadowTR(pVM);
1267# endif
1268#endif
1269 int rc;
1270 do
1271 {
1272#ifdef NO_SUPCALLR0VMM
1273 rc = VERR_GENERAL_FAILURE;
1274#else
1275 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1276 if (RT_LIKELY(rc == VINF_SUCCESS))
1277 rc = pVCpu->vmm.s.iLastGZRc;
1278#endif
1279 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1280
1281 /*
1282 * Flush the logs.
1283 */
1284#ifdef LOG_ENABLED
1285 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1286 if ( pLogger
1287 && pLogger->offScratch > 0)
1288 RTLogFlushRC(NULL, pLogger);
1289#endif
1290#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1291 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1292 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1293 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1294#endif
1295 if (rc != VINF_VMM_CALL_HOST)
1296 {
1297 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1298 return rc;
1299 }
1300 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1301 if (RT_FAILURE(rc))
1302 return rc;
1303 /* Resume GC */
1304 }
1305}
1306#endif /* VBOX_WITH_RAW_MODE */
1307
1308
1309/**
1310 * Executes guest code (Intel VT-x and AMD-V).
1311 *
1312 * @param pVM Pointer to the VM.
1313 * @param pVCpu Pointer to the VMCPU.
1314 */
1315VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1316{
1317 Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1318
1319 for (;;)
1320 {
1321 int rc;
1322 do
1323 {
1324#ifdef NO_SUPCALLR0VMM
1325 rc = VERR_GENERAL_FAILURE;
1326#else
1327 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1328 if (RT_LIKELY(rc == VINF_SUCCESS))
1329 rc = pVCpu->vmm.s.iLastGZRc;
1330#endif
1331 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1332
1333#if 0 /* todo triggers too often */
1334 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1335#endif
1336
1337#ifdef LOG_ENABLED
1338 /*
1339 * Flush the log
1340 */
1341 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1342 if ( pR0LoggerR3
1343 && pR0LoggerR3->Logger.offScratch > 0)
1344 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1345#endif /* !LOG_ENABLED */
1346 if (rc != VINF_VMM_CALL_HOST)
1347 {
1348 Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1349 return rc;
1350 }
1351 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1352 if (RT_FAILURE(rc))
1353 return rc;
1354 /* Resume R0 */
1355 }
1356}
1357
1358/**
1359 * VCPU worker for VMMSendSipi.
1360 *
1361 * @param pVM Pointer to the VM.
1362 * @param idCpu Virtual CPU to perform SIPI on
1363 * @param uVector SIPI vector
1364 */
1365DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1366{
1367 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1368 VMCPU_ASSERT_EMT(pVCpu);
1369
1370 /** @todo what are we supposed to do if the processor is already running? */
1371 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1372 return VERR_ACCESS_DENIED;
1373
1374
1375 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1376
1377 pCtx->cs.Sel = uVector << 8;
1378 pCtx->cs.ValidSel = uVector << 8;
1379 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1380 pCtx->cs.u64Base = uVector << 12;
1381 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1382 pCtx->rip = 0;
1383
1384 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1385
1386# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1387 EMSetState(pVCpu, EMSTATE_HALTED);
1388 return VINF_EM_RESCHEDULE;
1389# else /* And if we go the VMCPU::enmState way it can stay here. */
1390 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1391 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1392 return VINF_SUCCESS;
1393# endif
1394}
1395
1396DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1397{
1398 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1399 VMCPU_ASSERT_EMT(pVCpu);
1400
1401 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1402
1403 PGMR3ResetCpu(pVM, pVCpu);
1404 CPUMR3ResetCpu(pVCpu);
1405
1406 return VINF_EM_WAIT_SIPI;
1407}
1408
1409/**
1410 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1411 * and unhalting processor
1412 *
1413 * @param pVM Pointer to the VM.
1414 * @param idCpu Virtual CPU to perform SIPI on
1415 * @param uVector SIPI vector
1416 */
1417VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1418{
1419 AssertReturnVoid(idCpu < pVM->cCpus);
1420
1421 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1422 AssertRC(rc);
1423}
1424
1425/**
1426 * Sends init IPI to the virtual CPU.
1427 *
1428 * @param pVM Pointer to the VM.
1429 * @param idCpu Virtual CPU to perform int IPI on
1430 */
1431VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1432{
1433 AssertReturnVoid(idCpu < pVM->cCpus);
1434
1435 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1436 AssertRC(rc);
1437}
1438
1439/**
1440 * Registers the guest memory range that can be used for patching
1441 *
1442 * @returns VBox status code.
1443 * @param pVM Pointer to the VM.
1444 * @param pPatchMem Patch memory range
1445 * @param cbPatchMem Size of the memory range
1446 */
1447VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1448{
1449 VM_ASSERT_EMT(pVM);
1450 if (HMIsEnabled(pVM))
1451 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1452
1453 return VERR_NOT_SUPPORTED;
1454}
1455
1456/**
1457 * Deregisters the guest memory range that can be used for patching
1458 *
1459 * @returns VBox status code.
1460 * @param pVM Pointer to the VM.
1461 * @param pPatchMem Patch memory range
1462 * @param cbPatchMem Size of the memory range
1463 */
1464VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1465{
1466 if (HMIsEnabled(pVM))
1467 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1468
1469 return VINF_SUCCESS;
1470}
1471
1472
1473/**
1474 * Count returns and have the last non-caller EMT wake up the caller.
1475 *
1476 * @returns VBox strict informational status code for EM scheduling. No failures
1477 * will be returned here, those are for the caller only.
1478 *
1479 * @param pVM Pointer to the VM.
1480 */
1481DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1482{
1483 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1484 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1485 if (cReturned == pVM->cCpus - 1U)
1486 {
1487 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1488 AssertLogRelRC(rc);
1489 }
1490
1491 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1492 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1493 ("%Rrc\n", rcRet),
1494 VERR_IPE_UNEXPECTED_INFO_STATUS);
1495 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1496}
1497
1498
1499/**
1500 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1501 *
1502 * @returns VBox strict informational status code for EM scheduling. No failures
1503 * will be returned here, those are for the caller only. When
1504 * fIsCaller is set, VINF_SUCCESS is always returned.
1505 *
1506 * @param pVM Pointer to the VM.
1507 * @param pVCpu The VMCPU structure for the calling EMT.
1508 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1509 * not.
1510 * @param fFlags The flags.
1511 * @param pfnRendezvous The callback.
1512 * @param pvUser The user argument for the callback.
1513 */
1514static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1515 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1516{
1517 int rc;
1518
1519 /*
1520 * Enter, the last EMT triggers the next callback phase.
1521 */
1522 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1523 if (cEntered != pVM->cCpus)
1524 {
1525 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1526 {
1527 /* Wait for our turn. */
1528 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1529 AssertLogRelRC(rc);
1530 }
1531 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1532 {
1533 /* Wait for the last EMT to arrive and wake everyone up. */
1534 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1535 AssertLogRelRC(rc);
1536 }
1537 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1538 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1539 {
1540 /* Wait for our turn. */
1541 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1542 AssertLogRelRC(rc);
1543 }
1544 else
1545 {
1546 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1547
1548 /*
1549 * The execute once is handled specially to optimize the code flow.
1550 *
1551 * The last EMT to arrive will perform the callback and the other
1552 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1553 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1554 * returns, that EMT will initiate the normal return sequence.
1555 */
1556 if (!fIsCaller)
1557 {
1558 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1559 AssertLogRelRC(rc);
1560
1561 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1562 }
1563 return VINF_SUCCESS;
1564 }
1565 }
1566 else
1567 {
1568 /*
1569 * All EMTs are waiting, clear the FF and take action according to the
1570 * execution method.
1571 */
1572 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1573
1574 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1575 {
1576 /* Wake up everyone. */
1577 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1578 AssertLogRelRC(rc);
1579 }
1580 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1581 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1582 {
1583 /* Figure out who to wake up and wake it up. If it's ourself, then
1584 it's easy otherwise wait for our turn. */
1585 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1586 ? 0
1587 : pVM->cCpus - 1U;
1588 if (pVCpu->idCpu != iFirst)
1589 {
1590 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1591 AssertLogRelRC(rc);
1592 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1593 AssertLogRelRC(rc);
1594 }
1595 }
1596 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1597 }
1598
1599
1600 /*
1601 * Do the callback and update the status if necessary.
1602 */
1603 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1604 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1605 {
1606 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1607 if (rcStrict != VINF_SUCCESS)
1608 {
1609 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1610 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1611 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1612 int32_t i32RendezvousStatus;
1613 do
1614 {
1615 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1616 if ( rcStrict == i32RendezvousStatus
1617 || RT_FAILURE(i32RendezvousStatus)
1618 || ( i32RendezvousStatus != VINF_SUCCESS
1619 && rcStrict > i32RendezvousStatus))
1620 break;
1621 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1622 }
1623 }
1624
1625 /*
1626 * Increment the done counter and take action depending on whether we're
1627 * the last to finish callback execution.
1628 */
1629 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1630 if ( cDone != pVM->cCpus
1631 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1632 {
1633 /* Signal the next EMT? */
1634 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1635 {
1636 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1637 AssertLogRelRC(rc);
1638 }
1639 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1640 {
1641 Assert(cDone == pVCpu->idCpu + 1U);
1642 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1643 AssertLogRelRC(rc);
1644 }
1645 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1646 {
1647 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1648 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1649 AssertLogRelRC(rc);
1650 }
1651
1652 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1653 if (!fIsCaller)
1654 {
1655 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1656 AssertLogRelRC(rc);
1657 }
1658 }
1659 else
1660 {
1661 /* Callback execution is all done, tell the rest to return. */
1662 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1663 AssertLogRelRC(rc);
1664 }
1665
1666 if (!fIsCaller)
1667 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1668 return VINF_SUCCESS;
1669}
1670
1671
1672/**
1673 * Called in response to VM_FF_EMT_RENDEZVOUS.
1674 *
1675 * @returns VBox strict status code - EM scheduling. No errors will be returned
1676 * here, nor will any non-EM scheduling status codes be returned.
1677 *
1678 * @param pVM Pointer to the VM.
1679 * @param pVCpu The handle of the calling EMT.
1680 *
1681 * @thread EMT
1682 */
1683VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1684{
1685 Assert(!pVCpu->vmm.s.fInRendezvous);
1686 pVCpu->vmm.s.fInRendezvous = true;
1687 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1688 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1689 pVCpu->vmm.s.fInRendezvous = false;
1690 return rc;
1691}
1692
1693
1694/**
1695 * EMT rendezvous.
1696 *
1697 * Gathers all the EMTs and execute some code on each of them, either in a one
1698 * by one fashion or all at once.
1699 *
1700 * @returns VBox strict status code. This will be the first error,
1701 * VINF_SUCCESS, or an EM scheduling status code.
1702 *
1703 * @param pVM Pointer to the VM.
1704 * @param fFlags Flags indicating execution methods. See
1705 * grp_VMMR3EmtRendezvous_fFlags.
1706 * @param pfnRendezvous The callback.
1707 * @param pvUser User argument for the callback.
1708 *
1709 * @thread Any.
1710 */
1711VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1712{
1713 /*
1714 * Validate input.
1715 */
1716 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1717 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1718 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1719 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1720 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1721 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1722 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1723 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1724
1725 VBOXSTRICTRC rcStrict;
1726 PVMCPU pVCpu = VMMGetCpu(pVM);
1727 if (!pVCpu)
1728 /*
1729 * Forward the request to an EMT thread.
1730 */
1731 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1732 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1733 else if (pVM->cCpus == 1)
1734 {
1735 /*
1736 * Shortcut for the single EMT case.
1737 */
1738 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1739 pVCpu->vmm.s.fInRendezvous = true;
1740 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1741 pVCpu->vmm.s.fInRendezvous = false;
1742 }
1743 else
1744 {
1745 /*
1746 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1747 * lookout of the RENDEZVOUS FF.
1748 */
1749 int rc;
1750 rcStrict = VINF_SUCCESS;
1751 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1752 {
1753 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1754
1755 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1756 {
1757 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1758 {
1759 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1760 if ( rc != VINF_SUCCESS
1761 && ( rcStrict == VINF_SUCCESS
1762 || rcStrict > rc))
1763 rcStrict = rc;
1764 /** @todo Perhaps deal with termination here? */
1765 }
1766 ASMNopPause();
1767 }
1768 }
1769 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1770 Assert(!pVCpu->vmm.s.fInRendezvous);
1771 pVCpu->vmm.s.fInRendezvous = true;
1772
1773 /*
1774 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1775 */
1776 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1777 {
1778 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1779 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1780 }
1781 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1782 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1783 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1784 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1785 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1786 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1787 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1788 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1789 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1790 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1791 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1792
1793 /*
1794 * Set the FF and poke the other EMTs.
1795 */
1796 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1797 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1798
1799 /*
1800 * Do the same ourselves.
1801 */
1802 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1803
1804 /*
1805 * The caller waits for the other EMTs to be done and return before doing
1806 * the cleanup. This makes away with wakeup / reset races we would otherwise
1807 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1808 */
1809 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1810 AssertLogRelRC(rc);
1811
1812 /*
1813 * Get the return code and clean up a little bit.
1814 */
1815 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1816 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1817
1818 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1819 pVCpu->vmm.s.fInRendezvous = false;
1820
1821 /*
1822 * Merge rcStrict and rcMy.
1823 */
1824 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1825 if ( rcMy != VINF_SUCCESS
1826 && ( rcStrict == VINF_SUCCESS
1827 || rcStrict > rcMy))
1828 rcStrict = rcMy;
1829 }
1830
1831 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1832 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1833 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1834 VERR_IPE_UNEXPECTED_INFO_STATUS);
1835 return VBOXSTRICTRC_VAL(rcStrict);
1836}
1837
1838
1839/**
1840 * Disables/enables EMT rendezvous.
1841 *
1842 * This is used to make sure EMT rendezvous does not take place while
1843 * processing a priority request.
1844 *
1845 * @returns Old rendezvous-disabled state.
1846 * @param pVCpu The handle of the calling EMT.
1847 * @param fDisabled True if disabled, false if enabled.
1848 */
1849VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1850{
1851 VMCPU_ASSERT_EMT(pVCpu);
1852 bool fOld = pVCpu->vmm.s.fInRendezvous;
1853 pVCpu->vmm.s.fInRendezvous = fDisabled;
1854 return fOld;
1855}
1856
1857
1858/**
1859 * Read from the ring 0 jump buffer stack
1860 *
1861 * @returns VBox status code.
1862 *
1863 * @param pVM Pointer to the VM.
1864 * @param idCpu The ID of the source CPU context (for the address).
1865 * @param R0Addr Where to start reading.
1866 * @param pvBuf Where to store the data we've read.
1867 * @param cbRead The number of bytes to read.
1868 */
1869VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1870{
1871 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1872 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1873
1874#ifdef VMM_R0_SWITCH_STACK
1875 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1876#else
1877 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1878#endif
1879 if ( off > VMM_STACK_SIZE
1880 || off + cbRead >= VMM_STACK_SIZE)
1881 return VERR_INVALID_POINTER;
1882
1883 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1884 return VINF_SUCCESS;
1885}
1886
1887#ifdef VBOX_WITH_RAW_MODE
1888
1889/**
1890 * Calls a RC function.
1891 *
1892 * @param pVM Pointer to the VM.
1893 * @param RCPtrEntry The address of the RC function.
1894 * @param cArgs The number of arguments in the ....
1895 * @param ... Arguments to the function.
1896 */
1897VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1898{
1899 va_list args;
1900 va_start(args, cArgs);
1901 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1902 va_end(args);
1903 return rc;
1904}
1905
1906
1907/**
1908 * Calls a RC function.
1909 *
1910 * @param pVM Pointer to the VM.
1911 * @param RCPtrEntry The address of the RC function.
1912 * @param cArgs The number of arguments in the ....
1913 * @param args Arguments to the function.
1914 */
1915VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1916{
1917 /* Raw mode implies 1 VCPU. */
1918 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1919 PVMCPU pVCpu = &pVM->aCpus[0];
1920
1921 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1922
1923 /*
1924 * Setup the call frame using the trampoline.
1925 */
1926 CPUMSetHyperState(pVCpu,
1927 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1928 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1929 RCPtrEntry, /* eax */
1930 cArgs /* edx */
1931 );
1932
1933 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1934 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1935 int i = cArgs;
1936 while (i-- > 0)
1937 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1938
1939 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1940 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1941
1942 /*
1943 * We hide log flushes (outer) and hypervisor interrupts (inner).
1944 */
1945 for (;;)
1946 {
1947 int rc;
1948 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1949 do
1950 {
1951#ifdef NO_SUPCALLR0VMM
1952 rc = VERR_GENERAL_FAILURE;
1953#else
1954 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1955 if (RT_LIKELY(rc == VINF_SUCCESS))
1956 rc = pVCpu->vmm.s.iLastGZRc;
1957#endif
1958 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1959
1960 /*
1961 * Flush the loggers.
1962 */
1963#ifdef LOG_ENABLED
1964 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1965 if ( pLogger
1966 && pLogger->offScratch > 0)
1967 RTLogFlushRC(NULL, pLogger);
1968#endif
1969#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1970 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1971 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1972 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1973#endif
1974 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1975 VMMR3FatalDump(pVM, pVCpu, rc);
1976 if (rc != VINF_VMM_CALL_HOST)
1977 {
1978 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1979 return rc;
1980 }
1981 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1982 if (RT_FAILURE(rc))
1983 return rc;
1984 }
1985}
1986
1987#endif /* VBOX_WITH_RAW_MODE */
1988
1989/**
1990 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1991 *
1992 * @returns VBox status code.
1993 * @param pVM Pointer to the VM.
1994 * @param uOperation Operation to execute.
1995 * @param u64Arg Constant argument.
1996 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1997 * details.
1998 */
1999VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2000{
2001 PVMCPU pVCpu = VMMGetCpu(pVM);
2002 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2003
2004 /*
2005 * Call Ring-0 entry with init code.
2006 */
2007 int rc;
2008 for (;;)
2009 {
2010#ifdef NO_SUPCALLR0VMM
2011 rc = VERR_GENERAL_FAILURE;
2012#else
2013 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2014#endif
2015 /*
2016 * Flush the logs.
2017 */
2018#ifdef LOG_ENABLED
2019 if ( pVCpu->vmm.s.pR0LoggerR3
2020 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2021 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2022#endif
2023 if (rc != VINF_VMM_CALL_HOST)
2024 break;
2025 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2026 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2027 break;
2028 /* Resume R0 */
2029 }
2030
2031 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2032 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2033 VERR_IPE_UNEXPECTED_INFO_STATUS);
2034 return rc;
2035}
2036
2037
2038#ifdef VBOX_WITH_RAW_MODE
2039/**
2040 * Resumes executing hypervisor code when interrupted by a queue flush or a
2041 * debug event.
2042 *
2043 * @returns VBox status code.
2044 * @param pVM Pointer to the VM.
2045 * @param pVCpu Pointer to the VMCPU.
2046 */
2047VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2048{
2049 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2050 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2051
2052 /*
2053 * We hide log flushes (outer) and hypervisor interrupts (inner).
2054 */
2055 for (;;)
2056 {
2057 int rc;
2058 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2059 do
2060 {
2061# ifdef NO_SUPCALLR0VMM
2062 rc = VERR_GENERAL_FAILURE;
2063# else
2064 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2065 if (RT_LIKELY(rc == VINF_SUCCESS))
2066 rc = pVCpu->vmm.s.iLastGZRc;
2067# endif
2068 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2069
2070 /*
2071 * Flush the loggers.
2072 */
2073# ifdef LOG_ENABLED
2074 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2075 if ( pLogger
2076 && pLogger->offScratch > 0)
2077 RTLogFlushRC(NULL, pLogger);
2078# endif
2079# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2080 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2081 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2082 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2083# endif
2084 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2085 VMMR3FatalDump(pVM, pVCpu, rc);
2086 if (rc != VINF_VMM_CALL_HOST)
2087 {
2088 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2089 return rc;
2090 }
2091 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2092 if (RT_FAILURE(rc))
2093 return rc;
2094 }
2095}
2096#endif /* VBOX_WITH_RAW_MODE */
2097
2098
2099/**
2100 * Service a call to the ring-3 host code.
2101 *
2102 * @returns VBox status code.
2103 * @param pVM Pointer to the VM.
2104 * @param pVCpu Pointer to the VMCPU.
2105 * @remark Careful with critsects.
2106 */
2107static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2108{
2109 /*
2110 * We must also check for pending critsect exits or else we can deadlock
2111 * when entering other critsects here.
2112 */
2113 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2114 PDMCritSectBothFF(pVCpu);
2115
2116 switch (pVCpu->vmm.s.enmCallRing3Operation)
2117 {
2118 /*
2119 * Acquire a critical section.
2120 */
2121 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2122 {
2123 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2124 true /*fCallRing3*/);
2125 break;
2126 }
2127
2128 /*
2129 * Enter a r/w critical section exclusively.
2130 */
2131 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2132 {
2133 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2134 true /*fCallRing3*/);
2135 break;
2136 }
2137
2138 /*
2139 * Enter a r/w critical section shared.
2140 */
2141 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2142 {
2143 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2144 true /*fCallRing3*/);
2145 break;
2146 }
2147
2148 /*
2149 * Acquire the PDM lock.
2150 */
2151 case VMMCALLRING3_PDM_LOCK:
2152 {
2153 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2154 break;
2155 }
2156
2157 /*
2158 * Grow the PGM pool.
2159 */
2160 case VMMCALLRING3_PGM_POOL_GROW:
2161 {
2162 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2163 break;
2164 }
2165
2166 /*
2167 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2168 */
2169 case VMMCALLRING3_PGM_MAP_CHUNK:
2170 {
2171 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2172 break;
2173 }
2174
2175 /*
2176 * Allocates more handy pages.
2177 */
2178 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2179 {
2180 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2181 break;
2182 }
2183
2184 /*
2185 * Allocates a large page.
2186 */
2187 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2188 {
2189 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2190 break;
2191 }
2192
2193 /*
2194 * Acquire the PGM lock.
2195 */
2196 case VMMCALLRING3_PGM_LOCK:
2197 {
2198 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2199 break;
2200 }
2201
2202 /*
2203 * Acquire the MM hypervisor heap lock.
2204 */
2205 case VMMCALLRING3_MMHYPER_LOCK:
2206 {
2207 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2208 break;
2209 }
2210
2211#ifdef VBOX_WITH_REM
2212 /*
2213 * Flush REM handler notifications.
2214 */
2215 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2216 {
2217 REMR3ReplayHandlerNotifications(pVM);
2218 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2219 break;
2220 }
2221#endif
2222
2223 /*
2224 * This is a noop. We just take this route to avoid unnecessary
2225 * tests in the loops.
2226 */
2227 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2228 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2229 LogAlways(("*FLUSH*\n"));
2230 break;
2231
2232 /*
2233 * Set the VM error message.
2234 */
2235 case VMMCALLRING3_VM_SET_ERROR:
2236 VMR3SetErrorWorker(pVM);
2237 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2238 break;
2239
2240 /*
2241 * Set the VM runtime error message.
2242 */
2243 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2244 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2245 break;
2246
2247 /*
2248 * Signal a ring 0 hypervisor assertion.
2249 * Cancel the longjmp operation that's in progress.
2250 */
2251 case VMMCALLRING3_VM_R0_ASSERTION:
2252 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2253 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2254#ifdef RT_ARCH_X86
2255 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2256#else
2257 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2258#endif
2259#ifdef VMM_R0_SWITCH_STACK
2260 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2261#endif
2262 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2263 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2264 return VERR_VMM_RING0_ASSERTION;
2265
2266 /*
2267 * A forced switch to ring 0 for preemption purposes.
2268 */
2269 case VMMCALLRING3_VM_R0_PREEMPT:
2270 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2271 break;
2272
2273 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2274 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2275 break;
2276
2277 default:
2278 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2279 return VERR_VMM_UNKNOWN_RING3_CALL;
2280 }
2281
2282 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2283 return VINF_SUCCESS;
2284}
2285
2286
2287/**
2288 * Displays the Force action Flags.
2289 *
2290 * @param pVM Pointer to the VM.
2291 * @param pHlp The output helpers.
2292 * @param pszArgs The additional arguments (ignored).
2293 */
2294static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2295{
2296 int c;
2297 uint32_t f;
2298 NOREF(pszArgs);
2299
2300#define PRINT_FLAG(prf,flag) do { \
2301 if (f & (prf##flag)) \
2302 { \
2303 static const char *s_psz = #flag; \
2304 if (!(c % 6)) \
2305 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2306 else \
2307 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2308 c++; \
2309 f &= ~(prf##flag); \
2310 } \
2311 } while (0)
2312
2313#define PRINT_GROUP(prf,grp,sfx) do { \
2314 if (f & (prf##grp##sfx)) \
2315 { \
2316 static const char *s_psz = #grp; \
2317 if (!(c % 5)) \
2318 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2319 else \
2320 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2321 c++; \
2322 } \
2323 } while (0)
2324
2325 /*
2326 * The global flags.
2327 */
2328 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2329 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2330
2331 /* show the flag mnemonics */
2332 c = 0;
2333 f = fGlobalForcedActions;
2334 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2335 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2336 PRINT_FLAG(VM_FF_,PDM_DMA);
2337 PRINT_FLAG(VM_FF_,DBGF);
2338 PRINT_FLAG(VM_FF_,REQUEST);
2339 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2340 PRINT_FLAG(VM_FF_,RESET);
2341 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2342 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2343 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2344 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2345 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2346 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2347 if (f)
2348 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2349 else
2350 pHlp->pfnPrintf(pHlp, "\n");
2351
2352 /* the groups */
2353 c = 0;
2354 f = fGlobalForcedActions;
2355 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2356 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2357 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2358 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2359 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2360 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2361 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2362 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2363 if (c)
2364 pHlp->pfnPrintf(pHlp, "\n");
2365
2366 /*
2367 * Per CPU flags.
2368 */
2369 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2370 {
2371 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2372 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2373
2374 /* show the flag mnemonics */
2375 c = 0;
2376 f = fLocalForcedActions;
2377 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2378 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2379 PRINT_FLAG(VMCPU_FF_,TIMER);
2380 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2381 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2382 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2383 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2384 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2385 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2386 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2387 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2388 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2389 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2390 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2391 PRINT_FLAG(VMCPU_FF_,TO_R3);
2392 if (f)
2393 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2394 else
2395 pHlp->pfnPrintf(pHlp, "\n");
2396
2397 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2398 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2399
2400 /* the groups */
2401 c = 0;
2402 f = fLocalForcedActions;
2403 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2404 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2405 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2406 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2407 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2408 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2409 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2410 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2411 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2412 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2413 if (c)
2414 pHlp->pfnPrintf(pHlp, "\n");
2415 }
2416
2417#undef PRINT_FLAG
2418#undef PRINT_GROUP
2419}
2420
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