VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 44078

Last change on this file since 44078 was 44078, checked in by vboxsync, 12 years ago

VMMR0/CPUMR0: atomic update of aGuestCpuId*(); fix return type of CPUMR3LogCpuIds()
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1/* $Id: VMM.cpp 44078 2012-12-10 13:19:18Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmapi.h>
84#include <VBox/vmm/cpum.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/iom.h>
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/selm.h>
89#include <VBox/vmm/em.h>
90#include <VBox/sup.h>
91#include <VBox/vmm/dbgf.h>
92#include <VBox/vmm/csam.h>
93#include <VBox/vmm/patm.h>
94#ifdef VBOX_WITH_REM
95# include <VBox/vmm/rem.h>
96#endif
97#include <VBox/vmm/ssm.h>
98#include <VBox/vmm/tm.h>
99#include "VMMInternal.h"
100#include "VMMSwitcher.h"
101#include <VBox/vmm/vm.h>
102#include <VBox/vmm/ftm.h>
103
104#include <VBox/err.h>
105#include <VBox/param.h>
106#include <VBox/version.h>
107#include <VBox/vmm/hm.h>
108#include <iprt/assert.h>
109#include <iprt/alloc.h>
110#include <iprt/asm.h>
111#include <iprt/time.h>
112#include <iprt/semaphore.h>
113#include <iprt/stream.h>
114#include <iprt/string.h>
115#include <iprt/stdarg.h>
116#include <iprt/ctype.h>
117#include <iprt/x86.h>
118
119
120
121/*******************************************************************************
122* Defined Constants And Macros *
123*******************************************************************************/
124/** The saved state version. */
125#define VMM_SAVED_STATE_VERSION 4
126/** The saved state version used by v3.0 and earlier. (Teleportation) */
127#define VMM_SAVED_STATE_VERSION_3_0 3
128
129
130/*******************************************************************************
131* Internal Functions *
132*******************************************************************************/
133static int vmmR3InitStacks(PVM pVM);
134static int vmmR3InitLoggers(PVM pVM);
135static void vmmR3InitRegisterStats(PVM pVM);
136static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
137static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
138static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
139static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
140static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
141
142
143/**
144 * Initializes the VMM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
150{
151 LogFlow(("VMMR3Init\n"));
152
153 /*
154 * Assert alignment, sizes and order.
155 */
156 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
157 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
158 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
159
160 /*
161 * Init basic VM VMM members.
162 */
163 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
164 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
165 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
166 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
167 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
168 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
169
170 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
171 * The EMT yield interval. The EMT yielding is a hack we employ to play a
172 * bit nicer with the rest of the system (like for instance the GUI).
173 */
174 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
175 23 /* Value arrived at after experimenting with the grub boot prompt. */);
176 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
177
178
179 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
180 * Controls whether we employ per-cpu preemption timers to limit the time
181 * spent executing guest code. This option is not available on all
182 * platforms and we will silently ignore this setting then. If we are
183 * running in VT-x mode, we will use the VMX-preemption timer instead of
184 * this one when possible.
185 */
186 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
187 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
188 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
189
190 /*
191 * Initialize the VMM rendezvous semaphores.
192 */
193 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
194 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
195 return VERR_NO_MEMORY;
196 for (VMCPUID i = 0; i < pVM->cCpus; i++)
197 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
198 for (VMCPUID i = 0; i < pVM->cCpus; i++)
199 {
200 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
201 AssertRCReturn(rc, rc);
202 }
203 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
204 AssertRCReturn(rc, rc);
205 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
208 AssertRCReturn(rc, rc);
209 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
210 AssertRCReturn(rc, rc);
211
212 /* GC switchers are enabled by default. Turned off by HM. */
213 pVM->vmm.s.fSwitcherDisabled = false;
214
215 /*
216 * Register the saved state data unit.
217 */
218 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219 NULL, NULL, NULL,
220 NULL, vmmR3Save, NULL,
221 NULL, vmmR3Load, NULL);
222 if (RT_FAILURE(rc))
223 return rc;
224
225 /*
226 * Register the Ring-0 VM handle with the session for fast ioctl calls.
227 */
228 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229 if (RT_FAILURE(rc))
230 return rc;
231
232 /*
233 * Init various sub-components.
234 */
235 rc = vmmR3SwitcherInit(pVM);
236 if (RT_SUCCESS(rc))
237 {
238 rc = vmmR3InitStacks(pVM);
239 if (RT_SUCCESS(rc))
240 {
241 rc = vmmR3InitLoggers(pVM);
242
243#ifdef VBOX_WITH_NMI
244 /*
245 * Allocate mapping for the host APIC.
246 */
247 if (RT_SUCCESS(rc))
248 {
249 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250 AssertRC(rc);
251 }
252#endif
253 if (RT_SUCCESS(rc))
254 {
255 /*
256 * Debug info and statistics.
257 */
258 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259 vmmR3InitRegisterStats(pVM);
260 vmmInitFormatTypes();
261
262 return VINF_SUCCESS;
263 }
264 }
265 /** @todo: Need failure cleanup. */
266
267 //more todo in here?
268 //if (RT_SUCCESS(rc))
269 //{
270 //}
271 //int rc2 = vmmR3TermCoreCode(pVM);
272 //AssertRC(rc2));
273 }
274
275 return rc;
276}
277
278
279/**
280 * Allocate & setup the VMM RC stack(s) (for EMTs).
281 *
282 * The stacks are also used for long jumps in Ring-0.
283 *
284 * @returns VBox status code.
285 * @param pVM Pointer to the VM.
286 *
287 * @remarks The optional guard page gets it protection setup up during R3 init
288 * completion because of init order issues.
289 */
290static int vmmR3InitStacks(PVM pVM)
291{
292 int rc = VINF_SUCCESS;
293#ifdef VMM_R0_SWITCH_STACK
294 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
295#else
296 uint32_t fFlags = 0;
297#endif
298
299 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
300 {
301 PVMCPU pVCpu = &pVM->aCpus[idCpu];
302
303#ifdef VBOX_STRICT_VMM_STACK
304 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
305#else
306 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
307#endif
308 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
309 if (RT_SUCCESS(rc))
310 {
311#ifdef VBOX_STRICT_VMM_STACK
312 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
313#endif
314#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
315 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
316 if (!VMMIsHwVirtExtForced(pVM))
317 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
318 else
319#endif
320 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
321 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
322 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
323 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
324
325 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
326 }
327 }
328
329 return rc;
330}
331
332
333/**
334 * Initialize the loggers.
335 *
336 * @returns VBox status code.
337 * @param pVM Pointer to the VM.
338 */
339static int vmmR3InitLoggers(PVM pVM)
340{
341 int rc;
342#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
343
344 /*
345 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
346 */
347#ifdef LOG_ENABLED
348 PRTLOGGER pLogger = RTLogDefaultInstance();
349 if (pLogger)
350 {
351 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
352 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
353 if (RT_FAILURE(rc))
354 return rc;
355 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
356
357# ifdef VBOX_WITH_R0_LOGGING
358 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
359 for (VMCPUID i = 0; i < pVM->cCpus; i++)
360 {
361 PVMCPU pVCpu = &pVM->aCpus[i];
362 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
363 (void **)&pVCpu->vmm.s.pR0LoggerR3);
364 if (RT_FAILURE(rc))
365 return rc;
366 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
367 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
368 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
369 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
370 }
371# endif
372 }
373#endif /* LOG_ENABLED */
374
375#ifdef VBOX_WITH_RC_RELEASE_LOGGING
376 /*
377 * Allocate RC release logger instances (finalized in the relocator).
378 */
379 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
380 if (pRelLogger)
381 {
382 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
383 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
384 if (RT_FAILURE(rc))
385 return rc;
386 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
387 }
388#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
389 return VINF_SUCCESS;
390}
391
392
393/**
394 * VMMR3Init worker that register the statistics with STAM.
395 *
396 * @param pVM The shared VM structure.
397 */
398static void vmmR3InitRegisterStats(PVM pVM)
399{
400 /*
401 * Statistics.
402 */
403 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
462
463#ifdef VBOX_WITH_STATISTICS
464 for (VMCPUID i = 0; i < pVM->cCpus; i++)
465 {
466 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
467 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
468 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
469 }
470#endif
471}
472
473
474/**
475 * Initializes the R0 VMM.
476 *
477 * @returns VBox status code.
478 * @param pVM Pointer to the VM.
479 */
480VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
481{
482 int rc;
483 PVMCPU pVCpu = VMMGetCpu(pVM);
484 Assert(pVCpu && pVCpu->idCpu == 0);
485
486#ifdef LOG_ENABLED
487 /*
488 * Initialize the ring-0 logger if we haven't done so yet.
489 */
490 if ( pVCpu->vmm.s.pR0LoggerR3
491 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
492 {
493 rc = VMMR3UpdateLoggers(pVM);
494 if (RT_FAILURE(rc))
495 return rc;
496 }
497#endif
498
499 /*
500 * Call Ring-0 entry with init code.
501 */
502 for (;;)
503 {
504#ifdef NO_SUPCALLR0VMM
505 //rc = VERR_GENERAL_FAILURE;
506 rc = VINF_SUCCESS;
507#else
508 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
509#endif
510 /*
511 * Flush the logs.
512 */
513#ifdef LOG_ENABLED
514 if ( pVCpu->vmm.s.pR0LoggerR3
515 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
516 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
517#endif
518 if (rc != VINF_VMM_CALL_HOST)
519 break;
520 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
521 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
522 break;
523 /* Resume R0 */
524 }
525
526 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
527 {
528 LogRel(("R0 init failed, rc=%Rra\n", rc));
529 if (RT_SUCCESS(rc))
530 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
531 }
532 return rc;
533}
534
535
536/**
537 * Initializes the RC VMM.
538 *
539 * @returns VBox status code.
540 * @param pVM Pointer to the VM.
541 */
542VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
543{
544 PVMCPU pVCpu = VMMGetCpu(pVM);
545 Assert(pVCpu && pVCpu->idCpu == 0);
546
547 /* In VMX mode, there's no need to init RC. */
548 if (pVM->vmm.s.fSwitcherDisabled)
549 return VINF_SUCCESS;
550
551 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
552
553 /*
554 * Call VMMGCInit():
555 * -# resolve the address.
556 * -# setup stackframe and EIP to use the trampoline.
557 * -# do a generic hypervisor call.
558 */
559 RTRCPTR RCPtrEP;
560 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
561 if (RT_SUCCESS(rc))
562 {
563 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
564 uint64_t u64TS = RTTimeProgramStartNanoTS();
565 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
566 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
567 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
568 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
569 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
570 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
571 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
572 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
573 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
574
575 for (;;)
576 {
577#ifdef NO_SUPCALLR0VMM
578 //rc = VERR_GENERAL_FAILURE;
579 rc = VINF_SUCCESS;
580#else
581 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
582#endif
583#ifdef LOG_ENABLED
584 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
585 if ( pLogger
586 && pLogger->offScratch > 0)
587 RTLogFlushRC(NULL, pLogger);
588#endif
589#ifdef VBOX_WITH_RC_RELEASE_LOGGING
590 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
591 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
592 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
593#endif
594 if (rc != VINF_VMM_CALL_HOST)
595 break;
596 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
597 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
598 break;
599 }
600
601 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
602 {
603 VMMR3FatalDump(pVM, pVCpu, rc);
604 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
605 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
606 }
607 AssertRC(rc);
608 }
609 return rc;
610}
611
612
613/**
614 * Called when an init phase completes.
615 *
616 * @returns VBox status code.
617 * @param pVM Pointer to the VM.
618 * @param enmWhat Which init phase.
619 */
620VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
621{
622 int rc = VINF_SUCCESS;
623
624 switch (enmWhat)
625 {
626 case VMINITCOMPLETED_RING3:
627 {
628 /*
629 * CPUM's post-initialization (APIC base MSR caching).
630 */
631 rc = CPUMR3InitCompleted(pVM);
632 AssertRCReturn(rc, rc);
633
634 /*
635 * Set page attributes to r/w for stack pages.
636 */
637 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
638 {
639 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
640 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
641 AssertRCReturn(rc, rc);
642 }
643
644 /*
645 * Create the EMT yield timer.
646 */
647 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
648 AssertRCReturn(rc, rc);
649
650 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
651 AssertRCReturn(rc, rc);
652
653#ifdef VBOX_WITH_NMI
654 /*
655 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
656 */
657 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
658 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
659 AssertRCReturn(rc, rc);
660#endif
661
662#ifdef VBOX_STRICT_VMM_STACK
663 /*
664 * Setup the stack guard pages: Two inaccessible pages at each sides of the
665 * stack to catch over/under-flows.
666 */
667 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
668 {
669 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
670
671 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
672 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
673
674 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
675 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
676 }
677 pVM->vmm.s.fStackGuardsStationed = true;
678#endif
679 break;
680 }
681
682 case VMINITCOMPLETED_RING0:
683 {
684 /*
685 * Disable the periodic preemption timers if we can use the
686 * VMX-preemption timer instead.
687 */
688 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
689 && HMR3IsVmxPreemptionTimerUsed(pVM))
690 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
691 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
692
693 /*
694 * CPUM's post-initialization (print CPUIDs).
695 */
696 CPUMR3LogCpuIds(pVM);
697 break;
698 }
699
700 default: /* shuts up gcc */
701 break;
702 }
703
704 return rc;
705}
706
707
708/**
709 * Terminate the VMM bits.
710 *
711 * @returns VINF_SUCCESS.
712 * @param pVM Pointer to the VM.
713 */
714VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
715{
716 PVMCPU pVCpu = VMMGetCpu(pVM);
717 Assert(pVCpu && pVCpu->idCpu == 0);
718
719 /*
720 * Call Ring-0 entry with termination code.
721 */
722 int rc;
723 for (;;)
724 {
725#ifdef NO_SUPCALLR0VMM
726 //rc = VERR_GENERAL_FAILURE;
727 rc = VINF_SUCCESS;
728#else
729 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
730#endif
731 /*
732 * Flush the logs.
733 */
734#ifdef LOG_ENABLED
735 if ( pVCpu->vmm.s.pR0LoggerR3
736 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
737 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
738#endif
739 if (rc != VINF_VMM_CALL_HOST)
740 break;
741 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
742 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
743 break;
744 /* Resume R0 */
745 }
746 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
747 {
748 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
749 if (RT_SUCCESS(rc))
750 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
751 }
752
753 for (VMCPUID i = 0; i < pVM->cCpus; i++)
754 {
755 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
756 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
757 }
758 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
759 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
760 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
761 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
762 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
763 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
764 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
765 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
766
767#ifdef VBOX_STRICT_VMM_STACK
768 /*
769 * Make the two stack guard pages present again.
770 */
771 if (pVM->vmm.s.fStackGuardsStationed)
772 {
773 for (VMCPUID i = 0; i < pVM->cCpus; i++)
774 {
775 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
776 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
777 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
778 }
779 pVM->vmm.s.fStackGuardsStationed = false;
780 }
781#endif
782
783 vmmTermFormatTypes();
784 return rc;
785}
786
787
788/**
789 * Applies relocations to data and code managed by this
790 * component. This function will be called at init and
791 * whenever the VMM need to relocate it self inside the GC.
792 *
793 * The VMM will need to apply relocations to the core code.
794 *
795 * @param pVM Pointer to the VM.
796 * @param offDelta The relocation delta.
797 */
798VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
799{
800 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
801
802 /*
803 * Recalc the RC address.
804 */
805#ifdef VBOX_WITH_RAW_MODE
806 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
807#endif
808
809 /*
810 * The stack.
811 */
812 for (VMCPUID i = 0; i < pVM->cCpus; i++)
813 {
814 PVMCPU pVCpu = &pVM->aCpus[i];
815
816 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
817
818 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
819 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
820 }
821
822 /*
823 * All the switchers.
824 */
825 vmmR3SwitcherRelocate(pVM, offDelta);
826
827 /*
828 * Get other RC entry points.
829 */
830 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
831 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
832
833 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
834 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
835
836 /*
837 * Update the logger.
838 */
839 VMMR3UpdateLoggers(pVM);
840}
841
842
843/**
844 * Updates the settings for the RC and R0 loggers.
845 *
846 * @returns VBox status code.
847 * @param pVM Pointer to the VM.
848 */
849VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
850{
851 /*
852 * Simply clone the logger instance (for RC).
853 */
854 int rc = VINF_SUCCESS;
855 RTRCPTR RCPtrLoggerFlush = 0;
856
857 if (pVM->vmm.s.pRCLoggerR3
858#ifdef VBOX_WITH_RC_RELEASE_LOGGING
859 || pVM->vmm.s.pRCRelLoggerR3
860#endif
861 )
862 {
863 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
864 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
865 }
866
867 if (pVM->vmm.s.pRCLoggerR3)
868 {
869 RTRCPTR RCPtrLoggerWrapper = 0;
870 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
871 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
872
873 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
874 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
875 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
876 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
877 }
878
879#ifdef VBOX_WITH_RC_RELEASE_LOGGING
880 if (pVM->vmm.s.pRCRelLoggerR3)
881 {
882 RTRCPTR RCPtrLoggerWrapper = 0;
883 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
884 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
885
886 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
887 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
888 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
889 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
890 }
891#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
892
893#ifdef LOG_ENABLED
894 /*
895 * For the ring-0 EMT logger, we use a per-thread logger instance
896 * in ring-0. Only initialize it once.
897 */
898 PRTLOGGER const pDefault = RTLogDefaultInstance();
899 for (VMCPUID i = 0; i < pVM->cCpus; i++)
900 {
901 PVMCPU pVCpu = &pVM->aCpus[i];
902 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
903 if (pR0LoggerR3)
904 {
905 if (!pR0LoggerR3->fCreated)
906 {
907 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
908 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
909 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
910
911 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
912 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
913 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
914
915 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
916 pfnLoggerWrapper, pfnLoggerFlush,
917 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
918 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
919
920 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
921 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
922 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
923 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pfnLoggerPrefix, NIL_RTR0PTR);
924 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
925
926 pR0LoggerR3->idCpu = i;
927 pR0LoggerR3->fCreated = true;
928 pR0LoggerR3->fFlushingDisabled = false;
929
930 }
931
932 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pDefault,
933 RTLOGFLAGS_BUFFERED, UINT32_MAX);
934 AssertRC(rc);
935 }
936 }
937#endif
938 return rc;
939}
940
941
942/**
943 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
944 *
945 * @returns Pointer to the buffer.
946 * @param pVM Pointer to the VM.
947 */
948VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
949{
950 if (HMIsEnabled(pVM))
951 return pVM->vmm.s.szRing0AssertMsg1;
952
953 RTRCPTR RCPtr;
954 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
955 if (RT_SUCCESS(rc))
956 return (const char *)MMHyperRCToR3(pVM, RCPtr);
957
958 return NULL;
959}
960
961
962/**
963 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
964 *
965 * @returns Pointer to the buffer.
966 * @param pVM Pointer to the VM.
967 */
968VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
969{
970 if (HMIsEnabled(pVM))
971 return pVM->vmm.s.szRing0AssertMsg2;
972
973 RTRCPTR RCPtr;
974 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
975 if (RT_SUCCESS(rc))
976 return (const char *)MMHyperRCToR3(pVM, RCPtr);
977
978 return NULL;
979}
980
981
982/**
983 * Execute state save operation.
984 *
985 * @returns VBox status code.
986 * @param pVM Pointer to the VM.
987 * @param pSSM SSM operation handle.
988 */
989static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
990{
991 LogFlow(("vmmR3Save:\n"));
992
993 /*
994 * Save the started/stopped state of all CPUs except 0 as it will always
995 * be running. This avoids breaking the saved state version. :-)
996 */
997 for (VMCPUID i = 1; i < pVM->cCpus; i++)
998 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
999
1000 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1001}
1002
1003
1004/**
1005 * Execute state load operation.
1006 *
1007 * @returns VBox status code.
1008 * @param pVM Pointer to the VM.
1009 * @param pSSM SSM operation handle.
1010 * @param uVersion Data layout version.
1011 * @param uPass The data pass.
1012 */
1013static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1014{
1015 LogFlow(("vmmR3Load:\n"));
1016 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1017
1018 /*
1019 * Validate version.
1020 */
1021 if ( uVersion != VMM_SAVED_STATE_VERSION
1022 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1023 {
1024 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1025 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1026 }
1027
1028 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1029 {
1030 /* Ignore the stack bottom, stack pointer and stack bits. */
1031 RTRCPTR RCPtrIgnored;
1032 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1033 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1034#ifdef RT_OS_DARWIN
1035 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1036 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1037 && SSMR3HandleRevision(pSSM) >= 48858
1038 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1039 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1040 )
1041 SSMR3Skip(pSSM, 16384);
1042 else
1043 SSMR3Skip(pSSM, 8192);
1044#else
1045 SSMR3Skip(pSSM, 8192);
1046#endif
1047 }
1048
1049 /*
1050 * Restore the VMCPU states. VCPU 0 is always started.
1051 */
1052 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1053 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1054 {
1055 bool fStarted;
1056 int rc = SSMR3GetBool(pSSM, &fStarted);
1057 if (RT_FAILURE(rc))
1058 return rc;
1059 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1060 }
1061
1062 /* terminator */
1063 uint32_t u32;
1064 int rc = SSMR3GetU32(pSSM, &u32);
1065 if (RT_FAILURE(rc))
1066 return rc;
1067 if (u32 != UINT32_MAX)
1068 {
1069 AssertMsgFailed(("u32=%#x\n", u32));
1070 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1071 }
1072 return VINF_SUCCESS;
1073}
1074
1075
1076/**
1077 * Resolve a builtin RC symbol.
1078 *
1079 * Called by PDM when loading or relocating RC modules.
1080 *
1081 * @returns VBox status
1082 * @param pVM Pointer to the VM.
1083 * @param pszSymbol Symbol to resolv
1084 * @param pRCPtrValue Where to store the symbol value.
1085 *
1086 * @remark This has to work before VMMR3Relocate() is called.
1087 */
1088VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1089{
1090 if (!strcmp(pszSymbol, "g_Logger"))
1091 {
1092 if (pVM->vmm.s.pRCLoggerR3)
1093 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1094 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1095 }
1096 else if (!strcmp(pszSymbol, "g_RelLogger"))
1097 {
1098#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1099 if (pVM->vmm.s.pRCRelLoggerR3)
1100 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1101 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1102#else
1103 *pRCPtrValue = NIL_RTRCPTR;
1104#endif
1105 }
1106 else
1107 return VERR_SYMBOL_NOT_FOUND;
1108 return VINF_SUCCESS;
1109}
1110
1111
1112/**
1113 * Suspends the CPU yielder.
1114 *
1115 * @param pVM Pointer to the VM.
1116 */
1117VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1118{
1119 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1120 if (!pVM->vmm.s.cYieldResumeMillies)
1121 {
1122 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1123 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1124 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1125 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1126 else
1127 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1128 TMTimerStop(pVM->vmm.s.pYieldTimer);
1129 }
1130 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1131}
1132
1133
1134/**
1135 * Stops the CPU yielder.
1136 *
1137 * @param pVM Pointer to the VM.
1138 */
1139VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1140{
1141 if (!pVM->vmm.s.cYieldResumeMillies)
1142 TMTimerStop(pVM->vmm.s.pYieldTimer);
1143 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1144 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1145}
1146
1147
1148/**
1149 * Resumes the CPU yielder when it has been a suspended or stopped.
1150 *
1151 * @param pVM Pointer to the VM.
1152 */
1153VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1154{
1155 if (pVM->vmm.s.cYieldResumeMillies)
1156 {
1157 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1158 pVM->vmm.s.cYieldResumeMillies = 0;
1159 }
1160}
1161
1162
1163/**
1164 * Internal timer callback function.
1165 *
1166 * @param pVM The VM.
1167 * @param pTimer The timer handle.
1168 * @param pvUser User argument specified upon timer creation.
1169 */
1170static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1171{
1172 NOREF(pvUser);
1173
1174 /*
1175 * This really needs some careful tuning. While we shouldn't be too greedy since
1176 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1177 * because that'll cause us to stop up.
1178 *
1179 * The current logic is to use the default interval when there is no lag worth
1180 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1181 *
1182 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1183 * so the lag is up to date.)
1184 */
1185 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1186 if ( u64Lag < 50000000 /* 50ms */
1187 || ( u64Lag < 1000000000 /* 1s */
1188 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1189 )
1190 {
1191 uint64_t u64Elapsed = RTTimeNanoTS();
1192 pVM->vmm.s.u64LastYield = u64Elapsed;
1193
1194 RTThreadYield();
1195
1196#ifdef LOG_ENABLED
1197 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1198 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1199#endif
1200 }
1201 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1202}
1203
1204
1205/**
1206 * Executes guest code in the raw-mode context.
1207 *
1208 * @param pVM Pointer to the VM.
1209 * @param pVCpu Pointer to the VMCPU.
1210 */
1211VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1212{
1213 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1214
1215 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1216
1217 /*
1218 * Set the hypervisor to resume executing a CPUM resume function
1219 * in CPUMRCA.asm.
1220 */
1221 CPUMSetHyperState(pVCpu,
1222 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1223 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1224 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1225 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1226 0, /* eax */
1227 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1228
1229 /*
1230 * We hide log flushes (outer) and hypervisor interrupts (inner).
1231 */
1232 for (;;)
1233 {
1234#ifdef VBOX_STRICT
1235 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1236 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1237 PGMMapCheck(pVM);
1238#endif
1239 int rc;
1240 do
1241 {
1242#ifdef NO_SUPCALLR0VMM
1243 rc = VERR_GENERAL_FAILURE;
1244#else
1245 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1246 if (RT_LIKELY(rc == VINF_SUCCESS))
1247 rc = pVCpu->vmm.s.iLastGZRc;
1248#endif
1249 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1250
1251 /*
1252 * Flush the logs.
1253 */
1254#ifdef LOG_ENABLED
1255 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1256 if ( pLogger
1257 && pLogger->offScratch > 0)
1258 RTLogFlushRC(NULL, pLogger);
1259#endif
1260#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1261 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1262 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1263 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1264#endif
1265 if (rc != VINF_VMM_CALL_HOST)
1266 {
1267 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1268 return rc;
1269 }
1270 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1271 if (RT_FAILURE(rc))
1272 return rc;
1273 /* Resume GC */
1274 }
1275}
1276
1277
1278/**
1279 * Executes guest code (Intel VT-x and AMD-V).
1280 *
1281 * @param pVM Pointer to the VM.
1282 * @param pVCpu Pointer to the VMCPU.
1283 */
1284VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1285{
1286 Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1287
1288 for (;;)
1289 {
1290 int rc;
1291 do
1292 {
1293#ifdef NO_SUPCALLR0VMM
1294 rc = VERR_GENERAL_FAILURE;
1295#else
1296 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1297 if (RT_LIKELY(rc == VINF_SUCCESS))
1298 rc = pVCpu->vmm.s.iLastGZRc;
1299#endif
1300 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1301
1302#if 0 /* todo triggers too often */
1303 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1304#endif
1305
1306#ifdef LOG_ENABLED
1307 /*
1308 * Flush the log
1309 */
1310 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1311 if ( pR0LoggerR3
1312 && pR0LoggerR3->Logger.offScratch > 0)
1313 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1314#endif /* !LOG_ENABLED */
1315 if (rc != VINF_VMM_CALL_HOST)
1316 {
1317 Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1318 return rc;
1319 }
1320 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1321 if (RT_FAILURE(rc))
1322 return rc;
1323 /* Resume R0 */
1324 }
1325}
1326
1327/**
1328 * VCPU worker for VMMSendSipi.
1329 *
1330 * @param pVM Pointer to the VM.
1331 * @param idCpu Virtual CPU to perform SIPI on
1332 * @param uVector SIPI vector
1333 */
1334DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1335{
1336 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1337 VMCPU_ASSERT_EMT(pVCpu);
1338
1339 /** @todo what are we supposed to do if the processor is already running? */
1340 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1341 return VERR_ACCESS_DENIED;
1342
1343
1344 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1345
1346 pCtx->cs.Sel = uVector << 8;
1347 pCtx->cs.ValidSel = uVector << 8;
1348 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1349 pCtx->cs.u64Base = uVector << 12;
1350 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1351 pCtx->rip = 0;
1352
1353 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1354
1355# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1356 EMSetState(pVCpu, EMSTATE_HALTED);
1357 return VINF_EM_RESCHEDULE;
1358# else /* And if we go the VMCPU::enmState way it can stay here. */
1359 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1360 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1361 return VINF_SUCCESS;
1362# endif
1363}
1364
1365DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1366{
1367 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1368 VMCPU_ASSERT_EMT(pVCpu);
1369
1370 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1371 CPUMR3ResetCpu(pVCpu);
1372 return VINF_EM_WAIT_SIPI;
1373}
1374
1375/**
1376 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1377 * and unhalting processor
1378 *
1379 * @param pVM Pointer to the VM.
1380 * @param idCpu Virtual CPU to perform SIPI on
1381 * @param uVector SIPI vector
1382 */
1383VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1384{
1385 AssertReturnVoid(idCpu < pVM->cCpus);
1386
1387 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1388 AssertRC(rc);
1389}
1390
1391/**
1392 * Sends init IPI to the virtual CPU.
1393 *
1394 * @param pVM Pointer to the VM.
1395 * @param idCpu Virtual CPU to perform int IPI on
1396 */
1397VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1398{
1399 AssertReturnVoid(idCpu < pVM->cCpus);
1400
1401 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1402 AssertRC(rc);
1403}
1404
1405/**
1406 * Registers the guest memory range that can be used for patching
1407 *
1408 * @returns VBox status code.
1409 * @param pVM Pointer to the VM.
1410 * @param pPatchMem Patch memory range
1411 * @param cbPatchMem Size of the memory range
1412 */
1413VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1414{
1415 VM_ASSERT_EMT(pVM);
1416 if (HMIsEnabled(pVM))
1417 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1418
1419 return VERR_NOT_SUPPORTED;
1420}
1421
1422/**
1423 * Deregisters the guest memory range that can be used for patching
1424 *
1425 * @returns VBox status code.
1426 * @param pVM Pointer to the VM.
1427 * @param pPatchMem Patch memory range
1428 * @param cbPatchMem Size of the memory range
1429 */
1430VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1431{
1432 if (HMIsEnabled(pVM))
1433 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1434
1435 return VINF_SUCCESS;
1436}
1437
1438
1439/**
1440 * Count returns and have the last non-caller EMT wake up the caller.
1441 *
1442 * @returns VBox strict informational status code for EM scheduling. No failures
1443 * will be returned here, those are for the caller only.
1444 *
1445 * @param pVM Pointer to the VM.
1446 */
1447DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1448{
1449 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1450 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1451 if (cReturned == pVM->cCpus - 1U)
1452 {
1453 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1454 AssertLogRelRC(rc);
1455 }
1456
1457 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1458 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1459 ("%Rrc\n", rcRet),
1460 VERR_IPE_UNEXPECTED_INFO_STATUS);
1461 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1462}
1463
1464
1465/**
1466 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1467 *
1468 * @returns VBox strict informational status code for EM scheduling. No failures
1469 * will be returned here, those are for the caller only. When
1470 * fIsCaller is set, VINF_SUCCESS is always returned.
1471 *
1472 * @param pVM Pointer to the VM.
1473 * @param pVCpu The VMCPU structure for the calling EMT.
1474 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1475 * not.
1476 * @param fFlags The flags.
1477 * @param pfnRendezvous The callback.
1478 * @param pvUser The user argument for the callback.
1479 */
1480static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1481 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1482{
1483 int rc;
1484
1485 /*
1486 * Enter, the last EMT triggers the next callback phase.
1487 */
1488 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1489 if (cEntered != pVM->cCpus)
1490 {
1491 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1492 {
1493 /* Wait for our turn. */
1494 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1495 AssertLogRelRC(rc);
1496 }
1497 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1498 {
1499 /* Wait for the last EMT to arrive and wake everyone up. */
1500 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1501 AssertLogRelRC(rc);
1502 }
1503 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1504 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1505 {
1506 /* Wait for our turn. */
1507 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1508 AssertLogRelRC(rc);
1509 }
1510 else
1511 {
1512 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1513
1514 /*
1515 * The execute once is handled specially to optimize the code flow.
1516 *
1517 * The last EMT to arrive will perform the callback and the other
1518 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1519 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1520 * returns, that EMT will initiate the normal return sequence.
1521 */
1522 if (!fIsCaller)
1523 {
1524 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1525 AssertLogRelRC(rc);
1526
1527 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1528 }
1529 return VINF_SUCCESS;
1530 }
1531 }
1532 else
1533 {
1534 /*
1535 * All EMTs are waiting, clear the FF and take action according to the
1536 * execution method.
1537 */
1538 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1539
1540 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1541 {
1542 /* Wake up everyone. */
1543 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1544 AssertLogRelRC(rc);
1545 }
1546 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1547 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1548 {
1549 /* Figure out who to wake up and wake it up. If it's ourself, then
1550 it's easy otherwise wait for our turn. */
1551 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1552 ? 0
1553 : pVM->cCpus - 1U;
1554 if (pVCpu->idCpu != iFirst)
1555 {
1556 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1557 AssertLogRelRC(rc);
1558 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1559 AssertLogRelRC(rc);
1560 }
1561 }
1562 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1563 }
1564
1565
1566 /*
1567 * Do the callback and update the status if necessary.
1568 */
1569 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1570 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1571 {
1572 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1573 if (rcStrict != VINF_SUCCESS)
1574 {
1575 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1576 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1577 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1578 int32_t i32RendezvousStatus;
1579 do
1580 {
1581 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1582 if ( rcStrict == i32RendezvousStatus
1583 || RT_FAILURE(i32RendezvousStatus)
1584 || ( i32RendezvousStatus != VINF_SUCCESS
1585 && rcStrict > i32RendezvousStatus))
1586 break;
1587 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1588 }
1589 }
1590
1591 /*
1592 * Increment the done counter and take action depending on whether we're
1593 * the last to finish callback execution.
1594 */
1595 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1596 if ( cDone != pVM->cCpus
1597 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1598 {
1599 /* Signal the next EMT? */
1600 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1601 {
1602 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1603 AssertLogRelRC(rc);
1604 }
1605 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1606 {
1607 Assert(cDone == pVCpu->idCpu + 1U);
1608 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1609 AssertLogRelRC(rc);
1610 }
1611 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1612 {
1613 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1614 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1615 AssertLogRelRC(rc);
1616 }
1617
1618 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1619 if (!fIsCaller)
1620 {
1621 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1622 AssertLogRelRC(rc);
1623 }
1624 }
1625 else
1626 {
1627 /* Callback execution is all done, tell the rest to return. */
1628 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1629 AssertLogRelRC(rc);
1630 }
1631
1632 if (!fIsCaller)
1633 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1634 return VINF_SUCCESS;
1635}
1636
1637
1638/**
1639 * Called in response to VM_FF_EMT_RENDEZVOUS.
1640 *
1641 * @returns VBox strict status code - EM scheduling. No errors will be returned
1642 * here, nor will any non-EM scheduling status codes be returned.
1643 *
1644 * @param pVM Pointer to the VM.
1645 * @param pVCpu The handle of the calling EMT.
1646 *
1647 * @thread EMT
1648 */
1649VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1650{
1651 Assert(!pVCpu->vmm.s.fInRendezvous);
1652 pVCpu->vmm.s.fInRendezvous = true;
1653 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1654 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1655 pVCpu->vmm.s.fInRendezvous = false;
1656 return rc;
1657}
1658
1659
1660/**
1661 * EMT rendezvous.
1662 *
1663 * Gathers all the EMTs and execute some code on each of them, either in a one
1664 * by one fashion or all at once.
1665 *
1666 * @returns VBox strict status code. This will be the first error,
1667 * VINF_SUCCESS, or an EM scheduling status code.
1668 *
1669 * @param pVM Pointer to the VM.
1670 * @param fFlags Flags indicating execution methods. See
1671 * grp_VMMR3EmtRendezvous_fFlags.
1672 * @param pfnRendezvous The callback.
1673 * @param pvUser User argument for the callback.
1674 *
1675 * @thread Any.
1676 */
1677VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1678{
1679 /*
1680 * Validate input.
1681 */
1682 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1683 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1684 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1685 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1686 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1687 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1688 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1689
1690 VBOXSTRICTRC rcStrict;
1691 PVMCPU pVCpu = VMMGetCpu(pVM);
1692 if (!pVCpu)
1693 /*
1694 * Forward the request to an EMT thread.
1695 */
1696 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1697 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1698 else if (pVM->cCpus == 1)
1699 {
1700 /*
1701 * Shortcut for the single EMT case.
1702 */
1703 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1704 pVCpu->vmm.s.fInRendezvous = true;
1705 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1706 pVCpu->vmm.s.fInRendezvous = false;
1707 }
1708 else
1709 {
1710 /*
1711 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1712 * lookout of the RENDEZVOUS FF.
1713 */
1714 int rc;
1715 rcStrict = VINF_SUCCESS;
1716 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1717 {
1718 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1719
1720 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1721 {
1722 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1723 {
1724 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1725 if ( rc != VINF_SUCCESS
1726 && ( rcStrict == VINF_SUCCESS
1727 || rcStrict > rc))
1728 rcStrict = rc;
1729 /** @todo Perhaps deal with termination here? */
1730 }
1731 ASMNopPause();
1732 }
1733 }
1734 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1735 Assert(!pVCpu->vmm.s.fInRendezvous);
1736 pVCpu->vmm.s.fInRendezvous = true;
1737
1738 /*
1739 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1740 */
1741 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1742 {
1743 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1744 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1745 }
1746 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1747 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1748 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1749 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1750 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1751 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1752 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1753 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1754 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1755 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1756 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1757
1758 /*
1759 * Set the FF and poke the other EMTs.
1760 */
1761 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1762 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1763
1764 /*
1765 * Do the same ourselves.
1766 */
1767 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1768
1769 /*
1770 * The caller waits for the other EMTs to be done and return before doing
1771 * the cleanup. This makes away with wakeup / reset races we would otherwise
1772 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1773 */
1774 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1775 AssertLogRelRC(rc);
1776
1777 /*
1778 * Get the return code and clean up a little bit.
1779 */
1780 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1781 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1782
1783 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1784 pVCpu->vmm.s.fInRendezvous = false;
1785
1786 /*
1787 * Merge rcStrict and rcMy.
1788 */
1789 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1790 if ( rcMy != VINF_SUCCESS
1791 && ( rcStrict == VINF_SUCCESS
1792 || rcStrict > rcMy))
1793 rcStrict = rcMy;
1794 }
1795
1796 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1797 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1798 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1799 VERR_IPE_UNEXPECTED_INFO_STATUS);
1800 return VBOXSTRICTRC_VAL(rcStrict);
1801}
1802
1803
1804/**
1805 * Disables/enables EMT rendezvous.
1806 *
1807 * This is used to make sure EMT rendezvous does not take place while
1808 * processing a priority request.
1809 *
1810 * @returns Old rendezvous-disabled state.
1811 * @param pVCpu The handle of the calling EMT.
1812 * @param fDisabled True if disabled, false if enabled.
1813 */
1814VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1815{
1816 VMCPU_ASSERT_EMT(pVCpu);
1817 bool fOld = pVCpu->vmm.s.fInRendezvous;
1818 pVCpu->vmm.s.fInRendezvous = fDisabled;
1819 return fOld;
1820}
1821
1822
1823/**
1824 * Read from the ring 0 jump buffer stack
1825 *
1826 * @returns VBox status code.
1827 *
1828 * @param pVM Pointer to the VM.
1829 * @param idCpu The ID of the source CPU context (for the address).
1830 * @param R0Addr Where to start reading.
1831 * @param pvBuf Where to store the data we've read.
1832 * @param cbRead The number of bytes to read.
1833 */
1834VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1835{
1836 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1837 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1838
1839#ifdef VMM_R0_SWITCH_STACK
1840 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1841#else
1842 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1843#endif
1844 if ( off > VMM_STACK_SIZE
1845 || off + cbRead >= VMM_STACK_SIZE)
1846 return VERR_INVALID_POINTER;
1847
1848 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1849 return VINF_SUCCESS;
1850}
1851
1852
1853/**
1854 * Calls a RC function.
1855 *
1856 * @param pVM Pointer to the VM.
1857 * @param RCPtrEntry The address of the RC function.
1858 * @param cArgs The number of arguments in the ....
1859 * @param ... Arguments to the function.
1860 */
1861VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1862{
1863 va_list args;
1864 va_start(args, cArgs);
1865 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1866 va_end(args);
1867 return rc;
1868}
1869
1870
1871/**
1872 * Calls a RC function.
1873 *
1874 * @param pVM Pointer to the VM.
1875 * @param RCPtrEntry The address of the RC function.
1876 * @param cArgs The number of arguments in the ....
1877 * @param args Arguments to the function.
1878 */
1879VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1880{
1881 /* Raw mode implies 1 VCPU. */
1882 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1883 PVMCPU pVCpu = &pVM->aCpus[0];
1884
1885 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1886
1887 /*
1888 * Setup the call frame using the trampoline.
1889 */
1890 CPUMSetHyperState(pVCpu,
1891 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1892 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1893 RCPtrEntry, /* eax */
1894 cArgs /* edx */
1895 );
1896
1897 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1898 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1899 int i = cArgs;
1900 while (i-- > 0)
1901 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1902
1903 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1904 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1905
1906 /*
1907 * We hide log flushes (outer) and hypervisor interrupts (inner).
1908 */
1909 for (;;)
1910 {
1911 int rc;
1912 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1913 do
1914 {
1915#ifdef NO_SUPCALLR0VMM
1916 rc = VERR_GENERAL_FAILURE;
1917#else
1918 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1919 if (RT_LIKELY(rc == VINF_SUCCESS))
1920 rc = pVCpu->vmm.s.iLastGZRc;
1921#endif
1922 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1923
1924 /*
1925 * Flush the loggers.
1926 */
1927#ifdef LOG_ENABLED
1928 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1929 if ( pLogger
1930 && pLogger->offScratch > 0)
1931 RTLogFlushRC(NULL, pLogger);
1932#endif
1933#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1934 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1935 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1936 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1937#endif
1938 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1939 VMMR3FatalDump(pVM, pVCpu, rc);
1940 if (rc != VINF_VMM_CALL_HOST)
1941 {
1942 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1943 return rc;
1944 }
1945 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1946 if (RT_FAILURE(rc))
1947 return rc;
1948 }
1949}
1950
1951
1952/**
1953 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1954 *
1955 * @returns VBox status code.
1956 * @param pVM Pointer to the VM.
1957 * @param uOperation Operation to execute.
1958 * @param u64Arg Constant argument.
1959 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1960 * details.
1961 */
1962VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1963{
1964 PVMCPU pVCpu = VMMGetCpu(pVM);
1965 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1966
1967 /*
1968 * Call Ring-0 entry with init code.
1969 */
1970 int rc;
1971 for (;;)
1972 {
1973#ifdef NO_SUPCALLR0VMM
1974 rc = VERR_GENERAL_FAILURE;
1975#else
1976 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1977#endif
1978 /*
1979 * Flush the logs.
1980 */
1981#ifdef LOG_ENABLED
1982 if ( pVCpu->vmm.s.pR0LoggerR3
1983 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1984 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
1985#endif
1986 if (rc != VINF_VMM_CALL_HOST)
1987 break;
1988 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1989 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1990 break;
1991 /* Resume R0 */
1992 }
1993
1994 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
1995 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1996 VERR_IPE_UNEXPECTED_INFO_STATUS);
1997 return rc;
1998}
1999
2000
2001/**
2002 * Resumes executing hypervisor code when interrupted by a queue flush or a
2003 * debug event.
2004 *
2005 * @returns VBox status code.
2006 * @param pVM Pointer to the VM.
2007 * @param pVCpu Pointer to the VMCPU.
2008 */
2009VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2010{
2011 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2012 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2013
2014 /*
2015 * We hide log flushes (outer) and hypervisor interrupts (inner).
2016 */
2017 for (;;)
2018 {
2019 int rc;
2020 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2021 do
2022 {
2023#ifdef NO_SUPCALLR0VMM
2024 rc = VERR_GENERAL_FAILURE;
2025#else
2026 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2027 if (RT_LIKELY(rc == VINF_SUCCESS))
2028 rc = pVCpu->vmm.s.iLastGZRc;
2029#endif
2030 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2031
2032 /*
2033 * Flush the loggers.
2034 */
2035#ifdef LOG_ENABLED
2036 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2037 if ( pLogger
2038 && pLogger->offScratch > 0)
2039 RTLogFlushRC(NULL, pLogger);
2040#endif
2041#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2042 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2043 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2044 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2045#endif
2046 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2047 VMMR3FatalDump(pVM, pVCpu, rc);
2048 if (rc != VINF_VMM_CALL_HOST)
2049 {
2050 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2051 return rc;
2052 }
2053 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2054 if (RT_FAILURE(rc))
2055 return rc;
2056 }
2057}
2058
2059
2060/**
2061 * Service a call to the ring-3 host code.
2062 *
2063 * @returns VBox status code.
2064 * @param pVM Pointer to the VM.
2065 * @param pVCpu Pointer to the VMCPU.
2066 * @remark Careful with critsects.
2067 */
2068static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2069{
2070 /*
2071 * We must also check for pending critsect exits or else we can deadlock
2072 * when entering other critsects here.
2073 */
2074 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2075 PDMCritSectFF(pVCpu);
2076
2077 switch (pVCpu->vmm.s.enmCallRing3Operation)
2078 {
2079 /*
2080 * Acquire a critical section.
2081 */
2082 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2083 {
2084 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2085 true /*fCallRing3*/);
2086 break;
2087 }
2088
2089 /*
2090 * Acquire the PDM lock.
2091 */
2092 case VMMCALLRING3_PDM_LOCK:
2093 {
2094 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2095 break;
2096 }
2097
2098 /*
2099 * Grow the PGM pool.
2100 */
2101 case VMMCALLRING3_PGM_POOL_GROW:
2102 {
2103 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2104 break;
2105 }
2106
2107 /*
2108 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2109 */
2110 case VMMCALLRING3_PGM_MAP_CHUNK:
2111 {
2112 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2113 break;
2114 }
2115
2116 /*
2117 * Allocates more handy pages.
2118 */
2119 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2120 {
2121 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2122 break;
2123 }
2124
2125 /*
2126 * Allocates a large page.
2127 */
2128 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2129 {
2130 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2131 break;
2132 }
2133
2134 /*
2135 * Acquire the PGM lock.
2136 */
2137 case VMMCALLRING3_PGM_LOCK:
2138 {
2139 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2140 break;
2141 }
2142
2143 /*
2144 * Acquire the MM hypervisor heap lock.
2145 */
2146 case VMMCALLRING3_MMHYPER_LOCK:
2147 {
2148 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2149 break;
2150 }
2151
2152#ifdef VBOX_WITH_REM
2153 /*
2154 * Flush REM handler notifications.
2155 */
2156 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2157 {
2158 REMR3ReplayHandlerNotifications(pVM);
2159 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2160 break;
2161 }
2162#endif
2163
2164 /*
2165 * This is a noop. We just take this route to avoid unnecessary
2166 * tests in the loops.
2167 */
2168 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2169 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2170 LogAlways(("*FLUSH*\n"));
2171 break;
2172
2173 /*
2174 * Set the VM error message.
2175 */
2176 case VMMCALLRING3_VM_SET_ERROR:
2177 VMR3SetErrorWorker(pVM);
2178 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2179 break;
2180
2181 /*
2182 * Set the VM runtime error message.
2183 */
2184 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2185 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2186 break;
2187
2188 /*
2189 * Signal a ring 0 hypervisor assertion.
2190 * Cancel the longjmp operation that's in progress.
2191 */
2192 case VMMCALLRING3_VM_R0_ASSERTION:
2193 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2194 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2195#ifdef RT_ARCH_X86
2196 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2197#else
2198 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2199#endif
2200#ifdef VMM_R0_SWITCH_STACK
2201 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2202#endif
2203 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2204 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2205 return VERR_VMM_RING0_ASSERTION;
2206
2207 /*
2208 * A forced switch to ring 0 for preemption purposes.
2209 */
2210 case VMMCALLRING3_VM_R0_PREEMPT:
2211 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2212 break;
2213
2214 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2215 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2216 break;
2217
2218 default:
2219 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2220 return VERR_VMM_UNKNOWN_RING3_CALL;
2221 }
2222
2223 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2224 return VINF_SUCCESS;
2225}
2226
2227
2228/**
2229 * Displays the Force action Flags.
2230 *
2231 * @param pVM Pointer to the VM.
2232 * @param pHlp The output helpers.
2233 * @param pszArgs The additional arguments (ignored).
2234 */
2235static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2236{
2237 int c;
2238 uint32_t f;
2239 NOREF(pszArgs);
2240
2241#define PRINT_FLAG(prf,flag) do { \
2242 if (f & (prf##flag)) \
2243 { \
2244 static const char *s_psz = #flag; \
2245 if (!(c % 6)) \
2246 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2247 else \
2248 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2249 c++; \
2250 f &= ~(prf##flag); \
2251 } \
2252 } while (0)
2253
2254#define PRINT_GROUP(prf,grp,sfx) do { \
2255 if (f & (prf##grp##sfx)) \
2256 { \
2257 static const char *s_psz = #grp; \
2258 if (!(c % 5)) \
2259 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2260 else \
2261 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2262 c++; \
2263 } \
2264 } while (0)
2265
2266 /*
2267 * The global flags.
2268 */
2269 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2270 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2271
2272 /* show the flag mnemonics */
2273 c = 0;
2274 f = fGlobalForcedActions;
2275 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2276 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2277 PRINT_FLAG(VM_FF_,PDM_DMA);
2278 PRINT_FLAG(VM_FF_,DBGF);
2279 PRINT_FLAG(VM_FF_,REQUEST);
2280 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2281 PRINT_FLAG(VM_FF_,RESET);
2282 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2283 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2284 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2285 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2286 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2287 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2288 if (f)
2289 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2290 else
2291 pHlp->pfnPrintf(pHlp, "\n");
2292
2293 /* the groups */
2294 c = 0;
2295 f = fGlobalForcedActions;
2296 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2297 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2298 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2299 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2300 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2301 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2302 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2303 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2304 if (c)
2305 pHlp->pfnPrintf(pHlp, "\n");
2306
2307 /*
2308 * Per CPU flags.
2309 */
2310 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2311 {
2312 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2313 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2314
2315 /* show the flag mnemonics */
2316 c = 0;
2317 f = fLocalForcedActions;
2318 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2319 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2320 PRINT_FLAG(VMCPU_FF_,TIMER);
2321 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2322 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2323 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2324 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2325 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2326 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2327 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2328 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2329 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2330 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2331 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2332 PRINT_FLAG(VMCPU_FF_,TO_R3);
2333 if (f)
2334 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2335 else
2336 pHlp->pfnPrintf(pHlp, "\n");
2337
2338 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2339 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2340
2341 /* the groups */
2342 c = 0;
2343 f = fLocalForcedActions;
2344 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2345 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2346 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2347 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2348 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2349 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2350 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2351 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2352 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2353 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2354 if (c)
2355 pHlp->pfnPrintf(pHlp, "\n");
2356 }
2357
2358#undef PRINT_FLAG
2359#undef PRINT_GROUP
2360}
2361
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