VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 44076

Last change on this file since 44076 was 44076, checked in by vboxsync, 12 years ago

VMM: don't pass certain CPUID features to the guest if the feature is not supported on some host cores
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1/* $Id: VMM.cpp 44076 2012-12-10 12:36:48Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmapi.h>
84#include <VBox/vmm/cpum.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/iom.h>
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/selm.h>
89#include <VBox/vmm/em.h>
90#include <VBox/sup.h>
91#include <VBox/vmm/dbgf.h>
92#include <VBox/vmm/csam.h>
93#include <VBox/vmm/patm.h>
94#ifdef VBOX_WITH_REM
95# include <VBox/vmm/rem.h>
96#endif
97#include <VBox/vmm/ssm.h>
98#include <VBox/vmm/tm.h>
99#include "VMMInternal.h"
100#include "VMMSwitcher.h"
101#include <VBox/vmm/vm.h>
102#include <VBox/vmm/ftm.h>
103
104#include <VBox/err.h>
105#include <VBox/param.h>
106#include <VBox/version.h>
107#include <VBox/vmm/hm.h>
108#include <iprt/assert.h>
109#include <iprt/alloc.h>
110#include <iprt/asm.h>
111#include <iprt/time.h>
112#include <iprt/semaphore.h>
113#include <iprt/stream.h>
114#include <iprt/string.h>
115#include <iprt/stdarg.h>
116#include <iprt/ctype.h>
117#include <iprt/x86.h>
118
119
120
121/*******************************************************************************
122* Defined Constants And Macros *
123*******************************************************************************/
124/** The saved state version. */
125#define VMM_SAVED_STATE_VERSION 4
126/** The saved state version used by v3.0 and earlier. (Teleportation) */
127#define VMM_SAVED_STATE_VERSION_3_0 3
128
129
130/*******************************************************************************
131* Internal Functions *
132*******************************************************************************/
133static int vmmR3InitStacks(PVM pVM);
134static int vmmR3InitLoggers(PVM pVM);
135static void vmmR3InitRegisterStats(PVM pVM);
136static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
137static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
138static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
139static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
140static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
141
142
143/**
144 * Initializes the VMM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
150{
151 LogFlow(("VMMR3Init\n"));
152
153 /*
154 * Assert alignment, sizes and order.
155 */
156 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
157 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
158 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
159
160 /*
161 * Init basic VM VMM members.
162 */
163 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
164 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
165 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
166 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
167 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
168 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
169
170 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
171 * The EMT yield interval. The EMT yielding is a hack we employ to play a
172 * bit nicer with the rest of the system (like for instance the GUI).
173 */
174 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
175 23 /* Value arrived at after experimenting with the grub boot prompt. */);
176 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
177
178
179 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
180 * Controls whether we employ per-cpu preemption timers to limit the time
181 * spent executing guest code. This option is not available on all
182 * platforms and we will silently ignore this setting then. If we are
183 * running in VT-x mode, we will use the VMX-preemption timer instead of
184 * this one when possible.
185 */
186 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
187 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
188 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
189
190 /*
191 * Initialize the VMM rendezvous semaphores.
192 */
193 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
194 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
195 return VERR_NO_MEMORY;
196 for (VMCPUID i = 0; i < pVM->cCpus; i++)
197 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
198 for (VMCPUID i = 0; i < pVM->cCpus; i++)
199 {
200 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
201 AssertRCReturn(rc, rc);
202 }
203 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
204 AssertRCReturn(rc, rc);
205 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
208 AssertRCReturn(rc, rc);
209 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
210 AssertRCReturn(rc, rc);
211
212 /* GC switchers are enabled by default. Turned off by HM. */
213 pVM->vmm.s.fSwitcherDisabled = false;
214
215 /*
216 * Register the saved state data unit.
217 */
218 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219 NULL, NULL, NULL,
220 NULL, vmmR3Save, NULL,
221 NULL, vmmR3Load, NULL);
222 if (RT_FAILURE(rc))
223 return rc;
224
225 /*
226 * Register the Ring-0 VM handle with the session for fast ioctl calls.
227 */
228 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229 if (RT_FAILURE(rc))
230 return rc;
231
232 /*
233 * Init various sub-components.
234 */
235 rc = vmmR3SwitcherInit(pVM);
236 if (RT_SUCCESS(rc))
237 {
238 rc = vmmR3InitStacks(pVM);
239 if (RT_SUCCESS(rc))
240 {
241 rc = vmmR3InitLoggers(pVM);
242
243#ifdef VBOX_WITH_NMI
244 /*
245 * Allocate mapping for the host APIC.
246 */
247 if (RT_SUCCESS(rc))
248 {
249 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250 AssertRC(rc);
251 }
252#endif
253 if (RT_SUCCESS(rc))
254 {
255 /*
256 * Debug info and statistics.
257 */
258 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259 vmmR3InitRegisterStats(pVM);
260 vmmInitFormatTypes();
261
262 return VINF_SUCCESS;
263 }
264 }
265 /** @todo: Need failure cleanup. */
266
267 //more todo in here?
268 //if (RT_SUCCESS(rc))
269 //{
270 //}
271 //int rc2 = vmmR3TermCoreCode(pVM);
272 //AssertRC(rc2));
273 }
274
275 return rc;
276}
277
278
279/**
280 * Allocate & setup the VMM RC stack(s) (for EMTs).
281 *
282 * The stacks are also used for long jumps in Ring-0.
283 *
284 * @returns VBox status code.
285 * @param pVM Pointer to the VM.
286 *
287 * @remarks The optional guard page gets it protection setup up during R3 init
288 * completion because of init order issues.
289 */
290static int vmmR3InitStacks(PVM pVM)
291{
292 int rc = VINF_SUCCESS;
293#ifdef VMM_R0_SWITCH_STACK
294 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
295#else
296 uint32_t fFlags = 0;
297#endif
298
299 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
300 {
301 PVMCPU pVCpu = &pVM->aCpus[idCpu];
302
303#ifdef VBOX_STRICT_VMM_STACK
304 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
305#else
306 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
307#endif
308 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
309 if (RT_SUCCESS(rc))
310 {
311#ifdef VBOX_STRICT_VMM_STACK
312 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
313#endif
314#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
315 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
316 if (!VMMIsHwVirtExtForced(pVM))
317 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
318 else
319#endif
320 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
321 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
322 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
323 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
324
325 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
326 }
327 }
328
329 return rc;
330}
331
332
333/**
334 * Initialize the loggers.
335 *
336 * @returns VBox status code.
337 * @param pVM Pointer to the VM.
338 */
339static int vmmR3InitLoggers(PVM pVM)
340{
341 int rc;
342#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
343
344 /*
345 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
346 */
347#ifdef LOG_ENABLED
348 PRTLOGGER pLogger = RTLogDefaultInstance();
349 if (pLogger)
350 {
351 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
352 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
353 if (RT_FAILURE(rc))
354 return rc;
355 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
356
357# ifdef VBOX_WITH_R0_LOGGING
358 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
359 for (VMCPUID i = 0; i < pVM->cCpus; i++)
360 {
361 PVMCPU pVCpu = &pVM->aCpus[i];
362 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
363 (void **)&pVCpu->vmm.s.pR0LoggerR3);
364 if (RT_FAILURE(rc))
365 return rc;
366 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
367 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
368 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
369 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
370 }
371# endif
372 }
373#endif /* LOG_ENABLED */
374
375#ifdef VBOX_WITH_RC_RELEASE_LOGGING
376 /*
377 * Allocate RC release logger instances (finalized in the relocator).
378 */
379 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
380 if (pRelLogger)
381 {
382 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
383 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
384 if (RT_FAILURE(rc))
385 return rc;
386 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
387 }
388#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
389 return VINF_SUCCESS;
390}
391
392
393/**
394 * VMMR3Init worker that register the statistics with STAM.
395 *
396 * @param pVM The shared VM structure.
397 */
398static void vmmR3InitRegisterStats(PVM pVM)
399{
400 /*
401 * Statistics.
402 */
403 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
462
463#ifdef VBOX_WITH_STATISTICS
464 for (VMCPUID i = 0; i < pVM->cCpus; i++)
465 {
466 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
467 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
468 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
469 }
470#endif
471}
472
473
474/**
475 * Initializes the R0 VMM.
476 *
477 * @returns VBox status code.
478 * @param pVM Pointer to the VM.
479 */
480VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
481{
482 int rc;
483 PVMCPU pVCpu = VMMGetCpu(pVM);
484 Assert(pVCpu && pVCpu->idCpu == 0);
485
486#ifdef LOG_ENABLED
487 /*
488 * Initialize the ring-0 logger if we haven't done so yet.
489 */
490 if ( pVCpu->vmm.s.pR0LoggerR3
491 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
492 {
493 rc = VMMR3UpdateLoggers(pVM);
494 if (RT_FAILURE(rc))
495 return rc;
496 }
497#endif
498
499 /*
500 * Call Ring-0 entry with init code.
501 */
502 for (;;)
503 {
504#ifdef NO_SUPCALLR0VMM
505 //rc = VERR_GENERAL_FAILURE;
506 rc = VINF_SUCCESS;
507#else
508 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
509#endif
510 /*
511 * Flush the logs.
512 */
513#ifdef LOG_ENABLED
514 if ( pVCpu->vmm.s.pR0LoggerR3
515 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
516 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
517#endif
518 if (rc != VINF_VMM_CALL_HOST)
519 break;
520 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
521 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
522 break;
523 /* Resume R0 */
524 }
525
526 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
527 {
528 LogRel(("R0 init failed, rc=%Rra\n", rc));
529 if (RT_SUCCESS(rc))
530 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
531 }
532 return rc;
533}
534
535
536/**
537 * Initializes the RC VMM.
538 *
539 * @returns VBox status code.
540 * @param pVM Pointer to the VM.
541 */
542VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
543{
544 PVMCPU pVCpu = VMMGetCpu(pVM);
545 Assert(pVCpu && pVCpu->idCpu == 0);
546
547 /* In VMX mode, there's no need to init RC. */
548 if (pVM->vmm.s.fSwitcherDisabled)
549 return VINF_SUCCESS;
550
551 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
552
553 /*
554 * Call VMMGCInit():
555 * -# resolve the address.
556 * -# setup stackframe and EIP to use the trampoline.
557 * -# do a generic hypervisor call.
558 */
559 RTRCPTR RCPtrEP;
560 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
561 if (RT_SUCCESS(rc))
562 {
563 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
564 uint64_t u64TS = RTTimeProgramStartNanoTS();
565 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
566 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
567 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
568 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
569 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
570 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
571 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
572 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
573 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
574
575 for (;;)
576 {
577#ifdef NO_SUPCALLR0VMM
578 //rc = VERR_GENERAL_FAILURE;
579 rc = VINF_SUCCESS;
580#else
581 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
582#endif
583#ifdef LOG_ENABLED
584 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
585 if ( pLogger
586 && pLogger->offScratch > 0)
587 RTLogFlushRC(NULL, pLogger);
588#endif
589#ifdef VBOX_WITH_RC_RELEASE_LOGGING
590 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
591 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
592 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
593#endif
594 if (rc != VINF_VMM_CALL_HOST)
595 break;
596 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
597 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
598 break;
599 }
600
601 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
602 {
603 VMMR3FatalDump(pVM, pVCpu, rc);
604 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
605 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
606 }
607 AssertRC(rc);
608 }
609 return rc;
610}
611
612
613/**
614 * Called when an init phase completes.
615 *
616 * @returns VBox status code.
617 * @param pVM Pointer to the VM.
618 * @param enmWhat Which init phase.
619 */
620VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
621{
622 int rc = VINF_SUCCESS;
623
624 switch (enmWhat)
625 {
626 case VMINITCOMPLETED_RING3:
627 {
628 /*
629 * CPUM's post-initialization (APIC base MSR caching).
630 */
631 rc = CPUMR3InitCompleted(pVM);
632 AssertRCReturn(rc, rc);
633
634 /*
635 * Set page attributes to r/w for stack pages.
636 */
637 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
638 {
639 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
640 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
641 AssertRCReturn(rc, rc);
642 }
643
644 /*
645 * Create the EMT yield timer.
646 */
647 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
648 AssertRCReturn(rc, rc);
649
650 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
651 AssertRCReturn(rc, rc);
652
653#ifdef VBOX_WITH_NMI
654 /*
655 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
656 */
657 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
658 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
659 AssertRCReturn(rc, rc);
660#endif
661
662#ifdef VBOX_STRICT_VMM_STACK
663 /*
664 * Setup the stack guard pages: Two inaccessible pages at each sides of the
665 * stack to catch over/under-flows.
666 */
667 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
668 {
669 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
670
671 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
672 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
673
674 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
675 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
676 }
677 pVM->vmm.s.fStackGuardsStationed = true;
678#endif
679 break;
680 }
681
682 case VMINITCOMPLETED_RING0:
683 {
684 /*
685 * Disable the periodic preemption timers if we can use the
686 * VMX-preemption timer instead.
687 */
688 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
689 && HMR3IsVmxPreemptionTimerUsed(pVM))
690 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
691 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
692
693 /*
694 * CPUM's post-initialization (print CPUIDs).
695 */
696 rc = CPUMR3LogCpuIds(pVM);
697 AssertRCReturn(rc, rc);
698
699 break;
700 }
701
702 default: /* shuts up gcc */
703 break;
704 }
705
706 return rc;
707}
708
709
710/**
711 * Terminate the VMM bits.
712 *
713 * @returns VINF_SUCCESS.
714 * @param pVM Pointer to the VM.
715 */
716VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
717{
718 PVMCPU pVCpu = VMMGetCpu(pVM);
719 Assert(pVCpu && pVCpu->idCpu == 0);
720
721 /*
722 * Call Ring-0 entry with termination code.
723 */
724 int rc;
725 for (;;)
726 {
727#ifdef NO_SUPCALLR0VMM
728 //rc = VERR_GENERAL_FAILURE;
729 rc = VINF_SUCCESS;
730#else
731 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
732#endif
733 /*
734 * Flush the logs.
735 */
736#ifdef LOG_ENABLED
737 if ( pVCpu->vmm.s.pR0LoggerR3
738 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
739 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
740#endif
741 if (rc != VINF_VMM_CALL_HOST)
742 break;
743 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
744 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
745 break;
746 /* Resume R0 */
747 }
748 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
749 {
750 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
751 if (RT_SUCCESS(rc))
752 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
753 }
754
755 for (VMCPUID i = 0; i < pVM->cCpus; i++)
756 {
757 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
758 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
759 }
760 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
761 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
762 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
763 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
764 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
765 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
766 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
767 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
768
769#ifdef VBOX_STRICT_VMM_STACK
770 /*
771 * Make the two stack guard pages present again.
772 */
773 if (pVM->vmm.s.fStackGuardsStationed)
774 {
775 for (VMCPUID i = 0; i < pVM->cCpus; i++)
776 {
777 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
778 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
779 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
780 }
781 pVM->vmm.s.fStackGuardsStationed = false;
782 }
783#endif
784
785 vmmTermFormatTypes();
786 return rc;
787}
788
789
790/**
791 * Applies relocations to data and code managed by this
792 * component. This function will be called at init and
793 * whenever the VMM need to relocate it self inside the GC.
794 *
795 * The VMM will need to apply relocations to the core code.
796 *
797 * @param pVM Pointer to the VM.
798 * @param offDelta The relocation delta.
799 */
800VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
801{
802 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
803
804 /*
805 * Recalc the RC address.
806 */
807#ifdef VBOX_WITH_RAW_MODE
808 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
809#endif
810
811 /*
812 * The stack.
813 */
814 for (VMCPUID i = 0; i < pVM->cCpus; i++)
815 {
816 PVMCPU pVCpu = &pVM->aCpus[i];
817
818 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
819
820 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
821 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
822 }
823
824 /*
825 * All the switchers.
826 */
827 vmmR3SwitcherRelocate(pVM, offDelta);
828
829 /*
830 * Get other RC entry points.
831 */
832 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
833 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
834
835 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
836 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
837
838 /*
839 * Update the logger.
840 */
841 VMMR3UpdateLoggers(pVM);
842}
843
844
845/**
846 * Updates the settings for the RC and R0 loggers.
847 *
848 * @returns VBox status code.
849 * @param pVM Pointer to the VM.
850 */
851VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
852{
853 /*
854 * Simply clone the logger instance (for RC).
855 */
856 int rc = VINF_SUCCESS;
857 RTRCPTR RCPtrLoggerFlush = 0;
858
859 if (pVM->vmm.s.pRCLoggerR3
860#ifdef VBOX_WITH_RC_RELEASE_LOGGING
861 || pVM->vmm.s.pRCRelLoggerR3
862#endif
863 )
864 {
865 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
866 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
867 }
868
869 if (pVM->vmm.s.pRCLoggerR3)
870 {
871 RTRCPTR RCPtrLoggerWrapper = 0;
872 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
873 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
874
875 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
876 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
877 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
878 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
879 }
880
881#ifdef VBOX_WITH_RC_RELEASE_LOGGING
882 if (pVM->vmm.s.pRCRelLoggerR3)
883 {
884 RTRCPTR RCPtrLoggerWrapper = 0;
885 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
886 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
887
888 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
889 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
890 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
891 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
892 }
893#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
894
895#ifdef LOG_ENABLED
896 /*
897 * For the ring-0 EMT logger, we use a per-thread logger instance
898 * in ring-0. Only initialize it once.
899 */
900 PRTLOGGER const pDefault = RTLogDefaultInstance();
901 for (VMCPUID i = 0; i < pVM->cCpus; i++)
902 {
903 PVMCPU pVCpu = &pVM->aCpus[i];
904 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
905 if (pR0LoggerR3)
906 {
907 if (!pR0LoggerR3->fCreated)
908 {
909 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
910 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
911 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
912
913 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
914 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
915 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
916
917 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
918 pfnLoggerWrapper, pfnLoggerFlush,
919 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
920 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
921
922 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
923 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
924 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
925 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pfnLoggerPrefix, NIL_RTR0PTR);
926 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
927
928 pR0LoggerR3->idCpu = i;
929 pR0LoggerR3->fCreated = true;
930 pR0LoggerR3->fFlushingDisabled = false;
931
932 }
933
934 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pDefault,
935 RTLOGFLAGS_BUFFERED, UINT32_MAX);
936 AssertRC(rc);
937 }
938 }
939#endif
940 return rc;
941}
942
943
944/**
945 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
946 *
947 * @returns Pointer to the buffer.
948 * @param pVM Pointer to the VM.
949 */
950VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
951{
952 if (HMIsEnabled(pVM))
953 return pVM->vmm.s.szRing0AssertMsg1;
954
955 RTRCPTR RCPtr;
956 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
957 if (RT_SUCCESS(rc))
958 return (const char *)MMHyperRCToR3(pVM, RCPtr);
959
960 return NULL;
961}
962
963
964/**
965 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
966 *
967 * @returns Pointer to the buffer.
968 * @param pVM Pointer to the VM.
969 */
970VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
971{
972 if (HMIsEnabled(pVM))
973 return pVM->vmm.s.szRing0AssertMsg2;
974
975 RTRCPTR RCPtr;
976 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
977 if (RT_SUCCESS(rc))
978 return (const char *)MMHyperRCToR3(pVM, RCPtr);
979
980 return NULL;
981}
982
983
984/**
985 * Execute state save operation.
986 *
987 * @returns VBox status code.
988 * @param pVM Pointer to the VM.
989 * @param pSSM SSM operation handle.
990 */
991static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
992{
993 LogFlow(("vmmR3Save:\n"));
994
995 /*
996 * Save the started/stopped state of all CPUs except 0 as it will always
997 * be running. This avoids breaking the saved state version. :-)
998 */
999 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1000 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1001
1002 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1003}
1004
1005
1006/**
1007 * Execute state load operation.
1008 *
1009 * @returns VBox status code.
1010 * @param pVM Pointer to the VM.
1011 * @param pSSM SSM operation handle.
1012 * @param uVersion Data layout version.
1013 * @param uPass The data pass.
1014 */
1015static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1016{
1017 LogFlow(("vmmR3Load:\n"));
1018 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1019
1020 /*
1021 * Validate version.
1022 */
1023 if ( uVersion != VMM_SAVED_STATE_VERSION
1024 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1025 {
1026 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1027 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1028 }
1029
1030 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1031 {
1032 /* Ignore the stack bottom, stack pointer and stack bits. */
1033 RTRCPTR RCPtrIgnored;
1034 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1035 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1036#ifdef RT_OS_DARWIN
1037 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1038 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1039 && SSMR3HandleRevision(pSSM) >= 48858
1040 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1041 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1042 )
1043 SSMR3Skip(pSSM, 16384);
1044 else
1045 SSMR3Skip(pSSM, 8192);
1046#else
1047 SSMR3Skip(pSSM, 8192);
1048#endif
1049 }
1050
1051 /*
1052 * Restore the VMCPU states. VCPU 0 is always started.
1053 */
1054 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1055 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1056 {
1057 bool fStarted;
1058 int rc = SSMR3GetBool(pSSM, &fStarted);
1059 if (RT_FAILURE(rc))
1060 return rc;
1061 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1062 }
1063
1064 /* terminator */
1065 uint32_t u32;
1066 int rc = SSMR3GetU32(pSSM, &u32);
1067 if (RT_FAILURE(rc))
1068 return rc;
1069 if (u32 != UINT32_MAX)
1070 {
1071 AssertMsgFailed(("u32=%#x\n", u32));
1072 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1073 }
1074 return VINF_SUCCESS;
1075}
1076
1077
1078/**
1079 * Resolve a builtin RC symbol.
1080 *
1081 * Called by PDM when loading or relocating RC modules.
1082 *
1083 * @returns VBox status
1084 * @param pVM Pointer to the VM.
1085 * @param pszSymbol Symbol to resolv
1086 * @param pRCPtrValue Where to store the symbol value.
1087 *
1088 * @remark This has to work before VMMR3Relocate() is called.
1089 */
1090VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1091{
1092 if (!strcmp(pszSymbol, "g_Logger"))
1093 {
1094 if (pVM->vmm.s.pRCLoggerR3)
1095 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1096 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1097 }
1098 else if (!strcmp(pszSymbol, "g_RelLogger"))
1099 {
1100#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1101 if (pVM->vmm.s.pRCRelLoggerR3)
1102 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1103 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1104#else
1105 *pRCPtrValue = NIL_RTRCPTR;
1106#endif
1107 }
1108 else
1109 return VERR_SYMBOL_NOT_FOUND;
1110 return VINF_SUCCESS;
1111}
1112
1113
1114/**
1115 * Suspends the CPU yielder.
1116 *
1117 * @param pVM Pointer to the VM.
1118 */
1119VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1120{
1121 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1122 if (!pVM->vmm.s.cYieldResumeMillies)
1123 {
1124 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1125 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1126 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1127 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1128 else
1129 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1130 TMTimerStop(pVM->vmm.s.pYieldTimer);
1131 }
1132 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1133}
1134
1135
1136/**
1137 * Stops the CPU yielder.
1138 *
1139 * @param pVM Pointer to the VM.
1140 */
1141VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1142{
1143 if (!pVM->vmm.s.cYieldResumeMillies)
1144 TMTimerStop(pVM->vmm.s.pYieldTimer);
1145 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1146 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1147}
1148
1149
1150/**
1151 * Resumes the CPU yielder when it has been a suspended or stopped.
1152 *
1153 * @param pVM Pointer to the VM.
1154 */
1155VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1156{
1157 if (pVM->vmm.s.cYieldResumeMillies)
1158 {
1159 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1160 pVM->vmm.s.cYieldResumeMillies = 0;
1161 }
1162}
1163
1164
1165/**
1166 * Internal timer callback function.
1167 *
1168 * @param pVM The VM.
1169 * @param pTimer The timer handle.
1170 * @param pvUser User argument specified upon timer creation.
1171 */
1172static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1173{
1174 NOREF(pvUser);
1175
1176 /*
1177 * This really needs some careful tuning. While we shouldn't be too greedy since
1178 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1179 * because that'll cause us to stop up.
1180 *
1181 * The current logic is to use the default interval when there is no lag worth
1182 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1183 *
1184 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1185 * so the lag is up to date.)
1186 */
1187 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1188 if ( u64Lag < 50000000 /* 50ms */
1189 || ( u64Lag < 1000000000 /* 1s */
1190 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1191 )
1192 {
1193 uint64_t u64Elapsed = RTTimeNanoTS();
1194 pVM->vmm.s.u64LastYield = u64Elapsed;
1195
1196 RTThreadYield();
1197
1198#ifdef LOG_ENABLED
1199 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1200 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1201#endif
1202 }
1203 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1204}
1205
1206
1207/**
1208 * Executes guest code in the raw-mode context.
1209 *
1210 * @param pVM Pointer to the VM.
1211 * @param pVCpu Pointer to the VMCPU.
1212 */
1213VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1214{
1215 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1216
1217 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1218
1219 /*
1220 * Set the hypervisor to resume executing a CPUM resume function
1221 * in CPUMRCA.asm.
1222 */
1223 CPUMSetHyperState(pVCpu,
1224 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1225 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1226 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1227 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1228 0, /* eax */
1229 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1230
1231 /*
1232 * We hide log flushes (outer) and hypervisor interrupts (inner).
1233 */
1234 for (;;)
1235 {
1236#ifdef VBOX_STRICT
1237 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1238 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1239 PGMMapCheck(pVM);
1240#endif
1241 int rc;
1242 do
1243 {
1244#ifdef NO_SUPCALLR0VMM
1245 rc = VERR_GENERAL_FAILURE;
1246#else
1247 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1248 if (RT_LIKELY(rc == VINF_SUCCESS))
1249 rc = pVCpu->vmm.s.iLastGZRc;
1250#endif
1251 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1252
1253 /*
1254 * Flush the logs.
1255 */
1256#ifdef LOG_ENABLED
1257 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1258 if ( pLogger
1259 && pLogger->offScratch > 0)
1260 RTLogFlushRC(NULL, pLogger);
1261#endif
1262#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1263 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1264 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1265 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1266#endif
1267 if (rc != VINF_VMM_CALL_HOST)
1268 {
1269 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1270 return rc;
1271 }
1272 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1273 if (RT_FAILURE(rc))
1274 return rc;
1275 /* Resume GC */
1276 }
1277}
1278
1279
1280/**
1281 * Executes guest code (Intel VT-x and AMD-V).
1282 *
1283 * @param pVM Pointer to the VM.
1284 * @param pVCpu Pointer to the VMCPU.
1285 */
1286VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1287{
1288 Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1289
1290 for (;;)
1291 {
1292 int rc;
1293 do
1294 {
1295#ifdef NO_SUPCALLR0VMM
1296 rc = VERR_GENERAL_FAILURE;
1297#else
1298 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1299 if (RT_LIKELY(rc == VINF_SUCCESS))
1300 rc = pVCpu->vmm.s.iLastGZRc;
1301#endif
1302 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1303
1304#if 0 /* todo triggers too often */
1305 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1306#endif
1307
1308#ifdef LOG_ENABLED
1309 /*
1310 * Flush the log
1311 */
1312 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1313 if ( pR0LoggerR3
1314 && pR0LoggerR3->Logger.offScratch > 0)
1315 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1316#endif /* !LOG_ENABLED */
1317 if (rc != VINF_VMM_CALL_HOST)
1318 {
1319 Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1320 return rc;
1321 }
1322 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1323 if (RT_FAILURE(rc))
1324 return rc;
1325 /* Resume R0 */
1326 }
1327}
1328
1329/**
1330 * VCPU worker for VMMSendSipi.
1331 *
1332 * @param pVM Pointer to the VM.
1333 * @param idCpu Virtual CPU to perform SIPI on
1334 * @param uVector SIPI vector
1335 */
1336DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1337{
1338 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1339 VMCPU_ASSERT_EMT(pVCpu);
1340
1341 /** @todo what are we supposed to do if the processor is already running? */
1342 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1343 return VERR_ACCESS_DENIED;
1344
1345
1346 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1347
1348 pCtx->cs.Sel = uVector << 8;
1349 pCtx->cs.ValidSel = uVector << 8;
1350 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1351 pCtx->cs.u64Base = uVector << 12;
1352 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1353 pCtx->rip = 0;
1354
1355 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1356
1357# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1358 EMSetState(pVCpu, EMSTATE_HALTED);
1359 return VINF_EM_RESCHEDULE;
1360# else /* And if we go the VMCPU::enmState way it can stay here. */
1361 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1362 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1363 return VINF_SUCCESS;
1364# endif
1365}
1366
1367DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1368{
1369 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1370 VMCPU_ASSERT_EMT(pVCpu);
1371
1372 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1373 CPUMR3ResetCpu(pVCpu);
1374 return VINF_EM_WAIT_SIPI;
1375}
1376
1377/**
1378 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1379 * and unhalting processor
1380 *
1381 * @param pVM Pointer to the VM.
1382 * @param idCpu Virtual CPU to perform SIPI on
1383 * @param uVector SIPI vector
1384 */
1385VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1386{
1387 AssertReturnVoid(idCpu < pVM->cCpus);
1388
1389 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1390 AssertRC(rc);
1391}
1392
1393/**
1394 * Sends init IPI to the virtual CPU.
1395 *
1396 * @param pVM Pointer to the VM.
1397 * @param idCpu Virtual CPU to perform int IPI on
1398 */
1399VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1400{
1401 AssertReturnVoid(idCpu < pVM->cCpus);
1402
1403 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1404 AssertRC(rc);
1405}
1406
1407/**
1408 * Registers the guest memory range that can be used for patching
1409 *
1410 * @returns VBox status code.
1411 * @param pVM Pointer to the VM.
1412 * @param pPatchMem Patch memory range
1413 * @param cbPatchMem Size of the memory range
1414 */
1415VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1416{
1417 VM_ASSERT_EMT(pVM);
1418 if (HMIsEnabled(pVM))
1419 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1420
1421 return VERR_NOT_SUPPORTED;
1422}
1423
1424/**
1425 * Deregisters the guest memory range that can be used for patching
1426 *
1427 * @returns VBox status code.
1428 * @param pVM Pointer to the VM.
1429 * @param pPatchMem Patch memory range
1430 * @param cbPatchMem Size of the memory range
1431 */
1432VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1433{
1434 if (HMIsEnabled(pVM))
1435 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1436
1437 return VINF_SUCCESS;
1438}
1439
1440
1441/**
1442 * Count returns and have the last non-caller EMT wake up the caller.
1443 *
1444 * @returns VBox strict informational status code for EM scheduling. No failures
1445 * will be returned here, those are for the caller only.
1446 *
1447 * @param pVM Pointer to the VM.
1448 */
1449DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1450{
1451 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1452 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1453 if (cReturned == pVM->cCpus - 1U)
1454 {
1455 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1456 AssertLogRelRC(rc);
1457 }
1458
1459 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1460 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1461 ("%Rrc\n", rcRet),
1462 VERR_IPE_UNEXPECTED_INFO_STATUS);
1463 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1464}
1465
1466
1467/**
1468 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1469 *
1470 * @returns VBox strict informational status code for EM scheduling. No failures
1471 * will be returned here, those are for the caller only. When
1472 * fIsCaller is set, VINF_SUCCESS is always returned.
1473 *
1474 * @param pVM Pointer to the VM.
1475 * @param pVCpu The VMCPU structure for the calling EMT.
1476 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1477 * not.
1478 * @param fFlags The flags.
1479 * @param pfnRendezvous The callback.
1480 * @param pvUser The user argument for the callback.
1481 */
1482static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1483 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1484{
1485 int rc;
1486
1487 /*
1488 * Enter, the last EMT triggers the next callback phase.
1489 */
1490 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1491 if (cEntered != pVM->cCpus)
1492 {
1493 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1494 {
1495 /* Wait for our turn. */
1496 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1497 AssertLogRelRC(rc);
1498 }
1499 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1500 {
1501 /* Wait for the last EMT to arrive and wake everyone up. */
1502 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1503 AssertLogRelRC(rc);
1504 }
1505 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1506 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1507 {
1508 /* Wait for our turn. */
1509 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1510 AssertLogRelRC(rc);
1511 }
1512 else
1513 {
1514 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1515
1516 /*
1517 * The execute once is handled specially to optimize the code flow.
1518 *
1519 * The last EMT to arrive will perform the callback and the other
1520 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1521 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1522 * returns, that EMT will initiate the normal return sequence.
1523 */
1524 if (!fIsCaller)
1525 {
1526 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1527 AssertLogRelRC(rc);
1528
1529 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1530 }
1531 return VINF_SUCCESS;
1532 }
1533 }
1534 else
1535 {
1536 /*
1537 * All EMTs are waiting, clear the FF and take action according to the
1538 * execution method.
1539 */
1540 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1541
1542 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1543 {
1544 /* Wake up everyone. */
1545 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1546 AssertLogRelRC(rc);
1547 }
1548 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1549 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1550 {
1551 /* Figure out who to wake up and wake it up. If it's ourself, then
1552 it's easy otherwise wait for our turn. */
1553 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1554 ? 0
1555 : pVM->cCpus - 1U;
1556 if (pVCpu->idCpu != iFirst)
1557 {
1558 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1559 AssertLogRelRC(rc);
1560 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1561 AssertLogRelRC(rc);
1562 }
1563 }
1564 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1565 }
1566
1567
1568 /*
1569 * Do the callback and update the status if necessary.
1570 */
1571 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1572 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1573 {
1574 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1575 if (rcStrict != VINF_SUCCESS)
1576 {
1577 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1578 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1579 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1580 int32_t i32RendezvousStatus;
1581 do
1582 {
1583 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1584 if ( rcStrict == i32RendezvousStatus
1585 || RT_FAILURE(i32RendezvousStatus)
1586 || ( i32RendezvousStatus != VINF_SUCCESS
1587 && rcStrict > i32RendezvousStatus))
1588 break;
1589 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1590 }
1591 }
1592
1593 /*
1594 * Increment the done counter and take action depending on whether we're
1595 * the last to finish callback execution.
1596 */
1597 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1598 if ( cDone != pVM->cCpus
1599 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1600 {
1601 /* Signal the next EMT? */
1602 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1603 {
1604 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1605 AssertLogRelRC(rc);
1606 }
1607 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1608 {
1609 Assert(cDone == pVCpu->idCpu + 1U);
1610 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1611 AssertLogRelRC(rc);
1612 }
1613 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1614 {
1615 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1616 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1617 AssertLogRelRC(rc);
1618 }
1619
1620 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1621 if (!fIsCaller)
1622 {
1623 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1624 AssertLogRelRC(rc);
1625 }
1626 }
1627 else
1628 {
1629 /* Callback execution is all done, tell the rest to return. */
1630 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1631 AssertLogRelRC(rc);
1632 }
1633
1634 if (!fIsCaller)
1635 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1636 return VINF_SUCCESS;
1637}
1638
1639
1640/**
1641 * Called in response to VM_FF_EMT_RENDEZVOUS.
1642 *
1643 * @returns VBox strict status code - EM scheduling. No errors will be returned
1644 * here, nor will any non-EM scheduling status codes be returned.
1645 *
1646 * @param pVM Pointer to the VM.
1647 * @param pVCpu The handle of the calling EMT.
1648 *
1649 * @thread EMT
1650 */
1651VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1652{
1653 Assert(!pVCpu->vmm.s.fInRendezvous);
1654 pVCpu->vmm.s.fInRendezvous = true;
1655 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1656 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1657 pVCpu->vmm.s.fInRendezvous = false;
1658 return rc;
1659}
1660
1661
1662/**
1663 * EMT rendezvous.
1664 *
1665 * Gathers all the EMTs and execute some code on each of them, either in a one
1666 * by one fashion or all at once.
1667 *
1668 * @returns VBox strict status code. This will be the first error,
1669 * VINF_SUCCESS, or an EM scheduling status code.
1670 *
1671 * @param pVM Pointer to the VM.
1672 * @param fFlags Flags indicating execution methods. See
1673 * grp_VMMR3EmtRendezvous_fFlags.
1674 * @param pfnRendezvous The callback.
1675 * @param pvUser User argument for the callback.
1676 *
1677 * @thread Any.
1678 */
1679VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1680{
1681 /*
1682 * Validate input.
1683 */
1684 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1685 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1686 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1687 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1688 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1689 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1690 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1691
1692 VBOXSTRICTRC rcStrict;
1693 PVMCPU pVCpu = VMMGetCpu(pVM);
1694 if (!pVCpu)
1695 /*
1696 * Forward the request to an EMT thread.
1697 */
1698 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1699 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1700 else if (pVM->cCpus == 1)
1701 {
1702 /*
1703 * Shortcut for the single EMT case.
1704 */
1705 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1706 pVCpu->vmm.s.fInRendezvous = true;
1707 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1708 pVCpu->vmm.s.fInRendezvous = false;
1709 }
1710 else
1711 {
1712 /*
1713 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1714 * lookout of the RENDEZVOUS FF.
1715 */
1716 int rc;
1717 rcStrict = VINF_SUCCESS;
1718 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1719 {
1720 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1721
1722 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1723 {
1724 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1725 {
1726 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1727 if ( rc != VINF_SUCCESS
1728 && ( rcStrict == VINF_SUCCESS
1729 || rcStrict > rc))
1730 rcStrict = rc;
1731 /** @todo Perhaps deal with termination here? */
1732 }
1733 ASMNopPause();
1734 }
1735 }
1736 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1737 Assert(!pVCpu->vmm.s.fInRendezvous);
1738 pVCpu->vmm.s.fInRendezvous = true;
1739
1740 /*
1741 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1742 */
1743 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1744 {
1745 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1746 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1747 }
1748 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1749 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1750 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1751 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1752 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1753 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1754 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1755 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1756 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1757 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1758 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1759
1760 /*
1761 * Set the FF and poke the other EMTs.
1762 */
1763 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1764 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1765
1766 /*
1767 * Do the same ourselves.
1768 */
1769 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1770
1771 /*
1772 * The caller waits for the other EMTs to be done and return before doing
1773 * the cleanup. This makes away with wakeup / reset races we would otherwise
1774 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1775 */
1776 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1777 AssertLogRelRC(rc);
1778
1779 /*
1780 * Get the return code and clean up a little bit.
1781 */
1782 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1783 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1784
1785 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1786 pVCpu->vmm.s.fInRendezvous = false;
1787
1788 /*
1789 * Merge rcStrict and rcMy.
1790 */
1791 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1792 if ( rcMy != VINF_SUCCESS
1793 && ( rcStrict == VINF_SUCCESS
1794 || rcStrict > rcMy))
1795 rcStrict = rcMy;
1796 }
1797
1798 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1799 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1800 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1801 VERR_IPE_UNEXPECTED_INFO_STATUS);
1802 return VBOXSTRICTRC_VAL(rcStrict);
1803}
1804
1805
1806/**
1807 * Disables/enables EMT rendezvous.
1808 *
1809 * This is used to make sure EMT rendezvous does not take place while
1810 * processing a priority request.
1811 *
1812 * @returns Old rendezvous-disabled state.
1813 * @param pVCpu The handle of the calling EMT.
1814 * @param fDisabled True if disabled, false if enabled.
1815 */
1816VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1817{
1818 VMCPU_ASSERT_EMT(pVCpu);
1819 bool fOld = pVCpu->vmm.s.fInRendezvous;
1820 pVCpu->vmm.s.fInRendezvous = fDisabled;
1821 return fOld;
1822}
1823
1824
1825/**
1826 * Read from the ring 0 jump buffer stack
1827 *
1828 * @returns VBox status code.
1829 *
1830 * @param pVM Pointer to the VM.
1831 * @param idCpu The ID of the source CPU context (for the address).
1832 * @param R0Addr Where to start reading.
1833 * @param pvBuf Where to store the data we've read.
1834 * @param cbRead The number of bytes to read.
1835 */
1836VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1837{
1838 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1839 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1840
1841#ifdef VMM_R0_SWITCH_STACK
1842 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1843#else
1844 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1845#endif
1846 if ( off > VMM_STACK_SIZE
1847 || off + cbRead >= VMM_STACK_SIZE)
1848 return VERR_INVALID_POINTER;
1849
1850 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1851 return VINF_SUCCESS;
1852}
1853
1854
1855/**
1856 * Calls a RC function.
1857 *
1858 * @param pVM Pointer to the VM.
1859 * @param RCPtrEntry The address of the RC function.
1860 * @param cArgs The number of arguments in the ....
1861 * @param ... Arguments to the function.
1862 */
1863VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1864{
1865 va_list args;
1866 va_start(args, cArgs);
1867 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1868 va_end(args);
1869 return rc;
1870}
1871
1872
1873/**
1874 * Calls a RC function.
1875 *
1876 * @param pVM Pointer to the VM.
1877 * @param RCPtrEntry The address of the RC function.
1878 * @param cArgs The number of arguments in the ....
1879 * @param args Arguments to the function.
1880 */
1881VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1882{
1883 /* Raw mode implies 1 VCPU. */
1884 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1885 PVMCPU pVCpu = &pVM->aCpus[0];
1886
1887 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1888
1889 /*
1890 * Setup the call frame using the trampoline.
1891 */
1892 CPUMSetHyperState(pVCpu,
1893 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1894 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1895 RCPtrEntry, /* eax */
1896 cArgs /* edx */
1897 );
1898
1899 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1900 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1901 int i = cArgs;
1902 while (i-- > 0)
1903 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1904
1905 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1906 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1907
1908 /*
1909 * We hide log flushes (outer) and hypervisor interrupts (inner).
1910 */
1911 for (;;)
1912 {
1913 int rc;
1914 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1915 do
1916 {
1917#ifdef NO_SUPCALLR0VMM
1918 rc = VERR_GENERAL_FAILURE;
1919#else
1920 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1921 if (RT_LIKELY(rc == VINF_SUCCESS))
1922 rc = pVCpu->vmm.s.iLastGZRc;
1923#endif
1924 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1925
1926 /*
1927 * Flush the loggers.
1928 */
1929#ifdef LOG_ENABLED
1930 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1931 if ( pLogger
1932 && pLogger->offScratch > 0)
1933 RTLogFlushRC(NULL, pLogger);
1934#endif
1935#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1936 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1937 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1938 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1939#endif
1940 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1941 VMMR3FatalDump(pVM, pVCpu, rc);
1942 if (rc != VINF_VMM_CALL_HOST)
1943 {
1944 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1945 return rc;
1946 }
1947 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1948 if (RT_FAILURE(rc))
1949 return rc;
1950 }
1951}
1952
1953
1954/**
1955 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1956 *
1957 * @returns VBox status code.
1958 * @param pVM Pointer to the VM.
1959 * @param uOperation Operation to execute.
1960 * @param u64Arg Constant argument.
1961 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1962 * details.
1963 */
1964VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1965{
1966 PVMCPU pVCpu = VMMGetCpu(pVM);
1967 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1968
1969 /*
1970 * Call Ring-0 entry with init code.
1971 */
1972 int rc;
1973 for (;;)
1974 {
1975#ifdef NO_SUPCALLR0VMM
1976 rc = VERR_GENERAL_FAILURE;
1977#else
1978 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1979#endif
1980 /*
1981 * Flush the logs.
1982 */
1983#ifdef LOG_ENABLED
1984 if ( pVCpu->vmm.s.pR0LoggerR3
1985 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1986 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
1987#endif
1988 if (rc != VINF_VMM_CALL_HOST)
1989 break;
1990 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1991 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1992 break;
1993 /* Resume R0 */
1994 }
1995
1996 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
1997 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1998 VERR_IPE_UNEXPECTED_INFO_STATUS);
1999 return rc;
2000}
2001
2002
2003/**
2004 * Resumes executing hypervisor code when interrupted by a queue flush or a
2005 * debug event.
2006 *
2007 * @returns VBox status code.
2008 * @param pVM Pointer to the VM.
2009 * @param pVCpu Pointer to the VMCPU.
2010 */
2011VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2012{
2013 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2014 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2015
2016 /*
2017 * We hide log flushes (outer) and hypervisor interrupts (inner).
2018 */
2019 for (;;)
2020 {
2021 int rc;
2022 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2023 do
2024 {
2025#ifdef NO_SUPCALLR0VMM
2026 rc = VERR_GENERAL_FAILURE;
2027#else
2028 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2029 if (RT_LIKELY(rc == VINF_SUCCESS))
2030 rc = pVCpu->vmm.s.iLastGZRc;
2031#endif
2032 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2033
2034 /*
2035 * Flush the loggers.
2036 */
2037#ifdef LOG_ENABLED
2038 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2039 if ( pLogger
2040 && pLogger->offScratch > 0)
2041 RTLogFlushRC(NULL, pLogger);
2042#endif
2043#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2044 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2045 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2046 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2047#endif
2048 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2049 VMMR3FatalDump(pVM, pVCpu, rc);
2050 if (rc != VINF_VMM_CALL_HOST)
2051 {
2052 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2053 return rc;
2054 }
2055 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2056 if (RT_FAILURE(rc))
2057 return rc;
2058 }
2059}
2060
2061
2062/**
2063 * Service a call to the ring-3 host code.
2064 *
2065 * @returns VBox status code.
2066 * @param pVM Pointer to the VM.
2067 * @param pVCpu Pointer to the VMCPU.
2068 * @remark Careful with critsects.
2069 */
2070static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2071{
2072 /*
2073 * We must also check for pending critsect exits or else we can deadlock
2074 * when entering other critsects here.
2075 */
2076 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2077 PDMCritSectFF(pVCpu);
2078
2079 switch (pVCpu->vmm.s.enmCallRing3Operation)
2080 {
2081 /*
2082 * Acquire a critical section.
2083 */
2084 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2085 {
2086 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2087 true /*fCallRing3*/);
2088 break;
2089 }
2090
2091 /*
2092 * Acquire the PDM lock.
2093 */
2094 case VMMCALLRING3_PDM_LOCK:
2095 {
2096 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2097 break;
2098 }
2099
2100 /*
2101 * Grow the PGM pool.
2102 */
2103 case VMMCALLRING3_PGM_POOL_GROW:
2104 {
2105 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2106 break;
2107 }
2108
2109 /*
2110 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2111 */
2112 case VMMCALLRING3_PGM_MAP_CHUNK:
2113 {
2114 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2115 break;
2116 }
2117
2118 /*
2119 * Allocates more handy pages.
2120 */
2121 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2122 {
2123 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2124 break;
2125 }
2126
2127 /*
2128 * Allocates a large page.
2129 */
2130 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2131 {
2132 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2133 break;
2134 }
2135
2136 /*
2137 * Acquire the PGM lock.
2138 */
2139 case VMMCALLRING3_PGM_LOCK:
2140 {
2141 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2142 break;
2143 }
2144
2145 /*
2146 * Acquire the MM hypervisor heap lock.
2147 */
2148 case VMMCALLRING3_MMHYPER_LOCK:
2149 {
2150 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2151 break;
2152 }
2153
2154#ifdef VBOX_WITH_REM
2155 /*
2156 * Flush REM handler notifications.
2157 */
2158 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2159 {
2160 REMR3ReplayHandlerNotifications(pVM);
2161 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2162 break;
2163 }
2164#endif
2165
2166 /*
2167 * This is a noop. We just take this route to avoid unnecessary
2168 * tests in the loops.
2169 */
2170 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2171 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2172 LogAlways(("*FLUSH*\n"));
2173 break;
2174
2175 /*
2176 * Set the VM error message.
2177 */
2178 case VMMCALLRING3_VM_SET_ERROR:
2179 VMR3SetErrorWorker(pVM);
2180 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2181 break;
2182
2183 /*
2184 * Set the VM runtime error message.
2185 */
2186 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2187 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2188 break;
2189
2190 /*
2191 * Signal a ring 0 hypervisor assertion.
2192 * Cancel the longjmp operation that's in progress.
2193 */
2194 case VMMCALLRING3_VM_R0_ASSERTION:
2195 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2196 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2197#ifdef RT_ARCH_X86
2198 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2199#else
2200 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2201#endif
2202#ifdef VMM_R0_SWITCH_STACK
2203 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2204#endif
2205 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2206 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2207 return VERR_VMM_RING0_ASSERTION;
2208
2209 /*
2210 * A forced switch to ring 0 for preemption purposes.
2211 */
2212 case VMMCALLRING3_VM_R0_PREEMPT:
2213 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2214 break;
2215
2216 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2217 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2218 break;
2219
2220 default:
2221 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2222 return VERR_VMM_UNKNOWN_RING3_CALL;
2223 }
2224
2225 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2226 return VINF_SUCCESS;
2227}
2228
2229
2230/**
2231 * Displays the Force action Flags.
2232 *
2233 * @param pVM Pointer to the VM.
2234 * @param pHlp The output helpers.
2235 * @param pszArgs The additional arguments (ignored).
2236 */
2237static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2238{
2239 int c;
2240 uint32_t f;
2241 NOREF(pszArgs);
2242
2243#define PRINT_FLAG(prf,flag) do { \
2244 if (f & (prf##flag)) \
2245 { \
2246 static const char *s_psz = #flag; \
2247 if (!(c % 6)) \
2248 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2249 else \
2250 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2251 c++; \
2252 f &= ~(prf##flag); \
2253 } \
2254 } while (0)
2255
2256#define PRINT_GROUP(prf,grp,sfx) do { \
2257 if (f & (prf##grp##sfx)) \
2258 { \
2259 static const char *s_psz = #grp; \
2260 if (!(c % 5)) \
2261 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2262 else \
2263 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2264 c++; \
2265 } \
2266 } while (0)
2267
2268 /*
2269 * The global flags.
2270 */
2271 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2272 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2273
2274 /* show the flag mnemonics */
2275 c = 0;
2276 f = fGlobalForcedActions;
2277 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2278 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2279 PRINT_FLAG(VM_FF_,PDM_DMA);
2280 PRINT_FLAG(VM_FF_,DBGF);
2281 PRINT_FLAG(VM_FF_,REQUEST);
2282 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2283 PRINT_FLAG(VM_FF_,RESET);
2284 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2285 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2286 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2287 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2288 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2289 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2290 if (f)
2291 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2292 else
2293 pHlp->pfnPrintf(pHlp, "\n");
2294
2295 /* the groups */
2296 c = 0;
2297 f = fGlobalForcedActions;
2298 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2299 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2300 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2301 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2302 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2303 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2304 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2305 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2306 if (c)
2307 pHlp->pfnPrintf(pHlp, "\n");
2308
2309 /*
2310 * Per CPU flags.
2311 */
2312 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2313 {
2314 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2315 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2316
2317 /* show the flag mnemonics */
2318 c = 0;
2319 f = fLocalForcedActions;
2320 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2321 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2322 PRINT_FLAG(VMCPU_FF_,TIMER);
2323 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2324 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2325 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2326 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2327 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2328 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2329 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2330 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2331 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2332 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2333 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2334 PRINT_FLAG(VMCPU_FF_,TO_R3);
2335 if (f)
2336 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2337 else
2338 pHlp->pfnPrintf(pHlp, "\n");
2339
2340 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2341 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2342
2343 /* the groups */
2344 c = 0;
2345 f = fLocalForcedActions;
2346 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2347 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2348 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2349 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2350 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2351 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2352 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2353 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2354 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2355 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2356 if (c)
2357 pHlp->pfnPrintf(pHlp, "\n");
2358 }
2359
2360#undef PRINT_FLAG
2361#undef PRINT_GROUP
2362}
2363
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