VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 39402

Last change on this file since 39402 was 39402, checked in by vboxsync, 13 years ago

VMM: don't use generic IPE status codes, use specific ones. Part 1.
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1/* $Id: VMM.cpp 39402 2011-11-23 16:25:04Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmapi.h>
84#include <VBox/vmm/cpum.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/iom.h>
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/selm.h>
89#include <VBox/vmm/em.h>
90#include <VBox/sup.h>
91#include <VBox/vmm/dbgf.h>
92#include <VBox/vmm/csam.h>
93#include <VBox/vmm/patm.h>
94#include <VBox/vmm/rem.h>
95#include <VBox/vmm/ssm.h>
96#include <VBox/vmm/tm.h>
97#include "VMMInternal.h"
98#include "VMMSwitcher.h"
99#include <VBox/vmm/vm.h>
100#include <VBox/vmm/ftm.h>
101
102#include <VBox/err.h>
103#include <VBox/param.h>
104#include <VBox/version.h>
105#include <VBox/vmm/hwaccm.h>
106#include <iprt/assert.h>
107#include <iprt/alloc.h>
108#include <iprt/asm.h>
109#include <iprt/time.h>
110#include <iprt/semaphore.h>
111#include <iprt/stream.h>
112#include <iprt/string.h>
113#include <iprt/stdarg.h>
114#include <iprt/ctype.h>
115#include <iprt/x86.h>
116
117
118
119/*******************************************************************************
120* Defined Constants And Macros *
121*******************************************************************************/
122/** The saved state version. */
123#define VMM_SAVED_STATE_VERSION 4
124/** The saved state version used by v3.0 and earlier. (Teleportation) */
125#define VMM_SAVED_STATE_VERSION_3_0 3
126
127
128/*******************************************************************************
129* Internal Functions *
130*******************************************************************************/
131static int vmmR3InitStacks(PVM pVM);
132static int vmmR3InitLoggers(PVM pVM);
133static void vmmR3InitRegisterStats(PVM pVM);
134static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
135static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
136static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
137static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
138static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
139
140
141/**
142 * Initializes the VMM.
143 *
144 * @returns VBox status code.
145 * @param pVM The VM to operate on.
146 */
147VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
148{
149 LogFlow(("VMMR3Init\n"));
150
151 /*
152 * Assert alignment, sizes and order.
153 */
154 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
155 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
156 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
157
158 /*
159 * Init basic VM VMM members.
160 */
161 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
162 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
163 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
164 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
165 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
166 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
167
168 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
169 * The EMT yield interval. The EMT yielding is a hack we employ to play a
170 * bit nicer with the rest of the system (like for instance the GUI).
171 */
172 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
173 23 /* Value arrived at after experimenting with the grub boot prompt. */);
174 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
175
176
177 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
178 * Controls whether we employ per-cpu preemption timers to limit the time
179 * spent executing guest code. This option is not available on all
180 * platforms and we will silently ignore this setting then. If we are
181 * running in VT-x mode, we will use the VMX-preemption timer instead of
182 * this one when possible.
183 */
184 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
185 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
186 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
187
188 /*
189 * Initialize the VMM rendezvous semaphores.
190 */
191 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
192 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
193 return VERR_NO_MEMORY;
194 for (VMCPUID i = 0; i < pVM->cCpus; i++)
195 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
196 for (VMCPUID i = 0; i < pVM->cCpus; i++)
197 {
198 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
199 AssertRCReturn(rc, rc);
200 }
201 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
202 AssertRCReturn(rc, rc);
203 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
204 AssertRCReturn(rc, rc);
205 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
208 AssertRCReturn(rc, rc);
209
210 /* GC switchers are enabled by default. Turned off by HWACCM. */
211 pVM->vmm.s.fSwitcherDisabled = false;
212
213 /*
214 * Register the saved state data unit.
215 */
216 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
217 NULL, NULL, NULL,
218 NULL, vmmR3Save, NULL,
219 NULL, vmmR3Load, NULL);
220 if (RT_FAILURE(rc))
221 return rc;
222
223 /*
224 * Register the Ring-0 VM handle with the session for fast ioctl calls.
225 */
226 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
227 if (RT_FAILURE(rc))
228 return rc;
229
230 /*
231 * Init various sub-components.
232 */
233 rc = vmmR3SwitcherInit(pVM);
234 if (RT_SUCCESS(rc))
235 {
236 rc = vmmR3InitStacks(pVM);
237 if (RT_SUCCESS(rc))
238 {
239 rc = vmmR3InitLoggers(pVM);
240
241#ifdef VBOX_WITH_NMI
242 /*
243 * Allocate mapping for the host APIC.
244 */
245 if (RT_SUCCESS(rc))
246 {
247 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
248 AssertRC(rc);
249 }
250#endif
251 if (RT_SUCCESS(rc))
252 {
253 /*
254 * Debug info and statistics.
255 */
256 DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
257 vmmR3InitRegisterStats(pVM);
258 vmmInitFormatTypes();
259
260 return VINF_SUCCESS;
261 }
262 }
263 /** @todo: Need failure cleanup. */
264
265 //more todo in here?
266 //if (RT_SUCCESS(rc))
267 //{
268 //}
269 //int rc2 = vmmR3TermCoreCode(pVM);
270 //AssertRC(rc2));
271 }
272
273 return rc;
274}
275
276
277/**
278 * Allocate & setup the VMM RC stack(s) (for EMTs).
279 *
280 * The stacks are also used for long jumps in Ring-0.
281 *
282 * @returns VBox status code.
283 * @param pVM Pointer to the shared VM structure.
284 *
285 * @remarks The optional guard page gets it protection setup up during R3 init
286 * completion because of init order issues.
287 */
288static int vmmR3InitStacks(PVM pVM)
289{
290 int rc = VINF_SUCCESS;
291#ifdef VMM_R0_SWITCH_STACK
292 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
293#else
294 uint32_t fFlags = 0;
295#endif
296
297 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
298 {
299 PVMCPU pVCpu = &pVM->aCpus[idCpu];
300
301#ifdef VBOX_STRICT_VMM_STACK
302 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
303#else
304 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
305#endif
306 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
307 if (RT_SUCCESS(rc))
308 {
309#ifdef VBOX_STRICT_VMM_STACK
310 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
311#endif
312#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
313 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
314 if (!VMMIsHwVirtExtForced(pVM))
315 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
316 else
317#endif
318 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
319 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
320 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
321 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
322
323 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
324 }
325 }
326
327 return rc;
328}
329
330
331/**
332 * Initialize the loggers.
333 *
334 * @returns VBox status code.
335 * @param pVM Pointer to the shared VM structure.
336 */
337static int vmmR3InitLoggers(PVM pVM)
338{
339 int rc;
340#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
341
342 /*
343 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
344 */
345#ifdef LOG_ENABLED
346 PRTLOGGER pLogger = RTLogDefaultInstance();
347 if (pLogger)
348 {
349 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
350 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
351 if (RT_FAILURE(rc))
352 return rc;
353 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
354
355# ifdef VBOX_WITH_R0_LOGGING
356 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
357 for (VMCPUID i = 0; i < pVM->cCpus; i++)
358 {
359 PVMCPU pVCpu = &pVM->aCpus[i];
360 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
361 (void **)&pVCpu->vmm.s.pR0LoggerR3);
362 if (RT_FAILURE(rc))
363 return rc;
364 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
365 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
366 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
367 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
368 }
369# endif
370 }
371#endif /* LOG_ENABLED */
372
373#ifdef VBOX_WITH_RC_RELEASE_LOGGING
374 /*
375 * Allocate RC release logger instances (finalized in the relocator).
376 */
377 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
378 if (pRelLogger)
379 {
380 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
381 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
382 if (RT_FAILURE(rc))
383 return rc;
384 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
385 }
386#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
387 return VINF_SUCCESS;
388}
389
390
391/**
392 * VMMR3Init worker that register the statistics with STAM.
393 *
394 * @param pVM The shared VM structure.
395 */
396static void vmmR3InitRegisterStats(PVM pVM)
397{
398 /*
399 * Statistics.
400 */
401 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
460
461#ifdef VBOX_WITH_STATISTICS
462 for (VMCPUID i = 0; i < pVM->cCpus; i++)
463 {
464 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
465 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
466 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
467 }
468#endif
469}
470
471
472/**
473 * Initializes the R0 VMM.
474 *
475 * @returns VBox status code.
476 * @param pVM The VM to operate on.
477 */
478VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
479{
480 int rc;
481 PVMCPU pVCpu = VMMGetCpu(pVM);
482 Assert(pVCpu && pVCpu->idCpu == 0);
483
484#ifdef LOG_ENABLED
485 /*
486 * Initialize the ring-0 logger if we haven't done so yet.
487 */
488 if ( pVCpu->vmm.s.pR0LoggerR3
489 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
490 {
491 rc = VMMR3UpdateLoggers(pVM);
492 if (RT_FAILURE(rc))
493 return rc;
494 }
495#endif
496
497 /*
498 * Call Ring-0 entry with init code.
499 */
500 for (;;)
501 {
502#ifdef NO_SUPCALLR0VMM
503 //rc = VERR_GENERAL_FAILURE;
504 rc = VINF_SUCCESS;
505#else
506 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
507#endif
508 /*
509 * Flush the logs.
510 */
511#ifdef LOG_ENABLED
512 if ( pVCpu->vmm.s.pR0LoggerR3
513 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
514 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
515#endif
516 if (rc != VINF_VMM_CALL_HOST)
517 break;
518 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
519 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
520 break;
521 /* Resume R0 */
522 }
523
524 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
525 {
526 LogRel(("R0 init failed, rc=%Rra\n", rc));
527 if (RT_SUCCESS(rc))
528 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
529 }
530 return rc;
531}
532
533
534/**
535 * Initializes the RC VMM.
536 *
537 * @returns VBox status code.
538 * @param pVM The VM to operate on.
539 */
540VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
541{
542 PVMCPU pVCpu = VMMGetCpu(pVM);
543 Assert(pVCpu && pVCpu->idCpu == 0);
544
545 /* In VMX mode, there's no need to init RC. */
546 if (pVM->vmm.s.fSwitcherDisabled)
547 return VINF_SUCCESS;
548
549 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
550
551 /*
552 * Call VMMGCInit():
553 * -# resolve the address.
554 * -# setup stackframe and EIP to use the trampoline.
555 * -# do a generic hypervisor call.
556 */
557 RTRCPTR RCPtrEP;
558 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
559 if (RT_SUCCESS(rc))
560 {
561 CPUMHyperSetCtxCore(pVCpu, NULL);
562 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
563 uint64_t u64TS = RTTimeProgramStartNanoTS();
564 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
565 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
566 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
567 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
568 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
569 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
570 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
571 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
572 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
573
574 for (;;)
575 {
576#ifdef NO_SUPCALLR0VMM
577 //rc = VERR_GENERAL_FAILURE;
578 rc = VINF_SUCCESS;
579#else
580 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
581#endif
582#ifdef LOG_ENABLED
583 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
584 if ( pLogger
585 && pLogger->offScratch > 0)
586 RTLogFlushRC(NULL, pLogger);
587#endif
588#ifdef VBOX_WITH_RC_RELEASE_LOGGING
589 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
590 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
591 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
592#endif
593 if (rc != VINF_VMM_CALL_HOST)
594 break;
595 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
596 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
597 break;
598 }
599
600 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
601 {
602 VMMR3FatalDump(pVM, pVCpu, rc);
603 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
604 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
605 }
606 AssertRC(rc);
607 }
608 return rc;
609}
610
611
612/**
613 * Called when an init phase completes.
614 *
615 * @returns VBox status code.
616 * @param pVM The VM handle.
617 * @param enmWhat Which init phase.
618 */
619VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
620{
621 int rc = VINF_SUCCESS;
622
623 switch (enmWhat)
624 {
625 case VMINITCOMPLETED_RING3:
626 {
627 /*
628 * Set page attributes to r/w for stack pages.
629 */
630 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
631 {
632 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
633 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
634 AssertRCReturn(rc, rc);
635 }
636
637 /*
638 * Create the EMT yield timer.
639 */
640 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
641 AssertRCReturn(rc, rc);
642
643 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
644 AssertRCReturn(rc, rc);
645
646#ifdef VBOX_WITH_NMI
647 /*
648 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
649 */
650 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
651 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
652 AssertRCReturn(rc, rc);
653#endif
654
655#ifdef VBOX_STRICT_VMM_STACK
656 /*
657 * Setup the stack guard pages: Two inaccessible pages at each sides of the
658 * stack to catch over/under-flows.
659 */
660 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
661 {
662 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
663
664 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
665 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
666
667 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
668 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
669 }
670 pVM->vmm.s.fStackGuardsStationed = true;
671#endif
672 break;
673 }
674
675 case VMINITCOMPLETED_RING0:
676 {
677 /*
678 * Disable the periodic preemption timers if we can use the
679 * VMX-preemption timer instead.
680 */
681 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
682 && HWACCMR3IsVmxPreemptionTimerUsed(pVM))
683 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
684 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
685 break;
686 }
687
688 default: /* shuts up gcc */
689 break;
690 }
691
692 return rc;
693}
694
695
696/**
697 * Terminate the VMM bits.
698 *
699 * @returns VINF_SUCCESS.
700 * @param pVM The VM handle.
701 */
702VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
703{
704 PVMCPU pVCpu = VMMGetCpu(pVM);
705 Assert(pVCpu && pVCpu->idCpu == 0);
706
707 /*
708 * Call Ring-0 entry with termination code.
709 */
710 int rc;
711 for (;;)
712 {
713#ifdef NO_SUPCALLR0VMM
714 //rc = VERR_GENERAL_FAILURE;
715 rc = VINF_SUCCESS;
716#else
717 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
718#endif
719 /*
720 * Flush the logs.
721 */
722#ifdef LOG_ENABLED
723 if ( pVCpu->vmm.s.pR0LoggerR3
724 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
725 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
726#endif
727 if (rc != VINF_VMM_CALL_HOST)
728 break;
729 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
730 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
731 break;
732 /* Resume R0 */
733 }
734 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
735 {
736 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
737 if (RT_SUCCESS(rc))
738 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
739 }
740
741 for (VMCPUID i = 0; i < pVM->cCpus; i++)
742 {
743 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
744 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
745 }
746 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
747 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
748 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
749 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
750 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
751 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
752 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
753 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
754
755#ifdef VBOX_STRICT_VMM_STACK
756 /*
757 * Make the two stack guard pages present again.
758 */
759 if (pVM->vmm.s.fStackGuardsStationed)
760 {
761 for (VMCPUID i = 0; i < pVM->cCpus; i++)
762 {
763 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
764 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
765 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
766 }
767 pVM->vmm.s.fStackGuardsStationed = false;
768 }
769#endif
770
771 vmmTermFormatTypes();
772 return rc;
773}
774
775
776/**
777 * Applies relocations to data and code managed by this
778 * component. This function will be called at init and
779 * whenever the VMM need to relocate it self inside the GC.
780 *
781 * The VMM will need to apply relocations to the core code.
782 *
783 * @param pVM The VM handle.
784 * @param offDelta The relocation delta.
785 */
786VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
787{
788 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
789
790 /*
791 * Recalc the RC address.
792 */
793#ifdef VBOX_WITH_RAW_MODE
794 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
795#endif
796
797 /*
798 * The stack.
799 */
800 for (VMCPUID i = 0; i < pVM->cCpus; i++)
801 {
802 PVMCPU pVCpu = &pVM->aCpus[i];
803
804 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
805
806 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
807 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
808 }
809
810 /*
811 * All the switchers.
812 */
813 vmmR3SwitcherRelocate(pVM, offDelta);
814
815 /*
816 * Get other RC entry points.
817 */
818 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
819 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
820
821 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
822 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
823
824 /*
825 * Update the logger.
826 */
827 VMMR3UpdateLoggers(pVM);
828}
829
830
831/**
832 * Updates the settings for the RC and R0 loggers.
833 *
834 * @returns VBox status code.
835 * @param pVM The VM handle.
836 */
837VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
838{
839 /*
840 * Simply clone the logger instance (for RC).
841 */
842 int rc = VINF_SUCCESS;
843 RTRCPTR RCPtrLoggerFlush = 0;
844
845 if (pVM->vmm.s.pRCLoggerR3
846#ifdef VBOX_WITH_RC_RELEASE_LOGGING
847 || pVM->vmm.s.pRCRelLoggerR3
848#endif
849 )
850 {
851 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
852 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
853 }
854
855 if (pVM->vmm.s.pRCLoggerR3)
856 {
857 RTRCPTR RCPtrLoggerWrapper = 0;
858 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
859 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
860
861 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
862 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
863 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
864 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
865 }
866
867#ifdef VBOX_WITH_RC_RELEASE_LOGGING
868 if (pVM->vmm.s.pRCRelLoggerR3)
869 {
870 RTRCPTR RCPtrLoggerWrapper = 0;
871 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
872 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
873
874 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
875 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
876 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
877 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
878 }
879#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
880
881#ifdef LOG_ENABLED
882 /*
883 * For the ring-0 EMT logger, we use a per-thread logger instance
884 * in ring-0. Only initialize it once.
885 */
886 PRTLOGGER const pDefault = RTLogDefaultInstance();
887 for (VMCPUID i = 0; i < pVM->cCpus; i++)
888 {
889 PVMCPU pVCpu = &pVM->aCpus[i];
890 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
891 if (pR0LoggerR3)
892 {
893 if (!pR0LoggerR3->fCreated)
894 {
895 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
896 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
897 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
898
899 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
900 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
901 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
902
903 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
904 pfnLoggerWrapper, pfnLoggerFlush,
905 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
906 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
907
908 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
909 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
910 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
911 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pfnLoggerPrefix, NIL_RTR0PTR);
912 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
913
914 pR0LoggerR3->idCpu = i;
915 pR0LoggerR3->fCreated = true;
916 pR0LoggerR3->fFlushingDisabled = false;
917
918 }
919
920 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pDefault,
921 RTLOGFLAGS_BUFFERED, UINT32_MAX);
922 AssertRC(rc);
923 }
924 }
925#endif
926 return rc;
927}
928
929
930/**
931 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
932 *
933 * @returns Pointer to the buffer.
934 * @param pVM The VM handle.
935 */
936VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
937{
938 if (HWACCMIsEnabled(pVM))
939 return pVM->vmm.s.szRing0AssertMsg1;
940
941 RTRCPTR RCPtr;
942 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
943 if (RT_SUCCESS(rc))
944 return (const char *)MMHyperRCToR3(pVM, RCPtr);
945
946 return NULL;
947}
948
949
950/**
951 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
952 *
953 * @returns Pointer to the buffer.
954 * @param pVM The VM handle.
955 */
956VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
957{
958 if (HWACCMIsEnabled(pVM))
959 return pVM->vmm.s.szRing0AssertMsg2;
960
961 RTRCPTR RCPtr;
962 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
963 if (RT_SUCCESS(rc))
964 return (const char *)MMHyperRCToR3(pVM, RCPtr);
965
966 return NULL;
967}
968
969
970/**
971 * Execute state save operation.
972 *
973 * @returns VBox status code.
974 * @param pVM VM Handle.
975 * @param pSSM SSM operation handle.
976 */
977static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
978{
979 LogFlow(("vmmR3Save:\n"));
980
981 /*
982 * Save the started/stopped state of all CPUs except 0 as it will always
983 * be running. This avoids breaking the saved state version. :-)
984 */
985 for (VMCPUID i = 1; i < pVM->cCpus; i++)
986 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
987
988 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
989}
990
991
992/**
993 * Execute state load operation.
994 *
995 * @returns VBox status code.
996 * @param pVM VM Handle.
997 * @param pSSM SSM operation handle.
998 * @param uVersion Data layout version.
999 * @param uPass The data pass.
1000 */
1001static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1002{
1003 LogFlow(("vmmR3Load:\n"));
1004 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1005
1006 /*
1007 * Validate version.
1008 */
1009 if ( uVersion != VMM_SAVED_STATE_VERSION
1010 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1011 {
1012 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1013 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1014 }
1015
1016 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1017 {
1018 /* Ignore the stack bottom, stack pointer and stack bits. */
1019 RTRCPTR RCPtrIgnored;
1020 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1021 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1022#ifdef RT_OS_DARWIN
1023 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1024 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1025 && SSMR3HandleRevision(pSSM) >= 48858
1026 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1027 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1028 )
1029 SSMR3Skip(pSSM, 16384);
1030 else
1031 SSMR3Skip(pSSM, 8192);
1032#else
1033 SSMR3Skip(pSSM, 8192);
1034#endif
1035 }
1036
1037 /*
1038 * Restore the VMCPU states. VCPU 0 is always started.
1039 */
1040 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1041 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1042 {
1043 bool fStarted;
1044 int rc = SSMR3GetBool(pSSM, &fStarted);
1045 if (RT_FAILURE(rc))
1046 return rc;
1047 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1048 }
1049
1050 /* terminator */
1051 uint32_t u32;
1052 int rc = SSMR3GetU32(pSSM, &u32);
1053 if (RT_FAILURE(rc))
1054 return rc;
1055 if (u32 != UINT32_MAX)
1056 {
1057 AssertMsgFailed(("u32=%#x\n", u32));
1058 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1059 }
1060 return VINF_SUCCESS;
1061}
1062
1063
1064/**
1065 * Resolve a builtin RC symbol.
1066 *
1067 * Called by PDM when loading or relocating RC modules.
1068 *
1069 * @returns VBox status
1070 * @param pVM VM Handle.
1071 * @param pszSymbol Symbol to resolv
1072 * @param pRCPtrValue Where to store the symbol value.
1073 *
1074 * @remark This has to work before VMMR3Relocate() is called.
1075 */
1076VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1077{
1078 if (!strcmp(pszSymbol, "g_Logger"))
1079 {
1080 if (pVM->vmm.s.pRCLoggerR3)
1081 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1082 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1083 }
1084 else if (!strcmp(pszSymbol, "g_RelLogger"))
1085 {
1086#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1087 if (pVM->vmm.s.pRCRelLoggerR3)
1088 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1089 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1090#else
1091 *pRCPtrValue = NIL_RTRCPTR;
1092#endif
1093 }
1094 else
1095 return VERR_SYMBOL_NOT_FOUND;
1096 return VINF_SUCCESS;
1097}
1098
1099
1100/**
1101 * Suspends the CPU yielder.
1102 *
1103 * @param pVM The VM handle.
1104 */
1105VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1106{
1107 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1108 if (!pVM->vmm.s.cYieldResumeMillies)
1109 {
1110 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1111 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1112 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1113 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1114 else
1115 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1116 TMTimerStop(pVM->vmm.s.pYieldTimer);
1117 }
1118 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1119}
1120
1121
1122/**
1123 * Stops the CPU yielder.
1124 *
1125 * @param pVM The VM handle.
1126 */
1127VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1128{
1129 if (!pVM->vmm.s.cYieldResumeMillies)
1130 TMTimerStop(pVM->vmm.s.pYieldTimer);
1131 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1132 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1133}
1134
1135
1136/**
1137 * Resumes the CPU yielder when it has been a suspended or stopped.
1138 *
1139 * @param pVM The VM handle.
1140 */
1141VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1142{
1143 if (pVM->vmm.s.cYieldResumeMillies)
1144 {
1145 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1146 pVM->vmm.s.cYieldResumeMillies = 0;
1147 }
1148}
1149
1150
1151/**
1152 * Internal timer callback function.
1153 *
1154 * @param pVM The VM.
1155 * @param pTimer The timer handle.
1156 * @param pvUser User argument specified upon timer creation.
1157 */
1158static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1159{
1160 NOREF(pvUser);
1161
1162 /*
1163 * This really needs some careful tuning. While we shouldn't be too greedy since
1164 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1165 * because that'll cause us to stop up.
1166 *
1167 * The current logic is to use the default interval when there is no lag worth
1168 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1169 *
1170 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1171 * so the lag is up to date.)
1172 */
1173 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1174 if ( u64Lag < 50000000 /* 50ms */
1175 || ( u64Lag < 1000000000 /* 1s */
1176 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1177 )
1178 {
1179 uint64_t u64Elapsed = RTTimeNanoTS();
1180 pVM->vmm.s.u64LastYield = u64Elapsed;
1181
1182 RTThreadYield();
1183
1184#ifdef LOG_ENABLED
1185 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1186 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1187#endif
1188 }
1189 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1190}
1191
1192
1193/**
1194 * Executes guest code in the raw-mode context.
1195 *
1196 * @param pVM VM handle.
1197 * @param pVCpu The VMCPU to operate on.
1198 */
1199VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1200{
1201 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1202
1203 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1204
1205 /*
1206 * Set the EIP and ESP.
1207 */
1208 CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1209 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1210 : pVM->vmm.s.pfnCPUMRCResumeGuest);
1211 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1212
1213 /*
1214 * We hide log flushes (outer) and hypervisor interrupts (inner).
1215 */
1216 for (;;)
1217 {
1218#ifdef VBOX_STRICT
1219 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1220 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1221 PGMMapCheck(pVM);
1222#endif
1223 int rc;
1224 do
1225 {
1226#ifdef NO_SUPCALLR0VMM
1227 rc = VERR_GENERAL_FAILURE;
1228#else
1229 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1230 if (RT_LIKELY(rc == VINF_SUCCESS))
1231 rc = pVCpu->vmm.s.iLastGZRc;
1232#endif
1233 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1234
1235 /*
1236 * Flush the logs.
1237 */
1238#ifdef LOG_ENABLED
1239 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1240 if ( pLogger
1241 && pLogger->offScratch > 0)
1242 RTLogFlushRC(NULL, pLogger);
1243#endif
1244#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1245 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1246 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1247 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1248#endif
1249 if (rc != VINF_VMM_CALL_HOST)
1250 {
1251 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1252 return rc;
1253 }
1254 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1255 if (RT_FAILURE(rc))
1256 return rc;
1257 /* Resume GC */
1258 }
1259}
1260
1261
1262/**
1263 * Executes guest code (Intel VT-x and AMD-V).
1264 *
1265 * @param pVM VM handle.
1266 * @param pVCpu The VMCPU to operate on.
1267 */
1268VMMR3_INT_DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1269{
1270 Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1271
1272 for (;;)
1273 {
1274 int rc;
1275 do
1276 {
1277#ifdef NO_SUPCALLR0VMM
1278 rc = VERR_GENERAL_FAILURE;
1279#else
1280 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1281 if (RT_LIKELY(rc == VINF_SUCCESS))
1282 rc = pVCpu->vmm.s.iLastGZRc;
1283#endif
1284 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1285
1286#if 0 /* todo triggers too often */
1287 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1288#endif
1289
1290#ifdef LOG_ENABLED
1291 /*
1292 * Flush the log
1293 */
1294 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1295 if ( pR0LoggerR3
1296 && pR0LoggerR3->Logger.offScratch > 0)
1297 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1298#endif /* !LOG_ENABLED */
1299 if (rc != VINF_VMM_CALL_HOST)
1300 {
1301 Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1302 return rc;
1303 }
1304 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1305 if (RT_FAILURE(rc))
1306 return rc;
1307 /* Resume R0 */
1308 }
1309}
1310
1311/**
1312 * VCPU worker for VMMSendSipi.
1313 *
1314 * @param pVM The VM to operate on.
1315 * @param idCpu Virtual CPU to perform SIPI on
1316 * @param uVector SIPI vector
1317 */
1318DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1319{
1320 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1321 VMCPU_ASSERT_EMT(pVCpu);
1322
1323 /** @todo what are we supposed to do if the processor is already running? */
1324 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1325 return VERR_ACCESS_DENIED;
1326
1327
1328 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1329
1330 pCtx->cs = uVector << 8;
1331 pCtx->csHid.u64Base = uVector << 12;
1332 pCtx->csHid.u32Limit = 0x0000ffff;
1333 pCtx->rip = 0;
1334
1335 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1336
1337# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1338 EMSetState(pVCpu, EMSTATE_HALTED);
1339 return VINF_EM_RESCHEDULE;
1340# else /* And if we go the VMCPU::enmState way it can stay here. */
1341 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1342 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1343 return VINF_SUCCESS;
1344# endif
1345}
1346
1347DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1348{
1349 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1350 VMCPU_ASSERT_EMT(pVCpu);
1351
1352 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1353 CPUMR3ResetCpu(pVCpu);
1354 return VINF_EM_WAIT_SIPI;
1355}
1356
1357/**
1358 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1359 * and unhalting processor
1360 *
1361 * @param pVM The VM to operate on.
1362 * @param idCpu Virtual CPU to perform SIPI on
1363 * @param uVector SIPI vector
1364 */
1365VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1366{
1367 AssertReturnVoid(idCpu < pVM->cCpus);
1368
1369 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1370 AssertRC(rc);
1371}
1372
1373/**
1374 * Sends init IPI to the virtual CPU.
1375 *
1376 * @param pVM The VM to operate on.
1377 * @param idCpu Virtual CPU to perform int IPI on
1378 */
1379VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1380{
1381 AssertReturnVoid(idCpu < pVM->cCpus);
1382
1383 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1384 AssertRC(rc);
1385}
1386
1387/**
1388 * Registers the guest memory range that can be used for patching
1389 *
1390 * @returns VBox status code.
1391 * @param pVM The VM to operate on.
1392 * @param pPatchMem Patch memory range
1393 * @param cbPatchMem Size of the memory range
1394 */
1395VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1396{
1397 VM_ASSERT_EMT(pVM);
1398 if (HWACCMIsEnabled(pVM))
1399 return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1400
1401 return VERR_NOT_SUPPORTED;
1402}
1403
1404/**
1405 * Deregisters the guest memory range that can be used for patching
1406 *
1407 * @returns VBox status code.
1408 * @param pVM The VM to operate on.
1409 * @param pPatchMem Patch memory range
1410 * @param cbPatchMem Size of the memory range
1411 */
1412VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1413{
1414 if (HWACCMIsEnabled(pVM))
1415 return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1416
1417 return VINF_SUCCESS;
1418}
1419
1420
1421/**
1422 * Count returns and have the last non-caller EMT wake up the caller.
1423 *
1424 * @returns VBox strict informational status code for EM scheduling. No failures
1425 * will be returned here, those are for the caller only.
1426 *
1427 * @param pVM The VM handle.
1428 */
1429DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1430{
1431 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1432 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1433 if (cReturned == pVM->cCpus - 1U)
1434 {
1435 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1436 AssertLogRelRC(rc);
1437 }
1438
1439 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1440 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1441 ("%Rrc\n", rcRet),
1442 VERR_IPE_UNEXPECTED_INFO_STATUS);
1443 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1444}
1445
1446
1447/**
1448 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1449 *
1450 * @returns VBox strict informational status code for EM scheduling. No failures
1451 * will be returned here, those are for the caller only. When
1452 * fIsCaller is set, VINF_SUCCESS is always returned.
1453 *
1454 * @param pVM The VM handle.
1455 * @param pVCpu The VMCPU structure for the calling EMT.
1456 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1457 * not.
1458 * @param fFlags The flags.
1459 * @param pfnRendezvous The callback.
1460 * @param pvUser The user argument for the callback.
1461 */
1462static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1463 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1464{
1465 int rc;
1466
1467 /*
1468 * Enter, the last EMT triggers the next callback phase.
1469 */
1470 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1471 if (cEntered != pVM->cCpus)
1472 {
1473 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1474 {
1475 /* Wait for our turn. */
1476 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1477 AssertLogRelRC(rc);
1478 }
1479 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1480 {
1481 /* Wait for the last EMT to arrive and wake everyone up. */
1482 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1483 AssertLogRelRC(rc);
1484 }
1485 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1486 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1487 {
1488 /* Wait for our turn. */
1489 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1490 AssertLogRelRC(rc);
1491 }
1492 else
1493 {
1494 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1495
1496 /*
1497 * The execute once is handled specially to optimize the code flow.
1498 *
1499 * The last EMT to arrive will perform the callback and the other
1500 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1501 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1502 * returns, that EMT will initiate the normal return sequence.
1503 */
1504 if (!fIsCaller)
1505 {
1506 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1507 AssertLogRelRC(rc);
1508
1509 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1510 }
1511 return VINF_SUCCESS;
1512 }
1513 }
1514 else
1515 {
1516 /*
1517 * All EMTs are waiting, clear the FF and take action according to the
1518 * execution method.
1519 */
1520 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1521
1522 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1523 {
1524 /* Wake up everyone. */
1525 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1526 AssertLogRelRC(rc);
1527 }
1528 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1529 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1530 {
1531 /* Figure out who to wake up and wake it up. If it's ourself, then
1532 it's easy otherwise wait for our turn. */
1533 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1534 ? 0
1535 : pVM->cCpus - 1U;
1536 if (pVCpu->idCpu != iFirst)
1537 {
1538 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1539 AssertLogRelRC(rc);
1540 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1541 AssertLogRelRC(rc);
1542 }
1543 }
1544 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1545 }
1546
1547
1548 /*
1549 * Do the callback and update the status if necessary.
1550 */
1551 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1552 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1553 {
1554 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1555 if (rcStrict != VINF_SUCCESS)
1556 {
1557 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1558 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1559 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1560 int32_t i32RendezvousStatus;
1561 do
1562 {
1563 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1564 if ( rcStrict == i32RendezvousStatus
1565 || RT_FAILURE(i32RendezvousStatus)
1566 || ( i32RendezvousStatus != VINF_SUCCESS
1567 && rcStrict > i32RendezvousStatus))
1568 break;
1569 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1570 }
1571 }
1572
1573 /*
1574 * Increment the done counter and take action depending on whether we're
1575 * the last to finish callback execution.
1576 */
1577 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1578 if ( cDone != pVM->cCpus
1579 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1580 {
1581 /* Signal the next EMT? */
1582 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1583 {
1584 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1585 AssertLogRelRC(rc);
1586 }
1587 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1588 {
1589 Assert(cDone == pVCpu->idCpu + 1U);
1590 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1591 AssertLogRelRC(rc);
1592 }
1593 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1594 {
1595 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1596 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1597 AssertLogRelRC(rc);
1598 }
1599
1600 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1601 if (!fIsCaller)
1602 {
1603 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1604 AssertLogRelRC(rc);
1605 }
1606 }
1607 else
1608 {
1609 /* Callback execution is all done, tell the rest to return. */
1610 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1611 AssertLogRelRC(rc);
1612 }
1613
1614 if (!fIsCaller)
1615 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1616 return VINF_SUCCESS;
1617}
1618
1619
1620/**
1621 * Called in response to VM_FF_EMT_RENDEZVOUS.
1622 *
1623 * @returns VBox strict status code - EM scheduling. No errors will be returned
1624 * here, nor will any non-EM scheduling status codes be returned.
1625 *
1626 * @param pVM The VM handle
1627 * @param pVCpu The handle of the calling EMT.
1628 *
1629 * @thread EMT
1630 */
1631VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1632{
1633 Assert(!pVCpu->vmm.s.fInRendezvous);
1634 pVCpu->vmm.s.fInRendezvous = true;
1635 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1636 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1637 pVCpu->vmm.s.fInRendezvous = false;
1638 return rc;
1639}
1640
1641
1642/**
1643 * EMT rendezvous.
1644 *
1645 * Gathers all the EMTs and execute some code on each of them, either in a one
1646 * by one fashion or all at once.
1647 *
1648 * @returns VBox strict status code. This will be the the first error,
1649 * VINF_SUCCESS, or an EM scheduling status code.
1650 *
1651 * @param pVM The VM handle.
1652 * @param fFlags Flags indicating execution methods. See
1653 * grp_VMMR3EmtRendezvous_fFlags.
1654 * @param pfnRendezvous The callback.
1655 * @param pvUser User argument for the callback.
1656 *
1657 * @thread Any.
1658 */
1659VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1660{
1661 /*
1662 * Validate input.
1663 */
1664 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1665 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1666 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1667 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1668 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1669 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1670 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1671
1672 VBOXSTRICTRC rcStrict;
1673 PVMCPU pVCpu = VMMGetCpu(pVM);
1674 if (!pVCpu)
1675 /*
1676 * Forward the request to an EMT thread.
1677 */
1678 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1679 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1680 else if (pVM->cCpus == 1)
1681 {
1682 /*
1683 * Shortcut for the single EMT case.
1684 */
1685 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1686 pVCpu->vmm.s.fInRendezvous = true;
1687 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1688 pVCpu->vmm.s.fInRendezvous = false;
1689 }
1690 else
1691 {
1692 /*
1693 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1694 * lookout of the RENDEZVOUS FF.
1695 */
1696 int rc;
1697 rcStrict = VINF_SUCCESS;
1698 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1699 {
1700 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1701
1702 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1703 {
1704 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1705 {
1706 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1707 if ( rc != VINF_SUCCESS
1708 && ( rcStrict == VINF_SUCCESS
1709 || rcStrict > rc))
1710 rcStrict = rc;
1711 /** @todo Perhaps deal with termination here? */
1712 }
1713 ASMNopPause();
1714 }
1715 }
1716 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1717 Assert(!pVCpu->vmm.s.fInRendezvous);
1718 pVCpu->vmm.s.fInRendezvous = true;
1719
1720 /*
1721 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1722 */
1723 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1724 {
1725 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1726 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1727 }
1728 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1729 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1730 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1731 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1732 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1733 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1734 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1735 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1736 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1737 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1738 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1739
1740 /*
1741 * Set the FF and poke the other EMTs.
1742 */
1743 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1744 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1745
1746 /*
1747 * Do the same ourselves.
1748 */
1749 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1750
1751 /*
1752 * The caller waits for the other EMTs to be done and return before doing
1753 * the cleanup. This makes away with wakeup / reset races we would otherwise
1754 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1755 */
1756 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1757 AssertLogRelRC(rc);
1758
1759 /*
1760 * Get the return code and clean up a little bit.
1761 */
1762 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1763 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1764
1765 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1766 pVCpu->vmm.s.fInRendezvous = false;
1767
1768 /*
1769 * Merge rcStrict and rcMy.
1770 */
1771 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1772 if ( rcMy != VINF_SUCCESS
1773 && ( rcStrict == VINF_SUCCESS
1774 || rcStrict > rcMy))
1775 rcStrict = rcMy;
1776 }
1777
1778 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1779 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1780 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1781 VERR_IPE_UNEXPECTED_INFO_STATUS);
1782 return VBOXSTRICTRC_VAL(rcStrict);
1783}
1784
1785
1786/**
1787 * Disables/enables EMT rendezvous.
1788 *
1789 * This is used to make sure EMT rendezvous does not take place while
1790 * processing a priority request.
1791 *
1792 * @returns Old rendezvous-disabled state.
1793 * @param pVCpu The handle of the calling EMT.
1794 * @param fDisabled True if disabled, false if enabled.
1795 */
1796VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1797{
1798 VMCPU_ASSERT_EMT(pVCpu);
1799 bool fOld = pVCpu->vmm.s.fInRendezvous;
1800 pVCpu->vmm.s.fInRendezvous = fDisabled;
1801 return fOld;
1802}
1803
1804
1805/**
1806 * Read from the ring 0 jump buffer stack
1807 *
1808 * @returns VBox status code.
1809 *
1810 * @param pVM Pointer to the shared VM structure.
1811 * @param idCpu The ID of the source CPU context (for the address).
1812 * @param R0Addr Where to start reading.
1813 * @param pvBuf Where to store the data we've read.
1814 * @param cbRead The number of bytes to read.
1815 */
1816VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1817{
1818 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1819 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1820
1821#ifdef VMM_R0_SWITCH_STACK
1822 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1823#else
1824 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1825#endif
1826 if ( off > VMM_STACK_SIZE
1827 || off + cbRead >= VMM_STACK_SIZE)
1828 return VERR_INVALID_POINTER;
1829
1830 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1831 return VINF_SUCCESS;
1832}
1833
1834
1835/**
1836 * Calls a RC function.
1837 *
1838 * @param pVM The VM handle.
1839 * @param RCPtrEntry The address of the RC function.
1840 * @param cArgs The number of arguments in the ....
1841 * @param ... Arguments to the function.
1842 */
1843VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1844{
1845 va_list args;
1846 va_start(args, cArgs);
1847 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1848 va_end(args);
1849 return rc;
1850}
1851
1852
1853/**
1854 * Calls a RC function.
1855 *
1856 * @param pVM The VM handle.
1857 * @param RCPtrEntry The address of the RC function.
1858 * @param cArgs The number of arguments in the ....
1859 * @param args Arguments to the function.
1860 */
1861VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1862{
1863 /* Raw mode implies 1 VCPU. */
1864 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1865 PVMCPU pVCpu = &pVM->aCpus[0];
1866
1867 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1868
1869 /*
1870 * Setup the call frame using the trampoline.
1871 */
1872 CPUMHyperSetCtxCore(pVCpu, NULL);
1873 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1874 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1875 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1876 int i = cArgs;
1877 while (i-- > 0)
1878 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1879
1880 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1881 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1882 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1883
1884 /*
1885 * We hide log flushes (outer) and hypervisor interrupts (inner).
1886 */
1887 for (;;)
1888 {
1889 int rc;
1890 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1891 do
1892 {
1893#ifdef NO_SUPCALLR0VMM
1894 rc = VERR_GENERAL_FAILURE;
1895#else
1896 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1897 if (RT_LIKELY(rc == VINF_SUCCESS))
1898 rc = pVCpu->vmm.s.iLastGZRc;
1899#endif
1900 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1901
1902 /*
1903 * Flush the logs.
1904 */
1905#ifdef LOG_ENABLED
1906 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1907 if ( pLogger
1908 && pLogger->offScratch > 0)
1909 RTLogFlushRC(NULL, pLogger);
1910#endif
1911#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1912 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1913 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1914 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1915#endif
1916 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1917 VMMR3FatalDump(pVM, pVCpu, rc);
1918 if (rc != VINF_VMM_CALL_HOST)
1919 {
1920 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1921 return rc;
1922 }
1923 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1924 if (RT_FAILURE(rc))
1925 return rc;
1926 }
1927}
1928
1929
1930/**
1931 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1932 *
1933 * @returns VBox status code.
1934 * @param pVM The VM to operate on.
1935 * @param uOperation Operation to execute.
1936 * @param u64Arg Constant argument.
1937 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1938 * details.
1939 */
1940VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1941{
1942 PVMCPU pVCpu = VMMGetCpu(pVM);
1943 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1944
1945 /*
1946 * Call Ring-0 entry with init code.
1947 */
1948 int rc;
1949 for (;;)
1950 {
1951#ifdef NO_SUPCALLR0VMM
1952 rc = VERR_GENERAL_FAILURE;
1953#else
1954 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1955#endif
1956 /*
1957 * Flush the logs.
1958 */
1959#ifdef LOG_ENABLED
1960 if ( pVCpu->vmm.s.pR0LoggerR3
1961 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1962 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
1963#endif
1964 if (rc != VINF_VMM_CALL_HOST)
1965 break;
1966 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1967 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1968 break;
1969 /* Resume R0 */
1970 }
1971
1972 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
1973 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1974 VERR_IPE_UNEXPECTED_INFO_STATUS);
1975 return rc;
1976}
1977
1978
1979/**
1980 * Resumes executing hypervisor code when interrupted by a queue flush or a
1981 * debug event.
1982 *
1983 * @returns VBox status code.
1984 * @param pVM VM handle.
1985 * @param pVCpu VMCPU handle.
1986 */
1987VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1988{
1989 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1990 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1991
1992 /*
1993 * We hide log flushes (outer) and hypervisor interrupts (inner).
1994 */
1995 for (;;)
1996 {
1997 int rc;
1998 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1999 do
2000 {
2001#ifdef NO_SUPCALLR0VMM
2002 rc = VERR_GENERAL_FAILURE;
2003#else
2004 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2005 if (RT_LIKELY(rc == VINF_SUCCESS))
2006 rc = pVCpu->vmm.s.iLastGZRc;
2007#endif
2008 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2009
2010 /*
2011 * Flush the loggers,
2012 */
2013#ifdef LOG_ENABLED
2014 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2015 if ( pLogger
2016 && pLogger->offScratch > 0)
2017 RTLogFlushRC(NULL, pLogger);
2018#endif
2019#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2020 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2021 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2022 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2023#endif
2024 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2025 VMMR3FatalDump(pVM, pVCpu, rc);
2026 if (rc != VINF_VMM_CALL_HOST)
2027 {
2028 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2029 return rc;
2030 }
2031 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2032 if (RT_FAILURE(rc))
2033 return rc;
2034 }
2035}
2036
2037
2038/**
2039 * Service a call to the ring-3 host code.
2040 *
2041 * @returns VBox status code.
2042 * @param pVM VM handle.
2043 * @param pVCpu VMCPU handle
2044 * @remark Careful with critsects.
2045 */
2046static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2047{
2048 /*
2049 * We must also check for pending critsect exits or else we can deadlock
2050 * when entering other critsects here.
2051 */
2052 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2053 PDMCritSectFF(pVCpu);
2054
2055 switch (pVCpu->vmm.s.enmCallRing3Operation)
2056 {
2057 /*
2058 * Acquire a critical section.
2059 */
2060 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2061 {
2062 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2063 true /*fCallRing3*/);
2064 break;
2065 }
2066
2067 /*
2068 * Acquire the PDM lock.
2069 */
2070 case VMMCALLRING3_PDM_LOCK:
2071 {
2072 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2073 break;
2074 }
2075
2076 /*
2077 * Grow the PGM pool.
2078 */
2079 case VMMCALLRING3_PGM_POOL_GROW:
2080 {
2081 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2082 break;
2083 }
2084
2085 /*
2086 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2087 */
2088 case VMMCALLRING3_PGM_MAP_CHUNK:
2089 {
2090 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2091 break;
2092 }
2093
2094 /*
2095 * Allocates more handy pages.
2096 */
2097 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2098 {
2099 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2100 break;
2101 }
2102
2103 /*
2104 * Allocates a large page.
2105 */
2106 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2107 {
2108 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2109 break;
2110 }
2111
2112 /*
2113 * Acquire the PGM lock.
2114 */
2115 case VMMCALLRING3_PGM_LOCK:
2116 {
2117 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2118 break;
2119 }
2120
2121 /*
2122 * Acquire the MM hypervisor heap lock.
2123 */
2124 case VMMCALLRING3_MMHYPER_LOCK:
2125 {
2126 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2127 break;
2128 }
2129
2130 /*
2131 * Flush REM handler notifications.
2132 */
2133 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2134 {
2135 REMR3ReplayHandlerNotifications(pVM);
2136 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2137 break;
2138 }
2139
2140 /*
2141 * This is a noop. We just take this route to avoid unnecessary
2142 * tests in the loops.
2143 */
2144 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2145 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2146 LogAlways(("*FLUSH*\n"));
2147 break;
2148
2149 /*
2150 * Set the VM error message.
2151 */
2152 case VMMCALLRING3_VM_SET_ERROR:
2153 VMR3SetErrorWorker(pVM);
2154 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2155 break;
2156
2157 /*
2158 * Set the VM runtime error message.
2159 */
2160 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2161 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2162 break;
2163
2164 /*
2165 * Signal a ring 0 hypervisor assertion.
2166 * Cancel the longjmp operation that's in progress.
2167 */
2168 case VMMCALLRING3_VM_R0_ASSERTION:
2169 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2170 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2171#ifdef RT_ARCH_X86
2172 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2173#else
2174 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2175#endif
2176#ifdef VMM_R0_SWITCH_STACK
2177 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2178#endif
2179 LogRel((pVM->vmm.s.szRing0AssertMsg1));
2180 LogRel((pVM->vmm.s.szRing0AssertMsg2));
2181 return VERR_VMM_RING0_ASSERTION;
2182
2183 /*
2184 * A forced switch to ring 0 for preemption purposes.
2185 */
2186 case VMMCALLRING3_VM_R0_PREEMPT:
2187 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2188 break;
2189
2190 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2191 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2192 break;
2193
2194 default:
2195 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2196 return VERR_VMM_UNKNOWN_RING3_CALL;
2197 }
2198
2199 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2200 return VINF_SUCCESS;
2201}
2202
2203
2204/**
2205 * Displays the Force action Flags.
2206 *
2207 * @param pVM The VM handle.
2208 * @param pHlp The output helpers.
2209 * @param pszArgs The additional arguments (ignored).
2210 */
2211static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2212{
2213 int c;
2214 uint32_t f;
2215 NOREF(pszArgs);
2216
2217#define PRINT_FLAG(prf,flag) do { \
2218 if (f & (prf##flag)) \
2219 { \
2220 static const char *s_psz = #flag; \
2221 if (!(c % 6)) \
2222 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2223 else \
2224 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2225 c++; \
2226 f &= ~(prf##flag); \
2227 } \
2228 } while (0)
2229
2230#define PRINT_GROUP(prf,grp,sfx) do { \
2231 if (f & (prf##grp##sfx)) \
2232 { \
2233 static const char *s_psz = #grp; \
2234 if (!(c % 5)) \
2235 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2236 else \
2237 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2238 c++; \
2239 } \
2240 } while (0)
2241
2242 /*
2243 * The global flags.
2244 */
2245 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2246 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2247
2248 /* show the flag mnemonics */
2249 c = 0;
2250 f = fGlobalForcedActions;
2251 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2252 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2253 PRINT_FLAG(VM_FF_,PDM_DMA);
2254 PRINT_FLAG(VM_FF_,DBGF);
2255 PRINT_FLAG(VM_FF_,REQUEST);
2256 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2257 PRINT_FLAG(VM_FF_,RESET);
2258 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2259 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2260 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2261 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2262 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2263 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2264 if (f)
2265 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2266 else
2267 pHlp->pfnPrintf(pHlp, "\n");
2268
2269 /* the groups */
2270 c = 0;
2271 f = fGlobalForcedActions;
2272 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2273 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2274 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2275 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2276 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2277 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2278 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2279 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2280 if (c)
2281 pHlp->pfnPrintf(pHlp, "\n");
2282
2283 /*
2284 * Per CPU flags.
2285 */
2286 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2287 {
2288 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2289 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2290
2291 /* show the flag mnemonics */
2292 c = 0;
2293 f = fLocalForcedActions;
2294 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2295 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2296 PRINT_FLAG(VMCPU_FF_,TIMER);
2297 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2298 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2299 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2300 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2301 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2302 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2303 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2304 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2305 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2306 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2307 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2308 PRINT_FLAG(VMCPU_FF_,TO_R3);
2309 if (f)
2310 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2311 else
2312 pHlp->pfnPrintf(pHlp, "\n");
2313
2314 /* the groups */
2315 c = 0;
2316 f = fLocalForcedActions;
2317 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2318 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2319 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2320 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2321 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2322 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2323 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2324 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2325 PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2326 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2327 if (c)
2328 pHlp->pfnPrintf(pHlp, "\n");
2329 }
2330
2331#undef PRINT_FLAG
2332#undef PRINT_GROUP
2333}
2334
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