VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 38838

Last change on this file since 38838 was 38835, checked in by vboxsync, 13 years ago

VMM: Detect recursive rendezvous calls. Removed the unused API VMMR3AtomicExecuteHandler.
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1/* $Id: VMM.cpp 38835 2011-09-23 11:17:04Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 1023 VMs. Imposed by GVMM's handle allocation
55 * (GVMM_MAX_HANDLES), can be increased up to 64K.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmapi.h>
84#include <VBox/vmm/cpum.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/iom.h>
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/selm.h>
89#include <VBox/vmm/em.h>
90#include <VBox/sup.h>
91#include <VBox/vmm/dbgf.h>
92#include <VBox/vmm/csam.h>
93#include <VBox/vmm/patm.h>
94#include <VBox/vmm/rem.h>
95#include <VBox/vmm/ssm.h>
96#include <VBox/vmm/tm.h>
97#include "VMMInternal.h"
98#include "VMMSwitcher.h"
99#include <VBox/vmm/vm.h>
100#include <VBox/vmm/ftm.h>
101
102#include <VBox/err.h>
103#include <VBox/param.h>
104#include <VBox/version.h>
105#include <VBox/vmm/hwaccm.h>
106#include <iprt/assert.h>
107#include <iprt/alloc.h>
108#include <iprt/asm.h>
109#include <iprt/time.h>
110#include <iprt/semaphore.h>
111#include <iprt/stream.h>
112#include <iprt/string.h>
113#include <iprt/stdarg.h>
114#include <iprt/ctype.h>
115#include <iprt/x86.h>
116
117
118
119/*******************************************************************************
120* Defined Constants And Macros *
121*******************************************************************************/
122/** The saved state version. */
123#define VMM_SAVED_STATE_VERSION 4
124/** The saved state version used by v3.0 and earlier. (Teleportation) */
125#define VMM_SAVED_STATE_VERSION_3_0 3
126
127
128/*******************************************************************************
129* Internal Functions *
130*******************************************************************************/
131static int vmmR3InitStacks(PVM pVM);
132static int vmmR3InitLoggers(PVM pVM);
133static void vmmR3InitRegisterStats(PVM pVM);
134static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
135static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
136static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
137static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
138static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
139
140
141/**
142 * Initializes the VMM.
143 *
144 * @returns VBox status code.
145 * @param pVM The VM to operate on.
146 */
147VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
148{
149 LogFlow(("VMMR3Init\n"));
150
151 /*
152 * Assert alignment, sizes and order.
153 */
154 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
155 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
156 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
157
158 /*
159 * Init basic VM VMM members.
160 */
161 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
162 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
163 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
164 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
165 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
166 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
167
168 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
169 * The EMT yield interval. The EMT yielding is a hack we employ to play a
170 * bit nicer with the rest of the system (like for instance the GUI).
171 */
172 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
173 23 /* Value arrived at after experimenting with the grub boot prompt. */);
174 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
175
176
177 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
178 * Controls whether we employ per-cpu preemption timers to limit the time
179 * spent executing guest code. This option is not available on all
180 * platforms and we will silently ignore this setting then. If we are
181 * running in VT-x mode, we will use the VMX-preemption timer instead of
182 * this one when possible.
183 */
184 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
185 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
186 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
187
188 /*
189 * Initialize the VMM rendezvous semaphores.
190 */
191 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
192 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
193 return VERR_NO_MEMORY;
194 for (VMCPUID i = 0; i < pVM->cCpus; i++)
195 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
196 for (VMCPUID i = 0; i < pVM->cCpus; i++)
197 {
198 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
199 AssertRCReturn(rc, rc);
200 }
201 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
202 AssertRCReturn(rc, rc);
203 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
204 AssertRCReturn(rc, rc);
205 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
208 AssertRCReturn(rc, rc);
209
210 /* GC switchers are enabled by default. Turned off by HWACCM. */
211 pVM->vmm.s.fSwitcherDisabled = false;
212
213 /*
214 * Register the saved state data unit.
215 */
216 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
217 NULL, NULL, NULL,
218 NULL, vmmR3Save, NULL,
219 NULL, vmmR3Load, NULL);
220 if (RT_FAILURE(rc))
221 return rc;
222
223 /*
224 * Register the Ring-0 VM handle with the session for fast ioctl calls.
225 */
226 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
227 if (RT_FAILURE(rc))
228 return rc;
229
230 /*
231 * Init various sub-components.
232 */
233 rc = vmmR3SwitcherInit(pVM);
234 if (RT_SUCCESS(rc))
235 {
236 rc = vmmR3InitStacks(pVM);
237 if (RT_SUCCESS(rc))
238 {
239 rc = vmmR3InitLoggers(pVM);
240
241#ifdef VBOX_WITH_NMI
242 /*
243 * Allocate mapping for the host APIC.
244 */
245 if (RT_SUCCESS(rc))
246 {
247 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
248 AssertRC(rc);
249 }
250#endif
251 if (RT_SUCCESS(rc))
252 {
253 /*
254 * Debug info and statistics.
255 */
256 DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
257 vmmR3InitRegisterStats(pVM);
258
259 return VINF_SUCCESS;
260 }
261 }
262 /** @todo: Need failure cleanup. */
263
264 //more todo in here?
265 //if (RT_SUCCESS(rc))
266 //{
267 //}
268 //int rc2 = vmmR3TermCoreCode(pVM);
269 //AssertRC(rc2));
270 }
271
272 return rc;
273}
274
275
276/**
277 * Allocate & setup the VMM RC stack(s) (for EMTs).
278 *
279 * The stacks are also used for long jumps in Ring-0.
280 *
281 * @returns VBox status code.
282 * @param pVM Pointer to the shared VM structure.
283 *
284 * @remarks The optional guard page gets it protection setup up during R3 init
285 * completion because of init order issues.
286 */
287static int vmmR3InitStacks(PVM pVM)
288{
289 int rc = VINF_SUCCESS;
290#ifdef VMM_R0_SWITCH_STACK
291 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
292#else
293 uint32_t fFlags = 0;
294#endif
295
296 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
297 {
298 PVMCPU pVCpu = &pVM->aCpus[idCpu];
299
300#ifdef VBOX_STRICT_VMM_STACK
301 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
302#else
303 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
304#endif
305 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
306 if (RT_SUCCESS(rc))
307 {
308#ifdef VBOX_STRICT_VMM_STACK
309 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
310#endif
311#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
312 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
313 if (!VMMIsHwVirtExtForced(pVM))
314 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
315 else
316#endif
317 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
318 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
319 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
320 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
321
322 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
323 }
324 }
325
326 return rc;
327}
328
329
330/**
331 * Initialize the loggers.
332 *
333 * @returns VBox status code.
334 * @param pVM Pointer to the shared VM structure.
335 */
336static int vmmR3InitLoggers(PVM pVM)
337{
338 int rc;
339#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
340
341 /*
342 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
343 */
344#ifdef LOG_ENABLED
345 PRTLOGGER pLogger = RTLogDefaultInstance();
346 if (pLogger)
347 {
348 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
349 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
350 if (RT_FAILURE(rc))
351 return rc;
352 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
353
354# ifdef VBOX_WITH_R0_LOGGING
355 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
356 for (VMCPUID i = 0; i < pVM->cCpus; i++)
357 {
358 PVMCPU pVCpu = &pVM->aCpus[i];
359 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
360 (void **)&pVCpu->vmm.s.pR0LoggerR3);
361 if (RT_FAILURE(rc))
362 return rc;
363 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
364 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
365 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
366 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
367 }
368# endif
369 }
370#endif /* LOG_ENABLED */
371
372#ifdef VBOX_WITH_RC_RELEASE_LOGGING
373 /*
374 * Allocate RC release logger instances (finalized in the relocator).
375 */
376 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
377 if (pRelLogger)
378 {
379 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
380 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
381 if (RT_FAILURE(rc))
382 return rc;
383 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
384 }
385#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
386 return VINF_SUCCESS;
387}
388
389
390/**
391 * VMMR3Init worker that register the statistics with STAM.
392 *
393 * @param pVM The shared VM structure.
394 */
395static void vmmR3InitRegisterStats(PVM pVM)
396{
397 /*
398 * Statistics.
399 */
400 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
459
460#ifdef VBOX_WITH_STATISTICS
461 for (VMCPUID i = 0; i < pVM->cCpus; i++)
462 {
463 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
464 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
465 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
466 }
467#endif
468}
469
470
471/**
472 * Initializes the R0 VMM.
473 *
474 * @returns VBox status code.
475 * @param pVM The VM to operate on.
476 */
477VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
478{
479 int rc;
480 PVMCPU pVCpu = VMMGetCpu(pVM);
481 Assert(pVCpu && pVCpu->idCpu == 0);
482
483#ifdef LOG_ENABLED
484 /*
485 * Initialize the ring-0 logger if we haven't done so yet.
486 */
487 if ( pVCpu->vmm.s.pR0LoggerR3
488 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
489 {
490 rc = VMMR3UpdateLoggers(pVM);
491 if (RT_FAILURE(rc))
492 return rc;
493 }
494#endif
495
496 /*
497 * Call Ring-0 entry with init code.
498 */
499 for (;;)
500 {
501#ifdef NO_SUPCALLR0VMM
502 //rc = VERR_GENERAL_FAILURE;
503 rc = VINF_SUCCESS;
504#else
505 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
506#endif
507 /*
508 * Flush the logs.
509 */
510#ifdef LOG_ENABLED
511 if ( pVCpu->vmm.s.pR0LoggerR3
512 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
513 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
514#endif
515 if (rc != VINF_VMM_CALL_HOST)
516 break;
517 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
518 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
519 break;
520 /* Resume R0 */
521 }
522
523 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
524 {
525 LogRel(("R0 init failed, rc=%Rra\n", rc));
526 if (RT_SUCCESS(rc))
527 rc = VERR_INTERNAL_ERROR;
528 }
529 return rc;
530}
531
532
533/**
534 * Initializes the RC VMM.
535 *
536 * @returns VBox status code.
537 * @param pVM The VM to operate on.
538 */
539VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
540{
541 PVMCPU pVCpu = VMMGetCpu(pVM);
542 Assert(pVCpu && pVCpu->idCpu == 0);
543
544 /* In VMX mode, there's no need to init RC. */
545 if (pVM->vmm.s.fSwitcherDisabled)
546 return VINF_SUCCESS;
547
548 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
549
550 /*
551 * Call VMMGCInit():
552 * -# resolve the address.
553 * -# setup stackframe and EIP to use the trampoline.
554 * -# do a generic hypervisor call.
555 */
556 RTRCPTR RCPtrEP;
557 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
558 if (RT_SUCCESS(rc))
559 {
560 CPUMHyperSetCtxCore(pVCpu, NULL);
561 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
562 uint64_t u64TS = RTTimeProgramStartNanoTS();
563 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
564 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
565 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
566 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
567 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
568 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
569 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
570 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
571 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
572
573 for (;;)
574 {
575#ifdef NO_SUPCALLR0VMM
576 //rc = VERR_GENERAL_FAILURE;
577 rc = VINF_SUCCESS;
578#else
579 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
580#endif
581#ifdef LOG_ENABLED
582 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
583 if ( pLogger
584 && pLogger->offScratch > 0)
585 RTLogFlushRC(NULL, pLogger);
586#endif
587#ifdef VBOX_WITH_RC_RELEASE_LOGGING
588 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
589 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
590 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
591#endif
592 if (rc != VINF_VMM_CALL_HOST)
593 break;
594 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
595 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
596 break;
597 }
598
599 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
600 {
601 VMMR3FatalDump(pVM, pVCpu, rc);
602 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
603 rc = VERR_INTERNAL_ERROR;
604 }
605 AssertRC(rc);
606 }
607 return rc;
608}
609
610
611/**
612 * Called when an init phase completes.
613 *
614 * @returns VBox status code.
615 * @param pVM The VM handle.
616 * @param enmWhat Which init phase.
617 */
618VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
619{
620 int rc = VINF_SUCCESS;
621
622 switch (enmWhat)
623 {
624 case VMINITCOMPLETED_RING3:
625 {
626 /*
627 * Set page attributes to r/w for stack pages.
628 */
629 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
630 {
631 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
632 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
633 AssertRCReturn(rc, rc);
634 }
635
636 /*
637 * Create the EMT yield timer.
638 */
639 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
640 AssertRCReturn(rc, rc);
641
642 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
643 AssertRCReturn(rc, rc);
644
645#ifdef VBOX_WITH_NMI
646 /*
647 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
648 */
649 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
650 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
651 AssertRCReturn(rc, rc);
652#endif
653
654#ifdef VBOX_STRICT_VMM_STACK
655 /*
656 * Setup the stack guard pages: Two inaccessible pages at each sides of the
657 * stack to catch over/under-flows.
658 */
659 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
660 {
661 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
662
663 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
664 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
665
666 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
667 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
668 }
669 pVM->vmm.s.fStackGuardsStationed = true;
670#endif
671 break;
672 }
673
674 case VMINITCOMPLETED_RING0:
675 {
676 /*
677 * Disable the periodic preemption timers if we can use the
678 * VMX-preemption timer instead.
679 */
680 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
681 && HWACCMR3IsVmxPreemptionTimerUsed(pVM))
682 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
683 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
684 break;
685 }
686
687 default: /* shuts up gcc */
688 break;
689 }
690
691 return rc;
692}
693
694
695/**
696 * Terminate the VMM bits.
697 *
698 * @returns VINF_SUCCESS.
699 * @param pVM The VM handle.
700 */
701VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
702{
703 PVMCPU pVCpu = VMMGetCpu(pVM);
704 Assert(pVCpu && pVCpu->idCpu == 0);
705
706 /*
707 * Call Ring-0 entry with termination code.
708 */
709 int rc;
710 for (;;)
711 {
712#ifdef NO_SUPCALLR0VMM
713 //rc = VERR_GENERAL_FAILURE;
714 rc = VINF_SUCCESS;
715#else
716 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
717#endif
718 /*
719 * Flush the logs.
720 */
721#ifdef LOG_ENABLED
722 if ( pVCpu->vmm.s.pR0LoggerR3
723 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
724 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
725#endif
726 if (rc != VINF_VMM_CALL_HOST)
727 break;
728 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
729 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
730 break;
731 /* Resume R0 */
732 }
733 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
734 {
735 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
736 if (RT_SUCCESS(rc))
737 rc = VERR_INTERNAL_ERROR;
738 }
739
740 for (VMCPUID i = 0; i < pVM->cCpus; i++)
741 {
742 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
743 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
744 }
745 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
746 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
747 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
748 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
749 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
750 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
751 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
752 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
753
754#ifdef VBOX_STRICT_VMM_STACK
755 /*
756 * Make the two stack guard pages present again.
757 */
758 if (pVM->vmm.s.fStackGuardsStationed)
759 {
760 for (VMCPUID i = 0; i < pVM->cCpus; i++)
761 {
762 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
763 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
764 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
765 }
766 pVM->vmm.s.fStackGuardsStationed = false;
767 }
768#endif
769 return rc;
770}
771
772
773/**
774 * Applies relocations to data and code managed by this
775 * component. This function will be called at init and
776 * whenever the VMM need to relocate it self inside the GC.
777 *
778 * The VMM will need to apply relocations to the core code.
779 *
780 * @param pVM The VM handle.
781 * @param offDelta The relocation delta.
782 */
783VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
784{
785 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
786
787 /*
788 * Recalc the RC address.
789 */
790#ifdef VBOX_WITH_RAW_MODE
791 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
792#endif
793
794 /*
795 * The stack.
796 */
797 for (VMCPUID i = 0; i < pVM->cCpus; i++)
798 {
799 PVMCPU pVCpu = &pVM->aCpus[i];
800
801 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
802
803 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
804 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
805 }
806
807 /*
808 * All the switchers.
809 */
810 vmmR3SwitcherRelocate(pVM, offDelta);
811
812 /*
813 * Get other RC entry points.
814 */
815 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
816 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
817
818 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
819 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
820
821 /*
822 * Update the logger.
823 */
824 VMMR3UpdateLoggers(pVM);
825}
826
827
828/**
829 * Updates the settings for the RC and R0 loggers.
830 *
831 * @returns VBox status code.
832 * @param pVM The VM handle.
833 */
834VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
835{
836 /*
837 * Simply clone the logger instance (for RC).
838 */
839 int rc = VINF_SUCCESS;
840 RTRCPTR RCPtrLoggerFlush = 0;
841
842 if (pVM->vmm.s.pRCLoggerR3
843#ifdef VBOX_WITH_RC_RELEASE_LOGGING
844 || pVM->vmm.s.pRCRelLoggerR3
845#endif
846 )
847 {
848 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
849 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
850 }
851
852 if (pVM->vmm.s.pRCLoggerR3)
853 {
854 RTRCPTR RCPtrLoggerWrapper = 0;
855 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
856 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
857
858 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
859 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
860 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
861 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
862 }
863
864#ifdef VBOX_WITH_RC_RELEASE_LOGGING
865 if (pVM->vmm.s.pRCRelLoggerR3)
866 {
867 RTRCPTR RCPtrLoggerWrapper = 0;
868 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
869 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
870
871 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
872 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
873 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
874 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
875 }
876#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
877
878#ifdef LOG_ENABLED
879 /*
880 * For the ring-0 EMT logger, we use a per-thread logger instance
881 * in ring-0. Only initialize it once.
882 */
883 PRTLOGGER const pDefault = RTLogDefaultInstance();
884 for (VMCPUID i = 0; i < pVM->cCpus; i++)
885 {
886 PVMCPU pVCpu = &pVM->aCpus[i];
887 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
888 if (pR0LoggerR3)
889 {
890 if (!pR0LoggerR3->fCreated)
891 {
892 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
893 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
894 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
895
896 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
897 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
898 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
899
900 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
901 pfnLoggerWrapper, pfnLoggerFlush,
902 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
903 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
904
905 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
906 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
907 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
908 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pfnLoggerPrefix, NIL_RTR0PTR);
909 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
910
911 pR0LoggerR3->idCpu = i;
912 pR0LoggerR3->fCreated = true;
913 pR0LoggerR3->fFlushingDisabled = false;
914
915 }
916
917 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pDefault,
918 RTLOGFLAGS_BUFFERED, UINT32_MAX);
919 AssertRC(rc);
920 }
921 }
922#endif
923 return rc;
924}
925
926
927/**
928 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
929 *
930 * @returns Pointer to the buffer.
931 * @param pVM The VM handle.
932 */
933VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
934{
935 if (HWACCMIsEnabled(pVM))
936 return pVM->vmm.s.szRing0AssertMsg1;
937
938 RTRCPTR RCPtr;
939 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
940 if (RT_SUCCESS(rc))
941 return (const char *)MMHyperRCToR3(pVM, RCPtr);
942
943 return NULL;
944}
945
946
947/**
948 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
949 *
950 * @returns Pointer to the buffer.
951 * @param pVM The VM handle.
952 */
953VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
954{
955 if (HWACCMIsEnabled(pVM))
956 return pVM->vmm.s.szRing0AssertMsg2;
957
958 RTRCPTR RCPtr;
959 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
960 if (RT_SUCCESS(rc))
961 return (const char *)MMHyperRCToR3(pVM, RCPtr);
962
963 return NULL;
964}
965
966
967/**
968 * Execute state save operation.
969 *
970 * @returns VBox status code.
971 * @param pVM VM Handle.
972 * @param pSSM SSM operation handle.
973 */
974static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
975{
976 LogFlow(("vmmR3Save:\n"));
977
978 /*
979 * Save the started/stopped state of all CPUs except 0 as it will always
980 * be running. This avoids breaking the saved state version. :-)
981 */
982 for (VMCPUID i = 1; i < pVM->cCpus; i++)
983 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
984
985 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
986}
987
988
989/**
990 * Execute state load operation.
991 *
992 * @returns VBox status code.
993 * @param pVM VM Handle.
994 * @param pSSM SSM operation handle.
995 * @param uVersion Data layout version.
996 * @param uPass The data pass.
997 */
998static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
999{
1000 LogFlow(("vmmR3Load:\n"));
1001 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1002
1003 /*
1004 * Validate version.
1005 */
1006 if ( uVersion != VMM_SAVED_STATE_VERSION
1007 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1008 {
1009 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1010 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1011 }
1012
1013 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1014 {
1015 /* Ignore the stack bottom, stack pointer and stack bits. */
1016 RTRCPTR RCPtrIgnored;
1017 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1018 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1019#ifdef RT_OS_DARWIN
1020 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1021 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1022 && SSMR3HandleRevision(pSSM) >= 48858
1023 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1024 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1025 )
1026 SSMR3Skip(pSSM, 16384);
1027 else
1028 SSMR3Skip(pSSM, 8192);
1029#else
1030 SSMR3Skip(pSSM, 8192);
1031#endif
1032 }
1033
1034 /*
1035 * Restore the VMCPU states. VCPU 0 is always started.
1036 */
1037 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1038 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1039 {
1040 bool fStarted;
1041 int rc = SSMR3GetBool(pSSM, &fStarted);
1042 if (RT_FAILURE(rc))
1043 return rc;
1044 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1045 }
1046
1047 /* terminator */
1048 uint32_t u32;
1049 int rc = SSMR3GetU32(pSSM, &u32);
1050 if (RT_FAILURE(rc))
1051 return rc;
1052 if (u32 != UINT32_MAX)
1053 {
1054 AssertMsgFailed(("u32=%#x\n", u32));
1055 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1056 }
1057 return VINF_SUCCESS;
1058}
1059
1060
1061/**
1062 * Resolve a builtin RC symbol.
1063 *
1064 * Called by PDM when loading or relocating RC modules.
1065 *
1066 * @returns VBox status
1067 * @param pVM VM Handle.
1068 * @param pszSymbol Symbol to resolv
1069 * @param pRCPtrValue Where to store the symbol value.
1070 *
1071 * @remark This has to work before VMMR3Relocate() is called.
1072 */
1073VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1074{
1075 if (!strcmp(pszSymbol, "g_Logger"))
1076 {
1077 if (pVM->vmm.s.pRCLoggerR3)
1078 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1079 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1080 }
1081 else if (!strcmp(pszSymbol, "g_RelLogger"))
1082 {
1083#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1084 if (pVM->vmm.s.pRCRelLoggerR3)
1085 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1086 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1087#else
1088 *pRCPtrValue = NIL_RTRCPTR;
1089#endif
1090 }
1091 else
1092 return VERR_SYMBOL_NOT_FOUND;
1093 return VINF_SUCCESS;
1094}
1095
1096
1097/**
1098 * Suspends the CPU yielder.
1099 *
1100 * @param pVM The VM handle.
1101 */
1102VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1103{
1104 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1105 if (!pVM->vmm.s.cYieldResumeMillies)
1106 {
1107 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1108 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1109 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1110 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1111 else
1112 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1113 TMTimerStop(pVM->vmm.s.pYieldTimer);
1114 }
1115 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1116}
1117
1118
1119/**
1120 * Stops the CPU yielder.
1121 *
1122 * @param pVM The VM handle.
1123 */
1124VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1125{
1126 if (!pVM->vmm.s.cYieldResumeMillies)
1127 TMTimerStop(pVM->vmm.s.pYieldTimer);
1128 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1129 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1130}
1131
1132
1133/**
1134 * Resumes the CPU yielder when it has been a suspended or stopped.
1135 *
1136 * @param pVM The VM handle.
1137 */
1138VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1139{
1140 if (pVM->vmm.s.cYieldResumeMillies)
1141 {
1142 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1143 pVM->vmm.s.cYieldResumeMillies = 0;
1144 }
1145}
1146
1147
1148/**
1149 * Internal timer callback function.
1150 *
1151 * @param pVM The VM.
1152 * @param pTimer The timer handle.
1153 * @param pvUser User argument specified upon timer creation.
1154 */
1155static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1156{
1157 /*
1158 * This really needs some careful tuning. While we shouldn't be too greedy since
1159 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1160 * because that'll cause us to stop up.
1161 *
1162 * The current logic is to use the default interval when there is no lag worth
1163 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1164 *
1165 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1166 * so the lag is up to date.)
1167 */
1168 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1169 if ( u64Lag < 50000000 /* 50ms */
1170 || ( u64Lag < 1000000000 /* 1s */
1171 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1172 )
1173 {
1174 uint64_t u64Elapsed = RTTimeNanoTS();
1175 pVM->vmm.s.u64LastYield = u64Elapsed;
1176
1177 RTThreadYield();
1178
1179#ifdef LOG_ENABLED
1180 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1181 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1182#endif
1183 }
1184 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1185}
1186
1187
1188/**
1189 * Executes guest code in the raw-mode context.
1190 *
1191 * @param pVM VM handle.
1192 * @param pVCpu The VMCPU to operate on.
1193 */
1194VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1195{
1196 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1197
1198 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1199
1200 /*
1201 * Set the EIP and ESP.
1202 */
1203 CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1204 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1205 : pVM->vmm.s.pfnCPUMRCResumeGuest);
1206 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1207
1208 /*
1209 * We hide log flushes (outer) and hypervisor interrupts (inner).
1210 */
1211 for (;;)
1212 {
1213#ifdef VBOX_STRICT
1214 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1215 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1216 PGMMapCheck(pVM);
1217#endif
1218 int rc;
1219 do
1220 {
1221#ifdef NO_SUPCALLR0VMM
1222 rc = VERR_GENERAL_FAILURE;
1223#else
1224 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1225 if (RT_LIKELY(rc == VINF_SUCCESS))
1226 rc = pVCpu->vmm.s.iLastGZRc;
1227#endif
1228 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1229
1230 /*
1231 * Flush the logs.
1232 */
1233#ifdef LOG_ENABLED
1234 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1235 if ( pLogger
1236 && pLogger->offScratch > 0)
1237 RTLogFlushRC(NULL, pLogger);
1238#endif
1239#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1240 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1241 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1242 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1243#endif
1244 if (rc != VINF_VMM_CALL_HOST)
1245 {
1246 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1247 return rc;
1248 }
1249 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1250 if (RT_FAILURE(rc))
1251 return rc;
1252 /* Resume GC */
1253 }
1254}
1255
1256
1257/**
1258 * Executes guest code (Intel VT-x and AMD-V).
1259 *
1260 * @param pVM VM handle.
1261 * @param pVCpu The VMCPU to operate on.
1262 */
1263VMMR3_INT_DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1264{
1265 Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1266
1267 for (;;)
1268 {
1269 int rc;
1270 do
1271 {
1272#ifdef NO_SUPCALLR0VMM
1273 rc = VERR_GENERAL_FAILURE;
1274#else
1275 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1276 if (RT_LIKELY(rc == VINF_SUCCESS))
1277 rc = pVCpu->vmm.s.iLastGZRc;
1278#endif
1279 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1280
1281#if 0 /* todo triggers too often */
1282 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1283#endif
1284
1285#ifdef LOG_ENABLED
1286 /*
1287 * Flush the log
1288 */
1289 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1290 if ( pR0LoggerR3
1291 && pR0LoggerR3->Logger.offScratch > 0)
1292 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1293#endif /* !LOG_ENABLED */
1294 if (rc != VINF_VMM_CALL_HOST)
1295 {
1296 Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1297 return rc;
1298 }
1299 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1300 if (RT_FAILURE(rc))
1301 return rc;
1302 /* Resume R0 */
1303 }
1304}
1305
1306/**
1307 * VCPU worker for VMMSendSipi.
1308 *
1309 * @param pVM The VM to operate on.
1310 * @param idCpu Virtual CPU to perform SIPI on
1311 * @param uVector SIPI vector
1312 */
1313DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1314{
1315 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1316 VMCPU_ASSERT_EMT(pVCpu);
1317
1318 /** @todo what are we supposed to do if the processor is already running? */
1319 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1320 return VERR_ACCESS_DENIED;
1321
1322
1323 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1324
1325 pCtx->cs = uVector << 8;
1326 pCtx->csHid.u64Base = uVector << 12;
1327 pCtx->csHid.u32Limit = 0x0000ffff;
1328 pCtx->rip = 0;
1329
1330 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1331
1332# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1333 EMSetState(pVCpu, EMSTATE_HALTED);
1334 return VINF_EM_RESCHEDULE;
1335# else /* And if we go the VMCPU::enmState way it can stay here. */
1336 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1337 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1338 return VINF_SUCCESS;
1339# endif
1340}
1341
1342DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1343{
1344 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1345 VMCPU_ASSERT_EMT(pVCpu);
1346
1347 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1348 CPUMR3ResetCpu(pVCpu);
1349 return VINF_EM_WAIT_SIPI;
1350}
1351
1352/**
1353 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1354 * and unhalting processor
1355 *
1356 * @param pVM The VM to operate on.
1357 * @param idCpu Virtual CPU to perform SIPI on
1358 * @param uVector SIPI vector
1359 */
1360VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1361{
1362 AssertReturnVoid(idCpu < pVM->cCpus);
1363
1364 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1365 AssertRC(rc);
1366}
1367
1368/**
1369 * Sends init IPI to the virtual CPU.
1370 *
1371 * @param pVM The VM to operate on.
1372 * @param idCpu Virtual CPU to perform int IPI on
1373 */
1374VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1375{
1376 AssertReturnVoid(idCpu < pVM->cCpus);
1377
1378 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1379 AssertRC(rc);
1380}
1381
1382/**
1383 * Registers the guest memory range that can be used for patching
1384 *
1385 * @returns VBox status code.
1386 * @param pVM The VM to operate on.
1387 * @param pPatchMem Patch memory range
1388 * @param cbPatchMem Size of the memory range
1389 */
1390VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1391{
1392 VM_ASSERT_EMT(pVM);
1393 if (HWACCMIsEnabled(pVM))
1394 return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1395
1396 return VERR_NOT_SUPPORTED;
1397}
1398
1399/**
1400 * Deregisters the guest memory range that can be used for patching
1401 *
1402 * @returns VBox status code.
1403 * @param pVM The VM to operate on.
1404 * @param pPatchMem Patch memory range
1405 * @param cbPatchMem Size of the memory range
1406 */
1407VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1408{
1409 if (HWACCMIsEnabled(pVM))
1410 return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1411
1412 return VINF_SUCCESS;
1413}
1414
1415
1416/**
1417 * Count returns and have the last non-caller EMT wake up the caller.
1418 *
1419 * @returns VBox strict informational status code for EM scheduling. No failures
1420 * will be returned here, those are for the caller only.
1421 *
1422 * @param pVM The VM handle.
1423 */
1424DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1425{
1426 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1427 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1428 if (cReturned == pVM->cCpus - 1U)
1429 {
1430 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1431 AssertLogRelRC(rc);
1432 }
1433
1434 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1435 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1436 ("%Rrc\n", rcRet),
1437 VERR_IPE_UNEXPECTED_INFO_STATUS);
1438 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1439}
1440
1441
1442/**
1443 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1444 *
1445 * @returns VBox strict informational status code for EM scheduling. No failures
1446 * will be returned here, those are for the caller only. When
1447 * fIsCaller is set, VINF_SUCCESS is always returned.
1448 *
1449 * @param pVM The VM handle.
1450 * @param pVCpu The VMCPU structure for the calling EMT.
1451 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1452 * not.
1453 * @param fFlags The flags.
1454 * @param pfnRendezvous The callback.
1455 * @param pvUser The user argument for the callback.
1456 */
1457static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1458 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1459{
1460 int rc;
1461 pVCpu->vmm.s.fInRendezvous = true;
1462
1463 /*
1464 * Enter, the last EMT triggers the next callback phase.
1465 */
1466 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1467 if (cEntered != pVM->cCpus)
1468 {
1469 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1470 {
1471 /* Wait for our turn. */
1472 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1473 AssertLogRelRC(rc);
1474 }
1475 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1476 {
1477 /* Wait for the last EMT to arrive and wake everyone up. */
1478 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1479 AssertLogRelRC(rc);
1480 }
1481 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1482 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1483 {
1484 /* Wait for our turn. */
1485 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1486 AssertLogRelRC(rc);
1487 }
1488 else
1489 {
1490 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1491
1492 /*
1493 * The execute once is handled specially to optimize the code flow.
1494 *
1495 * The last EMT to arrive will perform the callback and the other
1496 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1497 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1498 * returns, that EMT will initiate the normal return sequence.
1499 */
1500 if (!fIsCaller)
1501 {
1502 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1503 AssertLogRelRC(rc);
1504
1505 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1506 }
1507 return VINF_SUCCESS;
1508 }
1509 }
1510 else
1511 {
1512 /*
1513 * All EMTs are waiting, clear the FF and take action according to the
1514 * execution method.
1515 */
1516 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1517
1518 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1519 {
1520 /* Wake up everyone. */
1521 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1522 AssertLogRelRC(rc);
1523 }
1524 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1525 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1526 {
1527 /* Figure out who to wake up and wake it up. If it's ourself, then
1528 it's easy otherwise wait for our turn. */
1529 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1530 ? 0
1531 : pVM->cCpus - 1U;
1532 if (pVCpu->idCpu != iFirst)
1533 {
1534 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1535 AssertLogRelRC(rc);
1536 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1537 AssertLogRelRC(rc);
1538 }
1539 }
1540 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1541 }
1542
1543
1544 /*
1545 * Do the callback and update the status if necessary.
1546 */
1547 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1548 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1549 {
1550 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1551 if (rcStrict != VINF_SUCCESS)
1552 {
1553 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1554 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1555 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1556 int32_t i32RendezvousStatus;
1557 do
1558 {
1559 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1560 if ( rcStrict == i32RendezvousStatus
1561 || RT_FAILURE(i32RendezvousStatus)
1562 || ( i32RendezvousStatus != VINF_SUCCESS
1563 && rcStrict > i32RendezvousStatus))
1564 break;
1565 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1566 }
1567 }
1568
1569 /*
1570 * Increment the done counter and take action depending on whether we're
1571 * the last to finish callback execution.
1572 */
1573 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1574 if ( cDone != pVM->cCpus
1575 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1576 {
1577 /* Signal the next EMT? */
1578 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1579 {
1580 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1581 AssertLogRelRC(rc);
1582 }
1583 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1584 {
1585 Assert(cDone == pVCpu->idCpu + 1U);
1586 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1587 AssertLogRelRC(rc);
1588 }
1589 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1590 {
1591 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1592 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1593 AssertLogRelRC(rc);
1594 }
1595
1596 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1597 if (!fIsCaller)
1598 {
1599 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1600 AssertLogRelRC(rc);
1601 }
1602 }
1603 else
1604 {
1605 /* Callback execution is all done, tell the rest to return. */
1606 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1607 AssertLogRelRC(rc);
1608 }
1609
1610 pVCpu->vmm.s.fInRendezvous = false;
1611 if (!fIsCaller)
1612 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1613 return VINF_SUCCESS;
1614}
1615
1616
1617/**
1618 * Called in response to VM_FF_EMT_RENDEZVOUS.
1619 *
1620 * @returns VBox strict status code - EM scheduling. No errors will be returned
1621 * here, nor will any non-EM scheduling status codes be returned.
1622 *
1623 * @param pVM The VM handle
1624 * @param pVCpu The handle of the calling EMT.
1625 *
1626 * @thread EMT
1627 */
1628VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1629{
1630 return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1631 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1632}
1633
1634
1635/**
1636 * EMT rendezvous.
1637 *
1638 * Gathers all the EMTs and execute some code on each of them, either in a one
1639 * by one fashion or all at once.
1640 *
1641 * @returns VBox strict status code. This will be the the first error,
1642 * VINF_SUCCESS, or an EM scheduling status code.
1643 *
1644 * @param pVM The VM handle.
1645 * @param fFlags Flags indicating execution methods. See
1646 * grp_VMMR3EmtRendezvous_fFlags.
1647 * @param pfnRendezvous The callback.
1648 * @param pvUser User argument for the callback.
1649 *
1650 * @thread Any.
1651 */
1652VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1653{
1654 /*
1655 * Validate input.
1656 */
1657 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1658 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1659 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1660 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1661 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1662 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1663 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1664
1665 VBOXSTRICTRC rcStrict;
1666 PVMCPU pVCpu = VMMGetCpu(pVM);
1667 if (!pVCpu)
1668 /*
1669 * Forward the request to an EMT thread.
1670 */
1671 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1672 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1673 else if (pVM->cCpus == 1)
1674 {
1675 /*
1676 * Shortcut for the single EMT case.
1677 */
1678 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1679 pVCpu->vmm.s.fInRendezvous = true;
1680 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1681 pVCpu->vmm.s.fInRendezvous = false;
1682 }
1683 else
1684 {
1685 /*
1686 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1687 * lookout of the RENDEZVOUS FF.
1688 */
1689 int rc;
1690 rcStrict = VINF_SUCCESS;
1691 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1692 {
1693 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1694
1695 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1696 {
1697 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1698 {
1699 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1700 if ( rc != VINF_SUCCESS
1701 && ( rcStrict == VINF_SUCCESS
1702 || rcStrict > rc))
1703 rcStrict = rc;
1704 /** @todo Perhaps deal with termination here? */
1705 }
1706 ASMNopPause();
1707 }
1708 }
1709 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1710
1711 /*
1712 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1713 */
1714 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1715 {
1716 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1717 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1718 }
1719 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1720 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1721 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1722 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1723 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1724 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1725 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1726 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1727 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1728 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1729 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1730
1731 /*
1732 * Set the FF and poke the other EMTs.
1733 */
1734 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1735 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1736
1737 /*
1738 * Do the same ourselves.
1739 */
1740 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1741
1742 /*
1743 * The caller waits for the other EMTs to be done and return before doing
1744 * the cleanup. This makes away with wakeup / reset races we would otherwise
1745 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1746 */
1747 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1748 AssertLogRelRC(rc);
1749
1750 /*
1751 * Get the return code and clean up a little bit.
1752 */
1753 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1754 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1755
1756 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1757
1758 /*
1759 * Merge rcStrict and rcMy.
1760 */
1761 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1762 if ( rcMy != VINF_SUCCESS
1763 && ( rcStrict == VINF_SUCCESS
1764 || rcStrict > rcMy))
1765 rcStrict = rcMy;
1766 }
1767
1768 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1769 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1770 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1771 VERR_IPE_UNEXPECTED_INFO_STATUS);
1772 return VBOXSTRICTRC_VAL(rcStrict);
1773}
1774
1775
1776/**
1777 * Disables/enables EMT rendezvous.
1778 *
1779 * This is used to make sure EMT rendezvous does not take place while
1780 * processing a priority request.
1781 *
1782 * @returns Old rendezvous-disabled state.
1783 * @param pVCpu The handle of the calling EMT.
1784 * @param fDisabled True if disabled, false if enabled.
1785 */
1786VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1787{
1788 VMCPU_ASSERT_EMT(pVCpu);
1789 bool fOld = pVCpu->vmm.s.fInRendezvous;
1790 pVCpu->vmm.s.fInRendezvous = fDisabled;
1791 return fOld;
1792}
1793
1794
1795/**
1796 * Read from the ring 0 jump buffer stack
1797 *
1798 * @returns VBox status code.
1799 *
1800 * @param pVM Pointer to the shared VM structure.
1801 * @param idCpu The ID of the source CPU context (for the address).
1802 * @param R0Addr Where to start reading.
1803 * @param pvBuf Where to store the data we've read.
1804 * @param cbRead The number of bytes to read.
1805 */
1806VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1807{
1808 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1809 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1810
1811#ifdef VMM_R0_SWITCH_STACK
1812 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1813#else
1814 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1815#endif
1816 if ( off > VMM_STACK_SIZE
1817 || off + cbRead >= VMM_STACK_SIZE)
1818 return VERR_INVALID_POINTER;
1819
1820 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1821 return VINF_SUCCESS;
1822}
1823
1824
1825/**
1826 * Calls a RC function.
1827 *
1828 * @param pVM The VM handle.
1829 * @param RCPtrEntry The address of the RC function.
1830 * @param cArgs The number of arguments in the ....
1831 * @param ... Arguments to the function.
1832 */
1833VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1834{
1835 va_list args;
1836 va_start(args, cArgs);
1837 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1838 va_end(args);
1839 return rc;
1840}
1841
1842
1843/**
1844 * Calls a RC function.
1845 *
1846 * @param pVM The VM handle.
1847 * @param RCPtrEntry The address of the RC function.
1848 * @param cArgs The number of arguments in the ....
1849 * @param args Arguments to the function.
1850 */
1851VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1852{
1853 /* Raw mode implies 1 VCPU. */
1854 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1855 PVMCPU pVCpu = &pVM->aCpus[0];
1856
1857 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1858
1859 /*
1860 * Setup the call frame using the trampoline.
1861 */
1862 CPUMHyperSetCtxCore(pVCpu, NULL);
1863 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1864 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1865 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1866 int i = cArgs;
1867 while (i-- > 0)
1868 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1869
1870 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1871 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1872 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1873
1874 /*
1875 * We hide log flushes (outer) and hypervisor interrupts (inner).
1876 */
1877 for (;;)
1878 {
1879 int rc;
1880 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1881 do
1882 {
1883#ifdef NO_SUPCALLR0VMM
1884 rc = VERR_GENERAL_FAILURE;
1885#else
1886 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1887 if (RT_LIKELY(rc == VINF_SUCCESS))
1888 rc = pVCpu->vmm.s.iLastGZRc;
1889#endif
1890 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1891
1892 /*
1893 * Flush the logs.
1894 */
1895#ifdef LOG_ENABLED
1896 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1897 if ( pLogger
1898 && pLogger->offScratch > 0)
1899 RTLogFlushRC(NULL, pLogger);
1900#endif
1901#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1902 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1903 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1904 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1905#endif
1906 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1907 VMMR3FatalDump(pVM, pVCpu, rc);
1908 if (rc != VINF_VMM_CALL_HOST)
1909 {
1910 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1911 return rc;
1912 }
1913 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1914 if (RT_FAILURE(rc))
1915 return rc;
1916 }
1917}
1918
1919
1920/**
1921 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1922 *
1923 * @returns VBox status code.
1924 * @param pVM The VM to operate on.
1925 * @param uOperation Operation to execute.
1926 * @param u64Arg Constant argument.
1927 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1928 * details.
1929 */
1930VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1931{
1932 PVMCPU pVCpu = VMMGetCpu(pVM);
1933 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1934
1935 /*
1936 * Call Ring-0 entry with init code.
1937 */
1938 int rc;
1939 for (;;)
1940 {
1941#ifdef NO_SUPCALLR0VMM
1942 rc = VERR_GENERAL_FAILURE;
1943#else
1944 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1945#endif
1946 /*
1947 * Flush the logs.
1948 */
1949#ifdef LOG_ENABLED
1950 if ( pVCpu->vmm.s.pR0LoggerR3
1951 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1952 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
1953#endif
1954 if (rc != VINF_VMM_CALL_HOST)
1955 break;
1956 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1957 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1958 break;
1959 /* Resume R0 */
1960 }
1961
1962 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
1963 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1964 VERR_INTERNAL_ERROR);
1965 return rc;
1966}
1967
1968
1969/**
1970 * Resumes executing hypervisor code when interrupted by a queue flush or a
1971 * debug event.
1972 *
1973 * @returns VBox status code.
1974 * @param pVM VM handle.
1975 * @param pVCpu VMCPU handle.
1976 */
1977VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1978{
1979 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1980 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1981
1982 /*
1983 * We hide log flushes (outer) and hypervisor interrupts (inner).
1984 */
1985 for (;;)
1986 {
1987 int rc;
1988 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1989 do
1990 {
1991#ifdef NO_SUPCALLR0VMM
1992 rc = VERR_GENERAL_FAILURE;
1993#else
1994 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1995 if (RT_LIKELY(rc == VINF_SUCCESS))
1996 rc = pVCpu->vmm.s.iLastGZRc;
1997#endif
1998 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1999
2000 /*
2001 * Flush the loggers,
2002 */
2003#ifdef LOG_ENABLED
2004 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2005 if ( pLogger
2006 && pLogger->offScratch > 0)
2007 RTLogFlushRC(NULL, pLogger);
2008#endif
2009#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2010 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2011 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2012 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2013#endif
2014 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2015 VMMR3FatalDump(pVM, pVCpu, rc);
2016 if (rc != VINF_VMM_CALL_HOST)
2017 {
2018 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2019 return rc;
2020 }
2021 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2022 if (RT_FAILURE(rc))
2023 return rc;
2024 }
2025}
2026
2027
2028/**
2029 * Service a call to the ring-3 host code.
2030 *
2031 * @returns VBox status code.
2032 * @param pVM VM handle.
2033 * @param pVCpu VMCPU handle
2034 * @remark Careful with critsects.
2035 */
2036static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2037{
2038 /*
2039 * We must also check for pending critsect exits or else we can deadlock
2040 * when entering other critsects here.
2041 */
2042 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2043 PDMCritSectFF(pVCpu);
2044
2045 switch (pVCpu->vmm.s.enmCallRing3Operation)
2046 {
2047 /*
2048 * Acquire a critical section.
2049 */
2050 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2051 {
2052 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2053 true /*fCallRing3*/);
2054 break;
2055 }
2056
2057 /*
2058 * Acquire the PDM lock.
2059 */
2060 case VMMCALLRING3_PDM_LOCK:
2061 {
2062 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2063 break;
2064 }
2065
2066 /*
2067 * Grow the PGM pool.
2068 */
2069 case VMMCALLRING3_PGM_POOL_GROW:
2070 {
2071 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2072 break;
2073 }
2074
2075 /*
2076 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2077 */
2078 case VMMCALLRING3_PGM_MAP_CHUNK:
2079 {
2080 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2081 break;
2082 }
2083
2084 /*
2085 * Allocates more handy pages.
2086 */
2087 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2088 {
2089 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2090 break;
2091 }
2092
2093 /*
2094 * Allocates a large page.
2095 */
2096 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2097 {
2098 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2099 break;
2100 }
2101
2102 /*
2103 * Acquire the PGM lock.
2104 */
2105 case VMMCALLRING3_PGM_LOCK:
2106 {
2107 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2108 break;
2109 }
2110
2111 /*
2112 * Acquire the MM hypervisor heap lock.
2113 */
2114 case VMMCALLRING3_MMHYPER_LOCK:
2115 {
2116 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2117 break;
2118 }
2119
2120 /*
2121 * Flush REM handler notifications.
2122 */
2123 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2124 {
2125 REMR3ReplayHandlerNotifications(pVM);
2126 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2127 break;
2128 }
2129
2130 /*
2131 * This is a noop. We just take this route to avoid unnecessary
2132 * tests in the loops.
2133 */
2134 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2135 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2136 LogAlways(("*FLUSH*\n"));
2137 break;
2138
2139 /*
2140 * Set the VM error message.
2141 */
2142 case VMMCALLRING3_VM_SET_ERROR:
2143 VMR3SetErrorWorker(pVM);
2144 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2145 break;
2146
2147 /*
2148 * Set the VM runtime error message.
2149 */
2150 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2151 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2152 break;
2153
2154 /*
2155 * Signal a ring 0 hypervisor assertion.
2156 * Cancel the longjmp operation that's in progress.
2157 */
2158 case VMMCALLRING3_VM_R0_ASSERTION:
2159 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2160 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2161#ifdef RT_ARCH_X86
2162 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2163#else
2164 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2165#endif
2166#ifdef VMM_R0_SWITCH_STACK
2167 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2168#endif
2169 LogRel((pVM->vmm.s.szRing0AssertMsg1));
2170 LogRel((pVM->vmm.s.szRing0AssertMsg2));
2171 return VERR_VMM_RING0_ASSERTION;
2172
2173 /*
2174 * A forced switch to ring 0 for preemption purposes.
2175 */
2176 case VMMCALLRING3_VM_R0_PREEMPT:
2177 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2178 break;
2179
2180 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2181 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2182 break;
2183
2184 default:
2185 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2186 return VERR_INTERNAL_ERROR;
2187 }
2188
2189 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2190 return VINF_SUCCESS;
2191}
2192
2193
2194/**
2195 * Displays the Force action Flags.
2196 *
2197 * @param pVM The VM handle.
2198 * @param pHlp The output helpers.
2199 * @param pszArgs The additional arguments (ignored).
2200 */
2201static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2202{
2203 int c;
2204 uint32_t f;
2205#define PRINT_FLAG(prf,flag) do { \
2206 if (f & (prf##flag)) \
2207 { \
2208 static const char *s_psz = #flag; \
2209 if (!(c % 6)) \
2210 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2211 else \
2212 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2213 c++; \
2214 f &= ~(prf##flag); \
2215 } \
2216 } while (0)
2217
2218#define PRINT_GROUP(prf,grp,sfx) do { \
2219 if (f & (prf##grp##sfx)) \
2220 { \
2221 static const char *s_psz = #grp; \
2222 if (!(c % 5)) \
2223 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2224 else \
2225 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2226 c++; \
2227 } \
2228 } while (0)
2229
2230 /*
2231 * The global flags.
2232 */
2233 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2234 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2235
2236 /* show the flag mnemonics */
2237 c = 0;
2238 f = fGlobalForcedActions;
2239 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2240 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2241 PRINT_FLAG(VM_FF_,PDM_DMA);
2242 PRINT_FLAG(VM_FF_,DBGF);
2243 PRINT_FLAG(VM_FF_,REQUEST);
2244 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2245 PRINT_FLAG(VM_FF_,RESET);
2246 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2247 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2248 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2249 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2250 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2251 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2252 if (f)
2253 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2254 else
2255 pHlp->pfnPrintf(pHlp, "\n");
2256
2257 /* the groups */
2258 c = 0;
2259 f = fGlobalForcedActions;
2260 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2261 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2262 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2263 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2264 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2265 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2266 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2267 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2268 if (c)
2269 pHlp->pfnPrintf(pHlp, "\n");
2270
2271 /*
2272 * Per CPU flags.
2273 */
2274 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2275 {
2276 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2277 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2278
2279 /* show the flag mnemonics */
2280 c = 0;
2281 f = fLocalForcedActions;
2282 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2283 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2284 PRINT_FLAG(VMCPU_FF_,TIMER);
2285 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2286 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2287 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2288 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2289 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2290 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2291 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2292 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2293 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2294 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2295 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2296 PRINT_FLAG(VMCPU_FF_,TO_R3);
2297 if (f)
2298 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2299 else
2300 pHlp->pfnPrintf(pHlp, "\n");
2301
2302 /* the groups */
2303 c = 0;
2304 f = fLocalForcedActions;
2305 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2306 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2307 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2308 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2309 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2310 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2311 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2312 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2313 PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2314 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2315 if (c)
2316 pHlp->pfnPrintf(pHlp, "\n");
2317 }
2318
2319#undef PRINT_FLAG
2320#undef PRINT_GROUP
2321}
2322
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