VMM.cpp@ 36944

Last change on this file since 36944 was 36944, checked in by vboxsync, 14 years ago
VBox/param.h: Bumped the max RAM limit up to 2TB on 64-bit hosts (was 16GB). Docs
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1	/* $Id: VMM.cpp 36944 2011-05-03 17:13:31Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 1023 VMs. Imposed by GVMM's handle allocation
55	* (GVMM_MAX_HANDLES), can be increased up to 64K.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmapi.h>
84	#include <VBox/vmm/cpum.h>
85	#include <VBox/vmm/mm.h>
86	#include <VBox/vmm/iom.h>
87	#include <VBox/vmm/trpm.h>
88	#include <VBox/vmm/selm.h>
89	#include <VBox/vmm/em.h>
90	#include <VBox/sup.h>
91	#include <VBox/vmm/dbgf.h>
92	#include <VBox/vmm/csam.h>
93	#include <VBox/vmm/patm.h>
94	#include <VBox/vmm/rem.h>
95	#include <VBox/vmm/ssm.h>
96	#include <VBox/vmm/tm.h>
97	#include "VMMInternal.h"
98	#include "VMMSwitcher.h"
99	#include <VBox/vmm/vm.h>
100	#include <VBox/vmm/ftm.h>
101
102	#include <VBox/err.h>
103	#include <VBox/param.h>
104	#include <VBox/version.h>
105	#include <VBox/x86.h>
106	#include <VBox/vmm/hwaccm.h>
107	#include <iprt/assert.h>
108	#include <iprt/alloc.h>
109	#include <iprt/asm.h>
110	#include <iprt/time.h>
111	#include <iprt/semaphore.h>
112	#include <iprt/stream.h>
113	#include <iprt/string.h>
114	#include <iprt/stdarg.h>
115	#include <iprt/ctype.h>
116
117
118
119	/*******************************************************************************
120	* Defined Constants And Macros *
121	*******************************************************************************/
122	/** The saved state version. */
123	#define VMM_SAVED_STATE_VERSION 4
124	/** The saved state version used by v3.0 and earlier. (Teleportation) */
125	#define VMM_SAVED_STATE_VERSION_3_0 3
126
127
128	/*******************************************************************************
129	* Internal Functions *
130	*******************************************************************************/
131	static int vmmR3InitStacks(PVM pVM);
132	static int vmmR3InitLoggers(PVM pVM);
133	static void vmmR3InitRegisterStats(PVM pVM);
134	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
135	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
136	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
137	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
138	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
139
140
141	/**
142	* Initializes the VMM.
143	*
144	* @returns VBox status code.
145	* @param pVM The VM to operate on.
146	*/
147	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
148	{
149	LogFlow(("VMMR3Init\n"));
150
151	/*
152	* Assert alignment, sizes and order.
153	*/
154	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
155	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
156	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
157
158	/*
159	* Init basic VM VMM members.
160	*/
161	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
162	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
163	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
164	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
165	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
166	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
167
168	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
169	* The EMT yield interval. The EMT yielding is a hack we employ to play a
170	* bit nicer with the rest of the system (like for instance the GUI).
171	*/
172	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
173	23 /* Value arrived at after experimenting with the grub boot prompt. */);
174	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
175
176
177	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
178	* Controls whether we employ per-cpu preemption timers to limit the time
179	* spent executing guest code. This option is not available on all
180	* platforms and we will silently ignore this setting then. If we are
181	* running in VT-x mode, we will use the VMX-preemption timer instead of
182	* this one when possible.
183	*/
184	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
185	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
186	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
187
188	/*
189	* Initialize the VMM sync critical section and semaphores.
190	*/
191	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
192	AssertRCReturn(rc, rc);
193	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
194	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
195	return VERR_NO_MEMORY;
196	for (VMCPUID i = 0; i < pVM->cCpus; i++)
197	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
198	for (VMCPUID i = 0; i < pVM->cCpus; i++)
199	{
200	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
201	AssertRCReturn(rc, rc);
202	}
203	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
204	AssertRCReturn(rc, rc);
205	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
206	AssertRCReturn(rc, rc);
207	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
208	AssertRCReturn(rc, rc);
209	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
210	AssertRCReturn(rc, rc);
211
212	/* GC switchers are enabled by default. Turned off by HWACCM. */
213	pVM->vmm.s.fSwitcherDisabled = false;
214
215	/*
216	* Register the saved state data unit.
217	*/
218	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219	NULL, NULL, NULL,
220	NULL, vmmR3Save, NULL,
221	NULL, vmmR3Load, NULL);
222	if (RT_FAILURE(rc))
223	return rc;
224
225	/*
226	* Register the Ring-0 VM handle with the session for fast ioctl calls.
227	*/
228	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229	if (RT_FAILURE(rc))
230	return rc;
231
232	/*
233	* Init various sub-components.
234	*/
235	rc = vmmR3SwitcherInit(pVM);
236	if (RT_SUCCESS(rc))
237	{
238	rc = vmmR3InitStacks(pVM);
239	if (RT_SUCCESS(rc))
240	{
241	rc = vmmR3InitLoggers(pVM);
242
243	#ifdef VBOX_WITH_NMI
244	/*
245	* Allocate mapping for the host APIC.
246	*/
247	if (RT_SUCCESS(rc))
248	{
249	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250	AssertRC(rc);
251	}
252	#endif
253	if (RT_SUCCESS(rc))
254	{
255	/*
256	* Debug info and statistics.
257	*/
258	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259	vmmR3InitRegisterStats(pVM);
260
261	return VINF_SUCCESS;
262	}
263	}
264	/** @todo: Need failure cleanup. */
265
266	//more todo in here?
267	//if (RT_SUCCESS(rc))
268	//{
269	//}
270	//int rc2 = vmmR3TermCoreCode(pVM);
271	//AssertRC(rc2));
272	}
273
274	return rc;
275	}
276
277
278	/**
279	* Allocate & setup the VMM RC stack(s) (for EMTs).
280	*
281	* The stacks are also used for long jumps in Ring-0.
282	*
283	* @returns VBox status code.
284	* @param pVM Pointer to the shared VM structure.
285	*
286	* @remarks The optional guard page gets it protection setup up during R3 init
287	* completion because of init order issues.
288	*/
289	static int vmmR3InitStacks(PVM pVM)
290	{
291	int rc = VINF_SUCCESS;
292	#ifdef VMM_R0_SWITCH_STACK
293	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
294	#else
295	uint32_t fFlags = 0;
296	#endif
297
298	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
299	{
300	PVMCPU pVCpu = &pVM->aCpus[idCpu];
301
302	#ifdef VBOX_STRICT_VMM_STACK
303	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
304	#else
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
306	#endif
307	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
308	if (RT_SUCCESS(rc))
309	{
310	#ifdef VBOX_STRICT_VMM_STACK
311	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
312	#endif
313	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
314	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
315	if (!VMMIsHwVirtExtForced(pVM))
316	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
317	else
318	#endif
319	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
320	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
321	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
322	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
323
324	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
325	}
326	}
327
328	return rc;
329	}
330
331
332	/**
333	* Initialize the loggers.
334	*
335	* @returns VBox status code.
336	* @param pVM Pointer to the shared VM structure.
337	*/
338	static int vmmR3InitLoggers(PVM pVM)
339	{
340	int rc;
341
342	/*
343	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
344	*/
345	#ifdef LOG_ENABLED
346	PRTLOGGER pLogger = RTLogDefaultInstance();
347	if (pLogger)
348	{
349	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
350	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
351	if (RT_FAILURE(rc))
352	return rc;
353	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
354
355	# ifdef VBOX_WITH_R0_LOGGING
356	for (VMCPUID i = 0; i < pVM->cCpus; i++)
357	{
358	PVMCPU pVCpu = &pVM->aCpus[i];
359
360	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
361	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
362	(void **)&pVCpu->vmm.s.pR0LoggerR3);
363	if (RT_FAILURE(rc))
364	return rc;
365	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
366	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
367	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
368	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
369	}
370	# endif
371	}
372	#endif /* LOG_ENABLED */
373
374	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
375	/*
376	* Allocate RC release logger instances (finalized in the relocator).
377	*/
378	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
379	if (pRelLogger)
380	{
381	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
382	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
383	if (RT_FAILURE(rc))
384	return rc;
385	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
386	}
387	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
388	return VINF_SUCCESS;
389	}
390
391
392	/**
393	* VMMR3Init worker that register the statistics with STAM.
394	*
395	* @param pVM The shared VM structure.
396	*/
397	static void vmmR3InitRegisterStats(PVM pVM)
398	{
399	/*
400	* Statistics.
401	*/
402	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
460
461	#ifdef VBOX_WITH_STATISTICS
462	for (VMCPUID i = 0; i < pVM->cCpus; i++)
463	{
464	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
465	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
466	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
467	}
468	#endif
469	}
470
471
472	/**
473	* Initializes the R0 VMM.
474	*
475	* @returns VBox status code.
476	* @param pVM The VM to operate on.
477	*/
478	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
479	{
480	int rc;
481	PVMCPU pVCpu = VMMGetCpu(pVM);
482	Assert(pVCpu && pVCpu->idCpu == 0);
483
484	#ifdef LOG_ENABLED
485	/*
486	* Initialize the ring-0 logger if we haven't done so yet.
487	*/
488	if ( pVCpu->vmm.s.pR0LoggerR3
489	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
490	{
491	rc = VMMR3UpdateLoggers(pVM);
492	if (RT_FAILURE(rc))
493	return rc;
494	}
495	#endif
496
497	/*
498	* Call Ring-0 entry with init code.
499	*/
500	for (;;)
501	{
502	#ifdef NO_SUPCALLR0VMM
503	//rc = VERR_GENERAL_FAILURE;
504	rc = VINF_SUCCESS;
505	#else
506	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
507	#endif
508	/*
509	* Flush the logs.
510	*/
511	#ifdef LOG_ENABLED
512	if ( pVCpu->vmm.s.pR0LoggerR3
513	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
514	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
515	#endif
516	if (rc != VINF_VMM_CALL_HOST)
517	break;
518	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
519	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
520	break;
521	/* Resume R0 */
522	}
523
524	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
525	{
526	LogRel(("R0 init failed, rc=%Rra\n", rc));
527	if (RT_SUCCESS(rc))
528	rc = VERR_INTERNAL_ERROR;
529	}
530	return rc;
531	}
532
533
534	/**
535	* Initializes the RC VMM.
536	*
537	* @returns VBox status code.
538	* @param pVM The VM to operate on.
539	*/
540	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
541	{
542	PVMCPU pVCpu = VMMGetCpu(pVM);
543	Assert(pVCpu && pVCpu->idCpu == 0);
544
545	/* In VMX mode, there's no need to init RC. */
546	if (pVM->vmm.s.fSwitcherDisabled)
547	return VINF_SUCCESS;
548
549	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
550
551	/*
552	* Call VMMGCInit():
553	* -# resolve the address.
554	* -# setup stackframe and EIP to use the trampoline.
555	* -# do a generic hypervisor call.
556	*/
557	RTRCPTR RCPtrEP;
558	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
559	if (RT_SUCCESS(rc))
560	{
561	CPUMHyperSetCtxCore(pVCpu, NULL);
562	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
563	uint64_t u64TS = RTTimeProgramStartNanoTS();
564	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
565	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
566	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
567	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
568	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
569	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
570	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
571	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
572	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
573
574	for (;;)
575	{
576	#ifdef NO_SUPCALLR0VMM
577	//rc = VERR_GENERAL_FAILURE;
578	rc = VINF_SUCCESS;
579	#else
580	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
581	#endif
582	#ifdef LOG_ENABLED
583	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
584	if ( pLogger
585	&& pLogger->offScratch > 0)
586	RTLogFlushRC(NULL, pLogger);
587	#endif
588	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
589	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
590	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
591	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
592	#endif
593	if (rc != VINF_VMM_CALL_HOST)
594	break;
595	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
596	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
597	break;
598	}
599
600	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
601	{
602	VMMR3FatalDump(pVM, pVCpu, rc);
603	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
604	rc = VERR_INTERNAL_ERROR;
605	}
606	AssertRC(rc);
607	}
608	return rc;
609	}
610
611
612	/**
613	* Called when an init phase completes.
614	*
615	* @returns VBox status code.
616	* @param pVM The VM handle.
617	* @param enmWhat Which init phase.
618	*/
619	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
620	{
621	int rc = VINF_SUCCESS;
622
623	switch (enmWhat)
624	{
625	case VMINITCOMPLETED_RING3:
626	{
627	/*
628	* Set page attributes to r/w for stack pages.
629	*/
630	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
631	{
632	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
633	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
634	AssertRCReturn(rc, rc);
635	}
636
637	/*
638	* Create the EMT yield timer.
639	*/
640	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
641	AssertRCReturn(rc, rc);
642
643	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
644	AssertRCReturn(rc, rc);
645
646	#ifdef VBOX_WITH_NMI
647	/*
648	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
649	*/
650	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
651	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
652	AssertRCReturn(rc, rc);
653	#endif
654
655	#ifdef VBOX_STRICT_VMM_STACK
656	/*
657	* Setup the stack guard pages: Two inaccessible pages at each sides of the
658	* stack to catch over/under-flows.
659	*/
660	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
661	{
662	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
663
664	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
665	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
666
667	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
668	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
669	}
670	pVM->vmm.s.fStackGuardsStationed = true;
671	#endif
672	break;
673	}
674
675	case VMINITCOMPLETED_RING0:
676	{
677	/*
678	* Disable the periodic preemption timers if we can use the
679	* VMX-preemption timer instead.
680	*/
681	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
682	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
683	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
684	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
685	break;
686	}
687
688	default: /* shuts up gcc */
689	break;
690	}
691
692	return rc;
693	}
694
695
696	/**
697	* Terminate the VMM bits.
698	*
699	* @returns VINF_SUCCESS.
700	* @param pVM The VM handle.
701	*/
702	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
703	{
704	PVMCPU pVCpu = VMMGetCpu(pVM);
705	Assert(pVCpu && pVCpu->idCpu == 0);
706
707	/*
708	* Call Ring-0 entry with termination code.
709	*/
710	int rc;
711	for (;;)
712	{
713	#ifdef NO_SUPCALLR0VMM
714	//rc = VERR_GENERAL_FAILURE;
715	rc = VINF_SUCCESS;
716	#else
717	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
718	#endif
719	/*
720	* Flush the logs.
721	*/
722	#ifdef LOG_ENABLED
723	if ( pVCpu->vmm.s.pR0LoggerR3
724	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
725	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
726	#endif
727	if (rc != VINF_VMM_CALL_HOST)
728	break;
729	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
730	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
731	break;
732	/* Resume R0 */
733	}
734	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
735	{
736	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
737	if (RT_SUCCESS(rc))
738	rc = VERR_INTERNAL_ERROR;
739	}
740
741	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
742	for (VMCPUID i = 0; i < pVM->cCpus; i++)
743	{
744	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
745	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
746	}
747	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
748	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
749	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
750	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
751	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
752	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
753	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
754	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
755
756	#ifdef VBOX_STRICT_VMM_STACK
757	/*
758	* Make the two stack guard pages present again.
759	*/
760	if (pVM->vmm.s.fStackGuardsStationed)
761	{
762	for (VMCPUID i = 0; i < pVM->cCpus; i++)
763	{
764	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
765	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
766	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
767	}
768	pVM->vmm.s.fStackGuardsStationed = false;
769	}
770	#endif
771	return rc;
772	}
773
774
775	/**
776	* Applies relocations to data and code managed by this
777	* component. This function will be called at init and
778	* whenever the VMM need to relocate it self inside the GC.
779	*
780	* The VMM will need to apply relocations to the core code.
781	*
782	* @param pVM The VM handle.
783	* @param offDelta The relocation delta.
784	*/
785	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
786	{
787	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
788
789	/*
790	* Recalc the RC address.
791	*/
792	#ifdef VBOX_WITH_RAW_MODE
793	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
794	#endif
795
796	/*
797	* The stack.
798	*/
799	for (VMCPUID i = 0; i < pVM->cCpus; i++)
800	{
801	PVMCPU pVCpu = &pVM->aCpus[i];
802
803	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
804
805	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
806	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
807	}
808
809	/*
810	* All the switchers.
811	*/
812	vmmR3SwitcherRelocate(pVM, offDelta);
813
814	/*
815	* Get other RC entry points.
816	*/
817	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
818	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
819
820	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
821	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
822
823	/*
824	* Update the logger.
825	*/
826	VMMR3UpdateLoggers(pVM);
827	}
828
829
830	/**
831	* Updates the settings for the RC and R0 loggers.
832	*
833	* @returns VBox status code.
834	* @param pVM The VM handle.
835	*/
836	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
837	{
838	/*
839	* Simply clone the logger instance (for RC).
840	*/
841	int rc = VINF_SUCCESS;
842	RTRCPTR RCPtrLoggerFlush = 0;
843
844	if (pVM->vmm.s.pRCLoggerR3
845	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
846	\|\| pVM->vmm.s.pRCRelLoggerR3
847	#endif
848	)
849	{
850	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
851	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
852	}
853
854	if (pVM->vmm.s.pRCLoggerR3)
855	{
856	RTRCPTR RCPtrLoggerWrapper = 0;
857	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
858	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
859
860	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
861	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
862	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
863	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
864	}
865
866	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
867	if (pVM->vmm.s.pRCRelLoggerR3)
868	{
869	RTRCPTR RCPtrLoggerWrapper = 0;
870	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
871	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
872
873	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
874	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
875	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
876	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
877	}
878	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
879
880	#ifdef LOG_ENABLED
881	/*
882	* For the ring-0 EMT logger, we use a per-thread logger instance
883	* in ring-0. Only initialize it once.
884	*/
885	for (VMCPUID i = 0; i < pVM->cCpus; i++)
886	{
887	PVMCPU pVCpu = &pVM->aCpus[i];
888	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
889	if (pR0LoggerR3)
890	{
891	if (!pR0LoggerR3->fCreated)
892	{
893	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
894	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
895	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
896
897	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
898	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
899	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
900
901	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
902	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
903	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
904	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
905
906	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
907	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
908	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
909	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
910	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
911
912	pR0LoggerR3->idCpu = i;
913	pR0LoggerR3->fCreated = true;
914	pR0LoggerR3->fFlushingDisabled = false;
915
916	}
917
918	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
919	AssertRC(rc);
920	}
921	}
922	#endif
923	return rc;
924	}
925
926
927	/**
928	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
929	*
930	* @returns Pointer to the buffer.
931	* @param pVM The VM handle.
932	*/
933	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
934	{
935	if (HWACCMIsEnabled(pVM))
936	return pVM->vmm.s.szRing0AssertMsg1;
937
938	RTRCPTR RCPtr;
939	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
940	if (RT_SUCCESS(rc))
941	return (const char *)MMHyperRCToR3(pVM, RCPtr);
942
943	return NULL;
944	}
945
946
947	/**
948	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
949	*
950	* @returns Pointer to the buffer.
951	* @param pVM The VM handle.
952	*/
953	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
954	{
955	if (HWACCMIsEnabled(pVM))
956	return pVM->vmm.s.szRing0AssertMsg2;
957
958	RTRCPTR RCPtr;
959	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
960	if (RT_SUCCESS(rc))
961	return (const char *)MMHyperRCToR3(pVM, RCPtr);
962
963	return NULL;
964	}
965
966
967	/**
968	* Execute state save operation.
969	*
970	* @returns VBox status code.
971	* @param pVM VM Handle.
972	* @param pSSM SSM operation handle.
973	*/
974	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
975	{
976	LogFlow(("vmmR3Save:\n"));
977
978	/*
979	* Save the started/stopped state of all CPUs except 0 as it will always
980	* be running. This avoids breaking the saved state version. :-)
981	*/
982	for (VMCPUID i = 1; i < pVM->cCpus; i++)
983	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
984
985	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
986	}
987
988
989	/**
990	* Execute state load operation.
991	*
992	* @returns VBox status code.
993	* @param pVM VM Handle.
994	* @param pSSM SSM operation handle.
995	* @param uVersion Data layout version.
996	* @param uPass The data pass.
997	*/
998	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
999	{
1000	LogFlow(("vmmR3Load:\n"));
1001	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1002
1003	/*
1004	* Validate version.
1005	*/
1006	if ( uVersion != VMM_SAVED_STATE_VERSION
1007	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1008	{
1009	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1010	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1011	}
1012
1013	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1014	{
1015	/* Ignore the stack bottom, stack pointer and stack bits. */
1016	RTRCPTR RCPtrIgnored;
1017	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1018	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1019	#ifdef RT_OS_DARWIN
1020	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1021	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1022	&& SSMR3HandleRevision(pSSM) >= 48858
1023	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1024	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1025	)
1026	SSMR3Skip(pSSM, 16384);
1027	else
1028	SSMR3Skip(pSSM, 8192);
1029	#else
1030	SSMR3Skip(pSSM, 8192);
1031	#endif
1032	}
1033
1034	/*
1035	* Restore the VMCPU states. VCPU 0 is always started.
1036	*/
1037	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1038	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1039	{
1040	bool fStarted;
1041	int rc = SSMR3GetBool(pSSM, &fStarted);
1042	if (RT_FAILURE(rc))
1043	return rc;
1044	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1045	}
1046
1047	/* terminator */
1048	uint32_t u32;
1049	int rc = SSMR3GetU32(pSSM, &u32);
1050	if (RT_FAILURE(rc))
1051	return rc;
1052	if (u32 != UINT32_MAX)
1053	{
1054	AssertMsgFailed(("u32=%#x\n", u32));
1055	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1056	}
1057	return VINF_SUCCESS;
1058	}
1059
1060
1061	/**
1062	* Resolve a builtin RC symbol.
1063	*
1064	* Called by PDM when loading or relocating RC modules.
1065	*
1066	* @returns VBox status
1067	* @param pVM VM Handle.
1068	* @param pszSymbol Symbol to resolv
1069	* @param pRCPtrValue Where to store the symbol value.
1070	*
1071	* @remark This has to work before VMMR3Relocate() is called.
1072	*/
1073	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1074	{
1075	if (!strcmp(pszSymbol, "g_Logger"))
1076	{
1077	if (pVM->vmm.s.pRCLoggerR3)
1078	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1079	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1080	}
1081	else if (!strcmp(pszSymbol, "g_RelLogger"))
1082	{
1083	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1084	if (pVM->vmm.s.pRCRelLoggerR3)
1085	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1086	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1087	#else
1088	*pRCPtrValue = NIL_RTRCPTR;
1089	#endif
1090	}
1091	else
1092	return VERR_SYMBOL_NOT_FOUND;
1093	return VINF_SUCCESS;
1094	}
1095
1096
1097	/**
1098	* Suspends the CPU yielder.
1099	*
1100	* @param pVM The VM handle.
1101	*/
1102	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1103	{
1104	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1105	if (!pVM->vmm.s.cYieldResumeMillies)
1106	{
1107	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1108	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1109	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1110	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1111	else
1112	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1113	TMTimerStop(pVM->vmm.s.pYieldTimer);
1114	}
1115	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1116	}
1117
1118
1119	/**
1120	* Stops the CPU yielder.
1121	*
1122	* @param pVM The VM handle.
1123	*/
1124	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1125	{
1126	if (!pVM->vmm.s.cYieldResumeMillies)
1127	TMTimerStop(pVM->vmm.s.pYieldTimer);
1128	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1129	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1130	}
1131
1132
1133	/**
1134	* Resumes the CPU yielder when it has been a suspended or stopped.
1135	*
1136	* @param pVM The VM handle.
1137	*/
1138	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1139	{
1140	if (pVM->vmm.s.cYieldResumeMillies)
1141	{
1142	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1143	pVM->vmm.s.cYieldResumeMillies = 0;
1144	}
1145	}
1146
1147
1148	/**
1149	* Internal timer callback function.
1150	*
1151	* @param pVM The VM.
1152	* @param pTimer The timer handle.
1153	* @param pvUser User argument specified upon timer creation.
1154	*/
1155	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1156	{
1157	/*
1158	* This really needs some careful tuning. While we shouldn't be too greedy since
1159	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1160	* because that'll cause us to stop up.
1161	*
1162	* The current logic is to use the default interval when there is no lag worth
1163	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1164	*
1165	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1166	* so the lag is up to date.)
1167	*/
1168	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1169	if ( u64Lag < 50000000 /* 50ms */
1170	\|\| ( u64Lag < 1000000000 /* 1s */
1171	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1172	)
1173	{
1174	uint64_t u64Elapsed = RTTimeNanoTS();
1175	pVM->vmm.s.u64LastYield = u64Elapsed;
1176
1177	RTThreadYield();
1178
1179	#ifdef LOG_ENABLED
1180	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1181	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1182	#endif
1183	}
1184	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1185	}
1186
1187
1188	/**
1189	* Executes guest code in the raw-mode context.
1190	*
1191	* @param pVM VM handle.
1192	* @param pVCpu The VMCPU to operate on.
1193	*/
1194	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1195	{
1196	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1197
1198	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1199
1200	/*
1201	* Set the EIP and ESP.
1202	*/
1203	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1204	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1205	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1206	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1207
1208	/*
1209	* We hide log flushes (outer) and hypervisor interrupts (inner).
1210	*/
1211	for (;;)
1212	{
1213	#ifdef VBOX_STRICT
1214	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1215	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1216	PGMMapCheck(pVM);
1217	#endif
1218	int rc;
1219	do
1220	{
1221	#ifdef NO_SUPCALLR0VMM
1222	rc = VERR_GENERAL_FAILURE;
1223	#else
1224	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1225	if (RT_LIKELY(rc == VINF_SUCCESS))
1226	rc = pVCpu->vmm.s.iLastGZRc;
1227	#endif
1228	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1229
1230	/*
1231	* Flush the logs.
1232	*/
1233	#ifdef LOG_ENABLED
1234	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1235	if ( pLogger
1236	&& pLogger->offScratch > 0)
1237	RTLogFlushRC(NULL, pLogger);
1238	#endif
1239	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1240	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1241	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1242	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1243	#endif
1244	if (rc != VINF_VMM_CALL_HOST)
1245	{
1246	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1247	return rc;
1248	}
1249	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1250	if (RT_FAILURE(rc))
1251	return rc;
1252	/* Resume GC */
1253	}
1254	}
1255
1256
1257	/**
1258	* Executes guest code (Intel VT-x and AMD-V).
1259	*
1260	* @param pVM VM handle.
1261	* @param pVCpu The VMCPU to operate on.
1262	*/
1263	VMMR3_INT_DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1264	{
1265	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1266
1267	for (;;)
1268	{
1269	int rc;
1270	do
1271	{
1272	#ifdef NO_SUPCALLR0VMM
1273	rc = VERR_GENERAL_FAILURE;
1274	#else
1275	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1276	if (RT_LIKELY(rc == VINF_SUCCESS))
1277	rc = pVCpu->vmm.s.iLastGZRc;
1278	#endif
1279	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1280
1281	#if 0 /* todo triggers too often */
1282	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1283	#endif
1284
1285	#ifdef LOG_ENABLED
1286	/*
1287	* Flush the log
1288	*/
1289	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1290	if ( pR0LoggerR3
1291	&& pR0LoggerR3->Logger.offScratch > 0)
1292	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1293	#endif /* !LOG_ENABLED */
1294	if (rc != VINF_VMM_CALL_HOST)
1295	{
1296	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1297	return rc;
1298	}
1299	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1300	if (RT_FAILURE(rc))
1301	return rc;
1302	/* Resume R0 */
1303	}
1304	}
1305
1306	/**
1307	* VCPU worker for VMMSendSipi.
1308	*
1309	* @param pVM The VM to operate on.
1310	* @param idCpu Virtual CPU to perform SIPI on
1311	* @param uVector SIPI vector
1312	*/
1313	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1314	{
1315	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1316	VMCPU_ASSERT_EMT(pVCpu);
1317
1318	/** @todo what are we supposed to do if the processor is already running? */
1319	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1320	return VERR_ACCESS_DENIED;
1321
1322
1323	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1324
1325	pCtx->cs = uVector << 8;
1326	pCtx->csHid.u64Base = uVector << 12;
1327	pCtx->csHid.u32Limit = 0x0000ffff;
1328	pCtx->rip = 0;
1329
1330	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1331
1332	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1333	EMSetState(pVCpu, EMSTATE_HALTED);
1334	return VINF_EM_RESCHEDULE;
1335	# else /* And if we go the VMCPU::enmState way it can stay here. */
1336	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1337	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1338	return VINF_SUCCESS;
1339	# endif
1340	}
1341
1342	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1343	{
1344	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1345	VMCPU_ASSERT_EMT(pVCpu);
1346
1347	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1348	CPUMR3ResetCpu(pVCpu);
1349	return VINF_EM_WAIT_SIPI;
1350	}
1351
1352	/**
1353	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1354	* and unhalting processor
1355	*
1356	* @param pVM The VM to operate on.
1357	* @param idCpu Virtual CPU to perform SIPI on
1358	* @param uVector SIPI vector
1359	*/
1360	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1361	{
1362	AssertReturnVoid(idCpu < pVM->cCpus);
1363
1364	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1365	AssertRC(rc);
1366	}
1367
1368	/**
1369	* Sends init IPI to the virtual CPU.
1370	*
1371	* @param pVM The VM to operate on.
1372	* @param idCpu Virtual CPU to perform int IPI on
1373	*/
1374	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1375	{
1376	AssertReturnVoid(idCpu < pVM->cCpus);
1377
1378	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1379	AssertRC(rc);
1380	}
1381
1382	/**
1383	* Registers the guest memory range that can be used for patching
1384	*
1385	* @returns VBox status code.
1386	* @param pVM The VM to operate on.
1387	* @param pPatchMem Patch memory range
1388	* @param cbPatchMem Size of the memory range
1389	*/
1390	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1391	{
1392	if (HWACCMIsEnabled(pVM))
1393	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1394
1395	return VERR_NOT_SUPPORTED;
1396	}
1397
1398	/**
1399	* Deregisters the guest memory range that can be used for patching
1400	*
1401	* @returns VBox status code.
1402	* @param pVM The VM to operate on.
1403	* @param pPatchMem Patch memory range
1404	* @param cbPatchMem Size of the memory range
1405	*/
1406	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1407	{
1408	if (HWACCMIsEnabled(pVM))
1409	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1410
1411	return VINF_SUCCESS;
1412	}
1413
1414
1415	/**
1416	* VCPU worker for VMMR3SynchronizeAllVCpus.
1417	*
1418	* @param pVM The VM to operate on.
1419	* @param idCpu Virtual CPU to perform SIPI on
1420	* @param uVector SIPI vector
1421	*/
1422	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1423	{
1424	/* Block until the job in the caller has finished. */
1425	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1426	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1427	return VINF_SUCCESS;
1428	}
1429
1430
1431	/**
1432	* Atomically execute a callback handler
1433	* Note: This is very expensive; avoid using it frequently!
1434	*
1435	* @param pVM The VM to operate on.
1436	* @param pfnHandler Callback handler
1437	* @param pvUser User specified parameter
1438	*
1439	* @thread EMT
1440	* @todo Remove this if not used again soon.
1441	*/
1442	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1443	{
1444	int rc;
1445	PVMCPU pVCpu = VMMGetCpu(pVM);
1446	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1447
1448	/* Shortcut for the uniprocessor case. */
1449	if (pVM->cCpus == 1)
1450	return pfnHandler(pVM, pvUser);
1451
1452	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1453	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1454	{
1455	if (idCpu != pVCpu->idCpu)
1456	{
1457	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1458	AssertRC(rc);
1459	}
1460	}
1461	/* Wait until all other VCPUs are waiting for us. */
1462	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1463	RTThreadSleep(1);
1464
1465	rc = pfnHandler(pVM, pvUser);
1466	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1467	return rc;
1468	}
1469
1470
1471	/**
1472	* Count returns and have the last non-caller EMT wake up the caller.
1473	*
1474	* @returns VBox strict informational status code for EM scheduling. No failures
1475	* will be returned here, those are for the caller only.
1476	*
1477	* @param pVM The VM handle.
1478	*/
1479	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1480	{
1481	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1482	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1483	if (cReturned == pVM->cCpus - 1U)
1484	{
1485	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1486	AssertLogRelRC(rc);
1487	}
1488
1489	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1490	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1491	("%Rrc\n", rcRet),
1492	VERR_IPE_UNEXPECTED_INFO_STATUS);
1493	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1494	}
1495
1496
1497	/**
1498	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1499	*
1500	* @returns VBox strict informational status code for EM scheduling. No failures
1501	* will be returned here, those are for the caller only. When
1502	* fIsCaller is set, VINF_SUCCESS is always returned.
1503	*
1504	* @param pVM The VM handle.
1505	* @param pVCpu The VMCPU structure for the calling EMT.
1506	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1507	* not.
1508	* @param fFlags The flags.
1509	* @param pfnRendezvous The callback.
1510	* @param pvUser The user argument for the callback.
1511	*/
1512	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1513	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1514	{
1515	int rc;
1516
1517	/*
1518	* Enter, the last EMT triggers the next callback phase.
1519	*/
1520	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1521	if (cEntered != pVM->cCpus)
1522	{
1523	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1524	{
1525	/* Wait for our turn. */
1526	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1527	AssertLogRelRC(rc);
1528	}
1529	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1530	{
1531	/* Wait for the last EMT to arrive and wake everyone up. */
1532	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1533	AssertLogRelRC(rc);
1534	}
1535	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1536	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1537	{
1538	/* Wait for our turn. */
1539	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1540	AssertLogRelRC(rc);
1541	}
1542	else
1543	{
1544	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1545
1546	/*
1547	* The execute once is handled specially to optimize the code flow.
1548	*
1549	* The last EMT to arrive will perform the callback and the other
1550	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1551	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1552	* returns, that EMT will initiate the normal return sequence.
1553	*/
1554	if (!fIsCaller)
1555	{
1556	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1557	AssertLogRelRC(rc);
1558
1559	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1560	}
1561	return VINF_SUCCESS;
1562	}
1563	}
1564	else
1565	{
1566	/*
1567	* All EMTs are waiting, clear the FF and take action according to the
1568	* execution method.
1569	*/
1570	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1571
1572	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1573	{
1574	/* Wake up everyone. */
1575	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1576	AssertLogRelRC(rc);
1577	}
1578	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1579	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1580	{
1581	/* Figure out who to wake up and wake it up. If it's ourself, then
1582	it's easy otherwise wait for our turn. */
1583	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1584	? 0
1585	: pVM->cCpus - 1U;
1586	if (pVCpu->idCpu != iFirst)
1587	{
1588	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1589	AssertLogRelRC(rc);
1590	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1591	AssertLogRelRC(rc);
1592	}
1593	}
1594	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1595	}
1596
1597
1598	/*
1599	* Do the callback and update the status if necessary.
1600	*/
1601	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1602	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1603	{
1604	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1605	if (rcStrict != VINF_SUCCESS)
1606	{
1607	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1608	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1609	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1610	int32_t i32RendezvousStatus;
1611	do
1612	{
1613	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1614	if ( rcStrict == i32RendezvousStatus
1615	\|\| RT_FAILURE(i32RendezvousStatus)
1616	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1617	&& rcStrict > i32RendezvousStatus))
1618	break;
1619	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1620	}
1621	}
1622
1623	/*
1624	* Increment the done counter and take action depending on whether we're
1625	* the last to finish callback execution.
1626	*/
1627	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1628	if ( cDone != pVM->cCpus
1629	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1630	{
1631	/* Signal the next EMT? */
1632	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1633	{
1634	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1635	AssertLogRelRC(rc);
1636	}
1637	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1638	{
1639	Assert(cDone == pVCpu->idCpu + 1U);
1640	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1641	AssertLogRelRC(rc);
1642	}
1643	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1644	{
1645	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1646	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1647	AssertLogRelRC(rc);
1648	}
1649
1650	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1651	if (!fIsCaller)
1652	{
1653	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1654	AssertLogRelRC(rc);
1655	}
1656	}
1657	else
1658	{
1659	/* Callback execution is all done, tell the rest to return. */
1660	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1661	AssertLogRelRC(rc);
1662	}
1663
1664	if (!fIsCaller)
1665	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1666	return VINF_SUCCESS;
1667	}
1668
1669
1670	/**
1671	* Called in response to VM_FF_EMT_RENDEZVOUS.
1672	*
1673	* @returns VBox strict status code - EM scheduling. No errors will be returned
1674	* here, nor will any non-EM scheduling status codes be returned.
1675	*
1676	* @param pVM The VM handle
1677	* @param pVCpu The handle of the calling EMT.
1678	*
1679	* @thread EMT
1680	*/
1681	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1682	{
1683	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1684	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1685	}
1686
1687
1688	/**
1689	* EMT rendezvous.
1690	*
1691	* Gathers all the EMTs and execute some code on each of them, either in a one
1692	* by one fashion or all at once.
1693	*
1694	* @returns VBox strict status code. This will be the the first error,
1695	* VINF_SUCCESS, or an EM scheduling status code.
1696	*
1697	* @param pVM The VM handle.
1698	* @param fFlags Flags indicating execution methods. See
1699	* grp_VMMR3EmtRendezvous_fFlags.
1700	* @param pfnRendezvous The callback.
1701	* @param pvUser User argument for the callback.
1702	*
1703	* @thread Any.
1704	*/
1705	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1706	{
1707	/*
1708	* Validate input.
1709	*/
1710	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1711	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1712	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1713	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1714	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1715	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1716	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1717
1718	VBOXSTRICTRC rcStrict;
1719	PVMCPU pVCpu = VMMGetCpu(pVM);
1720	if (!pVCpu)
1721	/*
1722	* Forward the request to an EMT thread.
1723	*/
1724	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1725	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1726	else if (pVM->cCpus == 1)
1727	/*
1728	* Shortcut for the single EMT case.
1729	*/
1730	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1731	else
1732	{
1733	/*
1734	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1735	* lookout of the RENDEZVOUS FF.
1736	*/
1737	int rc;
1738	rcStrict = VINF_SUCCESS;
1739	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1740	{
1741	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1742	{
1743	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1744	{
1745	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1746	if ( rc != VINF_SUCCESS
1747	&& ( rcStrict == VINF_SUCCESS
1748	\|\| rcStrict > rc))
1749	rcStrict = rc;
1750	/** @todo Perhaps deal with termination here? */
1751	}
1752	ASMNopPause();
1753	}
1754	}
1755	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1756
1757	/*
1758	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1759	*/
1760	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1761	{
1762	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1763	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1764	}
1765	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1766	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1767	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1768	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1769	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1770	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1771	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1772	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1773	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1774	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1775	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1776
1777	/*
1778	* Set the FF and poke the other EMTs.
1779	*/
1780	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1781	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1782
1783	/*
1784	* Do the same ourselves.
1785	*/
1786	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1787
1788	/*
1789	* The caller waits for the other EMTs to be done and return before doing
1790	* the cleanup. This makes away with wakeup / reset races we would otherwise
1791	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1792	*/
1793	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1794	AssertLogRelRC(rc);
1795
1796	/*
1797	* Get the return code and clean up a little bit.
1798	*/
1799	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1800	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1801
1802	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1803
1804	/*
1805	* Merge rcStrict and rcMy.
1806	*/
1807	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1808	if ( rcMy != VINF_SUCCESS
1809	&& ( rcStrict == VINF_SUCCESS
1810	\|\| rcStrict > rcMy))
1811	rcStrict = rcMy;
1812	}
1813
1814	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1815	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1816	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1817	VERR_IPE_UNEXPECTED_INFO_STATUS);
1818	return VBOXSTRICTRC_VAL(rcStrict);
1819	}
1820
1821
1822	/**
1823	* Read from the ring 0 jump buffer stack
1824	*
1825	* @returns VBox status code.
1826	*
1827	* @param pVM Pointer to the shared VM structure.
1828	* @param idCpu The ID of the source CPU context (for the address).
1829	* @param R0Addr Where to start reading.
1830	* @param pvBuf Where to store the data we've read.
1831	* @param cbRead The number of bytes to read.
1832	*/
1833	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1834	{
1835	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1836	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1837
1838	#ifdef VMM_R0_SWITCH_STACK
1839	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1840	#else
1841	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1842	#endif
1843	if ( off > VMM_STACK_SIZE
1844	\|\| off + cbRead >= VMM_STACK_SIZE)
1845	return VERR_INVALID_POINTER;
1846
1847	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1848	return VINF_SUCCESS;
1849	}
1850
1851
1852	/**
1853	* Calls a RC function.
1854	*
1855	* @param pVM The VM handle.
1856	* @param RCPtrEntry The address of the RC function.
1857	* @param cArgs The number of arguments in the ....
1858	* @param ... Arguments to the function.
1859	*/
1860	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1861	{
1862	va_list args;
1863	va_start(args, cArgs);
1864	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1865	va_end(args);
1866	return rc;
1867	}
1868
1869
1870	/**
1871	* Calls a RC function.
1872	*
1873	* @param pVM The VM handle.
1874	* @param RCPtrEntry The address of the RC function.
1875	* @param cArgs The number of arguments in the ....
1876	* @param args Arguments to the function.
1877	*/
1878	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1879	{
1880	/* Raw mode implies 1 VCPU. */
1881	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1882	PVMCPU pVCpu = &pVM->aCpus[0];
1883
1884	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1885
1886	/*
1887	* Setup the call frame using the trampoline.
1888	*/
1889	CPUMHyperSetCtxCore(pVCpu, NULL);
1890	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1891	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1892	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1893	int i = cArgs;
1894	while (i-- > 0)
1895	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1896
1897	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1898	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1899	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1900
1901	/*
1902	* We hide log flushes (outer) and hypervisor interrupts (inner).
1903	*/
1904	for (;;)
1905	{
1906	int rc;
1907	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1908	do
1909	{
1910	#ifdef NO_SUPCALLR0VMM
1911	rc = VERR_GENERAL_FAILURE;
1912	#else
1913	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1914	if (RT_LIKELY(rc == VINF_SUCCESS))
1915	rc = pVCpu->vmm.s.iLastGZRc;
1916	#endif
1917	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1918
1919	/*
1920	* Flush the logs.
1921	*/
1922	#ifdef LOG_ENABLED
1923	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1924	if ( pLogger
1925	&& pLogger->offScratch > 0)
1926	RTLogFlushRC(NULL, pLogger);
1927	#endif
1928	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1929	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1930	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1931	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1932	#endif
1933	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1934	VMMR3FatalDump(pVM, pVCpu, rc);
1935	if (rc != VINF_VMM_CALL_HOST)
1936	{
1937	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1938	return rc;
1939	}
1940	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1941	if (RT_FAILURE(rc))
1942	return rc;
1943	}
1944	}
1945
1946
1947	/**
1948	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1949	*
1950	* @returns VBox status code.
1951	* @param pVM The VM to operate on.
1952	* @param uOperation Operation to execute.
1953	* @param u64Arg Constant argument.
1954	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1955	* details.
1956	*/
1957	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1958	{
1959	PVMCPU pVCpu = VMMGetCpu(pVM);
1960	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1961
1962	/*
1963	* Call Ring-0 entry with init code.
1964	*/
1965	int rc;
1966	for (;;)
1967	{
1968	#ifdef NO_SUPCALLR0VMM
1969	rc = VERR_GENERAL_FAILURE;
1970	#else
1971	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1972	#endif
1973	/*
1974	* Flush the logs.
1975	*/
1976	#ifdef LOG_ENABLED
1977	if ( pVCpu->vmm.s.pR0LoggerR3
1978	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1979	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1980	#endif
1981	if (rc != VINF_VMM_CALL_HOST)
1982	break;
1983	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1984	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1985	break;
1986	/* Resume R0 */
1987	}
1988
1989	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1990	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1991	VERR_INTERNAL_ERROR);
1992	return rc;
1993	}
1994
1995
1996	/**
1997	* Resumes executing hypervisor code when interrupted by a queue flush or a
1998	* debug event.
1999	*
2000	* @returns VBox status code.
2001	* @param pVM VM handle.
2002	* @param pVCpu VMCPU handle.
2003	*/
2004	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2005	{
2006	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2007	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2008
2009	/*
2010	* We hide log flushes (outer) and hypervisor interrupts (inner).
2011	*/
2012	for (;;)
2013	{
2014	int rc;
2015	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2016	do
2017	{
2018	#ifdef NO_SUPCALLR0VMM
2019	rc = VERR_GENERAL_FAILURE;
2020	#else
2021	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2022	if (RT_LIKELY(rc == VINF_SUCCESS))
2023	rc = pVCpu->vmm.s.iLastGZRc;
2024	#endif
2025	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2026
2027	/*
2028	* Flush the loggers,
2029	*/
2030	#ifdef LOG_ENABLED
2031	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2032	if ( pLogger
2033	&& pLogger->offScratch > 0)
2034	RTLogFlushRC(NULL, pLogger);
2035	#endif
2036	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2037	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2038	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2039	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2040	#endif
2041	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2042	VMMR3FatalDump(pVM, pVCpu, rc);
2043	if (rc != VINF_VMM_CALL_HOST)
2044	{
2045	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2046	return rc;
2047	}
2048	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2049	if (RT_FAILURE(rc))
2050	return rc;
2051	}
2052	}
2053
2054
2055	/**
2056	* Service a call to the ring-3 host code.
2057	*
2058	* @returns VBox status code.
2059	* @param pVM VM handle.
2060	* @param pVCpu VMCPU handle
2061	* @remark Careful with critsects.
2062	*/
2063	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2064	{
2065	/*
2066	* We must also check for pending critsect exits or else we can deadlock
2067	* when entering other critsects here.
2068	*/
2069	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2070	PDMCritSectFF(pVCpu);
2071
2072	switch (pVCpu->vmm.s.enmCallRing3Operation)
2073	{
2074	/*
2075	* Acquire the PDM lock.
2076	*/
2077	case VMMCALLRING3_PDM_LOCK:
2078	{
2079	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2080	break;
2081	}
2082
2083	/*
2084	* Grow the PGM pool.
2085	*/
2086	case VMMCALLRING3_PGM_POOL_GROW:
2087	{
2088	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2089	break;
2090	}
2091
2092	/*
2093	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2094	*/
2095	case VMMCALLRING3_PGM_MAP_CHUNK:
2096	{
2097	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2098	break;
2099	}
2100
2101	/*
2102	* Allocates more handy pages.
2103	*/
2104	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2105	{
2106	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2107	break;
2108	}
2109
2110	/*
2111	* Allocates a large page.
2112	*/
2113	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2114	{
2115	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2116	break;
2117	}
2118
2119	/*
2120	* Acquire the PGM lock.
2121	*/
2122	case VMMCALLRING3_PGM_LOCK:
2123	{
2124	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2125	break;
2126	}
2127
2128	/*
2129	* Acquire the MM hypervisor heap lock.
2130	*/
2131	case VMMCALLRING3_MMHYPER_LOCK:
2132	{
2133	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2134	break;
2135	}
2136
2137	/*
2138	* Flush REM handler notifications.
2139	*/
2140	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2141	{
2142	REMR3ReplayHandlerNotifications(pVM);
2143	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2144	break;
2145	}
2146
2147	/*
2148	* This is a noop. We just take this route to avoid unnecessary
2149	* tests in the loops.
2150	*/
2151	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2152	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2153	LogAlways(("FLUSH\n"));
2154	break;
2155
2156	/*
2157	* Set the VM error message.
2158	*/
2159	case VMMCALLRING3_VM_SET_ERROR:
2160	VMR3SetErrorWorker(pVM);
2161	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2162	break;
2163
2164	/*
2165	* Set the VM runtime error message.
2166	*/
2167	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2168	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2169	break;
2170
2171	/*
2172	* Signal a ring 0 hypervisor assertion.
2173	* Cancel the longjmp operation that's in progress.
2174	*/
2175	case VMMCALLRING3_VM_R0_ASSERTION:
2176	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2177	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2178	#ifdef RT_ARCH_X86
2179	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2180	#else
2181	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2182	#endif
2183	#ifdef VMM_R0_SWITCH_STACK
2184	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2185	#endif
2186	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2187	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2188	return VERR_VMM_RING0_ASSERTION;
2189
2190	/*
2191	* A forced switch to ring 0 for preemption purposes.
2192	*/
2193	case VMMCALLRING3_VM_R0_PREEMPT:
2194	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2195	break;
2196
2197	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2198	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2199	break;
2200
2201	default:
2202	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2203	return VERR_INTERNAL_ERROR;
2204	}
2205
2206	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2207	return VINF_SUCCESS;
2208	}
2209
2210
2211	/**
2212	* Displays the Force action Flags.
2213	*
2214	* @param pVM The VM handle.
2215	* @param pHlp The output helpers.
2216	* @param pszArgs The additional arguments (ignored).
2217	*/
2218	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2219	{
2220	int c;
2221	uint32_t f;
2222	#define PRINT_FLAG(prf,flag) do { \
2223	if (f & (prf##flag)) \
2224	{ \
2225	static const char *s_psz = #flag; \
2226	if (!(c % 6)) \
2227	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2228	else \
2229	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2230	c++; \
2231	f &= ~(prf##flag); \
2232	} \
2233	} while (0)
2234
2235	#define PRINT_GROUP(prf,grp,sfx) do { \
2236	if (f & (prf##grp##sfx)) \
2237	{ \
2238	static const char *s_psz = #grp; \
2239	if (!(c % 5)) \
2240	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2241	else \
2242	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2243	c++; \
2244	} \
2245	} while (0)
2246
2247	/*
2248	* The global flags.
2249	*/
2250	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2251	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2252
2253	/* show the flag mnemonics */
2254	c = 0;
2255	f = fGlobalForcedActions;
2256	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2257	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2258	PRINT_FLAG(VM_FF_,PDM_DMA);
2259	PRINT_FLAG(VM_FF_,DBGF);
2260	PRINT_FLAG(VM_FF_,REQUEST);
2261	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2262	PRINT_FLAG(VM_FF_,RESET);
2263	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2264	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2265	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2266	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2267	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2268	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2269	if (f)
2270	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2271	else
2272	pHlp->pfnPrintf(pHlp, "\n");
2273
2274	/* the groups */
2275	c = 0;
2276	f = fGlobalForcedActions;
2277	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2278	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2279	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2280	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2281	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2282	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2283	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2284	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2285	if (c)
2286	pHlp->pfnPrintf(pHlp, "\n");
2287
2288	/*
2289	* Per CPU flags.
2290	*/
2291	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2292	{
2293	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2294	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2295
2296	/* show the flag mnemonics */
2297	c = 0;
2298	f = fLocalForcedActions;
2299	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2300	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2301	PRINT_FLAG(VMCPU_FF_,TIMER);
2302	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2303	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2304	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2305	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2306	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2307	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2308	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2309	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2310	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2311	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2312	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2313	PRINT_FLAG(VMCPU_FF_,TO_R3);
2314	if (f)
2315	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2316	else
2317	pHlp->pfnPrintf(pHlp, "\n");
2318
2319	/* the groups */
2320	c = 0;
2321	f = fLocalForcedActions;
2322	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2323	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2324	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2325	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2326	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2327	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2328	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2329	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2330	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2331	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2332	if (c)
2333	pHlp->pfnPrintf(pHlp, "\n");
2334	}
2335
2336	#undef PRINT_FLAG
2337	#undef PRINT_GROUP
2338	}
2339

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 36944

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