1 | /* $Id: TRPM.cpp 99649 2023-05-08 06:32:00Z vboxsync $ */
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2 | /** @file
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3 | * TRPM - The Trap Monitor.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | /** @page pg_trpm TRPM - The Trap Monitor
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29 | *
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30 | * The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
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31 | * the VMM. It plays a major role in raw-mode execution and a lesser one in the
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32 | * hardware assisted mode.
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33 | *
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34 | * Note first, the following will use trap as a collective term for faults,
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35 | * aborts and traps.
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36 | *
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37 | * @see grp_trpm
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38 | *
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39 | *
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40 | * @section sec_trpm_rc Raw-Mode Context
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41 | *
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42 | * When executing in the raw-mode context, TRPM will be managing the IDT and
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43 | * processing all traps and interrupts. It will also monitor the guest IDT
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44 | * because CSAM wishes to know about changes to it (trap/interrupt/syscall
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45 | * handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
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46 | * considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
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47 | *
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48 | * External interrupts will be forwarded to the host context by the quickest
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49 | * possible route where they will be reasserted. The other events will be
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50 | * categorized into virtualization traps, genuine guest traps and hypervisor
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51 | * traps. The latter group may be recoverable depending on when they happen and
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52 | * whether there is a handler for it, otherwise it will cause a guru meditation.
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53 | *
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54 | * TRPM distinguishes the between the first two (virt and guest traps) and the
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55 | * latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
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56 | * it's a hyper trap otherwise it's a virt/guest trap. There are three trap
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57 | * dispatcher tables, one ad-hoc for one time traps registered via
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58 | * TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
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59 | * The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
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60 | *
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61 | * The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
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62 | * part), will call up the other VMM sub-systems depending on what it things
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63 | * happens. The two most busy traps are page faults (\#PF) and general
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64 | * protection fault/trap (\#GP).
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65 | *
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66 | * Before resuming guest code after having taken a virtualization trap or
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67 | * injected a guest trap, TRPM will check for pending forced action and
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68 | * every now and again let TM check for timed out timers. This allows code that
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69 | * is being executed as part of virtualization traps to signal ring-3 exits,
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70 | * page table resyncs and similar without necessarily using the status code. It
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71 | * also make sure we're more responsive to timers and requests from other
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72 | * threads (necessarily running on some different core/cpu in most cases).
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73 | *
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74 | *
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75 | * @section sec_trpm_all All Contexts
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76 | *
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77 | * TRPM will also dispatch / inject interrupts and traps to the guest, both when
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78 | * in raw-mode and when in hardware assisted mode. See TRPMInject().
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79 | *
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80 | */
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81 |
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82 |
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83 | /*********************************************************************************************************************************
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84 | * Header Files *
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85 | *********************************************************************************************************************************/
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86 | #define LOG_GROUP LOG_GROUP_TRPM
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87 | #include <VBox/vmm/trpm.h>
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88 | #include <VBox/vmm/cpum.h>
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89 | #include <VBox/vmm/selm.h>
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90 | #include <VBox/vmm/ssm.h>
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91 | #include <VBox/vmm/pdmapi.h>
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92 | #include <VBox/vmm/em.h>
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93 | #include <VBox/vmm/pgm.h>
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94 | #include <VBox/vmm/dbgf.h>
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95 | #include <VBox/vmm/mm.h>
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96 | #include <VBox/vmm/stam.h>
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97 | #include <VBox/vmm/iem.h>
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98 | #include "TRPMInternal.h"
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99 | #include <VBox/vmm/vm.h>
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100 | #include <VBox/vmm/em.h>
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101 | #include <VBox/vmm/hm.h>
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102 |
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103 | #include <VBox/err.h>
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104 | #include <VBox/param.h>
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105 | #include <VBox/log.h>
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106 | #include <iprt/assert.h>
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107 | #include <iprt/asm.h>
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108 | #include <iprt/string.h>
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109 | #include <iprt/alloc.h>
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110 |
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111 |
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112 | /*********************************************************************************************************************************
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113 | * Defined Constants And Macros *
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114 | *********************************************************************************************************************************/
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115 | /** TRPM saved state version. */
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116 | #define TRPM_SAVED_STATE_VERSION 10
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117 | #define TRPM_SAVED_STATE_VERSION_PRE_ICEBP 9 /* INT1/ICEBP support bumped the version */
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118 | #define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
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119 |
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120 |
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121 | /*********************************************************************************************************************************
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122 | * Internal Functions *
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123 | *********************************************************************************************************************************/
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124 | static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
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125 | static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
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126 | static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
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127 |
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128 |
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129 | /**
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130 | * Initializes the Trap Manager
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131 | *
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132 | * @returns VBox status code.
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133 | * @param pVM The cross context VM structure.
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134 | */
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135 | VMMR3DECL(int) TRPMR3Init(PVM pVM)
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136 | {
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137 | LogFlow(("TRPMR3Init\n"));
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138 | int rc;
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139 |
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140 | /*
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141 | * Assert sizes and alignments.
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142 | */
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143 | AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
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144 |
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145 | /*
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146 | * Initialize members.
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147 | */
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148 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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149 | {
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150 | PVMCPU pVCpu = pVM->apCpusR3[i];
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151 | pVCpu->trpm.s.uActiveVector = ~0U;
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152 | }
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153 |
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154 | /*
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155 | * Register the saved state data unit.
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156 | */
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157 | rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
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158 | NULL, NULL, NULL,
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159 | NULL, trpmR3Save, NULL,
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160 | NULL, trpmR3Load, NULL);
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161 | if (RT_FAILURE(rc))
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162 | return rc;
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163 |
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164 | /*
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165 | * Register info handlers.
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166 | */
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167 | rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
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168 | DBGFINFO_FLAGS_ALL_EMTS);
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169 | AssertRCReturn(rc, rc);
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170 |
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171 | /*
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172 | * Statistics.
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173 | */
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174 | for (unsigned i = 0; i < 256; i++)
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175 | STAMR3RegisterF(pVM, &pVM->trpm.s.aStatForwardedIRQ[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,
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176 | "Forwarded interrupts.", i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
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177 |
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178 | return 0;
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179 | }
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180 |
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181 |
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182 | /**
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183 | * Applies relocations to data and code managed by this component.
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184 | *
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185 | * This function will be called at init and whenever the VMM need
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186 | * to relocate itself inside the GC.
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187 | *
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188 | * @param pVM The cross context VM structure.
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189 | * @param offDelta Relocation delta relative to old location.
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190 | */
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191 | VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
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192 | {
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193 | RT_NOREF(pVM, offDelta);
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194 | }
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195 |
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196 |
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197 | /**
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198 | * Terminates the Trap Manager
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199 | *
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200 | * @returns VBox status code.
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201 | * @param pVM The cross context VM structure.
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202 | */
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203 | VMMR3DECL(int) TRPMR3Term(PVM pVM)
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204 | {
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205 | NOREF(pVM);
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206 | return VINF_SUCCESS;
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207 | }
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208 |
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209 |
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210 | /**
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211 | * Resets a virtual CPU.
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212 | *
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213 | * Used by TRPMR3Reset and CPU hot plugging.
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214 | *
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215 | * @param pVCpu The cross context virtual CPU structure.
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216 | */
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217 | VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
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218 | {
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219 | pVCpu->trpm.s.uActiveVector = ~0U;
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220 | }
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221 |
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222 |
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223 | /**
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224 | * The VM is being reset.
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225 | *
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226 | * For the TRPM component this means that any IDT write monitors
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227 | * needs to be removed, any pending trap cleared, and the IDT reset.
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228 | *
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229 | * @param pVM The cross context VM structure.
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230 | */
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231 | VMMR3DECL(void) TRPMR3Reset(PVM pVM)
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232 | {
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233 | /*
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234 | * Reinitialize other members calling the relocator to get things right.
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235 | */
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236 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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237 | TRPMR3ResetCpu(pVM->apCpusR3[i]);
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238 | TRPMR3Relocate(pVM, 0);
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239 | }
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240 |
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241 |
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242 | /**
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243 | * Execute state save operation.
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244 | *
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245 | * @returns VBox status code.
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246 | * @param pVM The cross context VM structure.
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247 | * @param pSSM SSM operation handle.
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248 | */
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249 | static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
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250 | {
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251 | LogFlow(("trpmR3Save:\n"));
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252 |
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253 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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254 | {
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255 | PCTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
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256 | SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
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257 | SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
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258 | SSMR3PutU32(pSSM, pTrpmCpu->uActiveErrorCode);
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259 | SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
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260 | SSMR3PutU8(pSSM, pTrpmCpu->cbInstr);
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261 | SSMR3PutBool(pSSM, pTrpmCpu->fIcebp);
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262 | }
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263 | return VINF_SUCCESS;
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264 | }
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265 |
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266 |
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267 | /**
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268 | * Execute state load operation.
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269 | *
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270 | * @returns VBox status code.
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271 | * @param pVM The cross context VM structure.
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272 | * @param pSSM SSM operation handle.
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273 | * @param uVersion Data layout version.
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274 | * @param uPass The data pass.
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275 | */
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276 | static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
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277 | {
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278 | LogFlow(("trpmR3Load:\n"));
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279 | Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
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280 |
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281 | /*
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282 | * Validate version.
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283 | */
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284 | if ( uVersion != TRPM_SAVED_STATE_VERSION
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285 | && uVersion != TRPM_SAVED_STATE_VERSION_PRE_ICEBP
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286 | && uVersion != TRPM_SAVED_STATE_VERSION_UNI)
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287 | {
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288 | AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
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289 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
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290 | }
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291 |
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292 | if (uVersion == TRPM_SAVED_STATE_VERSION)
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293 | {
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294 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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295 | {
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296 | PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
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297 | SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
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298 | SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
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299 | SSMR3GetU32(pSSM, &pTrpmCpu->uActiveErrorCode);
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300 | SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
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301 | SSMR3GetU8(pSSM, &pTrpmCpu->cbInstr);
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302 | SSMR3GetBool(pSSM, &pTrpmCpu->fIcebp);
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303 | }
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304 | }
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305 | else
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306 | {
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307 | /*
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308 | * Active and saved traps.
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309 | */
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310 | if (uVersion == TRPM_SAVED_STATE_VERSION_PRE_ICEBP)
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311 | {
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312 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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313 | {
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314 | RTGCUINT GCUIntErrCode;
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315 | PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
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316 | SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
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317 | SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
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318 | SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
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319 | SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
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320 | SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedVector - No longer used. */
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321 | SSMR3Skip(pSSM, sizeof(RTUINT)); /* enmSavedType - No longer used. */
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322 | SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedErrorCode - No longer used. */
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323 | SSMR3Skip(pSSM, sizeof(RTGCUINTPTR)); /* uSavedCR2 - No longer used. */
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324 | SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uPrevVector - No longer used. */
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325 |
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326 | /*
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327 | * We lose the high 64-bits here (if RTGCUINT is 64-bit) after making the
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328 | * active error code as 32-bits. However, for error codes even 16-bit should
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329 | * be sufficient. Despite this, we decided to use and keep it at 32-bits
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330 | * since VMX/SVM defines these as 32-bit in their event fields and converting
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331 | * to/from these events are safer.
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332 | */
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333 | pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
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334 | }
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335 | }
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336 | else
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337 | {
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338 | RTGCUINT GCUIntErrCode;
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339 | PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
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340 | SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
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341 | SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
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342 | SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
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343 | SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
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344 | pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
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345 | }
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346 |
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347 | /*
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348 | * Skip rest of TRPM saved-state unit involving IDT and trampoline gates.
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349 | * With the removal of raw-mode support, we no longer need these.
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350 | */
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351 | SSMR3SkipToEndOfUnit(pSSM);
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352 | }
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353 |
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354 | return VINF_SUCCESS;
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355 | }
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356 |
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357 |
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358 | /**
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359 | * Inject event (such as external irq or trap).
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360 | *
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361 | * @returns VBox status code.
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362 | * @param pVM The cross context VM structure.
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363 | * @param pVCpu The cross context virtual CPU structure.
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364 | * @param enmEvent Trpm event type
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365 | * @param pfInjected Where to store whether the event was injected or not.
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366 | */
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367 | VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
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368 | {
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369 | #if defined(VBOX_VMM_TARGET_ARMV8)
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370 | RT_NOREF(pVM, pVCpu, enmEvent, pfInjected);
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371 | AssertReleaseFailed();
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372 | return VERR_NOT_IMPLEMENTED;
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373 | #else
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374 | PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
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375 | Assert(!CPUMIsInInterruptShadow(pCtx));
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376 | Assert(pfInjected);
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377 | *pfInjected = false;
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378 |
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379 | /* Currently only useful for external hardware interrupts. */
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380 | Assert(enmEvent == TRPM_HARDWARE_INT);
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381 |
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382 | RT_NOREF3(pVM, enmEvent, pCtx);
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383 | uint8_t u8Interrupt = 0;
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384 | int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
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385 | Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
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386 | if (RT_SUCCESS(rc))
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387 | {
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388 | *pfInjected = true;
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389 | # ifdef RT_OS_WINDOWS
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390 | if (!VM_IS_NEM_ENABLED(pVM))
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391 | {
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392 | # endif
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393 | # ifdef VBOX_WITH_NESTED_HWVIRT_VMX
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394 | /*
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395 | * If we are NOT calling IEMInjectTrap, we need to handle the
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396 | * VMX nested-guest external-interrupt VM-exit here.
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397 | */
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398 | if ( CPUMIsGuestInVmxNonRootMode(pCtx)
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399 | && CPUMIsGuestVmxInterceptEvents(pCtx)
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400 | && CPUMIsGuestVmxPinCtlsSet(pCtx, VMX_PIN_CTLS_EXT_INT_EXIT))
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401 | {
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402 | Assert(CPUMIsGuestVmxExitCtlsSet(pCtx, VMX_EXIT_CTLS_ACK_EXT_INT));
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403 | VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
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404 | Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
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405 | return VBOXSTRICTRC_VAL(rcStrict);
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406 | }
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407 | # endif
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408 | rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
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409 | AssertRC(rc);
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410 | # ifdef RT_OS_WINDOWS
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411 | }
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412 | else
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413 | {
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414 | VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
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415 | /** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
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416 | * If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
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417 | if (rcStrict != VINF_SUCCESS)
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418 | return VBOXSTRICTRC_TODO(rcStrict);
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419 | }
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420 | # endif
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421 | STAM_REL_COUNTER_INC(&pVM->trpm.s.aStatForwardedIRQ[u8Interrupt]);
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422 | }
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423 | else
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424 | {
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425 | /* Can happen if the interrupt is masked by TPR or APIC is disabled. */
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426 | AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR || rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
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427 | }
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428 | return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
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429 | : VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
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430 | : VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
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431 | #endif
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432 | }
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433 |
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434 |
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435 | /**
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436 | * Displays the pending TRPM event.
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437 | *
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438 | * @param pVM The cross context VM structure.
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439 | * @param pHlp The info helper functions.
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440 | * @param pszArgs Arguments, ignored.
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441 | */
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442 | static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
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443 | {
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444 | NOREF(pszArgs);
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445 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
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446 | if (!pVCpu)
|
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447 | pVCpu = pVM->apCpusR3[0];
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448 |
|
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449 | uint8_t uVector;
|
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450 | uint8_t cbInstr;
|
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451 | TRPMEVENT enmTrapEvent;
|
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452 | uint32_t uErrorCode;
|
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453 | RTGCUINTPTR uCR2;
|
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454 | bool fIcebp;
|
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455 | int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr, &fIcebp);
|
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456 | if (RT_SUCCESS(rc))
|
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457 | {
|
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458 | pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
|
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459 | static const char * const s_apszTrpmEventType[] =
|
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460 | {
|
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461 | "Trap",
|
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462 | "Hardware Int",
|
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463 | "Software Int"
|
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464 | };
|
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465 | if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
|
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466 | {
|
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467 | pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
|
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468 | pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
|
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469 | pHlp->pfnPrintf(pHlp, " uErrorCode = %#x\n", uErrorCode);
|
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470 | pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
|
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471 | pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
|
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472 | pHlp->pfnPrintf(pHlp, " fIcebp = %RTbool\n", fIcebp);
|
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473 | }
|
---|
474 | else
|
---|
475 | pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
|
---|
476 | }
|
---|
477 | else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
|
---|
478 | pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
|
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479 | else
|
---|
480 | pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
|
---|
481 | }
|
---|
482 |
|
---|