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source: vbox/trunk/src/VBox/VMM/VMMR3/TRPM.cpp@ 95259

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1/* $Id: TRPM.cpp 93115 2022-01-01 11:31:46Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_trpm TRPM - The Trap Monitor
19 *
20 * The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
21 * the VMM. It plays a major role in raw-mode execution and a lesser one in the
22 * hardware assisted mode.
23 *
24 * Note first, the following will use trap as a collective term for faults,
25 * aborts and traps.
26 *
27 * @see grp_trpm
28 *
29 *
30 * @section sec_trpm_rc Raw-Mode Context
31 *
32 * When executing in the raw-mode context, TRPM will be managing the IDT and
33 * processing all traps and interrupts. It will also monitor the guest IDT
34 * because CSAM wishes to know about changes to it (trap/interrupt/syscall
35 * handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
36 * considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
37 *
38 * External interrupts will be forwarded to the host context by the quickest
39 * possible route where they will be reasserted. The other events will be
40 * categorized into virtualization traps, genuine guest traps and hypervisor
41 * traps. The latter group may be recoverable depending on when they happen and
42 * whether there is a handler for it, otherwise it will cause a guru meditation.
43 *
44 * TRPM distinguishes the between the first two (virt and guest traps) and the
45 * latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
46 * it's a hyper trap otherwise it's a virt/guest trap. There are three trap
47 * dispatcher tables, one ad-hoc for one time traps registered via
48 * TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
49 * The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
50 *
51 * The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
52 * part), will call up the other VMM sub-systems depending on what it things
53 * happens. The two most busy traps are page faults (\#PF) and general
54 * protection fault/trap (\#GP).
55 *
56 * Before resuming guest code after having taken a virtualization trap or
57 * injected a guest trap, TRPM will check for pending forced action and
58 * every now and again let TM check for timed out timers. This allows code that
59 * is being executed as part of virtualization traps to signal ring-3 exits,
60 * page table resyncs and similar without necessarily using the status code. It
61 * also make sure we're more responsive to timers and requests from other
62 * threads (necessarily running on some different core/cpu in most cases).
63 *
64 *
65 * @section sec_trpm_all All Contexts
66 *
67 * TRPM will also dispatch / inject interrupts and traps to the guest, both when
68 * in raw-mode and when in hardware assisted mode. See TRPMInject().
69 *
70 */
71
72
73/*********************************************************************************************************************************
74* Header Files *
75*********************************************************************************************************************************/
76#define LOG_GROUP LOG_GROUP_TRPM
77#include <VBox/vmm/trpm.h>
78#include <VBox/vmm/cpum.h>
79#include <VBox/vmm/selm.h>
80#include <VBox/vmm/ssm.h>
81#include <VBox/vmm/pdmapi.h>
82#include <VBox/vmm/em.h>
83#include <VBox/vmm/pgm.h>
84#include <VBox/vmm/dbgf.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/stam.h>
87#include <VBox/vmm/iem.h>
88#include "TRPMInternal.h"
89#include <VBox/vmm/vm.h>
90#include <VBox/vmm/em.h>
91#include <VBox/vmm/hm.h>
92
93#include <VBox/err.h>
94#include <VBox/param.h>
95#include <VBox/log.h>
96#include <iprt/assert.h>
97#include <iprt/asm.h>
98#include <iprt/string.h>
99#include <iprt/alloc.h>
100
101
102/*********************************************************************************************************************************
103* Defined Constants And Macros *
104*********************************************************************************************************************************/
105/** TRPM saved state version. */
106#define TRPM_SAVED_STATE_VERSION 10
107#define TRPM_SAVED_STATE_VERSION_PRE_ICEBP 9 /* INT1/ICEBP support bumped the version */
108#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
109
110
111/*********************************************************************************************************************************
112* Internal Functions *
113*********************************************************************************************************************************/
114static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
115static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
116static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
117
118
119/**
120 * Initializes the Trap Manager
121 *
122 * @returns VBox status code.
123 * @param pVM The cross context VM structure.
124 */
125VMMR3DECL(int) TRPMR3Init(PVM pVM)
126{
127 LogFlow(("TRPMR3Init\n"));
128 int rc;
129
130 /*
131 * Assert sizes and alignments.
132 */
133 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
134
135 /*
136 * Initialize members.
137 */
138 for (VMCPUID i = 0; i < pVM->cCpus; i++)
139 {
140 PVMCPU pVCpu = pVM->apCpusR3[i];
141 pVCpu->trpm.s.uActiveVector = ~0U;
142 }
143
144 /*
145 * Register the saved state data unit.
146 */
147 rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
148 NULL, NULL, NULL,
149 NULL, trpmR3Save, NULL,
150 NULL, trpmR3Load, NULL);
151 if (RT_FAILURE(rc))
152 return rc;
153
154 /*
155 * Register info handlers.
156 */
157 rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
158 DBGFINFO_FLAGS_ALL_EMTS);
159 AssertRCReturn(rc, rc);
160
161 /*
162 * Statistics.
163 */
164 for (unsigned i = 0; i < 256; i++)
165 STAMR3RegisterF(pVM, &pVM->trpm.s.aStatForwardedIRQ[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,
166 "Forwarded interrupts.", i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
167
168 return 0;
169}
170
171
172/**
173 * Applies relocations to data and code managed by this component.
174 *
175 * This function will be called at init and whenever the VMM need
176 * to relocate itself inside the GC.
177 *
178 * @param pVM The cross context VM structure.
179 * @param offDelta Relocation delta relative to old location.
180 */
181VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
182{
183 RT_NOREF(pVM, offDelta);
184}
185
186
187/**
188 * Terminates the Trap Manager
189 *
190 * @returns VBox status code.
191 * @param pVM The cross context VM structure.
192 */
193VMMR3DECL(int) TRPMR3Term(PVM pVM)
194{
195 NOREF(pVM);
196 return VINF_SUCCESS;
197}
198
199
200/**
201 * Resets a virtual CPU.
202 *
203 * Used by TRPMR3Reset and CPU hot plugging.
204 *
205 * @param pVCpu The cross context virtual CPU structure.
206 */
207VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
208{
209 pVCpu->trpm.s.uActiveVector = ~0U;
210}
211
212
213/**
214 * The VM is being reset.
215 *
216 * For the TRPM component this means that any IDT write monitors
217 * needs to be removed, any pending trap cleared, and the IDT reset.
218 *
219 * @param pVM The cross context VM structure.
220 */
221VMMR3DECL(void) TRPMR3Reset(PVM pVM)
222{
223 /*
224 * Reinitialize other members calling the relocator to get things right.
225 */
226 for (VMCPUID i = 0; i < pVM->cCpus; i++)
227 TRPMR3ResetCpu(pVM->apCpusR3[i]);
228 TRPMR3Relocate(pVM, 0);
229}
230
231
232/**
233 * Execute state save operation.
234 *
235 * @returns VBox status code.
236 * @param pVM The cross context VM structure.
237 * @param pSSM SSM operation handle.
238 */
239static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
240{
241 LogFlow(("trpmR3Save:\n"));
242
243 for (VMCPUID i = 0; i < pVM->cCpus; i++)
244 {
245 PCTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
246 SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
247 SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
248 SSMR3PutU32(pSSM, pTrpmCpu->uActiveErrorCode);
249 SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
250 SSMR3PutU8(pSSM, pTrpmCpu->cbInstr);
251 SSMR3PutBool(pSSM, pTrpmCpu->fIcebp);
252 }
253 return VINF_SUCCESS;
254}
255
256
257/**
258 * Execute state load operation.
259 *
260 * @returns VBox status code.
261 * @param pVM The cross context VM structure.
262 * @param pSSM SSM operation handle.
263 * @param uVersion Data layout version.
264 * @param uPass The data pass.
265 */
266static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
267{
268 LogFlow(("trpmR3Load:\n"));
269 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
270
271 /*
272 * Validate version.
273 */
274 if ( uVersion != TRPM_SAVED_STATE_VERSION
275 && uVersion != TRPM_SAVED_STATE_VERSION_PRE_ICEBP
276 && uVersion != TRPM_SAVED_STATE_VERSION_UNI)
277 {
278 AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
279 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
280 }
281
282 if (uVersion == TRPM_SAVED_STATE_VERSION)
283 {
284 for (VMCPUID i = 0; i < pVM->cCpus; i++)
285 {
286 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
287 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
288 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
289 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveErrorCode);
290 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
291 SSMR3GetU8(pSSM, &pTrpmCpu->cbInstr);
292 SSMR3GetBool(pSSM, &pTrpmCpu->fIcebp);
293 }
294 }
295 else
296 {
297 /*
298 * Active and saved traps.
299 */
300 if (uVersion == TRPM_SAVED_STATE_VERSION_PRE_ICEBP)
301 {
302 for (VMCPUID i = 0; i < pVM->cCpus; i++)
303 {
304 RTGCUINT GCUIntErrCode;
305 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
306 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
307 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
308 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
309 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
310 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedVector - No longer used. */
311 SSMR3Skip(pSSM, sizeof(RTUINT)); /* enmSavedType - No longer used. */
312 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedErrorCode - No longer used. */
313 SSMR3Skip(pSSM, sizeof(RTGCUINTPTR)); /* uSavedCR2 - No longer used. */
314 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uPrevVector - No longer used. */
315
316 /*
317 * We lose the high 64-bits here (if RTGCUINT is 64-bit) after making the
318 * active error code as 32-bits. However, for error codes even 16-bit should
319 * be sufficient. Despite this, we decided to use and keep it at 32-bits
320 * since VMX/SVM defines these as 32-bit in their event fields and converting
321 * to/from these events are safer.
322 */
323 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
324 }
325 }
326 else
327 {
328 RTGCUINT GCUIntErrCode;
329 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
330 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
331 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
332 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
333 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
334 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
335 }
336
337 /*
338 * Skip rest of TRPM saved-state unit involving IDT and trampoline gates.
339 * With the removal of raw-mode support, we no longer need these.
340 */
341 SSMR3SkipToEndOfUnit(pSSM);
342 }
343
344 return VINF_SUCCESS;
345}
346
347
348/**
349 * Inject event (such as external irq or trap).
350 *
351 * @returns VBox status code.
352 * @param pVM The cross context VM structure.
353 * @param pVCpu The cross context virtual CPU structure.
354 * @param enmEvent Trpm event type
355 * @param pfInjected Where to store whether the event was injected or not.
356 */
357VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
358{
359 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
360 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
361 Assert(pfInjected);
362 *pfInjected = false;
363
364 /* Currently only useful for external hardware interrupts. */
365 Assert(enmEvent == TRPM_HARDWARE_INT);
366
367 RT_NOREF3(pVM, enmEvent, pCtx);
368 uint8_t u8Interrupt = 0;
369 int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
370 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
371 if (RT_SUCCESS(rc))
372 {
373 *pfInjected = true;
374#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
375 if ( CPUMIsGuestInVmxNonRootMode(pCtx)
376 && CPUMIsGuestVmxInterceptEvents(pCtx)
377 && CPUMIsGuestVmxPinCtlsSet(pCtx, VMX_PIN_CTLS_EXT_INT_EXIT))
378 {
379 VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
380 Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
381 return VBOXSTRICTRC_VAL(rcStrict);
382 }
383#endif
384#ifdef RT_OS_WINDOWS
385 if (!VM_IS_NEM_ENABLED(pVM))
386 {
387#endif
388 rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
389 AssertRC(rc);
390#ifdef RT_OS_WINDOWS
391 }
392 else
393 {
394 VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
395 /** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
396 * If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
397 if (rcStrict != VINF_SUCCESS)
398 return VBOXSTRICTRC_TODO(rcStrict);
399 }
400#endif
401 STAM_REL_COUNTER_INC(&pVM->trpm.s.aStatForwardedIRQ[u8Interrupt]);
402 }
403 else
404 {
405 /* Can happen if the interrupt is masked by TPR or APIC is disabled. */
406 AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR || rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
407 }
408 return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
409 : VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
410 : VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
411}
412
413
414/**
415 * Displays the pending TRPM event.
416 *
417 * @param pVM The cross context VM structure.
418 * @param pHlp The info helper functions.
419 * @param pszArgs Arguments, ignored.
420 */
421static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
422{
423 NOREF(pszArgs);
424 PVMCPU pVCpu = VMMGetCpu(pVM);
425 if (!pVCpu)
426 pVCpu = pVM->apCpusR3[0];
427
428 uint8_t uVector;
429 uint8_t cbInstr;
430 TRPMEVENT enmTrapEvent;
431 uint32_t uErrorCode;
432 RTGCUINTPTR uCR2;
433 bool fIcebp;
434 int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr, &fIcebp);
435 if (RT_SUCCESS(rc))
436 {
437 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
438 static const char * const s_apszTrpmEventType[] =
439 {
440 "Trap",
441 "Hardware Int",
442 "Software Int"
443 };
444 if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
445 {
446 pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
447 pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
448 pHlp->pfnPrintf(pHlp, " uErrorCode = %#x\n", uErrorCode);
449 pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
450 pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
451 pHlp->pfnPrintf(pHlp, " fIcebp = %RTbool\n", fIcebp);
452 }
453 else
454 pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
455 }
456 else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
457 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
458 else
459 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
460}
461
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