1 | /* $Id: SELM.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
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2 | /** @file
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3 | * SELM - The Selector Manager.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2022 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | /** @page pg_selm SELM - The Selector Manager
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29 | *
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30 | * SELM takes care of GDT, LDT and TSS shadowing in raw-mode, and the injection
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31 | * of a few hyper selector for the raw-mode context. In the hardware assisted
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32 | * virtualization mode its only task is to decode entries in the guest GDT or
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33 | * LDT once in a while.
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34 | *
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35 | * @see grp_selm
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36 | *
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37 | *
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38 | * @section seg_selm_shadowing Shadowing
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39 | *
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40 | * SELMR3UpdateFromCPUM() and SELMR3SyncTSS() does the bulk synchronization
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41 | * work. The three structures (GDT, LDT, TSS) are all shadowed wholesale atm.
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42 | * The idea is to do it in a more on-demand fashion when we get time. There
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43 | * also a whole bunch of issues with the current synchronization of all three
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44 | * tables, see notes and todos in the code.
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45 | *
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46 | * When the guest makes changes to the GDT we will try update the shadow copy
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47 | * without involving SELMR3UpdateFromCPUM(), see selmGCSyncGDTEntry().
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48 | *
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49 | * When the guest make LDT changes we'll trigger a full resync of the LDT
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50 | * (SELMR3UpdateFromCPUM()), which, needless to say, isn't optimal.
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51 | *
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52 | * The TSS shadowing is limited to the fields we need to care about, namely SS0
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53 | * and ESP0. The Patch Manager makes use of these. We monitor updates to the
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54 | * guest TSS and will try keep our SS0 and ESP0 copies up to date this way
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55 | * rather than go the SELMR3SyncTSS() route.
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56 | *
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57 | * When in raw-mode SELM also injects a few extra GDT selectors which are used
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58 | * by the raw-mode (hyper) context. These start their life at the high end of
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59 | * the table and will be relocated when the guest tries to make use of them...
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60 | * Well, that was that idea at least, only the code isn't quite there yet which
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61 | * is why we have trouble with guests which actually have a full sized GDT.
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62 | *
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63 | * So, the summary of the current GDT, LDT and TSS shadowing is that there is a
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64 | * lot of relatively simple and enjoyable work to be done, see @bugref{3267}.
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65 | *
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66 | */
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67 |
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68 |
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69 | /*********************************************************************************************************************************
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70 | * Header Files *
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71 | *********************************************************************************************************************************/
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72 | #define LOG_GROUP LOG_GROUP_SELM
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73 | #include <VBox/vmm/selm.h>
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74 | #include <VBox/vmm/cpum.h>
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75 | #include <VBox/vmm/stam.h>
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76 | #include <VBox/vmm/em.h>
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77 | #include <VBox/vmm/hm.h>
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78 | #include <VBox/vmm/mm.h>
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79 | #include <VBox/vmm/ssm.h>
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80 | #include <VBox/vmm/pgm.h>
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81 | #include <VBox/vmm/trpm.h>
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82 | #include <VBox/vmm/dbgf.h>
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83 | #include "SELMInternal.h"
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84 | #include <VBox/vmm/vm.h>
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85 | #include <VBox/err.h>
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86 | #include <VBox/param.h>
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87 |
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88 | #include <iprt/assert.h>
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89 | #include <VBox/log.h>
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90 | #include <iprt/asm.h>
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91 | #include <iprt/string.h>
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92 | #include <iprt/thread.h>
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93 | #include <iprt/string.h>
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94 |
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95 |
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96 | /*********************************************************************************************************************************
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97 | * Internal Functions *
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98 | *********************************************************************************************************************************/
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99 | static DECLCALLBACK(void) selmR3InfoGdtGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
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100 | static DECLCALLBACK(void) selmR3InfoLdtGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
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101 | //static DECLCALLBACK(void) selmR3InfoTssGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
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102 |
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103 |
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104 |
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105 | /**
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106 | * Initializes the SELM.
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107 | *
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108 | * @returns VBox status code.
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109 | * @param pVM The cross context VM structure.
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110 | */
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111 | VMMR3DECL(int) SELMR3Init(PVM pVM)
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112 | {
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113 | int rc;
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114 | LogFlow(("SELMR3Init\n"));
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115 |
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116 | /*
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117 | * Assert alignment and sizes.
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118 | * (The TSS block requires contiguous back.)
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119 | */
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120 | AssertCompile(sizeof(pVM->selm.s) <= sizeof(pVM->selm.padding)); AssertRelease(sizeof(pVM->selm.s) <= sizeof(pVM->selm.padding));
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121 | AssertCompileMemberAlignment(VM, selm.s, 32); AssertRelease(!(RT_UOFFSETOF(VM, selm.s) & 31));
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122 |
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123 | /*
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124 | * Register the saved state data unit.
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125 | */
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126 | rc = SSMR3RegisterStub(pVM, "selm", 1);
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127 | if (RT_FAILURE(rc))
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128 | return rc;
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129 |
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130 | /*
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131 | * Statistics.
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132 | */
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133 | STAM_REG( pVM, &pVM->selm.s.StatLoadHidSelGst, STAMTYPE_COUNTER, "/SELM/LoadHidSel/LoadedGuest", STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: Loaded from guest tables.");
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134 | STAM_REG( pVM, &pVM->selm.s.StatLoadHidSelShw, STAMTYPE_COUNTER, "/SELM/LoadHidSel/LoadedShadow", STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: Loaded from shadow tables.");
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135 | STAM_REL_REG(pVM, &pVM->selm.s.StatLoadHidSelReadErrors, STAMTYPE_COUNTER, "/SELM/LoadHidSel/GstReadErrors", STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: Guest table read errors.");
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136 | STAM_REL_REG(pVM, &pVM->selm.s.StatLoadHidSelGstNoGood, STAMTYPE_COUNTER, "/SELM/LoadHidSel/NoGoodGuest", STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: No good guest table entry.");
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137 |
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138 | /*
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139 | * Register info handlers.
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140 | */
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141 | DBGFR3InfoRegisterInternalEx(pVM, "gdt", "Displays the guest GDT. No arguments.", &selmR3InfoGdtGuest, DBGFINFO_FLAGS_RUN_ON_EMT);
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142 | DBGFR3InfoRegisterInternalEx(pVM, "ldt", "Displays the guest LDT. No arguments.", &selmR3InfoLdtGuest, DBGFINFO_FLAGS_RUN_ON_EMT);
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143 | //DBGFR3InfoRegisterInternal(pVM, "tss", "Displays the guest TSS. No arguments.", &selmR3InfoTssGuest, DBGFINFO_FLAGS_RUN_ON_EMT);
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144 |
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145 | return rc;
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146 | }
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147 |
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148 |
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149 | /**
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150 | * Applies relocations to data and code managed by this
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151 | * component. This function will be called at init and
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152 | * whenever the VMM need to relocate it self inside the GC.
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153 | *
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154 | * @param pVM The cross context VM structure.
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155 | */
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156 | VMMR3DECL(void) SELMR3Relocate(PVM pVM)
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157 | {
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158 | LogFlow(("SELMR3Relocate\n"));
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159 | RT_NOREF(pVM);
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160 | }
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161 |
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162 |
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163 | /**
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164 | * Terminates the SELM.
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165 | *
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166 | * Termination means cleaning up and freeing all resources,
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167 | * the VM it self is at this point powered off or suspended.
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168 | *
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169 | * @returns VBox status code.
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170 | * @param pVM The cross context VM structure.
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171 | */
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172 | VMMR3DECL(int) SELMR3Term(PVM pVM)
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173 | {
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174 | NOREF(pVM);
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175 | return VINF_SUCCESS;
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176 | }
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177 |
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178 |
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179 | /**
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180 | * The VM is being reset.
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181 | *
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182 | * For the SELM component this means that any GDT/LDT/TSS monitors
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183 | * needs to be removed.
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184 | *
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185 | * @param pVM The cross context VM structure.
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186 | */
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187 | VMMR3DECL(void) SELMR3Reset(PVM pVM)
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188 | {
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189 | LogFlow(("SELMR3Reset:\n"));
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190 | VM_ASSERT_EMT(pVM);
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191 | RT_NOREF(pVM);
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192 | }
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193 |
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194 |
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195 | /**
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196 | * Gets information about a 64-bit selector, SELMR3GetSelectorInfo helper.
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197 | *
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198 | * See SELMR3GetSelectorInfo for details.
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199 | *
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200 | * @returns VBox status code, see SELMR3GetSelectorInfo for details.
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201 | *
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202 | * @param pVCpu The cross context virtual CPU structure.
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203 | * @param Sel The selector to get info about.
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204 | * @param pSelInfo Where to store the information.
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205 | */
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206 | static int selmR3GetSelectorInfo64(PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
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207 | {
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208 | /*
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209 | * Read it from the guest descriptor table.
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210 | */
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211 | /** @todo this is bogus wrt the LDT/GDT limit on long selectors. */
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212 | X86DESC64 Desc;
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213 | RTGCPTR GCPtrDesc;
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214 | if (!(Sel & X86_SEL_LDT))
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215 | {
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216 | /* GDT */
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217 | VBOXGDTR Gdtr;
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218 | CPUMGetGuestGDTR(pVCpu, &Gdtr);
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219 | if ((Sel | X86_SEL_RPL_LDT) > Gdtr.cbGdt)
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220 | return VERR_INVALID_SELECTOR;
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221 | GCPtrDesc = Gdtr.pGdt + (Sel & X86_SEL_MASK);
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222 | }
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223 | else
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224 | {
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225 | /* LDT */
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226 | uint64_t GCPtrBase;
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227 | uint32_t cbLimit;
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228 | CPUMGetGuestLdtrEx(pVCpu, &GCPtrBase, &cbLimit);
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229 | if ((Sel | X86_SEL_RPL_LDT) > cbLimit)
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230 | return VERR_INVALID_SELECTOR;
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231 |
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232 | /* calc the descriptor location. */
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233 | GCPtrDesc = GCPtrBase + (Sel & X86_SEL_MASK);
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234 | }
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235 |
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236 | /* read the descriptor. */
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237 | int rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(Desc));
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238 | if (RT_FAILURE(rc))
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239 | {
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240 | rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(X86DESC));
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241 | if (RT_FAILURE(rc))
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242 | return rc;
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243 | Desc.au64[1] = 0;
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244 | }
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245 |
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246 | /*
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247 | * Extract the base and limit
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248 | * (We ignore the present bit here, which is probably a bit silly...)
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249 | */
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250 | pSelInfo->Sel = Sel;
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251 | pSelInfo->fFlags = DBGFSELINFO_FLAGS_LONG_MODE;
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252 | pSelInfo->u.Raw64 = Desc;
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253 | if (Desc.Gen.u1DescType)
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254 | {
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255 | /*
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256 | * 64-bit code selectors are wide open, it's not possible to detect
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257 | * 64-bit data or stack selectors without also dragging in assumptions
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258 | * about current CS (i.e. that's we're executing in 64-bit mode). So,
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259 | * the selinfo user needs to deal with this in the context the info is
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260 | * used unfortunately.
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261 | */
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262 | if ( Desc.Gen.u1Long
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263 | && !Desc.Gen.u1DefBig
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264 | && (Desc.Gen.u4Type & X86_SEL_TYPE_CODE))
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265 | {
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266 | /* Note! We ignore the segment limit hacks that was added by AMD. */
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267 | pSelInfo->GCPtrBase = 0;
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268 | pSelInfo->cbLimit = ~(RTGCUINTPTR)0;
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269 | }
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270 | else
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271 | {
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272 | pSelInfo->cbLimit = X86DESC_LIMIT_G(&Desc);
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273 | pSelInfo->GCPtrBase = X86DESC_BASE(&Desc);
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274 | }
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275 | pSelInfo->SelGate = 0;
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276 | }
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277 | else if ( Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_LDT
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278 | || Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_TSS_AVAIL
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279 | || Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_TSS_BUSY)
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280 | {
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281 | /* Note. LDT descriptors are weird in long mode, we ignore the footnote
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282 | in the AMD manual here as a simplification. */
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283 | pSelInfo->GCPtrBase = X86DESC64_BASE(&Desc);
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284 | pSelInfo->cbLimit = X86DESC_LIMIT_G(&Desc);
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285 | pSelInfo->SelGate = 0;
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286 | }
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287 | else if ( Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_CALL_GATE
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288 | || Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_TRAP_GATE
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289 | || Desc.Gen.u4Type == AMD64_SEL_TYPE_SYS_INT_GATE)
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290 | {
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291 | pSelInfo->cbLimit = X86DESC64_BASE(&Desc);
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292 | pSelInfo->GCPtrBase = Desc.Gate.u16OffsetLow
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293 | | ((uint32_t)Desc.Gate.u16OffsetHigh << 16)
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294 | | ((uint64_t)Desc.Gate.u32OffsetTop << 32);
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295 | pSelInfo->SelGate = Desc.Gate.u16Sel;
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296 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_GATE;
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297 | }
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298 | else
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299 | {
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300 | pSelInfo->cbLimit = 0;
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301 | pSelInfo->GCPtrBase = 0;
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302 | pSelInfo->SelGate = 0;
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303 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_INVALID;
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304 | }
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305 | if (!Desc.Gen.u1Present)
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306 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_NOT_PRESENT;
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307 |
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308 | return VINF_SUCCESS;
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309 | }
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310 |
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311 |
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312 | /**
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313 | * Worker for selmR3GetSelectorInfo32 and SELMR3GetShadowSelectorInfo that
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314 | * interprets a legacy descriptor table entry and fills in the selector info
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315 | * structure from it.
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316 | *
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317 | * @param pSelInfo Where to store the selector info. Only the fFlags and
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318 | * Sel members have been initialized.
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319 | * @param pDesc The legacy descriptor to parse.
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320 | */
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321 | DECLINLINE(void) selmR3SelInfoFromDesc32(PDBGFSELINFO pSelInfo, PCX86DESC pDesc)
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322 | {
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323 | pSelInfo->u.Raw64.au64[1] = 0;
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324 | pSelInfo->u.Raw = *pDesc;
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325 | if ( pDesc->Gen.u1DescType
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326 | || !(pDesc->Gen.u4Type & 4))
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327 | {
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328 | pSelInfo->cbLimit = X86DESC_LIMIT_G(pDesc);
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329 | pSelInfo->GCPtrBase = X86DESC_BASE(pDesc);
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330 | pSelInfo->SelGate = 0;
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331 | }
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332 | else if (pDesc->Gen.u4Type != X86_SEL_TYPE_SYS_UNDEFINED4)
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333 | {
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334 | pSelInfo->cbLimit = 0;
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335 | if (pDesc->Gen.u4Type == X86_SEL_TYPE_SYS_TASK_GATE)
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336 | pSelInfo->GCPtrBase = 0;
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337 | else
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338 | pSelInfo->GCPtrBase = pDesc->Gate.u16OffsetLow
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339 | | (uint32_t)pDesc->Gate.u16OffsetHigh << 16;
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340 | pSelInfo->SelGate = pDesc->Gate.u16Sel;
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341 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_GATE;
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342 | }
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343 | else
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344 | {
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345 | pSelInfo->cbLimit = 0;
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346 | pSelInfo->GCPtrBase = 0;
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347 | pSelInfo->SelGate = 0;
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348 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_INVALID;
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349 | }
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350 | if (!pDesc->Gen.u1Present)
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351 | pSelInfo->fFlags |= DBGFSELINFO_FLAGS_NOT_PRESENT;
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352 | }
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353 |
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354 |
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355 | /**
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356 | * Gets information about a 64-bit selector, SELMR3GetSelectorInfo helper.
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357 | *
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358 | * See SELMR3GetSelectorInfo for details.
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359 | *
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360 | * @returns VBox status code, see SELMR3GetSelectorInfo for details.
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361 | *
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362 | * @param pVCpu The cross context virtual CPU structure.
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363 | * @param Sel The selector to get info about.
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364 | * @param pSelInfo Where to store the information.
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365 | */
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366 | static int selmR3GetSelectorInfo32(PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
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367 | {
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368 | /*
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369 | * Read the descriptor entry
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370 | */
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371 | pSelInfo->fFlags = 0;
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372 | if (CPUMIsGuestInProtectedMode(pVCpu))
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373 | {
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374 | /*
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375 | * Read it from the guest descriptor table.
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376 | */
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377 | pSelInfo->fFlags = DBGFSELINFO_FLAGS_PROT_MODE;
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378 |
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379 | RTGCPTR GCPtrDesc;
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380 | if (!(Sel & X86_SEL_LDT))
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381 | {
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382 | /* GDT */
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383 | VBOXGDTR Gdtr;
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384 | CPUMGetGuestGDTR(pVCpu, &Gdtr);
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385 | if ((Sel | X86_SEL_RPL_LDT) > Gdtr.cbGdt)
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386 | return VERR_INVALID_SELECTOR;
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387 | GCPtrDesc = Gdtr.pGdt + (Sel & X86_SEL_MASK);
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388 | }
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389 | else
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390 | {
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391 | /* LDT */
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392 | uint64_t GCPtrBase;
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393 | uint32_t cbLimit;
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394 | CPUMGetGuestLdtrEx(pVCpu, &GCPtrBase, &cbLimit);
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395 | if ((Sel | X86_SEL_RPL_LDT) > cbLimit)
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396 | return VERR_INVALID_SELECTOR;
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397 |
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398 | /* calc the descriptor location. */
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399 | GCPtrDesc = GCPtrBase + (Sel & X86_SEL_MASK);
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400 | }
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401 |
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402 | /* read the descriptor. */
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403 | X86DESC Desc;
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404 | int rc = PGMPhysSimpleReadGCPtr(pVCpu, &Desc, GCPtrDesc, sizeof(Desc));
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405 | if (RT_SUCCESS(rc))
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406 | {
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407 | /*
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408 | * Extract the base and limit or sel:offset for gates.
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409 | */
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---|
410 | pSelInfo->Sel = Sel;
|
---|
411 | selmR3SelInfoFromDesc32(pSelInfo, &Desc);
|
---|
412 |
|
---|
413 | return VINF_SUCCESS;
|
---|
414 | }
|
---|
415 | return rc;
|
---|
416 | }
|
---|
417 |
|
---|
418 | /*
|
---|
419 | * We're in real mode.
|
---|
420 | */
|
---|
421 | pSelInfo->Sel = Sel;
|
---|
422 | pSelInfo->GCPtrBase = Sel << 4;
|
---|
423 | pSelInfo->cbLimit = 0xffff;
|
---|
424 | pSelInfo->fFlags = DBGFSELINFO_FLAGS_REAL_MODE;
|
---|
425 | pSelInfo->u.Raw64.au64[0] = 0;
|
---|
426 | pSelInfo->u.Raw64.au64[1] = 0;
|
---|
427 | pSelInfo->SelGate = 0;
|
---|
428 | return VINF_SUCCESS;
|
---|
429 | }
|
---|
430 |
|
---|
431 |
|
---|
432 | /**
|
---|
433 | * Gets information about a selector.
|
---|
434 | *
|
---|
435 | * Intended for the debugger mostly and will prefer the guest descriptor tables
|
---|
436 | * over the shadow ones.
|
---|
437 | *
|
---|
438 | * @retval VINF_SUCCESS on success.
|
---|
439 | * @retval VERR_INVALID_SELECTOR if the selector isn't fully inside the
|
---|
440 | * descriptor table.
|
---|
441 | * @retval VERR_SELECTOR_NOT_PRESENT if the LDT is invalid or not present. This
|
---|
442 | * is not returned if the selector itself isn't present, you have to
|
---|
443 | * check that for yourself (see DBGFSELINFO::fFlags).
|
---|
444 | * @retval VERR_PAGE_TABLE_NOT_PRESENT or VERR_PAGE_NOT_PRESENT if the
|
---|
445 | * pagetable or page backing the selector table wasn't present.
|
---|
446 | * @returns Other VBox status code on other errors.
|
---|
447 | *
|
---|
448 | * @param pVCpu The cross context virtual CPU structure.
|
---|
449 | * @param Sel The selector to get info about.
|
---|
450 | * @param pSelInfo Where to store the information.
|
---|
451 | */
|
---|
452 | VMMR3DECL(int) SELMR3GetSelectorInfo(PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo)
|
---|
453 | {
|
---|
454 | AssertPtr(pSelInfo);
|
---|
455 | if (CPUMIsGuestInLongMode(pVCpu))
|
---|
456 | return selmR3GetSelectorInfo64(pVCpu, Sel, pSelInfo);
|
---|
457 | return selmR3GetSelectorInfo32(pVCpu, Sel, pSelInfo);
|
---|
458 | }
|
---|
459 |
|
---|
460 |
|
---|
461 | /**
|
---|
462 | * Formats a descriptor.
|
---|
463 | *
|
---|
464 | * @param Desc Descriptor to format.
|
---|
465 | * @param Sel Selector number.
|
---|
466 | * @param pszOutput Output buffer.
|
---|
467 | * @param cchOutput Size of output buffer.
|
---|
468 | */
|
---|
469 | static void selmR3FormatDescriptor(X86DESC Desc, RTSEL Sel, char *pszOutput, size_t cchOutput)
|
---|
470 | {
|
---|
471 | /*
|
---|
472 | * Make variable description string.
|
---|
473 | */
|
---|
474 | static struct
|
---|
475 | {
|
---|
476 | unsigned cch;
|
---|
477 | const char *psz;
|
---|
478 | } const aTypes[32] =
|
---|
479 | {
|
---|
480 | #define STRENTRY(str) { sizeof(str) - 1, str }
|
---|
481 | /* system */
|
---|
482 | STRENTRY("Reserved0 "), /* 0x00 */
|
---|
483 | STRENTRY("TSS16Avail "), /* 0x01 */
|
---|
484 | STRENTRY("LDT "), /* 0x02 */
|
---|
485 | STRENTRY("TSS16Busy "), /* 0x03 */
|
---|
486 | STRENTRY("Call16 "), /* 0x04 */
|
---|
487 | STRENTRY("Task "), /* 0x05 */
|
---|
488 | STRENTRY("Int16 "), /* 0x06 */
|
---|
489 | STRENTRY("Trap16 "), /* 0x07 */
|
---|
490 | STRENTRY("Reserved8 "), /* 0x08 */
|
---|
491 | STRENTRY("TSS32Avail "), /* 0x09 */
|
---|
492 | STRENTRY("ReservedA "), /* 0x0a */
|
---|
493 | STRENTRY("TSS32Busy "), /* 0x0b */
|
---|
494 | STRENTRY("Call32 "), /* 0x0c */
|
---|
495 | STRENTRY("ReservedD "), /* 0x0d */
|
---|
496 | STRENTRY("Int32 "), /* 0x0e */
|
---|
497 | STRENTRY("Trap32 "), /* 0x0f */
|
---|
498 | /* non system */
|
---|
499 | STRENTRY("DataRO "), /* 0x10 */
|
---|
500 | STRENTRY("DataRO Accessed "), /* 0x11 */
|
---|
501 | STRENTRY("DataRW "), /* 0x12 */
|
---|
502 | STRENTRY("DataRW Accessed "), /* 0x13 */
|
---|
503 | STRENTRY("DataDownRO "), /* 0x14 */
|
---|
504 | STRENTRY("DataDownRO Accessed "), /* 0x15 */
|
---|
505 | STRENTRY("DataDownRW "), /* 0x16 */
|
---|
506 | STRENTRY("DataDownRW Accessed "), /* 0x17 */
|
---|
507 | STRENTRY("CodeEO "), /* 0x18 */
|
---|
508 | STRENTRY("CodeEO Accessed "), /* 0x19 */
|
---|
509 | STRENTRY("CodeER "), /* 0x1a */
|
---|
510 | STRENTRY("CodeER Accessed "), /* 0x1b */
|
---|
511 | STRENTRY("CodeConfEO "), /* 0x1c */
|
---|
512 | STRENTRY("CodeConfEO Accessed "), /* 0x1d */
|
---|
513 | STRENTRY("CodeConfER "), /* 0x1e */
|
---|
514 | STRENTRY("CodeConfER Accessed ") /* 0x1f */
|
---|
515 | #undef SYSENTRY
|
---|
516 | };
|
---|
517 | #define ADD_STR(psz, pszAdd) do { strcpy(psz, pszAdd); psz += strlen(pszAdd); } while (0)
|
---|
518 | char szMsg[128];
|
---|
519 | char *psz = &szMsg[0];
|
---|
520 | unsigned i = Desc.Gen.u1DescType << 4 | Desc.Gen.u4Type;
|
---|
521 | memcpy(psz, aTypes[i].psz, aTypes[i].cch);
|
---|
522 | psz += aTypes[i].cch;
|
---|
523 |
|
---|
524 | if (Desc.Gen.u1Present)
|
---|
525 | ADD_STR(psz, "Present ");
|
---|
526 | else
|
---|
527 | ADD_STR(psz, "Not-Present ");
|
---|
528 | if (Desc.Gen.u1Granularity)
|
---|
529 | ADD_STR(psz, "Page ");
|
---|
530 | if (Desc.Gen.u1DefBig)
|
---|
531 | ADD_STR(psz, "32-bit ");
|
---|
532 | else
|
---|
533 | ADD_STR(psz, "16-bit ");
|
---|
534 | #undef ADD_STR
|
---|
535 | *psz = '\0';
|
---|
536 |
|
---|
537 | /*
|
---|
538 | * Limit and Base and format the output.
|
---|
539 | */
|
---|
540 | uint32_t u32Limit = X86DESC_LIMIT_G(&Desc);
|
---|
541 | uint32_t u32Base = X86DESC_BASE(&Desc);
|
---|
542 |
|
---|
543 | RTStrPrintf(pszOutput, cchOutput, "%04x - %08x %08x - base=%08x limit=%08x dpl=%d %s",
|
---|
544 | Sel, Desc.au32[0], Desc.au32[1], u32Base, u32Limit, Desc.Gen.u2Dpl, szMsg);
|
---|
545 | }
|
---|
546 |
|
---|
547 |
|
---|
548 | /**
|
---|
549 | * Dumps a descriptor.
|
---|
550 | *
|
---|
551 | * @param Desc Descriptor to dump.
|
---|
552 | * @param Sel Selector number.
|
---|
553 | * @param pszMsg Message to prepend the log entry with.
|
---|
554 | */
|
---|
555 | VMMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg)
|
---|
556 | {
|
---|
557 | #ifdef LOG_ENABLED
|
---|
558 | if (LogIsEnabled())
|
---|
559 | {
|
---|
560 | char szOutput[128];
|
---|
561 | selmR3FormatDescriptor(Desc, Sel, &szOutput[0], sizeof(szOutput));
|
---|
562 | Log(("%s: %s\n", pszMsg, szOutput));
|
---|
563 | }
|
---|
564 | #else
|
---|
565 | RT_NOREF3(Desc, Sel, pszMsg);
|
---|
566 | #endif
|
---|
567 | }
|
---|
568 |
|
---|
569 |
|
---|
570 | /**
|
---|
571 | * Display the guest gdt.
|
---|
572 | *
|
---|
573 | * @param pVM The cross context VM structure.
|
---|
574 | * @param pHlp The info helpers.
|
---|
575 | * @param pszArgs Arguments, ignored.
|
---|
576 | */
|
---|
577 | static DECLCALLBACK(void) selmR3InfoGdtGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
|
---|
578 | {
|
---|
579 | /** @todo SMP support! */
|
---|
580 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
581 | CPUMImportGuestStateOnDemand(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4
|
---|
582 | | CPUMCTX_EXTRN_EFER | CPUMCTX_EXTRN_GDTR);
|
---|
583 |
|
---|
584 | VBOXGDTR GDTR;
|
---|
585 | CPUMGetGuestGDTR(pVCpu, &GDTR);
|
---|
586 | RTGCPTR GCPtrGDT = GDTR.pGdt;
|
---|
587 | unsigned cGDTs = ((unsigned)GDTR.cbGdt + 1) / sizeof(X86DESC);
|
---|
588 |
|
---|
589 | pHlp->pfnPrintf(pHlp, "Guest GDT (GCAddr=%RGv limit=%x):\n", GCPtrGDT, GDTR.cbGdt);
|
---|
590 | for (unsigned iGDT = 0; iGDT < cGDTs; iGDT++, GCPtrGDT += sizeof(X86DESC))
|
---|
591 | {
|
---|
592 | X86DESC GDTE;
|
---|
593 | int rc = PGMPhysSimpleReadGCPtr(pVCpu, &GDTE, GCPtrGDT, sizeof(GDTE));
|
---|
594 | if (RT_SUCCESS(rc))
|
---|
595 | {
|
---|
596 | if (GDTE.Gen.u1Present)
|
---|
597 | {
|
---|
598 | char szOutput[128];
|
---|
599 | selmR3FormatDescriptor(GDTE, iGDT << X86_SEL_SHIFT, &szOutput[0], sizeof(szOutput));
|
---|
600 | pHlp->pfnPrintf(pHlp, "%s\n", szOutput);
|
---|
601 | }
|
---|
602 | }
|
---|
603 | else if (rc == VERR_PAGE_NOT_PRESENT)
|
---|
604 | {
|
---|
605 | if ((GCPtrGDT & GUEST_PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
|
---|
606 | pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%RGv)\n", iGDT << X86_SEL_SHIFT, GCPtrGDT);
|
---|
607 | }
|
---|
608 | else
|
---|
609 | pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%RGv\n", iGDT << X86_SEL_SHIFT, rc, GCPtrGDT);
|
---|
610 | }
|
---|
611 | NOREF(pszArgs);
|
---|
612 | }
|
---|
613 |
|
---|
614 |
|
---|
615 | /**
|
---|
616 | * Display the guest ldt.
|
---|
617 | *
|
---|
618 | * @param pVM The cross context VM structure.
|
---|
619 | * @param pHlp The info helpers.
|
---|
620 | * @param pszArgs Arguments, ignored.
|
---|
621 | */
|
---|
622 | static DECLCALLBACK(void) selmR3InfoLdtGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
|
---|
623 | {
|
---|
624 | /** @todo SMP support! */
|
---|
625 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
626 | CPUMImportGuestStateOnDemand(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4
|
---|
627 | | CPUMCTX_EXTRN_EFER | CPUMCTX_EXTRN_GDTR | CPUMCTX_EXTRN_LDTR);
|
---|
628 |
|
---|
629 | uint64_t GCPtrLdt;
|
---|
630 | uint32_t cbLdt;
|
---|
631 | RTSEL SelLdt = CPUMGetGuestLdtrEx(pVCpu, &GCPtrLdt, &cbLdt);
|
---|
632 | if (!(SelLdt & X86_SEL_MASK_OFF_RPL))
|
---|
633 | {
|
---|
634 | pHlp->pfnPrintf(pHlp, "Guest LDT (Sel=%x): Null-Selector\n", SelLdt);
|
---|
635 | return;
|
---|
636 | }
|
---|
637 |
|
---|
638 | pHlp->pfnPrintf(pHlp, "Guest LDT (Sel=%x GCAddr=%RX64 limit=%x):\n", SelLdt, GCPtrLdt, cbLdt);
|
---|
639 | unsigned cLdts = (cbLdt + 1) >> X86_SEL_SHIFT;
|
---|
640 | for (unsigned iLdt = 0; iLdt < cLdts; iLdt++, GCPtrLdt += sizeof(X86DESC))
|
---|
641 | {
|
---|
642 | X86DESC LdtE;
|
---|
643 | int rc = PGMPhysSimpleReadGCPtr(pVCpu, &LdtE, GCPtrLdt, sizeof(LdtE));
|
---|
644 | if (RT_SUCCESS(rc))
|
---|
645 | {
|
---|
646 | if (LdtE.Gen.u1Present)
|
---|
647 | {
|
---|
648 | char szOutput[128];
|
---|
649 | selmR3FormatDescriptor(LdtE, (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, &szOutput[0], sizeof(szOutput));
|
---|
650 | pHlp->pfnPrintf(pHlp, "%s\n", szOutput);
|
---|
651 | }
|
---|
652 | }
|
---|
653 | else if (rc == VERR_PAGE_NOT_PRESENT)
|
---|
654 | {
|
---|
655 | if ((GCPtrLdt & GUEST_PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
|
---|
656 | pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%RGv)\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, GCPtrLdt);
|
---|
657 | }
|
---|
658 | else
|
---|
659 | pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%RGv\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, rc, GCPtrLdt);
|
---|
660 | }
|
---|
661 | NOREF(pszArgs);
|
---|
662 | }
|
---|
663 |
|
---|
664 |
|
---|
665 | /**
|
---|
666 | * Dumps the guest GDT
|
---|
667 | *
|
---|
668 | * @param pVM The cross context VM structure.
|
---|
669 | */
|
---|
670 | VMMR3DECL(void) SELMR3DumpGuestGDT(PVM pVM)
|
---|
671 | {
|
---|
672 | DBGFR3Info(pVM->pUVM, "gdt", NULL, NULL);
|
---|
673 | }
|
---|
674 |
|
---|
675 |
|
---|
676 | /**
|
---|
677 | * Dumps the guest LDT
|
---|
678 | *
|
---|
679 | * @param pVM The cross context VM structure.
|
---|
680 | */
|
---|
681 | VMMR3DECL(void) SELMR3DumpGuestLDT(PVM pVM)
|
---|
682 | {
|
---|
683 | DBGFR3Info(pVM->pUVM, "ldt", NULL, NULL);
|
---|
684 | }
|
---|
685 |
|
---|