VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPool.cpp@ 43363

Last change on this file since 43363 was 43163, checked in by vboxsync, 12 years ago

VMM: A wee bit page pool paranoia related to #6349.

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1/* $Id: PGMPool.cpp 43163 2012-09-04 14:12:53Z vboxsync $ */
2/** @file
3 * PGM Shadow Page Pool.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_pgm_pool PGM Shadow Page Pool
19 *
20 * Motivations:
21 * -# Relationship between shadow page tables and physical guest pages. This
22 * should allow us to skip most of the global flushes now following access
23 * handler changes. The main expense is flushing shadow pages.
24 * -# Limit the pool size if necessary (default is kind of limitless).
25 * -# Allocate shadow pages from RC. We use to only do this in SyncCR3.
26 * -# Required for 64-bit guests.
27 * -# Combining the PD cache and page pool in order to simplify caching.
28 *
29 *
30 * @section sec_pgm_pool_outline Design Outline
31 *
32 * The shadow page pool tracks pages used for shadowing paging structures (i.e.
33 * page tables, page directory, page directory pointer table and page map
34 * level-4). Each page in the pool has an unique identifier. This identifier is
35 * used to link a guest physical page to a shadow PT. The identifier is a
36 * non-zero value and has a relativly low max value - say 14 bits. This makes it
37 * possible to fit it into the upper bits of the of the aHCPhys entries in the
38 * ram range.
39 *
40 * By restricting host physical memory to the first 48 bits (which is the
41 * announced physical memory range of the K8L chip (scheduled for 2008)), we
42 * can safely use the upper 16 bits for shadow page ID and reference counting.
43 *
44 * Update: The 48 bit assumption will be lifted with the new physical memory
45 * management (PGMPAGE), so we won't have any trouble when someone stuffs 2TB
46 * into a box in some years.
47 *
48 * Now, it's possible for a page to be aliased, i.e. mapped by more than one PT
49 * or PD. This is solved by creating a list of physical cross reference extents
50 * when ever this happens. Each node in the list (extent) is can contain 3 page
51 * pool indexes. The list it self is chained using indexes into the paPhysExt
52 * array.
53 *
54 *
55 * @section sec_pgm_pool_life Life Cycle of a Shadow Page
56 *
57 * -# The SyncPT function requests a page from the pool.
58 * The request includes the kind of page it is (PT/PD, PAE/legacy), the
59 * address of the page it's shadowing, and more.
60 * -# The pool responds to the request by allocating a new page.
61 * When the cache is enabled, it will first check if it's in the cache.
62 * Should the pool be exhausted, one of two things can be done:
63 * -# Flush the whole pool and current CR3.
64 * -# Use the cache to find a page which can be flushed (~age).
65 * -# The SyncPT function will sync one or more pages and insert it into the
66 * shadow PD.
67 * -# The SyncPage function may sync more pages on a later \#PFs.
68 * -# The page is freed / flushed in SyncCR3 (perhaps) and some other cases.
69 * When caching is enabled, the page isn't flush but remains in the cache.
70 *
71 *
72 * @section sec_pgm_pool_impl Monitoring
73 *
74 * We always monitor PAGE_SIZE chunks of memory. When we've got multiple shadow
75 * pages for the same PAGE_SIZE of guest memory (PAE and mixed PD/PT) the pages
76 * sharing the monitor get linked using the iMonitoredNext/Prev. The head page
77 * is the pvUser to the access handlers.
78 *
79 *
80 * @section sec_pgm_pool_impl Implementation
81 *
82 * The pool will take pages from the MM page pool. The tracking data
83 * (attributes, bitmaps and so on) are allocated from the hypervisor heap. The
84 * pool content can be accessed both by using the page id and the physical
85 * address (HC). The former is managed by means of an array, the latter by an
86 * offset based AVL tree.
87 *
88 * Flushing of a pool page means that we iterate the content (we know what kind
89 * it is) and updates the link information in the ram range.
90 *
91 * ...
92 */
93
94
95/*******************************************************************************
96* Header Files *
97*******************************************************************************/
98#define LOG_GROUP LOG_GROUP_PGM_POOL
99#include <VBox/vmm/pgm.h>
100#include <VBox/vmm/mm.h>
101#include "PGMInternal.h"
102#include <VBox/vmm/vm.h>
103#include "PGMInline.h"
104
105#include <VBox/log.h>
106#include <VBox/err.h>
107#include <iprt/asm.h>
108#include <iprt/string.h>
109#include <VBox/dbg.h>
110
111
112/*******************************************************************************
113* Internal Functions *
114*******************************************************************************/
115static DECLCALLBACK(int) pgmR3PoolAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
116#ifdef VBOX_WITH_DEBUGGER
117static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs);
118#endif
119
120#ifdef VBOX_WITH_DEBUGGER
121/** Command descriptors. */
122static const DBGCCMD g_aCmds[] =
123{
124 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
125 { "pgmpoolcheck", 0, 0, NULL, 0, 0, pgmR3PoolCmdCheck, "", "Check the pgm pool pages." },
126};
127#endif
128
129/**
130 * Initializes the pool
131 *
132 * @returns VBox status code.
133 * @param pVM Pointer to the VM.
134 */
135int pgmR3PoolInit(PVM pVM)
136{
137 int rc;
138
139 AssertCompile(NIL_PGMPOOL_IDX == 0);
140 /* pPage->cLocked is an unsigned byte. */
141 AssertCompile(VMM_MAX_CPU_COUNT <= 255);
142
143 /*
144 * Query Pool config.
145 */
146 PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM/Pool");
147
148 /* Default pgm pool size is 1024 pages (4MB). */
149 uint16_t cMaxPages = 1024;
150
151 /* Adjust it up relative to the RAM size, using the nested paging formula. */
152 uint64_t cbRam;
153 rc = CFGMR3QueryU64Def(CFGMR3GetRoot(pVM), "RamSize", &cbRam, 0); AssertRCReturn(rc, rc);
154 uint64_t u64MaxPages = (cbRam >> 9)
155 + (cbRam >> 18)
156 + (cbRam >> 27)
157 + 32 * PAGE_SIZE;
158 u64MaxPages >>= PAGE_SHIFT;
159 if (u64MaxPages > PGMPOOL_IDX_LAST)
160 cMaxPages = PGMPOOL_IDX_LAST;
161 else
162 cMaxPages = (uint16_t)u64MaxPages;
163
164 /** @cfgm{/PGM/Pool/MaxPages, uint16_t, #pages, 16, 0x3fff, F(ram-size)}
165 * The max size of the shadow page pool in pages. The pool will grow dynamically
166 * up to this limit.
167 */
168 rc = CFGMR3QueryU16Def(pCfg, "MaxPages", &cMaxPages, cMaxPages);
169 AssertLogRelRCReturn(rc, rc);
170 AssertLogRelMsgReturn(cMaxPages <= PGMPOOL_IDX_LAST && cMaxPages >= RT_ALIGN(PGMPOOL_IDX_FIRST, 16),
171 ("cMaxPages=%u (%#x)\n", cMaxPages, cMaxPages), VERR_INVALID_PARAMETER);
172 cMaxPages = RT_ALIGN(cMaxPages, 16);
173 if (cMaxPages > PGMPOOL_IDX_LAST)
174 cMaxPages = PGMPOOL_IDX_LAST;
175 LogRel(("PGMPool: cMaxPages=%u (u64MaxPages=%llu)\n", cMaxPages, u64MaxPages));
176
177 /** todo:
178 * We need to be much more careful with our allocation strategy here.
179 * For nested paging we don't need pool user info nor extents at all, but
180 * we can't check for nested paging here (too early during init to get a
181 * confirmation it can be used). The default for large memory configs is a
182 * bit large for shadow paging, so I've restricted the extent maximum to 8k
183 * (8k * 16 = 128k of hyper heap).
184 *
185 * Also when large page support is enabled, we typically don't need so much,
186 * although that depends on the availability of 2 MB chunks on the host.
187 */
188
189 /** @cfgm{/PGM/Pool/MaxUsers, uint16_t, #users, MaxUsers, 32K, MaxPages*2}
190 * The max number of shadow page user tracking records. Each shadow page has
191 * zero of other shadow pages (or CR3s) that references it, or uses it if you
192 * like. The structures describing these relationships are allocated from a
193 * fixed sized pool. This configuration variable defines the pool size.
194 */
195 uint16_t cMaxUsers;
196 rc = CFGMR3QueryU16Def(pCfg, "MaxUsers", &cMaxUsers, cMaxPages * 2);
197 AssertLogRelRCReturn(rc, rc);
198 AssertLogRelMsgReturn(cMaxUsers >= cMaxPages && cMaxPages <= _32K,
199 ("cMaxUsers=%u (%#x)\n", cMaxUsers, cMaxUsers), VERR_INVALID_PARAMETER);
200
201 /** @cfgm{/PGM/Pool/MaxPhysExts, uint16_t, #extents, 16, MaxPages * 2, MIN(MaxPages*2,8192)}
202 * The max number of extents for tracking aliased guest pages.
203 */
204 uint16_t cMaxPhysExts;
205 rc = CFGMR3QueryU16Def(pCfg, "MaxPhysExts", &cMaxPhysExts,
206 RT_MIN(cMaxPages * 2, 8192 /* 8Ki max as this eat too much hyper heap */));
207 AssertLogRelRCReturn(rc, rc);
208 AssertLogRelMsgReturn(cMaxPhysExts >= 16 && cMaxPhysExts <= PGMPOOL_IDX_LAST,
209 ("cMaxPhysExts=%u (%#x)\n", cMaxPhysExts, cMaxPhysExts), VERR_INVALID_PARAMETER);
210
211 /** @cfgm{/PGM/Pool/ChacheEnabled, bool, true}
212 * Enables or disabling caching of shadow pages. Caching means that we will try
213 * reuse shadow pages instead of recreating them everything SyncCR3, SyncPT or
214 * SyncPage requests one. When reusing a shadow page, we can save time
215 * reconstructing it and it's children.
216 */
217 bool fCacheEnabled;
218 rc = CFGMR3QueryBoolDef(pCfg, "CacheEnabled", &fCacheEnabled, true);
219 AssertLogRelRCReturn(rc, rc);
220
221 LogRel(("pgmR3PoolInit: cMaxPages=%#RX16 cMaxUsers=%#RX16 cMaxPhysExts=%#RX16 fCacheEnable=%RTbool\n",
222 cMaxPages, cMaxUsers, cMaxPhysExts, fCacheEnabled));
223
224 /*
225 * Allocate the data structures.
226 */
227 uint32_t cb = RT_OFFSETOF(PGMPOOL, aPages[cMaxPages]);
228 cb += cMaxUsers * sizeof(PGMPOOLUSER);
229 cb += cMaxPhysExts * sizeof(PGMPOOLPHYSEXT);
230 PPGMPOOL pPool;
231 rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PGM_POOL, (void **)&pPool);
232 if (RT_FAILURE(rc))
233 return rc;
234 pVM->pgm.s.pPoolR3 = pPool;
235 pVM->pgm.s.pPoolR0 = MMHyperR3ToR0(pVM, pPool);
236 pVM->pgm.s.pPoolRC = MMHyperR3ToRC(pVM, pPool);
237
238 /*
239 * Initialize it.
240 */
241 pPool->pVMR3 = pVM;
242 pPool->pVMR0 = pVM->pVMR0;
243 pPool->pVMRC = pVM->pVMRC;
244 pPool->cMaxPages = cMaxPages;
245 pPool->cCurPages = PGMPOOL_IDX_FIRST;
246 pPool->iUserFreeHead = 0;
247 pPool->cMaxUsers = cMaxUsers;
248 PPGMPOOLUSER paUsers = (PPGMPOOLUSER)&pPool->aPages[pPool->cMaxPages];
249 pPool->paUsersR3 = paUsers;
250 pPool->paUsersR0 = MMHyperR3ToR0(pVM, paUsers);
251 pPool->paUsersRC = MMHyperR3ToRC(pVM, paUsers);
252 for (unsigned i = 0; i < cMaxUsers; i++)
253 {
254 paUsers[i].iNext = i + 1;
255 paUsers[i].iUser = NIL_PGMPOOL_IDX;
256 paUsers[i].iUserTable = 0xfffffffe;
257 }
258 paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
259 pPool->iPhysExtFreeHead = 0;
260 pPool->cMaxPhysExts = cMaxPhysExts;
261 PPGMPOOLPHYSEXT paPhysExts = (PPGMPOOLPHYSEXT)&paUsers[cMaxUsers];
262 pPool->paPhysExtsR3 = paPhysExts;
263 pPool->paPhysExtsR0 = MMHyperR3ToR0(pVM, paPhysExts);
264 pPool->paPhysExtsRC = MMHyperR3ToRC(pVM, paPhysExts);
265 for (unsigned i = 0; i < cMaxPhysExts; i++)
266 {
267 paPhysExts[i].iNext = i + 1;
268 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
269 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
270 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
271 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
272 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
273 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
274 }
275 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
276 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
277 pPool->aiHash[i] = NIL_PGMPOOL_IDX;
278 pPool->iAgeHead = NIL_PGMPOOL_IDX;
279 pPool->iAgeTail = NIL_PGMPOOL_IDX;
280 pPool->fCacheEnabled = fCacheEnabled;
281 pPool->pfnAccessHandlerR3 = pgmR3PoolAccessHandler;
282 pPool->pszAccessHandler = "Guest Paging Access Handler";
283 pPool->HCPhysTree = 0;
284
285 /* The NIL entry. */
286 Assert(NIL_PGMPOOL_IDX == 0);
287 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
288 pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX;
289
290 /* The Shadow 32-bit PD. (32 bits guest paging) */
291 pPool->aPages[PGMPOOL_IDX_PD].enmKind = PGMPOOLKIND_32BIT_PD;
292 pPool->aPages[PGMPOOL_IDX_PD].idx = PGMPOOL_IDX_PD;
293
294 /* The Shadow PDPT. */
295 pPool->aPages[PGMPOOL_IDX_PDPT].enmKind = PGMPOOLKIND_PAE_PDPT;
296 pPool->aPages[PGMPOOL_IDX_PDPT].idx = PGMPOOL_IDX_PDPT;
297
298 /* The Shadow AMD64 CR3. */
299 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind = PGMPOOLKIND_64BIT_PML4;
300 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].idx = PGMPOOL_IDX_AMD64_CR3;
301
302 /* The Nested Paging CR3. */
303 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].enmKind = PGMPOOLKIND_ROOT_NESTED;
304 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].idx = PGMPOOL_IDX_NESTED_ROOT;
305
306 /*
307 * Set common stuff.
308 */
309 for (unsigned iPage = 0; iPage < PGMPOOL_IDX_FIRST; iPage++)
310 {
311 pPool->aPages[iPage].Core.Key = NIL_RTHCPHYS;
312 pPool->aPages[iPage].GCPhys = NIL_RTGCPHYS;
313 pPool->aPages[iPage].iNext = NIL_PGMPOOL_IDX;
314 /* pPool->aPages[iPage].cLocked = INT32_MAX; - test this out... */
315 pPool->aPages[iPage].pvPageR3 = 0;
316 pPool->aPages[iPage].iUserHead = NIL_PGMPOOL_USER_INDEX;
317 pPool->aPages[iPage].iModifiedNext = NIL_PGMPOOL_IDX;
318 pPool->aPages[iPage].iModifiedPrev = NIL_PGMPOOL_IDX;
319 pPool->aPages[iPage].iMonitoredNext = NIL_PGMPOOL_IDX;
320 pPool->aPages[iPage].iMonitoredNext = NIL_PGMPOOL_IDX;
321 pPool->aPages[iPage].iAgeNext = NIL_PGMPOOL_IDX;
322 pPool->aPages[iPage].iAgePrev = NIL_PGMPOOL_IDX;
323
324 Assert(pPool->aPages[iPage].idx == iPage);
325 Assert(pPool->aPages[iPage].GCPhys == NIL_RTGCPHYS);
326 Assert(!pPool->aPages[iPage].fSeenNonGlobal);
327 Assert(!pPool->aPages[iPage].fMonitored);
328 Assert(!pPool->aPages[iPage].fCached);
329 Assert(!pPool->aPages[iPage].fZeroed);
330 Assert(!pPool->aPages[iPage].fReusedFlushPending);
331 }
332
333#ifdef VBOX_WITH_STATISTICS
334 /*
335 * Register statistics.
336 */
337 STAM_REG(pVM, &pPool->cCurPages, STAMTYPE_U16, "/PGM/Pool/cCurPages", STAMUNIT_PAGES, "Current pool size.");
338 STAM_REG(pVM, &pPool->cMaxPages, STAMTYPE_U16, "/PGM/Pool/cMaxPages", STAMUNIT_PAGES, "Max pool size.");
339 STAM_REG(pVM, &pPool->cUsedPages, STAMTYPE_U16, "/PGM/Pool/cUsedPages", STAMUNIT_PAGES, "The number of pages currently in use.");
340 STAM_REG(pVM, &pPool->cUsedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/cUsedPagesHigh", STAMUNIT_PAGES, "The high watermark for cUsedPages.");
341 STAM_REG(pVM, &pPool->StatAlloc, STAMTYPE_PROFILE_ADV, "/PGM/Pool/Alloc", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolAlloc.");
342 STAM_REG(pVM, &pPool->StatClearAll, STAMTYPE_PROFILE, "/PGM/Pool/ClearAll", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolClearAll.");
343 STAM_REG(pVM, &pPool->StatR3Reset, STAMTYPE_PROFILE, "/PGM/Pool/R3Reset", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolReset.");
344 STAM_REG(pVM, &pPool->StatFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFlushPage.");
345 STAM_REG(pVM, &pPool->StatFree, STAMTYPE_PROFILE, "/PGM/Pool/Free", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFree.");
346 STAM_REG(pVM, &pPool->StatForceFlushPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForce", STAMUNIT_OCCURENCES, "Counting explicit flushes by PGMPoolFlushPage().");
347 STAM_REG(pVM, &pPool->StatForceFlushDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForceDirty", STAMUNIT_OCCURENCES, "Counting explicit flushes of dirty pages by PGMPoolFlushPage().");
348 STAM_REG(pVM, &pPool->StatForceFlushReused, STAMTYPE_COUNTER, "/PGM/Pool/FlushReused", STAMUNIT_OCCURENCES, "Counting flushes for reused pages.");
349 STAM_REG(pVM, &pPool->StatZeroPage, STAMTYPE_PROFILE, "/PGM/Pool/ZeroPage", STAMUNIT_TICKS_PER_CALL, "Profiling time spent zeroing pages. Overlaps with Alloc.");
350 STAM_REG(pVM, &pPool->cMaxUsers, STAMTYPE_U16, "/PGM/Pool/Track/cMaxUsers", STAMUNIT_COUNT, "Max user tracking records.");
351 STAM_REG(pVM, &pPool->cPresent, STAMTYPE_U32, "/PGM/Pool/Track/cPresent", STAMUNIT_COUNT, "Number of present page table entries.");
352 STAM_REG(pVM, &pPool->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Pool/Track/Deref", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackDeref.");
353 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPT, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPT", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPT.");
354 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTs, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTs", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTs.");
355 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTsSlow, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTsSlow", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTsSlow.");
356 STAM_REG(pVM, &pPool->StatTrackFlushEntry, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Flush", STAMUNIT_COUNT, "Nr of flushed entries.");
357 STAM_REG(pVM, &pPool->StatTrackFlushEntryKeep, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Update", STAMUNIT_COUNT, "Nr of updated entries.");
358 STAM_REG(pVM, &pPool->StatTrackFreeUpOneUser, STAMTYPE_COUNTER, "/PGM/Pool/Track/FreeUpOneUser", STAMUNIT_TICKS_PER_CALL, "The number of times we were out of user tracking records.");
359 STAM_REG(pVM, &pPool->StatTrackDerefGCPhys, STAMTYPE_PROFILE, "/PGM/Pool/Track/DrefGCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling deref activity related tracking GC physical pages.");
360 STAM_REG(pVM, &pPool->StatTrackLinearRamSearches, STAMTYPE_COUNTER, "/PGM/Pool/Track/LinearRamSearches", STAMUNIT_OCCURENCES, "The number of times we had to do linear ram searches.");
361 STAM_REG(pVM, &pPool->StamTrackPhysExtAllocFailures,STAMTYPE_COUNTER, "/PGM/Pool/Track/PhysExtAllocFailures", STAMUNIT_OCCURENCES, "The number of failing pgmPoolTrackPhysExtAlloc calls.");
362 STAM_REG(pVM, &pPool->StatMonitorRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 access handler.");
363 STAM_REG(pVM, &pPool->StatMonitorRZEmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
364 STAM_REG(pVM, &pPool->StatMonitorRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the RC/R0 access handler.");
365 STAM_REG(pVM, &pPool->StatMonitorRZFlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
366 STAM_REG(pVM, &pPool->StatMonitorRZFlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
367 STAM_REG(pVM, &pPool->StatMonitorRZFork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
368 STAM_REG(pVM, &pPool->StatMonitorRZHandled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 access we've handled (except REP STOSD).");
369 STAM_REG(pVM, &pPool->StatMonitorRZIntrFailPatch1, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IntrFailPatch1", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction.");
370 STAM_REG(pVM, &pPool->StatMonitorRZIntrFailPatch2, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IntrFailPatch2", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction during flushing.");
371 STAM_REG(pVM, &pPool->StatMonitorRZRepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
372 STAM_REG(pVM, &pPool->StatMonitorRZRepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
373 STAM_REG(pVM, &pPool->StatMonitorRZFaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
374 STAM_REG(pVM, &pPool->StatMonitorRZFaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
375 STAM_REG(pVM, &pPool->StatMonitorRZFaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
376 STAM_REG(pVM, &pPool->StatMonitorRZFaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
377 STAM_REG(pVM, &pPool->StatMonitorR3, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access handler.");
378 STAM_REG(pVM, &pPool->StatMonitorR3EmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
379 STAM_REG(pVM, &pPool->StatMonitorR3FlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the R3 access handler.");
380 STAM_REG(pVM, &pPool->StatMonitorR3FlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
381 STAM_REG(pVM, &pPool->StatMonitorR3FlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
382 STAM_REG(pVM, &pPool->StatMonitorR3Fork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
383 STAM_REG(pVM, &pPool->StatMonitorR3Handled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access we've handled (except REP STOSD).");
384 STAM_REG(pVM, &pPool->StatMonitorR3RepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
385 STAM_REG(pVM, &pPool->StatMonitorR3RepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
386 STAM_REG(pVM, &pPool->StatMonitorR3FaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
387 STAM_REG(pVM, &pPool->StatMonitorR3FaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
388 STAM_REG(pVM, &pPool->StatMonitorR3FaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
389 STAM_REG(pVM, &pPool->StatMonitorR3FaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
390 STAM_REG(pVM, &pPool->StatMonitorR3Async, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Async", STAMUNIT_OCCURENCES, "Times we're called in an async thread and need to flush.");
391 STAM_REG(pVM, &pPool->cModifiedPages, STAMTYPE_U16, "/PGM/Pool/Monitor/cModifiedPages", STAMUNIT_PAGES, "The current cModifiedPages value.");
392 STAM_REG(pVM, &pPool->cModifiedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/Monitor/cModifiedPagesHigh", STAMUNIT_PAGES, "The high watermark for cModifiedPages.");
393 STAM_REG(pVM, &pPool->StatResetDirtyPages, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Resets", STAMUNIT_OCCURENCES, "Times we've called pgmPoolResetDirtyPages (and there were dirty page).");
394 STAM_REG(pVM, &pPool->StatDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Pages", STAMUNIT_OCCURENCES, "Times we've called pgmPoolAddDirtyPage.");
395 STAM_REG(pVM, &pPool->StatDirtyPageDupFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushDup", STAMUNIT_OCCURENCES, "Times we've had to flush duplicates for dirty page management.");
396 STAM_REG(pVM, &pPool->StatDirtyPageOverFlowFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushOverflow",STAMUNIT_OCCURENCES, "Times we've had to flush because of overflow.");
397 STAM_REG(pVM, &pPool->StatCacheHits, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Hits", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls satisfied by the cache.");
398 STAM_REG(pVM, &pPool->StatCacheMisses, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Misses", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls not statisfied by the cache.");
399 STAM_REG(pVM, &pPool->StatCacheKindMismatches, STAMTYPE_COUNTER, "/PGM/Pool/Cache/KindMismatches", STAMUNIT_OCCURENCES, "The number of shadow page kind mismatches. (Better be low, preferably 0!)");
400 STAM_REG(pVM, &pPool->StatCacheFreeUpOne, STAMTYPE_COUNTER, "/PGM/Pool/Cache/FreeUpOne", STAMUNIT_OCCURENCES, "The number of times the cache was asked to free up a page.");
401 STAM_REG(pVM, &pPool->StatCacheCacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Cacheable", STAMUNIT_OCCURENCES, "The number of cacheable allocations.");
402 STAM_REG(pVM, &pPool->StatCacheUncacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Uncacheable", STAMUNIT_OCCURENCES, "The number of uncacheable allocations.");
403#endif /* VBOX_WITH_STATISTICS */
404
405#ifdef VBOX_WITH_DEBUGGER
406 /*
407 * Debugger commands.
408 */
409 static bool s_fRegisteredCmds = false;
410 if (!s_fRegisteredCmds)
411 {
412 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
413 if (RT_SUCCESS(rc))
414 s_fRegisteredCmds = true;
415 }
416#endif
417
418 return VINF_SUCCESS;
419}
420
421
422/**
423 * Relocate the page pool data.
424 *
425 * @param pVM Pointer to the VM.
426 */
427void pgmR3PoolRelocate(PVM pVM)
428{
429 pVM->pgm.s.pPoolRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3);
430 pVM->pgm.s.pPoolR3->pVMRC = pVM->pVMRC;
431 pVM->pgm.s.pPoolR3->paUsersRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3->paUsersR3);
432 pVM->pgm.s.pPoolR3->paPhysExtsRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3->paPhysExtsR3);
433 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerRC);
434 AssertReleaseRC(rc);
435 /* init order hack. */
436 if (!pVM->pgm.s.pPoolR3->pfnAccessHandlerR0)
437 {
438 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerR0);
439 AssertReleaseRC(rc);
440 }
441}
442
443
444/**
445 * Grows the shadow page pool.
446 *
447 * I.e. adds more pages to it, assuming that hasn't reached cMaxPages yet.
448 *
449 * @returns VBox status code.
450 * @param pVM Pointer to the VM.
451 */
452VMMR3DECL(int) PGMR3PoolGrow(PVM pVM)
453{
454 PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
455 AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY);
456
457 /* With 32-bit guests and no EPT, the CR3 limits the root pages to low
458 (below 4 GB) memory. */
459 /** @todo change the pool to handle ROOT page allocations specially when
460 * required. */
461 bool fCanUseHighMemory = HWACCMIsNestedPagingActive(pVM)
462 && HWACCMGetShwPagingMode(pVM) == PGMMODE_EPT;
463
464 pgmLock(pVM);
465
466 /*
467 * How much to grow it by?
468 */
469 uint32_t cPages = pPool->cMaxPages - pPool->cCurPages;
470 cPages = RT_MIN(PGMPOOL_CFG_MAX_GROW, cPages);
471 LogFlow(("PGMR3PoolGrow: Growing the pool by %d (%#x) pages. fCanUseHighMemory=%RTbool\n", cPages, cPages, fCanUseHighMemory));
472
473 for (unsigned i = pPool->cCurPages; cPages-- > 0; i++)
474 {
475 PPGMPOOLPAGE pPage = &pPool->aPages[i];
476
477 if (fCanUseHighMemory)
478 pPage->pvPageR3 = MMR3PageAlloc(pVM);
479 else
480 pPage->pvPageR3 = MMR3PageAllocLow(pVM);
481 if (!pPage->pvPageR3)
482 {
483 Log(("We're out of memory!! i=%d fCanUseHighMemory=%RTbool\n", i, fCanUseHighMemory));
484 pgmUnlock(pVM);
485 return i ? VINF_SUCCESS : VERR_NO_PAGE_MEMORY;
486 }
487 pPage->Core.Key = MMPage2Phys(pVM, pPage->pvPageR3);
488 AssertFatal(pPage->Core.Key < _4G || fCanUseHighMemory);
489 pPage->GCPhys = NIL_RTGCPHYS;
490 pPage->enmKind = PGMPOOLKIND_FREE;
491 pPage->idx = pPage - &pPool->aPages[0];
492 LogFlow(("PGMR3PoolGrow: insert page #%#x - %RHp\n", pPage->idx, pPage->Core.Key));
493 pPage->iNext = pPool->iFreeHead;
494 pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
495 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
496 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
497 pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
498 pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
499 pPage->iAgeNext = NIL_PGMPOOL_IDX;
500 pPage->iAgePrev = NIL_PGMPOOL_IDX;
501 /* commit it */
502 bool fRc = RTAvloHCPhysInsert(&pPool->HCPhysTree, &pPage->Core); Assert(fRc); NOREF(fRc);
503 pPool->iFreeHead = i;
504 pPool->cCurPages = i + 1;
505 }
506
507 pgmUnlock(pVM);
508 Assert(pPool->cCurPages <= pPool->cMaxPages);
509 return VINF_SUCCESS;
510}
511
512
513
514/**
515 * Worker used by pgmR3PoolAccessHandler when it's invoked by an async thread.
516 *
517 * @param pPool The pool.
518 * @param pPage The page.
519 */
520static DECLCALLBACK(void) pgmR3PoolFlushReusedPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
521{
522 /* for the present this should be safe enough I think... */
523 pgmLock(pPool->pVMR3);
524 if ( pPage->fReusedFlushPending
525 && pPage->enmKind != PGMPOOLKIND_FREE)
526 pgmPoolFlushPage(pPool, pPage);
527 pgmUnlock(pPool->pVMR3);
528}
529
530
531/**
532 * \#PF Handler callback for PT write accesses.
533 *
534 * The handler can not raise any faults, it's mainly for monitoring write access
535 * to certain pages.
536 *
537 * @returns VINF_SUCCESS if the handler has carried out the operation.
538 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
539 * @param pVM Pointer to the VM.
540 * @param GCPhys The physical address the guest is writing to.
541 * @param pvPhys The HC mapping of that address.
542 * @param pvBuf What the guest is reading/writing.
543 * @param cbBuf How much it's reading/writing.
544 * @param enmAccessType The access type.
545 * @param pvUser User argument.
546 */
547static DECLCALLBACK(int) pgmR3PoolAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
548 PGMACCESSTYPE enmAccessType, void *pvUser)
549{
550 STAM_PROFILE_START(&pVM->pgm.s.pPoolR3->StatMonitorR3, a);
551 PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
552 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser;
553 PVMCPU pVCpu = VMMGetCpu(pVM);
554 LogFlow(("pgmR3PoolAccessHandler: GCPhys=%RGp %p:{.Core=%RHp, .idx=%d, .GCPhys=%RGp, .enmType=%d}\n",
555 GCPhys, pPage, pPage->Core.Key, pPage->idx, pPage->GCPhys, pPage->enmKind));
556
557 NOREF(pvBuf); NOREF(enmAccessType);
558
559 /*
560 * We don't have to be very sophisticated about this since there are relativly few calls here.
561 * However, we must try our best to detect any non-cpu accesses (disk / networking).
562 *
563 * Just to make life more interesting, we'll have to deal with the async threads too.
564 * We cannot flush a page if we're in an async thread because of REM notifications.
565 */
566 pgmLock(pVM);
567 if (PHYS_PAGE_ADDRESS(GCPhys) != PHYS_PAGE_ADDRESS(pPage->GCPhys))
568 {
569 /* Pool page changed while we were waiting for the lock; ignore. */
570 Log(("CPU%d: pgmR3PoolAccessHandler pgm pool page for %RGp changed (to %RGp) while waiting!\n", pVCpu->idCpu, PHYS_PAGE_ADDRESS(GCPhys), PHYS_PAGE_ADDRESS(pPage->GCPhys)));
571 pgmUnlock(pVM);
572 return VINF_PGM_HANDLER_DO_DEFAULT;
573 }
574
575 Assert(pPage->enmKind != PGMPOOLKIND_FREE);
576
577 /* @todo this code doesn't make any sense. remove the if (!pVCpu) block */
578 if (!pVCpu) /** @todo This shouldn't happen any longer, all access handlers will be called on an EMT. All ring-3 handlers, except MMIO, already own the PGM lock. @bugref{3170} */
579 {
580 Log(("pgmR3PoolAccessHandler: async thread, requesting EMT to flush the page: %p:{.Core=%RHp, .idx=%d, .GCPhys=%RGp, .enmType=%d}\n",
581 pPage, pPage->Core.Key, pPage->idx, pPage->GCPhys, pPage->enmKind));
582 STAM_COUNTER_INC(&pPool->StatMonitorR3Async);
583 if (!pPage->fReusedFlushPending)
584 {
585 pgmUnlock(pVM);
586 int rc = VMR3ReqCallVoidNoWait(pPool->pVMR3, VMCPUID_ANY, (PFNRT)pgmR3PoolFlushReusedPage, 2, pPool, pPage);
587 AssertRCReturn(rc, rc);
588 pgmLock(pVM);
589 pPage->fReusedFlushPending = true;
590 pPage->cModifications += 0x1000;
591 }
592
593 pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhys, pvPhys, 0 /* unknown write size */);
594 /** @todo r=bird: making unsafe assumption about not crossing entries here! */
595 while (cbBuf > 4)
596 {
597 cbBuf -= 4;
598 pvPhys = (uint8_t *)pvPhys + 4;
599 GCPhys += 4;
600 pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhys, pvPhys, 0 /* unknown write size */);
601 }
602 STAM_PROFILE_STOP(&pPool->StatMonitorR3, a);
603 }
604 else if ( ( pPage->cModifications < 96 /* it's cheaper here. */
605 || pgmPoolIsPageLocked(pPage)
606 )
607 && cbBuf <= 4)
608 {
609 /* Clear the shadow entry. */
610 if (!pPage->cModifications++)
611 pgmPoolMonitorModifiedInsert(pPool, pPage);
612 /** @todo r=bird: making unsafe assumption about not crossing entries here! */
613 pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhys, pvPhys, 0 /* unknown write size */);
614 STAM_PROFILE_STOP(&pPool->StatMonitorR3, a);
615 }
616 else
617 {
618 pgmPoolMonitorChainFlush(pPool, pPage); /* ASSUME that VERR_PGM_POOL_CLEARED can be ignored here and that FFs will deal with it in due time. */
619 STAM_PROFILE_STOP_EX(&pPool->StatMonitorR3, &pPool->StatMonitorR3FlushPage, a);
620 }
621 pgmUnlock(pVM);
622 return VINF_PGM_HANDLER_DO_DEFAULT;
623}
624
625
626/**
627 * Rendezvous callback used by pgmR3PoolClearAll that clears all shadow pages
628 * and all modification counters.
629 *
630 * This is only called on one of the EMTs while the other ones are waiting for
631 * it to complete this function.
632 *
633 * @returns VINF_SUCCESS (VBox strict status code).
634 * @param pVM Pointer to the VM.
635 * @param pVCpu The VMCPU for the EMT we're being called on. Unused.
636 * @param fpvFlushRemTlb When not NULL, we'll flush the REM TLB as well.
637 * (This is the pvUser, so it has to be void *.)
638 *
639 */
640DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTbl)
641{
642 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
643 STAM_PROFILE_START(&pPool->StatClearAll, c);
644 NOREF(pVCpu);
645
646 pgmLock(pVM);
647 Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTbl=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTbl));
648
649 /*
650 * Iterate all the pages until we've encountered all that are in use.
651 * This is a simple but not quite optimal solution.
652 */
653 unsigned cModifiedPages = 0; NOREF(cModifiedPages);
654 unsigned cLeft = pPool->cUsedPages;
655 uint32_t iPage = pPool->cCurPages;
656 while (--iPage >= PGMPOOL_IDX_FIRST)
657 {
658 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
659 if (pPage->GCPhys != NIL_RTGCPHYS)
660 {
661 switch (pPage->enmKind)
662 {
663 /*
664 * We only care about shadow page tables that reference physical memory
665 */
666#ifdef PGM_WITH_LARGE_PAGES
667 case PGMPOOLKIND_EPT_PD_FOR_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
668 if (pPage->cPresent)
669 {
670 PX86PDPAE pShwPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
671 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
672 {
673 if ( pShwPD->a[i].n.u1Present
674 && pShwPD->a[i].b.u1Size)
675 {
676 Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
677 pShwPD->a[i].u = 0;
678 Assert(pPage->cPresent);
679 pPage->cPresent--;
680 }
681 }
682 if (pPage->cPresent == 0)
683 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
684 }
685 goto default_case;
686
687 case PGMPOOLKIND_PAE_PD_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
688 if (pPage->cPresent)
689 {
690 PEPTPD pShwPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
691 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
692 {
693 Assert((pShwPD->a[i].u & UINT64_C(0xfff0000000000f80)) == 0);
694 if ( pShwPD->a[i].n.u1Present
695 && pShwPD->a[i].b.u1Size)
696 {
697 Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
698 pShwPD->a[i].u = 0;
699 Assert(pPage->cPresent);
700 pPage->cPresent--;
701 }
702 }
703 if (pPage->cPresent == 0)
704 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
705 }
706 goto default_case;
707#endif /* PGM_WITH_LARGE_PAGES */
708
709 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
710 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
711 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
712 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
713 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
714 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
715 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
716 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
717 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
718 {
719 if (pPage->cPresent)
720 {
721 void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
722 STAM_PROFILE_START(&pPool->StatZeroPage, z);
723#if 0
724 /* Useful check for leaking references; *very* expensive though. */
725 switch (pPage->enmKind)
726 {
727 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
728 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
729 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
730 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
731 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
732 {
733 bool fFoundFirst = false;
734 PPGMSHWPTPAE pPT = (PPGMSHWPTPAE)pvShw;
735 for (unsigned ptIndex = 0; ptIndex < RT_ELEMENTS(pPT->a); ptIndex++)
736 {
737 if (pPT->a[ptIndex].u)
738 {
739 if (!fFoundFirst)
740 {
741 AssertFatalMsg(pPage->iFirstPresent <= ptIndex, ("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
742 if (pPage->iFirstPresent != ptIndex)
743 Log(("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
744 fFoundFirst = true;
745 }
746 if (PGMSHWPTEPAE_IS_P(pPT->a[ptIndex]))
747 {
748 pgmPoolTracDerefGCPhysHint(pPool, pPage, PGMSHWPTEPAE_GET_HCPHYS(pPT->a[ptIndex]), NIL_RTGCPHYS);
749 if (pPage->iFirstPresent == ptIndex)
750 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
751 }
752 }
753 }
754 AssertFatalMsg(pPage->cPresent == 0, ("cPresent = %d pPage = %RGv\n", pPage->cPresent, pPage->GCPhys));
755 break;
756 }
757 default:
758 break;
759 }
760#endif
761 ASMMemZeroPage(pvShw);
762 STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
763 pPage->cPresent = 0;
764 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
765 }
766 }
767 /* fall thru */
768
769#ifdef PGM_WITH_LARGE_PAGES
770 default_case:
771#endif
772 default:
773 Assert(!pPage->cModifications || ++cModifiedPages);
774 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
775 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
776 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
777 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
778 pPage->cModifications = 0;
779 break;
780
781 }
782 if (!--cLeft)
783 break;
784 }
785 }
786
787 /* swipe the special pages too. */
788 for (iPage = PGMPOOL_IDX_FIRST_SPECIAL; iPage < PGMPOOL_IDX_FIRST; iPage++)
789 {
790 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
791 if (pPage->GCPhys != NIL_RTGCPHYS)
792 {
793 Assert(!pPage->cModifications || ++cModifiedPages);
794 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
795 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
796 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
797 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
798 pPage->cModifications = 0;
799 }
800 }
801
802#ifndef DEBUG_michael
803 AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
804#endif
805 pPool->iModifiedHead = NIL_PGMPOOL_IDX;
806 pPool->cModifiedPages = 0;
807
808 /*
809 * Clear all the GCPhys links and rebuild the phys ext free list.
810 */
811 for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRangesX);
812 pRam;
813 pRam = pRam->CTX_SUFF(pNext))
814 {
815 iPage = pRam->cb >> PAGE_SHIFT;
816 while (iPage-- > 0)
817 PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
818 }
819
820 pPool->iPhysExtFreeHead = 0;
821 PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
822 const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
823 for (unsigned i = 0; i < cMaxPhysExts; i++)
824 {
825 paPhysExts[i].iNext = i + 1;
826 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
827 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
828 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
829 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
830 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
831 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
832 }
833 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
834
835
836#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
837 /* Reset all dirty pages to reactivate the page monitoring. */
838 /* Note: we must do this *after* clearing all page references and shadow page tables as there might be stale references to
839 * recently removed MMIO ranges around that might otherwise end up asserting in pgmPoolTracDerefGCPhysHint
840 */
841 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
842 {
843 PPGMPOOLPAGE pPage;
844 unsigned idxPage;
845
846 if (pPool->aDirtyPages[i].uIdx == NIL_PGMPOOL_IDX)
847 continue;
848
849 idxPage = pPool->aDirtyPages[i].uIdx;
850 AssertRelease(idxPage != NIL_PGMPOOL_IDX);
851 pPage = &pPool->aPages[idxPage];
852 Assert(pPage->idx == idxPage);
853 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
854
855 AssertMsg(pPage->fDirty, ("Page %RGp (slot=%d) not marked dirty!", pPage->GCPhys, i));
856
857 Log(("Reactivate dirty page %RGp\n", pPage->GCPhys));
858
859 /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
860 int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK);
861 AssertRCSuccess(rc);
862 pPage->fDirty = false;
863
864 pPool->aDirtyPages[i].uIdx = NIL_PGMPOOL_IDX;
865 }
866
867 /* Clear all dirty pages. */
868 pPool->idxFreeDirtyPage = 0;
869 pPool->cDirtyPages = 0;
870#endif
871
872 /* Clear the PGM_SYNC_CLEAR_PGM_POOL flag on all VCPUs to prevent redundant flushes. */
873 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
874 pVM->aCpus[idCpu].pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
875
876 /* Flush job finished. */
877 VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING);
878 pPool->cPresent = 0;
879 pgmUnlock(pVM);
880
881 PGM_INVL_ALL_VCPU_TLBS(pVM);
882
883 if (fpvFlushRemTbl)
884 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
885 CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
886
887 STAM_PROFILE_STOP(&pPool->StatClearAll, c);
888 return VINF_SUCCESS;
889}
890
891
892/**
893 * Clears the shadow page pool.
894 *
895 * @param pVM Pointer to the VM.
896 * @param fFlushRemTlb When set, the REM TLB is scheduled for flushing as
897 * well.
898 */
899void pgmR3PoolClearAll(PVM pVM, bool fFlushRemTlb)
900{
901 int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PoolClearAllRendezvous, &fFlushRemTlb);
902 AssertRC(rc);
903}
904
905
906/**
907 * Protect all pgm pool page table entries to monitor writes
908 *
909 * @param pVM Pointer to the VM.
910 *
911 * @remarks ASSUMES the caller will flush all TLBs!!
912 */
913void pgmR3PoolWriteProtectPages(PVM pVM)
914{
915 PGM_LOCK_ASSERT_OWNER(pVM);
916 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
917 unsigned cLeft = pPool->cUsedPages;
918 unsigned iPage = pPool->cCurPages;
919 while (--iPage >= PGMPOOL_IDX_FIRST)
920 {
921 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
922 if ( pPage->GCPhys != NIL_RTGCPHYS
923 && pPage->cPresent)
924 {
925 union
926 {
927 void *pv;
928 PX86PT pPT;
929 PPGMSHWPTPAE pPTPae;
930 PEPTPT pPTEpt;
931 } uShw;
932 uShw.pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
933
934 switch (pPage->enmKind)
935 {
936 /*
937 * We only care about shadow page tables.
938 */
939 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
940 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
941 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
942 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPT->a); iShw++)
943 {
944 if (uShw.pPT->a[iShw].n.u1Present)
945 uShw.pPT->a[iShw].n.u1Write = 0;
946 }
947 break;
948
949 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
950 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
951 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
952 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
953 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
954 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTPae->a); iShw++)
955 {
956 if (PGMSHWPTEPAE_IS_P(uShw.pPTPae->a[iShw]))
957 PGMSHWPTEPAE_SET_RO(uShw.pPTPae->a[iShw]);
958 }
959 break;
960
961 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
962 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTEpt->a); iShw++)
963 {
964 if (uShw.pPTEpt->a[iShw].n.u1Present)
965 uShw.pPTEpt->a[iShw].n.u1Write = 0;
966 }
967 break;
968
969 default:
970 break;
971 }
972 if (!--cLeft)
973 break;
974 }
975 }
976}
977
978#ifdef VBOX_WITH_DEBUGGER
979/**
980 * The '.pgmpoolcheck' command.
981 *
982 * @returns VBox status.
983 * @param pCmd Pointer to the command descriptor (as registered).
984 * @param pCmdHlp Pointer to command helper functions.
985 * @param pVM Pointer to the current VM (if any).
986 * @param paArgs Pointer to (readonly) array of arguments.
987 * @param cArgs Number of arguments in the array.
988 */
989static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs)
990{
991 DBGC_CMDHLP_REQ_VM_RET(pCmdHlp, pCmd, pVM);
992 DBGC_CMDHLP_ASSERT_PARSER_RET(pCmdHlp, pCmd, -1, cArgs == 0);
993 uint32_t cErrors = 0;
994 NOREF(paArgs);
995
996 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
997 for (unsigned i = 0; i < pPool->cCurPages; i++)
998 {
999 PPGMPOOLPAGE pPage = &pPool->aPages[i];
1000 bool fFirstMsg = true;
1001
1002 /* Todo: cover other paging modes too. */
1003 if (pPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
1004 {
1005 PPGMSHWPTPAE pShwPT = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1006 {
1007 PX86PTPAE pGstPT;
1008 PGMPAGEMAPLOCK LockPage;
1009 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, pPage->GCPhys, (const void **)&pGstPT, &LockPage); AssertReleaseRC(rc);
1010
1011 /* Check if any PTEs are out of sync. */
1012 for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
1013 {
1014 if (PGMSHWPTEPAE_IS_P(pShwPT->a[j]))
1015 {
1016 RTHCPHYS HCPhys = NIL_RTHCPHYS;
1017 rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[j].u & X86_PTE_PAE_PG_MASK, &HCPhys);
1018 if ( rc != VINF_SUCCESS
1019 || PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[j]) != HCPhys)
1020 {
1021 if (fFirstMsg)
1022 {
1023 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
1024 fFirstMsg = false;
1025 }
1026 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch HCPhys: rc=%Rrc idx=%d guest %RX64 shw=%RX64 vs %RHp\n", rc, j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
1027 cErrors++;
1028 }
1029 else if ( PGMSHWPTEPAE_IS_RW(pShwPT->a[j])
1030 && !pGstPT->a[j].n.u1Write)
1031 {
1032 if (fFirstMsg)
1033 {
1034 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
1035 fFirstMsg = false;
1036 }
1037 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch r/w gst/shw: idx=%d guest %RX64 shw=%RX64 vs %RHp\n", j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
1038 cErrors++;
1039 }
1040 }
1041 }
1042 PGMPhysReleasePageMappingLock(pVM, &LockPage);
1043 }
1044
1045 /* Make sure this page table can't be written to from any shadow mapping. */
1046 RTHCPHYS HCPhysPT = NIL_RTHCPHYS;
1047 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pPage->GCPhys, &HCPhysPT);
1048 AssertMsgRC(rc, ("PGMPhysGCPhys2HCPhys failed with rc=%d for %RGp\n", rc, pPage->GCPhys));
1049 if (rc == VINF_SUCCESS)
1050 {
1051 for (unsigned j = 0; j < pPool->cCurPages; j++)
1052 {
1053 PPGMPOOLPAGE pTempPage = &pPool->aPages[j];
1054
1055 if (pTempPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
1056 {
1057 PPGMSHWPTPAE pShwPT2 = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pTempPage);
1058
1059 for (unsigned k = 0; k < RT_ELEMENTS(pShwPT->a); k++)
1060 {
1061 if ( PGMSHWPTEPAE_IS_P_RW(pShwPT2->a[k])
1062# ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
1063 && !pPage->fDirty
1064# endif
1065 && PGMSHWPTEPAE_GET_HCPHYS(pShwPT2->a[k]) == HCPhysPT)
1066 {
1067 if (fFirstMsg)
1068 {
1069 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
1070 fFirstMsg = false;
1071 }
1072 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch: r/w: GCPhys=%RGp idx=%d shw %RX64 %RX64\n", pTempPage->GCPhys, k, PGMSHWPTEPAE_GET_LOG(pShwPT->a[k]), PGMSHWPTEPAE_GET_LOG(pShwPT2->a[k]));
1073 cErrors++;
1074 }
1075 }
1076 }
1077 }
1078 }
1079 }
1080 }
1081 if (cErrors > 0)
1082 return DBGCCmdHlpFail(pCmdHlp, pCmd, "Found %#x errors", cErrors);
1083 return VINF_SUCCESS;
1084}
1085#endif /* VBOX_WITH_DEBUGGER */
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