1 | /* $Id: PGMBth.h 43387 2012-09-21 09:40:25Z vboxsync $ */
|
---|
2 | /** @file
|
---|
3 | * VBox - Page Manager / Monitor, Shadow+Guest Paging Template.
|
---|
4 | */
|
---|
5 |
|
---|
6 | /*
|
---|
7 | * Copyright (C) 2006-2010 Oracle Corporation
|
---|
8 | *
|
---|
9 | * This file is part of VirtualBox Open Source Edition (OSE), as
|
---|
10 | * available from http://www.virtualbox.org. This file is free software;
|
---|
11 | * you can redistribute it and/or modify it under the terms of the GNU
|
---|
12 | * General Public License (GPL) as published by the Free Software
|
---|
13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
|
---|
14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
|
---|
15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
|
---|
16 | */
|
---|
17 |
|
---|
18 |
|
---|
19 | /*******************************************************************************
|
---|
20 | * Internal Functions *
|
---|
21 | *******************************************************************************/
|
---|
22 | RT_C_DECLS_BEGIN
|
---|
23 | PGM_BTH_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
|
---|
24 | PGM_BTH_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3);
|
---|
25 | PGM_BTH_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta);
|
---|
26 |
|
---|
27 | PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, bool *pfLockTaken);
|
---|
28 | PGM_BTH_DECL(int, SyncCR3)(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
|
---|
29 | PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVMCPU pVCpu, RTGCPTR Addr, unsigned fPage, unsigned uError);
|
---|
30 | PGM_BTH_DECL(int, InvalidatePage)(PVMCPU pVCpu, RTGCPTR GCPtrPage);
|
---|
31 | PGM_BTH_DECL(int, PrefetchPage)(PVMCPU pVCpu, RTGCPTR GCPtrPage);
|
---|
32 | PGM_BTH_DECL(unsigned, AssertCR3)(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0);
|
---|
33 | PGM_BTH_DECL(int, MapCR3)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3);
|
---|
34 | PGM_BTH_DECL(int, UnmapCR3)(PVMCPU pVCpu);
|
---|
35 | RT_C_DECLS_END
|
---|
36 |
|
---|
37 |
|
---|
38 | /**
|
---|
39 | * Initializes the both bit of the paging mode data.
|
---|
40 | *
|
---|
41 | * @returns VBox status code.
|
---|
42 | * @param pVM Pointer to the VM.
|
---|
43 | * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
|
---|
44 | * This is used early in the init process to avoid trouble with PDM
|
---|
45 | * not being initialized yet.
|
---|
46 | */
|
---|
47 | PGM_BTH_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
|
---|
48 | {
|
---|
49 | Assert(pModeData->uShwType == PGM_SHW_TYPE); Assert(pModeData->uGstType == PGM_GST_TYPE);
|
---|
50 |
|
---|
51 | /* Ring 3 */
|
---|
52 | pModeData->pfnR3BthRelocate = PGM_BTH_NAME(Relocate);
|
---|
53 | pModeData->pfnR3BthSyncCR3 = PGM_BTH_NAME(SyncCR3);
|
---|
54 | pModeData->pfnR3BthInvalidatePage = PGM_BTH_NAME(InvalidatePage);
|
---|
55 | pModeData->pfnR3BthPrefetchPage = PGM_BTH_NAME(PrefetchPage);
|
---|
56 | pModeData->pfnR3BthVerifyAccessSyncPage = PGM_BTH_NAME(VerifyAccessSyncPage);
|
---|
57 | #ifdef VBOX_STRICT
|
---|
58 | pModeData->pfnR3BthAssertCR3 = PGM_BTH_NAME(AssertCR3);
|
---|
59 | #endif
|
---|
60 | pModeData->pfnR3BthMapCR3 = PGM_BTH_NAME(MapCR3);
|
---|
61 | pModeData->pfnR3BthUnmapCR3 = PGM_BTH_NAME(UnmapCR3);
|
---|
62 |
|
---|
63 | if (fResolveGCAndR0)
|
---|
64 | {
|
---|
65 | int rc;
|
---|
66 |
|
---|
67 | #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
|
---|
68 | /* GC */
|
---|
69 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(Trap0eHandler), &pModeData->pfnRCBthTrap0eHandler);
|
---|
70 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(Trap0eHandler), rc), rc);
|
---|
71 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(InvalidatePage), &pModeData->pfnRCBthInvalidatePage);
|
---|
72 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(InvalidatePage), rc), rc);
|
---|
73 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(SyncCR3), &pModeData->pfnRCBthSyncCR3);
|
---|
74 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(SyncCR3), rc), rc);
|
---|
75 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(PrefetchPage), &pModeData->pfnRCBthPrefetchPage);
|
---|
76 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(PrefetchPage), rc), rc);
|
---|
77 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(VerifyAccessSyncPage),&pModeData->pfnRCBthVerifyAccessSyncPage);
|
---|
78 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(VerifyAccessSyncPage), rc), rc);
|
---|
79 | # ifdef VBOX_STRICT
|
---|
80 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(AssertCR3), &pModeData->pfnRCBthAssertCR3);
|
---|
81 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(AssertCR3), rc), rc);
|
---|
82 | # endif
|
---|
83 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(MapCR3), &pModeData->pfnRCBthMapCR3);
|
---|
84 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(MapCR3), rc), rc);
|
---|
85 | rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_BTH_NAME_RC_STR(UnmapCR3), &pModeData->pfnRCBthUnmapCR3);
|
---|
86 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(UnmapCR3), rc), rc);
|
---|
87 | #endif /* Not AMD64 shadow paging. */
|
---|
88 |
|
---|
89 | /* Ring 0 */
|
---|
90 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(Trap0eHandler), &pModeData->pfnR0BthTrap0eHandler);
|
---|
91 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(Trap0eHandler), rc), rc);
|
---|
92 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(InvalidatePage), &pModeData->pfnR0BthInvalidatePage);
|
---|
93 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(InvalidatePage), rc), rc);
|
---|
94 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(SyncCR3), &pModeData->pfnR0BthSyncCR3);
|
---|
95 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(SyncCR3), rc), rc);
|
---|
96 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(PrefetchPage), &pModeData->pfnR0BthPrefetchPage);
|
---|
97 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(PrefetchPage), rc), rc);
|
---|
98 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(VerifyAccessSyncPage),&pModeData->pfnR0BthVerifyAccessSyncPage);
|
---|
99 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(VerifyAccessSyncPage), rc), rc);
|
---|
100 | #ifdef VBOX_STRICT
|
---|
101 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(AssertCR3), &pModeData->pfnR0BthAssertCR3);
|
---|
102 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(AssertCR3), rc), rc);
|
---|
103 | #endif
|
---|
104 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(MapCR3), &pModeData->pfnR0BthMapCR3);
|
---|
105 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(MapCR3), rc), rc);
|
---|
106 | rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_BTH_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0BthUnmapCR3);
|
---|
107 | AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(UnmapCR3), rc), rc);
|
---|
108 | }
|
---|
109 | return VINF_SUCCESS;
|
---|
110 | }
|
---|
111 |
|
---|
112 |
|
---|
113 | /**
|
---|
114 | * Enters the shadow+guest mode.
|
---|
115 | *
|
---|
116 | * @returns VBox status code.
|
---|
117 | * @param pVM Pointer to the VM.
|
---|
118 | * @param pVCpu Pointer to the VMCPU.
|
---|
119 | * @param GCPhysCR3 The physical address from the CR3 register.
|
---|
120 | */
|
---|
121 | PGM_BTH_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)
|
---|
122 | {
|
---|
123 | /* Here we deal with allocation of the root shadow page table for real and protected mode during mode switches;
|
---|
124 | * Other modes rely on MapCR3/UnmapCR3 to setup the shadow root page tables.
|
---|
125 | */
|
---|
126 | #if ( ( PGM_SHW_TYPE == PGM_TYPE_32BIT \
|
---|
127 | || PGM_SHW_TYPE == PGM_TYPE_PAE \
|
---|
128 | || PGM_SHW_TYPE == PGM_TYPE_AMD64) \
|
---|
129 | && ( PGM_GST_TYPE == PGM_TYPE_REAL \
|
---|
130 | || PGM_GST_TYPE == PGM_TYPE_PROT))
|
---|
131 |
|
---|
132 | PVM pVM = pVCpu->pVMR3;
|
---|
133 |
|
---|
134 | Assert(HMIsNestedPagingActive(pVM) == pVM->pgm.s.fNestedPaging);
|
---|
135 | Assert(!pVM->pgm.s.fNestedPaging);
|
---|
136 |
|
---|
137 | pgmLock(pVM);
|
---|
138 | /* Note: we only really need shadow paging in real and protected mode for VT-x and AMD-V (excluding nested paging/EPT modes),
|
---|
139 | * but any calls to GC need a proper shadow page setup as well.
|
---|
140 | */
|
---|
141 | /* Free the previous root mapping if still active. */
|
---|
142 | PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
|
---|
143 | if (pVCpu->pgm.s.CTX_SUFF(pShwPageCR3))
|
---|
144 | {
|
---|
145 | Assert(pVCpu->pgm.s.pShwPageCR3R3->enmKind != PGMPOOLKIND_FREE);
|
---|
146 |
|
---|
147 | /* Mark the page as unlocked; allow flushing again. */
|
---|
148 | pgmPoolUnlockPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
|
---|
149 |
|
---|
150 | /* Remove the hypervisor mappings from the shadow page table. */
|
---|
151 | pgmMapDeactivateCR3(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
|
---|
152 |
|
---|
153 | pgmPoolFreeByPage(pPool, pVCpu->pgm.s.pShwPageCR3R3, pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable);
|
---|
154 | pVCpu->pgm.s.pShwPageCR3R3 = 0;
|
---|
155 | pVCpu->pgm.s.pShwPageCR3RC = 0;
|
---|
156 | pVCpu->pgm.s.pShwPageCR3R0 = 0;
|
---|
157 | pVCpu->pgm.s.iShwUser = 0;
|
---|
158 | pVCpu->pgm.s.iShwUserTable = 0;
|
---|
159 | }
|
---|
160 |
|
---|
161 | /* construct a fake address. */
|
---|
162 | GCPhysCR3 = RT_BIT_64(63);
|
---|
163 | pVCpu->pgm.s.iShwUser = SHW_POOL_ROOT_IDX;
|
---|
164 | pVCpu->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;
|
---|
165 | int rc = pgmPoolAlloc(pVM, GCPhysCR3, BTH_PGMPOOLKIND_ROOT, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu),
|
---|
166 | pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable, false /*fLockPage*/,
|
---|
167 | &pVCpu->pgm.s.pShwPageCR3R3);
|
---|
168 | if (rc == VERR_PGM_POOL_FLUSHED)
|
---|
169 | {
|
---|
170 | Log(("Bth-Enter: PGM pool flushed -> signal sync cr3\n"));
|
---|
171 | Assert(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
|
---|
172 | pgmUnlock(pVM);
|
---|
173 | return VINF_PGM_SYNC_CR3;
|
---|
174 | }
|
---|
175 | AssertRCReturn(rc, rc);
|
---|
176 |
|
---|
177 | /* Mark the page as locked; disallow flushing. */
|
---|
178 | pgmPoolLockPage(pPool, pVCpu->pgm.s.pShwPageCR3R3);
|
---|
179 |
|
---|
180 | pVCpu->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVCpu->pgm.s.pShwPageCR3R3);
|
---|
181 | pVCpu->pgm.s.pShwPageCR3RC = MMHyperCCToRC(pVM, pVCpu->pgm.s.pShwPageCR3R3);
|
---|
182 |
|
---|
183 | /* Set the current hypervisor CR3. */
|
---|
184 | CPUMSetHyperCR3(pVCpu, PGMGetHyperCR3(pVCpu));
|
---|
185 |
|
---|
186 | /* Apply all hypervisor mappings to the new CR3. */
|
---|
187 | rc = pgmMapActivateCR3(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
|
---|
188 | pgmUnlock(pVM);
|
---|
189 | return rc;
|
---|
190 | #else
|
---|
191 | NOREF(pVCpu); NOREF(GCPhysCR3);
|
---|
192 | return VINF_SUCCESS;
|
---|
193 | #endif
|
---|
194 | }
|
---|
195 |
|
---|
196 |
|
---|
197 | /**
|
---|
198 | * Relocate any GC pointers related to shadow mode paging.
|
---|
199 | *
|
---|
200 | * @returns VBox status code.
|
---|
201 | * @param pVM Pointer to the VM.
|
---|
202 | * @param pVCpu Pointer to the VMCPU.
|
---|
203 | * @param offDelta The relocation offset.
|
---|
204 | */
|
---|
205 | PGM_BTH_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta)
|
---|
206 | {
|
---|
207 | /* nothing special to do here - InitData does the job. */
|
---|
208 | NOREF(pVCpu); NOREF(offDelta);
|
---|
209 | return VINF_SUCCESS;
|
---|
210 | }
|
---|
211 |
|
---|