PDMDevHlp.cpp@ 77807

Last change on this file since 77807 was 77299, checked in by vboxsync, 6 years ago
DevVGA,PCI,PGM: Hacks for making it possible to load saved states of the VBoxSVGA device with the 'wrong' BAR layout. bugref:9359
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 166.7 KB

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1	/* $Id: PDMDevHlp.cpp 77299 2019-02-13 13:57:14Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23	#define PDMPCIDEV_INCLUDE_PRIVATE /* Hack to get pdmpcidevint.h included at the right point. */
24	#include "PDMInternal.h"
25	#include <VBox/vmm/pdm.h>
26	#include <VBox/vmm/mm.h>
27	#include <VBox/vmm/hm.h>
28	#include <VBox/vmm/pgm.h>
29	#include <VBox/vmm/iom.h>
30	#ifdef VBOX_WITH_REM
31	# include <VBox/vmm/rem.h>
32	#endif
33	#include <VBox/vmm/dbgf.h>
34	#include <VBox/vmm/vmapi.h>
35	#include <VBox/vmm/vm.h>
36	#include <VBox/vmm/uvm.h>
37	#include <VBox/vmm/vmm.h>
38
39	#include <VBox/version.h>
40	#include <VBox/log.h>
41	#include <VBox/err.h>
42	#include <iprt/asm.h>
43	#include <iprt/assert.h>
44	#include <iprt/ctype.h>
45	#include <iprt/string.h>
46	#include <iprt/thread.h>
47
48	#include "dtrace/VBoxVMM.h"
49	#include "PDMInline.h"
50
51
52	/*********************************************************************************************************************************
53	* Defined Constants And Macros *
54	*********************************************************************************************************************************/
55	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
56	* Define this to enable the deadlock detection when accessing physical memory.
57	*/
58	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
59	# define PDM_DEVHLP_DEADLOCK_DETECTION /*< @todo enable DevHlp deadlock detection! /
60	#endif
61
62
63
64	/**
65	* Wrapper around PDMR3LdrGetSymbolRCLazy.
66	*/
67	DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
68	{
69	PVM pVM = pDevIns->Internal.s.pVMR3;
70	if (!VM_IS_RAW_MODE_ENABLED(pVM))
71	{
72	*ppvValue = NIL_RTRCPTR;
73	return VINF_SUCCESS;
74	}
75	return PDMR3LdrGetSymbolRCLazy(pVM,
76	pDevIns->Internal.s.pDevR3->pReg->szRCMod,
77	pDevIns->Internal.s.pDevR3->pszRCSearchPath,
78	pszSymbol, ppvValue);
79	}
80
81
82	/**
83	* Wrapper around PDMR3LdrGetSymbolR0Lazy.
84	*/
85	DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
86	{
87	return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
88	pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
89	pDevIns->Internal.s.pDevR3->pszR0SearchPath,
90	pszSymbol, ppvValue);
91	}
92
93
94	/** @name R3 DevHlp
95	* @{
96	*/
97
98
99	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
100	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
101	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
102	{
103	PDMDEV_ASSERT_DEVINS(pDevIns);
104	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
105	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
106	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
107
108	#if 0 /** @todo needs a real string cache for this */
109	if (pDevIns->iInstance > 0)
110	{
111	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
112	if (pszDesc2)
113	pszDesc = pszDesc2;
114	}
115	#endif
116
117	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
118	pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
119
120	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
121	return rc;
122	}
123
124
125	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
126	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
127	const char pszOut, const char pszIn,
128	const char pszOutStr, const char pszInStr, const char *pszDesc)
129	{
130	PDMDEV_ASSERT_DEVINS(pDevIns);
131	PVM pVM = pDevIns->Internal.s.pVMR3;
132	VM_ASSERT_EMT(pVM);
133	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
134	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
135
136	/*
137	* Resolve the functions (one of the can be NULL).
138	*/
139	int rc = VINF_SUCCESS;
140	if ( pDevIns->pReg->szRCMod[0]
141	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
142	&& VM_IS_RAW_MODE_ENABLED(pVM))
143	{
144	RTRCPTR RCPtrIn = NIL_RTRCPTR;
145	if (pszIn)
146	{
147	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
148	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
149	}
150	RTRCPTR RCPtrOut = NIL_RTRCPTR;
151	if (pszOut && RT_SUCCESS(rc))
152	{
153	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
154	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
155	}
156	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
157	if (pszInStr && RT_SUCCESS(rc))
158	{
159	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
160	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
161	}
162	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
163	if (pszOutStr && RT_SUCCESS(rc))
164	{
165	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
166	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
167	}
168
169	if (RT_SUCCESS(rc))
170	{
171	#if 0 /** @todo needs a real string cache for this */
172	if (pDevIns->iInstance > 0)
173	{
174	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
175	if (pszDesc2)
176	pszDesc = pszDesc2;
177	}
178	#endif
179
180	rc = IOMR3IOPortRegisterRC(pVM, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
181	}
182	}
183	else if (VM_IS_RAW_MODE_ENABLED(pVM))
184	{
185	AssertMsgFailed(("No RC module for this driver!\n"));
186	rc = VERR_INVALID_PARAMETER;
187	}
188
189	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
190	return rc;
191	}
192
193
194	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
195	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
196	const char pszOut, const char pszIn,
197	const char pszOutStr, const char pszInStr, const char *pszDesc)
198	{
199	PDMDEV_ASSERT_DEVINS(pDevIns);
200	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
201	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
202	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
203
204	/*
205	* Resolve the functions (one of the can be NULL).
206	*/
207	int rc = VINF_SUCCESS;
208	if ( pDevIns->pReg->szR0Mod[0]
209	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
210	{
211	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
212	if (pszIn)
213	{
214	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
215	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
216	}
217	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
218	if (pszOut && RT_SUCCESS(rc))
219	{
220	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
221	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
222	}
223	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
224	if (pszInStr && RT_SUCCESS(rc))
225	{
226	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
227	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
228	}
229	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
230	if (pszOutStr && RT_SUCCESS(rc))
231	{
232	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
233	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
234	}
235
236	if (RT_SUCCESS(rc))
237	{
238	#if 0 /** @todo needs a real string cache for this */
239	if (pDevIns->iInstance > 0)
240	{
241	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
242	if (pszDesc2)
243	pszDesc = pszDesc2;
244	}
245	#endif
246
247	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
248	}
249	}
250	else
251	{
252	AssertMsgFailed(("No R0 module for this driver!\n"));
253	rc = VERR_INVALID_PARAMETER;
254	}
255
256	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
257	return rc;
258	}
259
260
261	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
262	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
263	{
264	PDMDEV_ASSERT_DEVINS(pDevIns);
265	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
266	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
267	Port, cPorts));
268
269	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
270
271	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
272	return rc;
273	}
274
275
276	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
277	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
278	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
279	uint32_t fFlags, const char *pszDesc)
280	{
281	PDMDEV_ASSERT_DEVINS(pDevIns);
282	PVM pVM = pDevIns->Internal.s.pVMR3;
283	VM_ASSERT_EMT(pVM);
284	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
285	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
286
287	if (pDevIns->iInstance > 0)
288	{
289	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
290	if (pszDesc2)
291	pszDesc = pszDesc2;
292	}
293
294	int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
295	pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
296
297	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
298	return rc;
299	}
300
301
302	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
303	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser,
304	const char pszWrite, const char pszRead, const char *pszFill)
305	{
306	PDMDEV_ASSERT_DEVINS(pDevIns);
307	PVM pVM = pDevIns->Internal.s.pVMR3;
308	VM_ASSERT_EMT(pVM);
309	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
310	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
311
312
313	/*
314	* Resolve the functions.
315	* Not all function have to present, leave it to IOM to enforce this.
316	*/
317	int rc = VINF_SUCCESS;
318	if ( pDevIns->pReg->szRCMod[0]
319	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
320	&& VM_IS_RAW_MODE_ENABLED(pVM))
321	{
322	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
323	if (pszWrite)
324	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
325
326	RTRCPTR RCPtrRead = NIL_RTRCPTR;
327	int rc2 = VINF_SUCCESS;
328	if (pszRead)
329	rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
330
331	RTRCPTR RCPtrFill = NIL_RTRCPTR;
332	int rc3 = VINF_SUCCESS;
333	if (pszFill)
334	rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
335
336	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
337	rc = IOMR3MmioRegisterRC(pVM, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
338	else
339	{
340	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
341	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
342	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
343	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
344	rc = rc2;
345	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
346	rc = rc3;
347	}
348	}
349	else if (VM_IS_RAW_MODE_ENABLED(pVM))
350	{
351	AssertMsgFailed(("No RC module for this driver!\n"));
352	rc = VERR_INVALID_PARAMETER;
353	}
354
355	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
356	return rc;
357	}
358
359	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
360	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
361	const char pszWrite, const char pszRead, const char *pszFill)
362	{
363	PDMDEV_ASSERT_DEVINS(pDevIns);
364	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
365	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
366	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
367
368	/*
369	* Resolve the functions.
370	* Not all function have to present, leave it to IOM to enforce this.
371	*/
372	int rc = VINF_SUCCESS;
373	if ( pDevIns->pReg->szR0Mod[0]
374	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
375	{
376	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
377	if (pszWrite)
378	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
379	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
380	int rc2 = VINF_SUCCESS;
381	if (pszRead)
382	rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
383	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
384	int rc3 = VINF_SUCCESS;
385	if (pszFill)
386	rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
387	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
388	rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser,
389	pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
390	else
391	{
392	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
393	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
394	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
395	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
396	rc = rc2;
397	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
398	rc = rc3;
399	}
400	}
401	else
402	{
403	AssertMsgFailed(("No R0 module for this driver!\n"));
404	rc = VERR_INVALID_PARAMETER;
405	}
406
407	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
408	return rc;
409	}
410
411
412	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
413	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange)
414	{
415	PDMDEV_ASSERT_DEVINS(pDevIns);
416	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
417	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp\n",
418	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
419
420	int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
421
422	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
423	return rc;
424	}
425
426
427	/**
428	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
429	*/
430	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb,
431	uint32_t fFlags, void *ppv, const char pszDesc)
432	{
433	PDMDEV_ASSERT_DEVINS(pDevIns);
434	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
435	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: pPciDev=%p (%#x) iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
436	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion,
437	cb, fFlags, ppv, pszDesc, pszDesc));
438	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
439
440	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
441	* use a real string cache. */
442	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion,
443	cb, fFlags, ppv, pszDesc);
444
445	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
446	return rc;
447	}
448
449
450	/**
451	* @interface_method_impl{PDMDEVHLPR3,pfnMMIOExPreRegister}
452	*/
453	static DECLCALLBACK(int)
454	pdmR3DevHlp_MMIOExPreRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, uint32_t fFlags,
455	const char *pszDesc,
456	RTHCPTR pvUser, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
457	RTR0PTR pvUserR0, const char pszWriteR0, const char pszReadR0, const char *pszFillR0,
458	RTRCPTR pvUserRC, const char pszWriteRC, const char pszReadRC, const char *pszFillRC)
459	{
460	PDMDEV_ASSERT_DEVINS(pDevIns);
461	PVM pVM = pDevIns->Internal.s.pVMR3;
462	VM_ASSERT_EMT(pVM);
463	LogFlow(("pdmR3DevHlp_MMIOExPreRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x cbRegion=%#RGp fFlags=%RX32 pszDesc=%p:{%s}\n"
464	" pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p\n"
465	" pvUserR0=%p pszWriteR0=%s pszReadR0=%s pszFillR0=%s\n"
466	" pvUserRC=%p pszWriteRC=%s pszReadRC=%s pszFillRC=%s\n",
467	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, cbRegion,
468	fFlags, pszDesc, pszDesc,
469	pvUser, pfnWrite, pfnRead, pfnFill,
470	pvUserR0, pszWriteR0, pszReadR0, pszFillR0,
471	pvUserRC, pszWriteRC, pszReadRC, pszFillRC));
472	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
473
474	/*
475	* Resolve the functions.
476	*/
477	AssertLogRelReturn( (!pszWriteR0 && !pszReadR0 && !pszFillR0)
478	\|\| (pDevIns->pReg->szR0Mod[0] && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)),
479	VERR_INVALID_PARAMETER);
480	AssertLogRelReturn( (!pszWriteRC && !pszReadRC && !pszFillRC)
481	\|\| (pDevIns->pReg->szRCMod[0] && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)),
482	VERR_INVALID_PARAMETER);
483
484	/* Ring-0 */
485	int rc;
486	R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteR0 = 0;
487	if (pszWriteR0)
488	{
489	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWriteR0, &pfnWriteR0);
490	AssertLogRelMsgRCReturn(rc, ("pszWriteR0=%s rc=%Rrc\n", pszWriteR0, rc), rc);
491	}
492
493	R0PTRTYPE(PFNIOMMMIOREAD) pfnReadR0 = 0;
494	if (pszReadR0)
495	{
496	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszReadR0, &pfnReadR0);
497	AssertLogRelMsgRCReturn(rc, ("pszReadR0=%s rc=%Rrc\n", pszReadR0, rc), rc);
498	}
499	R0PTRTYPE(PFNIOMMMIOFILL) pfnFillR0 = 0;
500	if (pszFillR0)
501	{
502	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFillR0, &pfnFillR0);
503	AssertLogRelMsgRCReturn(rc, ("pszFillR0=%s rc=%Rrc\n", pszFillR0, rc), rc);
504	}
505
506	/* Raw-mode */
507	rc = VINF_SUCCESS;
508	RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteRC = 0;
509	if (pszWriteRC)
510	{
511	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWriteRC, &pfnWriteRC);
512	AssertLogRelMsgRCReturn(rc, ("pszWriteRC=%s rc=%Rrc\n", pszWriteRC, rc), rc);
513	}
514
515	RCPTRTYPE(PFNIOMMMIOREAD) pfnReadRC = 0;
516	if (pszReadRC)
517	{
518	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszReadRC, &pfnReadRC);
519	AssertLogRelMsgRCReturn(rc, ("pszReadRC=%s rc=%Rrc\n", pszReadRC, rc), rc);
520	}
521	RCPTRTYPE(PFNIOMMMIOFILL) pfnFillRC = 0;
522	if (pszFillRC)
523	{
524	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszFillRC, &pfnFillRC);
525	AssertLogRelMsgRCReturn(rc, ("pszFillRC=%s rc=%Rrc\n", pszFillRC, rc), rc);
526	}
527
528	/*
529	* Call IOM to make the registration.
530	*/
531	rc = IOMR3MmioExPreRegister(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, cbRegion, fFlags, pszDesc,
532	pvUser, pfnWrite, pfnRead, pfnFill,
533	pvUserR0, pfnWriteR0, pfnReadR0, pfnFillR0,
534	pvUserRC, pfnWriteRC, pfnReadRC, pfnFillRC);
535
536	LogFlow(("pdmR3DevHlp_MMIOExPreRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
537	return rc;
538	}
539
540
541	/**
542	* @copydoc PDMDEVHLPR3::pfnMMIOExDeregister
543	*/
544	static DECLCALLBACK(int) pdmR3DevHlp_MMIOExDeregister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)
545	{
546	PDMDEV_ASSERT_DEVINS(pDevIns);
547	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
548	LogFlow(("pdmR3DevHlp_MMIOExDeregister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x\n",
549	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion));
550
551	AssertReturn(iRegion <= UINT8_MAX \|\| iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
552	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
553
554	int rc = PGMR3PhysMMIOExDeregister(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion);
555
556	LogFlow(("pdmR3DevHlp_MMIOExDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
557	return rc;
558	}
559
560
561	/**
562	* @copydoc PDMDEVHLPR3::pfnMMIOExMap
563	*/
564	static DECLCALLBACK(int) pdmR3DevHlp_MMIOExMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
565	{
566	PDMDEV_ASSERT_DEVINS(pDevIns);
567	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
568	LogFlow(("pdmR3DevHlp_MMIOExMap: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x GCPhys=%#RGp\n",
569	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, GCPhys));
570	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
571
572	int rc = PGMR3PhysMMIOExMap(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, GCPhys);
573
574	LogFlow(("pdmR3DevHlp_MMIOExMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
575	return rc;
576	}
577
578
579	/**
580	* @copydoc PDMDEVHLPR3::pfnMMIOExUnmap
581	*/
582	static DECLCALLBACK(int) pdmR3DevHlp_MMIOExUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
583	{
584	PDMDEV_ASSERT_DEVINS(pDevIns);
585	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
586	LogFlow(("pdmR3DevHlp_MMIOExUnmap: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x GCPhys=%#RGp\n",
587	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, GCPhys));
588	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
589
590	int rc = PGMR3PhysMMIOExUnmap(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, GCPhys);
591
592	LogFlow(("pdmR3DevHlp_MMIOExUnmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
593	return rc;
594	}
595
596
597	/**
598	* @copydoc PDMDEVHLPR3::pfnMMIOExReduce
599	*/
600	static DECLCALLBACK(int) pdmR3DevHlp_MMIOExReduce(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion)
601	{
602	PDMDEV_ASSERT_DEVINS(pDevIns);
603	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
604	LogFlow(("pdmR3DevHlp_MMIOExReduce: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x cbRegion=%RGp\n",
605	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, cbRegion));
606	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
607
608	int rc = PGMR3PhysMMIOExReduce(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, cbRegion);
609
610	LogFlow(("pdmR3DevHlp_MMIOExReduce: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
611	return rc;
612	}
613
614
615	/**
616	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
617	*/
618	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
619	RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
620	{
621	PDMDEV_ASSERT_DEVINS(pDevIns);
622	PVM pVM = pDevIns->Internal.s.pVMR3;
623	VM_ASSERT_EMT(pVM);
624	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
625	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
626	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
627
628	if (pDevIns->iInstance > 0)
629	{
630	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
631	if (pszDesc2)
632	pszDesc = pszDesc2;
633	}
634
635	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, off, cb, pszDesc, pRCPtr);
636
637	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pRCPtr));
638	return rc;
639	}
640
641
642	/**
643	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
644	*/
645	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
646	RTGCPHYS cb,const char *pszDesc, PRTR0PTR pR0Ptr)
647	{
648	PDMDEV_ASSERT_DEVINS(pDevIns);
649	PVM pVM = pDevIns->Internal.s.pVMR3;
650	VM_ASSERT_EMT(pVM);
651	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
652	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
653	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
654
655	if (pDevIns->iInstance > 0)
656	{
657	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
658	if (pszDesc2)
659	pszDesc = pszDesc2;
660	}
661
662	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, off, cb, pszDesc, pR0Ptr);
663
664	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pR0Ptr));
665	return rc;
666	}
667
668
669	/**
670	* @copydoc PDMDEVHLPR3::pfnMMIOExChangeRegionNo
671	*/
672	static DECLCALLBACK(int) pdmR3DevHlp_MMIOExChangeRegionNo(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
673	uint32_t iNewRegion)
674	{
675	PDMDEV_ASSERT_DEVINS(pDevIns);
676	PVM pVM = pDevIns->Internal.s.pVMR3;
677	VM_ASSERT_EMT(pVM);
678	LogFlow(("pdmR3DevHlp_MMIOExChangeRegionNo: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x iNewRegion=%#x\n",
679	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, iNewRegion));
680	AssertReturn(!pPciDev \|\| pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
681
682	int rc = PGMR3PhysMMIOExChangeRegionNo(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, iNewRegion);
683
684	LogFlow(("pdmR3DevHlp_MMIOExChangeRegionNo: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
685	return rc;
686	}
687
688
689	/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
690	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
691	const void pvBinary, uint32_t cbBinary, uint32_t fFlags, const char pszDesc)
692	{
693	PDMDEV_ASSERT_DEVINS(pDevIns);
694	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
695	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
696	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
697
698	/** @todo can we mangle pszDesc? */
699	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
700
701	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
702	return rc;
703	}
704
705
706	/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
707	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
708	{
709	PDMDEV_ASSERT_DEVINS(pDevIns);
710	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
711	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
712
713	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
714
715	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
716	return rc;
717	}
718
719
720	/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
721	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
722	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
723	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
724	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
725	{
726	PDMDEV_ASSERT_DEVINS(pDevIns);
727	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
728	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=%#x cbGuess=%#x pszBefore=%p:{%s}\n"
729	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
730	pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
731	pfnLivePrep, pfnLiveExec, pfnLiveVote,
732	pfnSavePrep, pfnSaveExec, pfnSaveDone,
733	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
734
735	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
736	uVersion, cbGuess, pszBefore,
737	pfnLivePrep, pfnLiveExec, pfnLiveVote,
738	pfnSavePrep, pfnSaveExec, pfnSaveDone,
739	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
740
741	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
742	return rc;
743	}
744
745
746	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
747	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
748	{
749	PDMDEV_ASSERT_DEVINS(pDevIns);
750	PVM pVM = pDevIns->Internal.s.pVMR3;
751	VM_ASSERT_EMT(pVM);
752	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
753	pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
754
755	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
756	{
757	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
758	if (pszDesc2)
759	pszDesc = pszDesc2;
760	}
761
762	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
763
764	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
765	return rc;
766	}
767
768
769	/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
770	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
771	{
772	PDMDEV_ASSERT_DEVINS(pDevIns);
773	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
774	pDevIns->pReg->szName, pDevIns->iInstance, pTime));
775
776	pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
777
778	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
779	return pTime;
780	}
781
782
783	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
784	static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
785	{
786	PDMDEV_ASSERT_DEVINS(pDevIns);
787	LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d\n",
788	pDevIns->pReg->szName, pDevIns->iInstance));
789
790	uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
791
792	LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
793	return u64Time;
794	}
795
796
797	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
798	static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
799	{
800	PDMDEV_ASSERT_DEVINS(pDevIns);
801	LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d\n",
802	pDevIns->pReg->szName, pDevIns->iInstance));
803
804	uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
805
806	LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
807	return u64Freq;
808	}
809
810
811	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
812	static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
813	{
814	PDMDEV_ASSERT_DEVINS(pDevIns);
815	LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d\n",
816	pDevIns->pReg->szName, pDevIns->iInstance));
817
818	uint64_t u64Time = TMVirtualGet(pDevIns->Internal.s.pVMR3);
819	uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
820
821	LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
822	return u64Nano;
823	}
824
825
826	/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
827	static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_GetSupDrvSession(PPDMDEVINS pDevIns)
828	{
829	PDMDEV_ASSERT_DEVINS(pDevIns);
830	LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d\n",
831	pDevIns->pReg->szName, pDevIns->iInstance));
832
833	PSUPDRVSESSION pSession = pDevIns->Internal.s.pVMR3->pSession;
834
835	LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d: returns %#p\n", pDevIns->pReg->szName, pDevIns->iInstance, pSession));
836	return pSession;
837	}
838
839
840	/** @interface_method_impl{PDMDEVHLPR3,pfnQueryGenericUserObject} */
841	static DECLCALLBACK(void *) pdmR3DevHlp_QueryGenericUserObject(PPDMDEVINS pDevIns, PCRTUUID pUuid)
842	{
843	PDMDEV_ASSERT_DEVINS(pDevIns);
844	LogFlow(("pdmR3DevHlp_QueryGenericUserObject: caller='%s'/%d: pUuid=%p:%RTuuid\n",
845	pDevIns->pReg->szName, pDevIns->iInstance, pUuid, pUuid));
846
847	#if defined(DEBUG_bird) \|\| defined(DEBUG_ramshankar) \|\| defined(DEBUG_sunlover) \|\| defined(DEBUG_michael) \|\| defined(DEBUG_andy)
848	AssertMsgFailed(("'%s' wants %RTuuid - external only interface!\n", pDevIns->pReg->szName, pUuid));
849	#endif
850
851	void *pvRet;
852	PUVM pUVM = pDevIns->Internal.s.pVMR3->pUVM;
853	if (pUVM->pVmm2UserMethods->pfnQueryGenericObject)
854	pvRet = pUVM->pVmm2UserMethods->pfnQueryGenericObject(pUVM->pVmm2UserMethods, pUVM, pUuid);
855	else
856	pvRet = NULL;
857
858	LogRel(("pdmR3DevHlp_QueryGenericUserObject: caller='%s'/%d: returns %#p for %RTuuid\n",
859	pDevIns->pReg->szName, pDevIns->iInstance, pvRet, pUuid));
860	return pvRet;
861	}
862
863
864	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
865	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
866	{
867	PDMDEV_ASSERT_DEVINS(pDevIns);
868	PVM pVM = pDevIns->Internal.s.pVMR3;
869	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
870	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
871
872	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
873	if (!VM_IS_EMT(pVM))
874	{
875	char szNames[128];
876	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
877	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
878	}
879	#endif
880
881	VBOXSTRICTRC rcStrict;
882	if (VM_IS_EMT(pVM))
883	rcStrict = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
884	else
885	rcStrict = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
886	AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
887
888	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
889	return VBOXSTRICTRC_VAL(rcStrict);
890	}
891
892
893	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
894	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
895	{
896	PDMDEV_ASSERT_DEVINS(pDevIns);
897	PVM pVM = pDevIns->Internal.s.pVMR3;
898	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
899	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
900
901	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
902	if (!VM_IS_EMT(pVM))
903	{
904	char szNames[128];
905	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
906	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
907	}
908	#endif
909
910	VBOXSTRICTRC rcStrict;
911	if (VM_IS_EMT(pVM))
912	rcStrict = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
913	else
914	rcStrict = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
915	AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
916
917	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
918	return VBOXSTRICTRC_VAL(rcStrict);
919	}
920
921
922	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
923	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
924	{
925	PDMDEV_ASSERT_DEVINS(pDevIns);
926	PVM pVM = pDevIns->Internal.s.pVMR3;
927	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
928	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
929	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
930
931	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
932	if (!VM_IS_EMT(pVM))
933	{
934	char szNames[128];
935	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
936	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
937	}
938	#endif
939
940	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
941
942	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
943	return rc;
944	}
945
946
947	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
948	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
949	{
950	PDMDEV_ASSERT_DEVINS(pDevIns);
951	PVM pVM = pDevIns->Internal.s.pVMR3;
952	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
953	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
954	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
955
956	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
957	if (!VM_IS_EMT(pVM))
958	{
959	char szNames[128];
960	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
961	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
962	}
963	#endif
964
965	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
966
967	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
968	return rc;
969	}
970
971
972	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
973	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
974	{
975	PDMDEV_ASSERT_DEVINS(pDevIns);
976	PVM pVM = pDevIns->Internal.s.pVMR3;
977	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
978	pDevIns->pReg->szName, pDevIns->iInstance, pLock));
979
980	PGMPhysReleasePageMappingLock(pVM, pLock);
981
982	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
983	}
984
985
986	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkGCPhys2CCPtr} */
987	static DECLCALLBACK(int) pdmR3DevHlp_PhysBulkGCPhys2CCPtr(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
988	uint32_t fFlags, void **papvPages, PPGMPAGEMAPLOCK paLocks)
989	{
990	PDMDEV_ASSERT_DEVINS(pDevIns);
991	PVM pVM = pDevIns->Internal.s.pVMR3;
992	LogFlow(("pdmR3DevHlp_PhysBulkGCPhys2CCPtr: caller='%s'/%d: cPages=%#x paGCPhysPages=%p (%RGp,..) fFlags=%#x papvPages=%p paLocks=%p\n",
993	pDevIns->pReg->szName, pDevIns->iInstance, cPages, paGCPhysPages, paGCPhysPages[0], fFlags, papvPages, paLocks));
994	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
995	AssertReturn(cPages > 0, VERR_INVALID_PARAMETER);
996
997	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
998	if (!VM_IS_EMT(pVM))
999	{
1000	char szNames[128];
1001	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
1002	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
1003	}
1004	#endif
1005
1006	int rc = PGMR3PhysBulkGCPhys2CCPtrExternal(pVM, cPages, paGCPhysPages, papvPages, paLocks);
1007
1008	Log(("pdmR3DevHlp_PhysBulkGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1009	return rc;
1010	}
1011
1012
1013	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkGCPhys2CCPtrReadOnly} */
1014	static DECLCALLBACK(int) pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
1015	uint32_t fFlags, const void **papvPages, PPGMPAGEMAPLOCK paLocks)
1016	{
1017	PDMDEV_ASSERT_DEVINS(pDevIns);
1018	PVM pVM = pDevIns->Internal.s.pVMR3;
1019	LogFlow(("pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly: caller='%s'/%d: cPages=%#x paGCPhysPages=%p (%RGp,...) fFlags=%#x papvPages=%p paLocks=%p\n",
1020	pDevIns->pReg->szName, pDevIns->iInstance, cPages, paGCPhysPages, paGCPhysPages[0], fFlags, papvPages, paLocks));
1021	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
1022	AssertReturn(cPages > 0, VERR_INVALID_PARAMETER);
1023
1024	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1025	if (!VM_IS_EMT(pVM))
1026	{
1027	char szNames[128];
1028	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
1029	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
1030	}
1031	#endif
1032
1033	int rc = PGMR3PhysBulkGCPhys2CCPtrReadOnlyExternal(pVM, cPages, paGCPhysPages, papvPages, paLocks);
1034
1035	Log(("pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1036	return rc;
1037	}
1038
1039
1040	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkReleasePageMappingLocks} */
1041	static DECLCALLBACK(void) pdmR3DevHlp_PhysBulkReleasePageMappingLocks(PPDMDEVINS pDevIns, uint32_t cPages, PPGMPAGEMAPLOCK paLocks)
1042	{
1043	PDMDEV_ASSERT_DEVINS(pDevIns);
1044	PVM pVM = pDevIns->Internal.s.pVMR3;
1045	LogFlow(("pdmR3DevHlp_PhysBulkReleasePageMappingLocks: caller='%s'/%d: cPages=%#x paLocks=%p\n",
1046	pDevIns->pReg->szName, pDevIns->iInstance, cPages, paLocks));
1047	Assert(cPages > 0);
1048
1049	PGMPhysBulkReleasePageMappingLocks(pVM, cPages, paLocks);
1050
1051	Log(("pdmR3DevHlp_PhysBulkReleasePageMappingLocks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1052	}
1053
1054
1055	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
1056	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
1057	{
1058	PDMDEV_ASSERT_DEVINS(pDevIns);
1059	PVM pVM = pDevIns->Internal.s.pVMR3;
1060	VM_ASSERT_EMT(pVM);
1061	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
1062	pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
1063
1064	PVMCPU pVCpu = VMMGetCpu(pVM);
1065	if (!pVCpu)
1066	return VERR_ACCESS_DENIED;
1067	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1068	/** @todo SMP. */
1069	#endif
1070
1071	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
1072
1073	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1074
1075	return rc;
1076	}
1077
1078
1079	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
1080	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
1081	{
1082	PDMDEV_ASSERT_DEVINS(pDevIns);
1083	PVM pVM = pDevIns->Internal.s.pVMR3;
1084	VM_ASSERT_EMT(pVM);
1085	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
1086	pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
1087
1088	PVMCPU pVCpu = VMMGetCpu(pVM);
1089	if (!pVCpu)
1090	return VERR_ACCESS_DENIED;
1091	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1092	/** @todo SMP. */
1093	#endif
1094
1095	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
1096
1097	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1098
1099	return rc;
1100	}
1101
1102
1103	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
1104	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
1105	{
1106	PDMDEV_ASSERT_DEVINS(pDevIns);
1107	PVM pVM = pDevIns->Internal.s.pVMR3;
1108	VM_ASSERT_EMT(pVM);
1109	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
1110	pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
1111
1112	PVMCPU pVCpu = VMMGetCpu(pVM);
1113	if (!pVCpu)
1114	return VERR_ACCESS_DENIED;
1115	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1116	/** @todo SMP. */
1117	#endif
1118
1119	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
1120
1121	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pGCPhys));
1122
1123	return rc;
1124	}
1125
1126
1127	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
1128	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
1129	{
1130	PDMDEV_ASSERT_DEVINS(pDevIns);
1131	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
1132
1133	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
1134
1135	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1136	return pv;
1137	}
1138
1139
1140	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
1141	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
1142	{
1143	PDMDEV_ASSERT_DEVINS(pDevIns);
1144	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
1145
1146	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
1147
1148	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1149	return pv;
1150	}
1151
1152
1153	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
1154	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
1155	{
1156	PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
1157	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1158
1159	MMR3HeapFree(pv);
1160
1161	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1162	}
1163
1164
1165	/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
1166	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1167	{
1168	PDMDEV_ASSERT_DEVINS(pDevIns);
1169
1170	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1171
1172	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
1173	enmVMState, VMR3GetStateName(enmVMState)));
1174	return enmVMState;
1175	}
1176
1177
1178	/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
1179	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1180	{
1181	PDMDEV_ASSERT_DEVINS(pDevIns);
1182
1183	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1184
1185	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
1186	fRc));
1187	return fRc;
1188	}
1189
1190
1191	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
1192	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1193	{
1194	PDMDEV_ASSERT_DEVINS(pDevIns);
1195	va_list args;
1196	va_start(args, pszFormat);
1197	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1198	va_end(args);
1199	return rc;
1200	}
1201
1202
1203	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
1204	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1205	{
1206	PDMDEV_ASSERT_DEVINS(pDevIns);
1207	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1208	return rc;
1209	}
1210
1211
1212	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
1213	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
1214	{
1215	PDMDEV_ASSERT_DEVINS(pDevIns);
1216	va_list args;
1217	va_start(args, pszFormat);
1218	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1219	va_end(args);
1220	return rc;
1221	}
1222
1223
1224	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
1225	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
1226	{
1227	PDMDEV_ASSERT_DEVINS(pDevIns);
1228	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1229	return rc;
1230	}
1231
1232
1233	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
1234	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1235	{
1236	PDMDEV_ASSERT_DEVINS(pDevIns);
1237	#ifdef LOG_ENABLED
1238	va_list va2;
1239	va_copy(va2, args);
1240	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1241	pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1242	va_end(va2);
1243	#endif
1244
1245	PVM pVM = pDevIns->Internal.s.pVMR3;
1246	VM_ASSERT_EMT(pVM);
1247	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1248	if (rc == VERR_DBGF_NOT_ATTACHED)
1249	rc = VINF_SUCCESS;
1250
1251	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1252	return rc;
1253	}
1254
1255
1256	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
1257	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1258	{
1259	PDMDEV_ASSERT_DEVINS(pDevIns);
1260	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1261	pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1262
1263	PVM pVM = pDevIns->Internal.s.pVMR3;
1264	VM_ASSERT_EMT(pVM);
1265	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1266
1267	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1268	return rc;
1269	}
1270
1271
1272	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFRegRegister} */
1273	static DECLCALLBACK(int) pdmR3DevHlp_DBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
1274	{
1275	PDMDEV_ASSERT_DEVINS(pDevIns);
1276	LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: paRegisters=%p\n",
1277	pDevIns->pReg->szName, pDevIns->iInstance, paRegisters));
1278
1279	PVM pVM = pDevIns->Internal.s.pVMR3;
1280	VM_ASSERT_EMT(pVM);
1281	int rc = DBGFR3RegRegisterDevice(pVM, paRegisters, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance);
1282
1283	LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1284	return rc;
1285	}
1286
1287
1288	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1289	static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1290	{
1291	PDMDEV_ASSERT_DEVINS(pDevIns);
1292	RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1293	LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1294	return hTraceBuf;
1295	}
1296
1297
1298	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1299	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName,
1300	STAMUNIT enmUnit, const char *pszDesc)
1301	{
1302	PDMDEV_ASSERT_DEVINS(pDevIns);
1303	PVM pVM = pDevIns->Internal.s.pVMR3;
1304	VM_ASSERT_EMT(pVM);
1305
1306	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1307	RT_NOREF_PV(pVM); RT_NOREF6(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
1308	}
1309
1310
1311
1312	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1313	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1314	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1315	{
1316	PDMDEV_ASSERT_DEVINS(pDevIns);
1317	PVM pVM = pDevIns->Internal.s.pVMR3;
1318	VM_ASSERT_EMT(pVM);
1319
1320	va_list args;
1321	va_start(args, pszName);
1322	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1323	va_end(args);
1324	AssertRC(rc);
1325
1326	NOREF(pVM);
1327	}
1328
1329
1330	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1331	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1332	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1333	{
1334	PDMDEV_ASSERT_DEVINS(pDevIns);
1335	PVM pVM = pDevIns->Internal.s.pVMR3;
1336	VM_ASSERT_EMT(pVM);
1337
1338	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1339	AssertRC(rc);
1340
1341	NOREF(pVM);
1342	}
1343
1344
1345	/**
1346	* @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister}
1347	*/
1348	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
1349	uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName)
1350	{
1351	PDMDEV_ASSERT_DEVINS(pDevIns);
1352	PVM pVM = pDevIns->Internal.s.pVMR3;
1353	VM_ASSERT_EMT(pVM);
1354	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs} idxDevCfg=%d fFlags=%#x uPciDevNo=%#x uPciFunNo=%#x pszName=%p:{%s}\n",
1355	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->abConfig, idxDevCfg, fFlags, uPciDevNo, uPciFunNo, pszName, pszName ? pszName : ""));
1356
1357	/*
1358	* Validate input.
1359	*/
1360	AssertLogRelMsgReturn(RT_VALID_PTR(pPciDev),
1361	("'%s'/%d: Invalid pPciDev value: %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pPciDev),
1362	VERR_INVALID_POINTER);
1363	AssertLogRelMsgReturn(PDMPciDevGetVendorId(pPciDev),
1364	("'%s'/%d: Vendor ID is not set!\n", pDevIns->pReg->szName, pDevIns->iInstance),
1365	VERR_INVALID_POINTER);
1366	AssertLogRelMsgReturn(idxDevCfg < 256 \|\| idxDevCfg == PDMPCIDEVREG_CFG_NEXT,
1367	("'%s'/%d: Invalid config selector: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1368	VERR_OUT_OF_RANGE);
1369	AssertLogRelMsgReturn( uPciDevNo < 32
1370	\|\| uPciDevNo == PDMPCIDEVREG_DEV_NO_FIRST_UNUSED
1371	\|\| uPciDevNo == PDMPCIDEVREG_DEV_NO_SAME_AS_PREV,
1372	("'%s'/%d: Invalid PCI device number: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, uPciDevNo),
1373	VERR_INVALID_PARAMETER);
1374	AssertLogRelMsgReturn( uPciFunNo < 8
1375	\|\| uPciFunNo == PDMPCIDEVREG_FUN_NO_FIRST_UNUSED,
1376	("'%s'/%d: Invalid PCI funcion number: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, uPciFunNo),
1377	VERR_INVALID_PARAMETER);
1378	AssertLogRelMsgReturn(!(fFlags & ~PDMPCIDEVREG_F_VALID_MASK),
1379	("'%s'/%d: Invalid flags: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, fFlags),
1380	VERR_INVALID_FLAGS);
1381	if (!pszName)
1382	pszName = pDevIns->pReg->szName;
1383	AssertLogRelReturn(RT_VALID_PTR(pszName), VERR_INVALID_POINTER);
1384
1385	/*
1386	* Find the last(/previous) registered PCI device (for linking and more),
1387	* checking for duplicate registration attempts while doing so.
1388	*/
1389	uint32_t idxDevCfgNext = 0;
1390	PPDMPCIDEV pPrevPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1391	while (pPrevPciDev)
1392	{
1393	AssertLogRelMsgReturn(pPrevPciDev != pPciDev,
1394	("'%s'/%d attempted to register the same PCI device (%p) twice\n",
1395	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev),
1396	VERR_DUPLICATE);
1397	AssertLogRelMsgReturn(pPrevPciDev->Int.s.idxDevCfg != idxDevCfg,
1398	("'%s'/%d attempted to use the same device config index (%u) twice\n",
1399	pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1400	VERR_ALREADY_LOADED);
1401	if (pPrevPciDev->Int.s.idxDevCfg >= idxDevCfgNext)
1402	idxDevCfgNext = pPrevPciDev->Int.s.idxDevCfg + 1;
1403
1404	if (!pPrevPciDev->Int.s.pNextR3)
1405	break;
1406	pPrevPciDev = pPrevPciDev->Int.s.pNextR3;
1407	}
1408
1409	/*
1410	* Resolve the PCI configuration node for the device. The default (zero'th)
1411	* is the same as the PDM device, the rest are "PciCfg1..255" CFGM sub-nodes.
1412	*/
1413	if (idxDevCfg == PDMPCIDEVREG_CFG_NEXT)
1414	{
1415	idxDevCfg = idxDevCfgNext;
1416	AssertLogRelMsgReturn(idxDevCfg < 256, ("'%s'/%d: PDMPCIDEVREG_IDX_DEV_CFG_NEXT ran out of valid indexes (ends at 255)\n",
1417	pDevIns->pReg->szName, pDevIns->iInstance),
1418	VERR_OUT_OF_RANGE);
1419	}
1420
1421	PCFGMNODE pCfg = pDevIns->Internal.s.pCfgHandle;
1422	if (idxDevCfg != 0)
1423	pCfg = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "PciCfg%u", idxDevCfg);
1424
1425	/*
1426	* We resolve PDMPCIDEVREG_DEV_NO_SAME_AS_PREV, the PCI bus handles
1427	* PDMPCIDEVREG_DEV_NO_FIRST_UNUSED and PDMPCIDEVREG_FUN_NO_FIRST_UNUSED.
1428	*/
1429	uint8_t const uPciDevNoRaw = uPciDevNo;
1430	uint32_t uDefPciBusNo = 0;
1431	if (uPciDevNo == PDMPCIDEVREG_DEV_NO_SAME_AS_PREV)
1432	{
1433	if (pPrevPciDev)
1434	{
1435	uPciDevNo = pPrevPciDev->uDevFn >> 3;
1436	uDefPciBusNo = pPrevPciDev->Int.s.pPdmBusR3->iBus;
1437	}
1438	else
1439	{
1440	/* Look for PCI device registered with an earlier device instance so we can more
1441	easily have multiple functions spanning multiple PDM device instances. */
1442	PPDMPCIDEV pOtherPciDev = NULL;
1443	PPDMDEVINS pPrevIns = pDevIns->Internal.s.pDevR3->pInstances;
1444	while (pPrevIns != pDevIns && pPrevIns)
1445	{
1446	pOtherPciDev = pPrevIns->Internal.s.pHeadPciDevR3;
1447	pPrevIns = pPrevIns->Internal.s.pNextR3;
1448	}
1449	Assert(pPrevIns == pDevIns);
1450	AssertLogRelMsgReturn(pOtherPciDev,
1451	("'%s'/%d: Can't use PDMPCIDEVREG_DEV_NO_SAME_AS_PREV without a previously registered PCI device by the same or earlier PDM device instance!\n",
1452	pDevIns->pReg->szName, pDevIns->iInstance),
1453	VERR_WRONG_ORDER);
1454
1455	while (pOtherPciDev->Int.s.pNextR3)
1456	pOtherPciDev = pOtherPciDev->Int.s.pNextR3;
1457	uPciDevNo = pOtherPciDev->uDevFn >> 3;
1458	uDefPciBusNo = pOtherPciDev->Int.s.pPdmBusR3->iBus;
1459	}
1460	}
1461
1462	/*
1463	* Choose the PCI bus for the device.
1464	*
1465	* This is simple. If the device was configured for a particular bus, the PCIBusNo
1466	* configuration value will be set. If not the default bus is 0.
1467	*/
1468	/** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIBusNo, uint8_t, 0, 7, 0}
1469	* Selects the PCI bus number of a device. The default value isn't necessarily
1470	* zero if the device is registered using PDMPCIDEVREG_DEV_NO_SAME_AS_PREV, it
1471	* will then also inherit the bus number from the previously registered device.
1472	*/
1473	uint8_t u8Bus;
1474	int rc = CFGMR3QueryU8Def(pCfg, "PCIBusNo", &u8Bus, (uint8_t)uDefPciBusNo);
1475	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1476	rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1477	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1478	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1479	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1480	VERR_PDM_NO_PCI_BUS);
1481	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1482	if (pBus->pDevInsR3)
1483	{
1484	/*
1485	* Check the configuration for PCI device and function assignment.
1486	*/
1487	/** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIDeviceNo, uint8_t, 0, 31}
1488	* Overrides the default PCI device number of a device.
1489	*/
1490	uint8_t uCfgDevice;
1491	rc = CFGMR3QueryU8(pCfg, "PCIDeviceNo", &uCfgDevice);
1492	if (RT_SUCCESS(rc))
1493	{
1494	AssertMsgReturn(uCfgDevice <= 31,
1495	("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d/%d)\n",
1496	uCfgDevice, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1497	VERR_PDM_BAD_PCI_CONFIG);
1498	uPciDevNo = uCfgDevice;
1499	}
1500	else
1501	AssertMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND \|\| rc == VERR_CFGM_NO_PARENT,
1502	("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d/%d)\n",
1503	rc, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1504	rc);
1505
1506	/** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIFunctionNo, uint8_t, 0, 7}
1507	* Overrides the default PCI function number of a device.
1508	*/
1509	uint8_t uCfgFunction;
1510	rc = CFGMR3QueryU8(pCfg, "PCIFunctionNo", &uCfgFunction);
1511	if (RT_SUCCESS(rc))
1512	{
1513	AssertMsgReturn(uCfgFunction <= 7,
1514	("Configuration error: PCIFunctionNo=%#x, max is 7. (%s/%d/%d)\n",
1515	uCfgFunction, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1516	VERR_PDM_BAD_PCI_CONFIG);
1517	uPciFunNo = uCfgFunction;
1518	}
1519	else
1520	AssertMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND \|\| rc == VERR_CFGM_NO_PARENT,
1521	("Configuration error: PCIFunctionNo query failed with rc=%Rrc (%s/%d/%d)\n",
1522	rc, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1523	rc);
1524
1525
1526	/*
1527	* Initialize the internal data. We only do the wipe and the members
1528	* owned by PDM, the PCI bus does the rest in the registration call.
1529	*/
1530	RT_ZERO(pPciDev->Int);
1531
1532	pPciDev->Int.s.idxDevCfg = idxDevCfg;
1533	pPciDev->Int.s.fReassignableDevNo = uPciDevNoRaw >= VBOX_PCI_MAX_DEVICES;
1534	pPciDev->Int.s.fReassignableFunNo = uPciFunNo >= VBOX_PCI_MAX_FUNCTIONS;
1535	pPciDev->Int.s.pDevInsR3 = pDevIns;
1536	pPciDev->Int.s.pPdmBusR3 = pBus;
1537	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1538	{
1539	pPciDev->Int.s.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
1540	pPciDev->Int.s.pPdmBusR0 = MMHyperR3ToR0(pVM, pBus);
1541	}
1542	else
1543	{
1544	pPciDev->Int.s.pDevInsR0 = NIL_RTR0PTR;
1545	pPciDev->Int.s.pPdmBusR0 = NIL_RTR0PTR;
1546	}
1547
1548	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1549	{
1550	pPciDev->Int.s.pDevInsRC = MMHyperR3ToRC(pVM, pDevIns);
1551	pPciDev->Int.s.pPdmBusRC = MMHyperR3ToRC(pVM, pBus);
1552	}
1553	else
1554	{
1555	pPciDev->Int.s.pDevInsRC = NIL_RTRCPTR;
1556	pPciDev->Int.s.pPdmBusRC = NIL_RTRCPTR;
1557	}
1558
1559	/* Set some of the public members too. */
1560	pPciDev->pszNameR3 = pszName;
1561
1562	/*
1563	* Call the pci bus device to do the actual registration.
1564	*/
1565	pdmLock(pVM);
1566	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName);
1567	pdmUnlock(pVM);
1568	if (RT_SUCCESS(rc))
1569	{
1570
1571	/*
1572	* Link it.
1573	*/
1574	if (pPrevPciDev)
1575	{
1576	Assert(!pPrevPciDev->Int.s.pNextR3);
1577	pPrevPciDev->Int.s.pNextR3 = pPciDev;
1578	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1579	pPrevPciDev->Int.s.pNextR0 = MMHyperR3ToR0(pVM, pPciDev);
1580	else
1581	pPrevPciDev->Int.s.pNextR0 = NIL_RTR0PTR;
1582	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1583	pPrevPciDev->Int.s.pNextRC = MMHyperR3ToRC(pVM, pPciDev);
1584	else
1585	pPrevPciDev->Int.s.pNextRC = NIL_RTRCPTR;
1586	}
1587	else
1588	{
1589	Assert(!pDevIns->Internal.s.pHeadPciDevR3);
1590	pDevIns->Internal.s.pHeadPciDevR3 = pPciDev;
1591	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1592	pDevIns->Internal.s.pHeadPciDevR0 = MMHyperR3ToR0(pVM, pPciDev);
1593	else
1594	pDevIns->Internal.s.pHeadPciDevR0 = NIL_RTR0PTR;
1595	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1596	pDevIns->Internal.s.pHeadPciDevRC = MMHyperR3ToRC(pVM, pPciDev);
1597	else
1598	pDevIns->Internal.s.pHeadPciDevRC = NIL_RTRCPTR;
1599	}
1600
1601	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1602	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->uDevFn, pBus->iBus));
1603	}
1604	}
1605	else
1606	{
1607	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1608	rc = VERR_PDM_NO_PCI_BUS;
1609	}
1610
1611	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1612	return rc;
1613	}
1614
1615
1616	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1617	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
1618	{
1619	PDMDEV_ASSERT_DEVINS(pDevIns);
1620	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1621	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1622	AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1623	LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: pPciDev=%p:{%#x} pMsgReg=%p:{cMsiVectors=%d, cMsixVectors=%d}\n",
1624	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, pMsiReg, pMsiReg->cMsiVectors, pMsiReg->cMsixVectors));
1625
1626	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; Assert(pBus);
1627	PVM pVM = pDevIns->Internal.s.pVMR3;
1628	pdmLock(pVM);
1629	int rc;
1630	if (pBus->pfnRegisterMsiR3)
1631	rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1632	else
1633	rc = VERR_NOT_IMPLEMENTED;
1634	pdmUnlock(pVM);
1635
1636	LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1637	return rc;
1638	}
1639
1640
1641	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1642	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
1643	RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1644	{
1645	PDMDEV_ASSERT_DEVINS(pDevIns);
1646	PVM pVM = pDevIns->Internal.s.pVMR3;
1647	VM_ASSERT_EMT(pVM);
1648	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1649	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1650	AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1651	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%d cbRegion=%RGp enmType=%d pfnCallback=%p\n",
1652	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iRegion, cbRegion, enmType, pfnCallback));
1653
1654	/*
1655	* Validate input.
1656	*/
1657	if (iRegion >= VBOX_PCI_NUM_REGIONS)
1658	{
1659	Assert(iRegion < VBOX_PCI_NUM_REGIONS);
1660	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1661	return VERR_INVALID_PARAMETER;
1662	}
1663
1664	switch ((int)enmType)
1665	{
1666	case PCI_ADDRESS_SPACE_IO:
1667	/*
1668	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
1669	*/
1670	AssertLogRelMsgReturn(cbRegion <= _32K,
1671	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1672	VERR_INVALID_PARAMETER);
1673	break;
1674
1675	case PCI_ADDRESS_SPACE_MEM:
1676	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1677	/*
1678	* Sanity check: Don't allow to register more than 2GB of the PCI MMIO space.
1679	*/
1680	AssertLogRelMsgReturn(cbRegion <= MM_MMIO_32_MAX,
1681	("caller='%s'/%d: %RGp (max %RGp)\n",
1682	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, (RTGCPHYS)MM_MMIO_32_MAX),
1683	VERR_OUT_OF_RANGE);
1684	break;
1685
1686	case PCI_ADDRESS_SPACE_BAR64 \| PCI_ADDRESS_SPACE_MEM:
1687	case PCI_ADDRESS_SPACE_BAR64 \| PCI_ADDRESS_SPACE_MEM_PREFETCH:
1688	/*
1689	* Sanity check: Don't allow to register more than 64GB of the 64-bit PCI MMIO space.
1690	*/
1691	AssertLogRelMsgReturn(cbRegion <= MM_MMIO_64_MAX,
1692	("caller='%s'/%d: %RGp (max %RGp)\n",
1693	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, MM_MMIO_64_MAX),
1694	VERR_OUT_OF_RANGE);
1695	break;
1696
1697	default:
1698	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1699	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1700	return VERR_INVALID_PARAMETER;
1701	}
1702	if (!pfnCallback)
1703	{
1704	Assert(pfnCallback);
1705	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1706	return VERR_INVALID_PARAMETER;
1707	}
1708	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1709
1710	/*
1711	* We're currently restricted to page aligned MMIO regions.
1712	*/
1713	if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 \| PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1714	&& cbRegion != RT_ALIGN_64(cbRegion, PAGE_SIZE))
1715	{
1716	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %RGp -> %RGp\n",
1717	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_64(cbRegion, PAGE_SIZE)));
1718	cbRegion = RT_ALIGN_64(cbRegion, PAGE_SIZE);
1719	}
1720
1721	/*
1722	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1723	*/
1724	int iLastSet = ASMBitLastSetU64(cbRegion);
1725	Assert(iLastSet > 0);
1726	uint64_t cbRegionAligned = RT_BIT_64(iLastSet - 1);
1727	if (cbRegion > cbRegionAligned)
1728	cbRegion = cbRegionAligned * 2; /* round up */
1729
1730	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1731	Assert(pBus);
1732	pdmLock(pVM);
1733	int rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1734	pdmUnlock(pVM);
1735
1736	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1737	return rc;
1738	}
1739
1740
1741	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1742	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1743	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1744	{
1745	PDMDEV_ASSERT_DEVINS(pDevIns);
1746	PVM pVM = pDevIns->Internal.s.pVMR3;
1747	VM_ASSERT_EMT(pVM);
1748	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1749	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1750	AssertReturnVoid(pPciDev);
1751	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1752	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1753
1754	/*
1755	* Validate input and resolve defaults.
1756	*/
1757	AssertPtr(pfnRead);
1758	AssertPtr(pfnWrite);
1759	AssertPtrNull(ppfnReadOld);
1760	AssertPtrNull(ppfnWriteOld);
1761	AssertPtrNull(pPciDev);
1762
1763	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1764	AssertRelease(pBus);
1765	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1766
1767	/*
1768	* Do the job.
1769	*/
1770	pdmLock(pVM);
1771	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1772	pdmUnlock(pVM);
1773
1774	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1775	}
1776
1777
1778	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1779	static DECLCALLBACK(int)
1780	pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1781	{
1782	PDMDEV_ASSERT_DEVINS(pDevIns);
1783	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1784	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1785	AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1786
1787	#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1788	/*
1789	* Just check the busmaster setting here and forward the request to the generic read helper.
1790	*/
1791	if (PCIDevIsBusmaster(pPciDev))
1792	{ /* likely */ }
1793	else
1794	{
1795	Log(("pdmR3DevHlp_PCIPhysRead: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
1796	pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
1797	memset(pvBuf, 0xff, cbRead);
1798	return VERR_PDM_NOT_PCI_BUS_MASTER;
1799	}
1800	#endif
1801
1802	return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
1803	}
1804
1805
1806	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysWrite} */
1807	static DECLCALLBACK(int)
1808	pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1809	{
1810	PDMDEV_ASSERT_DEVINS(pDevIns);
1811	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1812	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1813	AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1814
1815	#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1816	/*
1817	* Just check the busmaster setting here and forward the request to the generic read helper.
1818	*/
1819	if (PCIDevIsBusmaster(pPciDev))
1820	{ /* likely */ }
1821	else
1822	{
1823	Log(("pdmR3DevHlp_PCIPhysWrite: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
1824	pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
1825	return VERR_PDM_NOT_PCI_BUS_MASTER;
1826	}
1827	#endif
1828
1829	return pDevIns->pHlpR3->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
1830	}
1831
1832
1833	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1834	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
1835	{
1836	PDMDEV_ASSERT_DEVINS(pDevIns);
1837	if (!pPciDev) /* NULL is an alias for the default PCI device. */
1838	pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1839	AssertReturnVoid(pPciDev);
1840	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
1841	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
1842
1843	/*
1844	* Validate input.
1845	*/
1846	Assert(iIrq == 0);
1847	Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1848
1849	/*
1850	* Must have a PCI device registered!
1851	*/
1852	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1853	Assert(pBus);
1854	PVM pVM = pDevIns->Internal.s.pVMR3;
1855
1856	pdmLock(pVM);
1857	uint32_t uTagSrc;
1858	if (iLevel & PDM_IRQ_LEVEL_HIGH)
1859	{
1860	pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1861	if (iLevel == PDM_IRQ_LEVEL_HIGH)
1862	VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1863	else
1864	VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1865	}
1866	else
1867	uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1868
1869	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel, uTagSrc);
1870
1871	if (iLevel == PDM_IRQ_LEVEL_LOW)
1872	VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1873	pdmUnlock(pVM);
1874
1875	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1876	}
1877
1878
1879	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1880	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
1881	{
1882	pdmR3DevHlp_PCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
1883	}
1884
1885
1886	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1887	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1888	{
1889	PDMDEV_ASSERT_DEVINS(pDevIns);
1890	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1891
1892	/*
1893	* Validate input.
1894	*/
1895	Assert(iIrq < 16);
1896	Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1897
1898	PVM pVM = pDevIns->Internal.s.pVMR3;
1899
1900	/*
1901	* Do the job.
1902	*/
1903	pdmLock(pVM);
1904	uint32_t uTagSrc;
1905	if (iLevel & PDM_IRQ_LEVEL_HIGH)
1906	{
1907	pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1908	if (iLevel == PDM_IRQ_LEVEL_HIGH)
1909	VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1910	else
1911	VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1912	}
1913	else
1914	uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1915
1916	PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
1917
1918	if (iLevel == PDM_IRQ_LEVEL_LOW)
1919	VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1920	pdmUnlock(pVM);
1921
1922	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1923	}
1924
1925
1926	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1927	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1928	{
1929	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1930	}
1931
1932
1933	/** @interface_method_impl{PDMDEVHLPR3,pfnIoApicSendMsi} */
1934	static DECLCALLBACK(void) pdmR3DevHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue)
1935	{
1936	PDMDEV_ASSERT_DEVINS(pDevIns);
1937	LogFlow(("pdmR3DevHlp_IoApicSendMsi: caller='%s'/%d: GCPhys=%RGp uValue=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, uValue));
1938
1939	/*
1940	* Validate input.
1941	*/
1942	Assert(GCPhys != 0);
1943	Assert(uValue != 0);
1944
1945	PVM pVM = pDevIns->Internal.s.pVMR3;
1946
1947	/*
1948	* Do the job.
1949	*/
1950	pdmLock(pVM);
1951	uint32_t uTagSrc;
1952	pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1953	VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1954
1955	PDMIoApicSendMsi(pVM, GCPhys, uValue, uTagSrc); /* (The API takes the lock recursively.) */
1956
1957	pdmUnlock(pVM);
1958
1959	LogFlow(("pdmR3DevHlp_IoApicSendMsi: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1960	}
1961
1962
1963	/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1964	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
1965	{
1966	PDMDEV_ASSERT_DEVINS(pDevIns);
1967	PVM pVM = pDevIns->Internal.s.pVMR3;
1968	VM_ASSERT_EMT(pVM);
1969	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1970	pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1971
1972	/*
1973	* Lookup the LUN, it might already be registered.
1974	*/
1975	PPDMLUN pLunPrev = NULL;
1976	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1977	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1978	if (pLun->iLun == iLun)
1979	break;
1980
1981	/*
1982	* Create the LUN if if wasn't found, else check if driver is already attached to it.
1983	*/
1984	if (!pLun)
1985	{
1986	if ( !pBaseInterface
1987	\|\| !pszDesc
1988	\|\| !*pszDesc)
1989	{
1990	Assert(pBaseInterface);
1991	Assert(pszDesc \|\| *pszDesc);
1992	return VERR_INVALID_PARAMETER;
1993	}
1994
1995	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1996	if (!pLun)
1997	return VERR_NO_MEMORY;
1998
1999	pLun->iLun = iLun;
2000	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
2001	pLun->pTop = NULL;
2002	pLun->pBottom = NULL;
2003	pLun->pDevIns = pDevIns;
2004	pLun->pUsbIns = NULL;
2005	pLun->pszDesc = pszDesc;
2006	pLun->pBase = pBaseInterface;
2007	if (!pLunPrev)
2008	pDevIns->Internal.s.pLunsR3 = pLun;
2009	else
2010	pLunPrev->pNext = pLun;
2011	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
2012	iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
2013	}
2014	else if (pLun->pTop)
2015	{
2016	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
2017	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
2018	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
2019	}
2020	Assert(pLun->pBase == pBaseInterface);
2021
2022
2023	/*
2024	* Get the attached driver configuration.
2025	*/
2026	int rc;
2027	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
2028	if (pNode)
2029	rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /pDrvAbove/, pLun, ppBaseInterface);
2030	else
2031	rc = VERR_PDM_NO_ATTACHED_DRIVER;
2032
2033	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2034	return rc;
2035	}
2036
2037
2038	/** @interface_method_impl{PDMDEVHLPR3,pfnDriverDetach} */
2039	static DECLCALLBACK(int) pdmR3DevHlp_DriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
2040	{
2041	PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
2042	LogFlow(("pdmR3DevHlp_DriverDetach: caller='%s'/%d: pDrvIns=%p\n",
2043	pDevIns->pReg->szName, pDevIns->iInstance, pDrvIns));
2044
2045	#ifdef VBOX_STRICT
2046	PVM pVM = pDevIns->Internal.s.pVMR3;
2047	VM_ASSERT_EMT(pVM);
2048	#endif
2049
2050	int rc = pdmR3DrvDetach(pDrvIns, fFlags);
2051
2052	LogFlow(("pdmR3DevHlp_DriverDetach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2053	return rc;
2054	}
2055
2056
2057	/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
2058	static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
2059	PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char pszName, PPDMQUEUE ppQueue)
2060	{
2061	PDMDEV_ASSERT_DEVINS(pDevIns);
2062	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fRZEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
2063	pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, pszName, ppQueue));
2064
2065	PVM pVM = pDevIns->Internal.s.pVMR3;
2066	VM_ASSERT_EMT(pVM);
2067
2068	if (pDevIns->iInstance > 0)
2069	{
2070	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
2071	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
2072	}
2073
2074	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
2075
2076	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, ppQueue));
2077	return rc;
2078	}
2079
2080
2081	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
2082	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2083	const char *pszNameFmt, va_list va)
2084	{
2085	PDMDEV_ASSERT_DEVINS(pDevIns);
2086	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
2087	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
2088
2089	PVM pVM = pDevIns->Internal.s.pVMR3;
2090	VM_ASSERT_EMT(pVM);
2091	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
2092
2093	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2094	return rc;
2095	}
2096
2097
2098	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
2099	static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
2100	{
2101	PDMDEV_ASSERT_DEVINS(pDevIns);
2102	PVM pVM = pDevIns->Internal.s.pVMR3;
2103	VM_ASSERT_EMT(pVM);
2104
2105	PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
2106	LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
2107	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2108	return pCritSect;
2109	}
2110
2111
2112	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
2113	static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
2114	{
2115	PDMDEV_ASSERT_DEVINS(pDevIns);
2116	PVM pVM = pDevIns->Internal.s.pVMR3;
2117	VM_ASSERT_EMT(pVM);
2118
2119	R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
2120	LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
2121	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2122	return pCritSect;
2123	}
2124
2125
2126	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
2127	static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
2128	{
2129	PDMDEV_ASSERT_DEVINS(pDevIns);
2130	PVM pVM = pDevIns->Internal.s.pVMR3;
2131	VM_ASSERT_EMT(pVM);
2132
2133	RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
2134	LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
2135	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2136	return pCritSect;
2137	}
2138
2139
2140	/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
2141	static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
2142	{
2143	/*
2144	* Validate input.
2145	*
2146	* Note! We only allow the automatically created default critical section
2147	* to be replaced by this API.
2148	*/
2149	PDMDEV_ASSERT_DEVINS(pDevIns);
2150	AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
2151	LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
2152	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
2153	AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
2154	PVM pVM = pDevIns->Internal.s.pVMR3;
2155	AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
2156
2157	VM_ASSERT_EMT(pVM);
2158	VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
2159
2160	AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1);
2161	AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
2162	AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
2163	AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
2164
2165	/*
2166	* Replace the critical section and destroy the automatic default section.
2167	*/
2168	PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
2169	pDevIns->pCritSectRoR3 = pCritSect;
2170	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2171	pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
2172	else
2173	Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
2174
2175	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2176	pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
2177	else
2178	Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
2179
2180	PDMR3CritSectDelete(pOldCritSect);
2181	if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0))
2182	MMHyperFree(pVM, pOldCritSect);
2183	else
2184	MMR3HeapFree(pOldCritSect);
2185
2186	LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2187	return VINF_SUCCESS;
2188	}
2189
2190
2191	/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
2192	static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2193	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
2194	{
2195	PDMDEV_ASSERT_DEVINS(pDevIns);
2196	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2197	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
2198	pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
2199
2200	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
2201
2202	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
2203	rc, *ppThread));
2204	return rc;
2205	}
2206
2207
2208	/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
2209	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2210	{
2211	PDMDEV_ASSERT_DEVINS(pDevIns);
2212	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2213	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
2214
2215	int rc = VINF_SUCCESS;
2216	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2217	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2218	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2219	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2220	AssertStmt( enmVMState == VMSTATE_SUSPENDING
2221	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2222	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2223	\|\| enmVMState == VMSTATE_RESETTING
2224	\|\| enmVMState == VMSTATE_RESETTING_LS
2225	\|\| enmVMState == VMSTATE_POWERING_OFF
2226	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
2227	rc = VERR_INVALID_STATE);
2228
2229	if (RT_SUCCESS(rc))
2230	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2231
2232	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2233	return rc;
2234	}
2235
2236
2237	/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
2238	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2239	{
2240	PDMDEV_ASSERT_DEVINS(pDevIns);
2241	PVM pVM = pDevIns->Internal.s.pVMR3;
2242
2243	VMSTATE enmVMState = VMR3GetState(pVM);
2244	if ( enmVMState == VMSTATE_SUSPENDING
2245	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2246	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2247	\|\| enmVMState == VMSTATE_RESETTING
2248	\|\| enmVMState == VMSTATE_RESETTING_LS
2249	\|\| enmVMState == VMSTATE_POWERING_OFF
2250	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
2251	{
2252	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
2253	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2254	}
2255	else
2256	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
2257	}
2258
2259
2260	/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
2261	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
2262	{
2263	PDMDEV_ASSERT_DEVINS(pDevIns);
2264	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2265	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
2266	pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
2267	pRtcReg->pfnWrite, ppRtcHlp));
2268
2269	/*
2270	* Validate input.
2271	*/
2272	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
2273	{
2274	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
2275	PDM_RTCREG_VERSION));
2276	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
2277	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2278	return VERR_INVALID_PARAMETER;
2279	}
2280	if ( !pRtcReg->pfnWrite
2281	\|\| !pRtcReg->pfnRead)
2282	{
2283	Assert(pRtcReg->pfnWrite);
2284	Assert(pRtcReg->pfnRead);
2285	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2286	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2287	return VERR_INVALID_PARAMETER;
2288	}
2289
2290	if (!ppRtcHlp)
2291	{
2292	Assert(ppRtcHlp);
2293	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
2294	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2295	return VERR_INVALID_PARAMETER;
2296	}
2297
2298	/*
2299	* Only one DMA device.
2300	*/
2301	PVM pVM = pDevIns->Internal.s.pVMR3;
2302	if (pVM->pdm.s.pRtc)
2303	{
2304	AssertMsgFailed(("Only one RTC device is supported!\n"));
2305	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
2306	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2307	return VERR_INVALID_PARAMETER;
2308	}
2309
2310	/*
2311	* Allocate and initialize pci bus structure.
2312	*/
2313	int rc = VINF_SUCCESS;
2314	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
2315	if (pRtc)
2316	{
2317	pRtc->pDevIns = pDevIns;
2318	pRtc->Reg = *pRtcReg;
2319	pVM->pdm.s.pRtc = pRtc;
2320
2321	/* set the helper pointer. */
2322	*ppRtcHlp = &g_pdmR3DevRtcHlp;
2323	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
2324	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2325	}
2326	else
2327	rc = VERR_NO_MEMORY;
2328
2329	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
2330	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2331	return rc;
2332	}
2333
2334
2335	/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
2336	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2337	{
2338	PDMDEV_ASSERT_DEVINS(pDevIns);
2339	PVM pVM = pDevIns->Internal.s.pVMR3;
2340	VM_ASSERT_EMT(pVM);
2341	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2342	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2343	int rc = VINF_SUCCESS;
2344	if (pVM->pdm.s.pDmac)
2345	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2346	else
2347	{
2348	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2349	rc = VERR_PDM_NO_DMAC_INSTANCE;
2350	}
2351	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2352	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2353	return rc;
2354	}
2355
2356
2357	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
2358	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2359	{
2360	PDMDEV_ASSERT_DEVINS(pDevIns);
2361	PVM pVM = pDevIns->Internal.s.pVMR3;
2362	VM_ASSERT_EMT(pVM);
2363	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2364	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2365	int rc = VINF_SUCCESS;
2366	if (pVM->pdm.s.pDmac)
2367	{
2368	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2369	if (pcbRead)
2370	*pcbRead = cb;
2371	}
2372	else
2373	{
2374	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2375	rc = VERR_PDM_NO_DMAC_INSTANCE;
2376	}
2377	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2378	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2379	return rc;
2380	}
2381
2382
2383	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
2384	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2385	{
2386	PDMDEV_ASSERT_DEVINS(pDevIns);
2387	PVM pVM = pDevIns->Internal.s.pVMR3;
2388	VM_ASSERT_EMT(pVM);
2389	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2390	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2391	int rc = VINF_SUCCESS;
2392	if (pVM->pdm.s.pDmac)
2393	{
2394	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2395	if (pcbWritten)
2396	*pcbWritten = cb;
2397	}
2398	else
2399	{
2400	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2401	rc = VERR_PDM_NO_DMAC_INSTANCE;
2402	}
2403	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2404	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2405	return rc;
2406	}
2407
2408
2409	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
2410	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2411	{
2412	PDMDEV_ASSERT_DEVINS(pDevIns);
2413	PVM pVM = pDevIns->Internal.s.pVMR3;
2414	VM_ASSERT_EMT(pVM);
2415	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2416	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
2417	int rc = VINF_SUCCESS;
2418	if (pVM->pdm.s.pDmac)
2419	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2420	else
2421	{
2422	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2423	rc = VERR_PDM_NO_DMAC_INSTANCE;
2424	}
2425	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2426	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2427	return rc;
2428	}
2429
2430	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
2431	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2432	{
2433	PDMDEV_ASSERT_DEVINS(pDevIns);
2434	PVM pVM = pDevIns->Internal.s.pVMR3;
2435	VM_ASSERT_EMT(pVM);
2436	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2437	pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
2438	uint8_t u8Mode;
2439	if (pVM->pdm.s.pDmac)
2440	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2441	else
2442	{
2443	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2444	u8Mode = 3 << 2 /* illegal mode type */;
2445	}
2446	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2447	pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
2448	return u8Mode;
2449	}
2450
2451	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
2452	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2453	{
2454	PDMDEV_ASSERT_DEVINS(pDevIns);
2455	PVM pVM = pDevIns->Internal.s.pVMR3;
2456	VM_ASSERT_EMT(pVM);
2457	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2458	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_IS_SET(pVM, VM_FF_PDM_DMA)));
2459
2460	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2461	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2462	#ifdef VBOX_WITH_REM
2463	REMR3NotifyDmaPending(pVM);
2464	#endif
2465	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2466	}
2467
2468
2469	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
2470	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2471	{
2472	PDMDEV_ASSERT_DEVINS(pDevIns);
2473	PVM pVM = pDevIns->Internal.s.pVMR3;
2474	VM_ASSERT_EMT(pVM);
2475
2476	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2477	pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
2478	int rc;
2479	if (pVM->pdm.s.pRtc)
2480	{
2481	PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2482	rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2483	if (RT_SUCCESS(rc))
2484	{
2485	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pDevInsRtc, iReg, u8Value);
2486	PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2487	}
2488	}
2489	else
2490	rc = VERR_PDM_NO_RTC_INSTANCE;
2491
2492	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2493	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2494	return rc;
2495	}
2496
2497
2498	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
2499	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2500	{
2501	PDMDEV_ASSERT_DEVINS(pDevIns);
2502	PVM pVM = pDevIns->Internal.s.pVMR3;
2503	VM_ASSERT_EMT(pVM);
2504
2505	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2506	pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
2507	int rc;
2508	if (pVM->pdm.s.pRtc)
2509	{
2510	PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2511	rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2512	if (RT_SUCCESS(rc))
2513	{
2514	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pDevInsRtc, iReg, pu8Value);
2515	PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2516	}
2517	}
2518	else
2519	rc = VERR_PDM_NO_RTC_INSTANCE;
2520
2521	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2522	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2523	return rc;
2524	}
2525
2526
2527	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
2528	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
2529	{
2530	PDMDEV_ASSERT_DEVINS(pDevIns);
2531	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2532	return true;
2533
2534	char szMsg[100];
2535	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2536	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2537	AssertBreakpoint();
2538	return false;
2539	}
2540
2541
2542	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
2543	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
2544	{
2545	PDMDEV_ASSERT_DEVINS(pDevIns);
2546	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2547	return true;
2548
2549	char szMsg[100];
2550	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2551	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2552	AssertBreakpoint();
2553	return false;
2554	}
2555
2556
2557	/** @interface_method_impl{PDMDEVHLPR3,pfnLdrGetRCInterfaceSymbols} */
2558	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2559	const char pszSymPrefix, const char pszSymList)
2560	{
2561	PDMDEV_ASSERT_DEVINS(pDevIns);
2562	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2563	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2564	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2565
2566	int rc;
2567	if ( strncmp(pszSymPrefix, "dev", 3) == 0
2568	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2569	{
2570	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2571	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2572	pvInterface, cbInterface,
2573	pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2574	pszSymPrefix, pszSymList,
2575	false /fRing0OrRC/);
2576	else
2577	{
2578	AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2579	rc = VERR_PERMISSION_DENIED;
2580	}
2581	}
2582	else
2583	{
2584	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2585	pszSymPrefix, pDevIns->pReg->szName));
2586	rc = VERR_INVALID_NAME;
2587	}
2588
2589	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2590	pDevIns->iInstance, rc));
2591	return rc;
2592	}
2593
2594
2595	/** @interface_method_impl{PDMDEVHLPR3,pfnLdrGetR0InterfaceSymbols} */
2596	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2597	const char pszSymPrefix, const char pszSymList)
2598	{
2599	PDMDEV_ASSERT_DEVINS(pDevIns);
2600	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2601	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2602	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2603
2604	int rc;
2605	if ( strncmp(pszSymPrefix, "dev", 3) == 0
2606	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2607	{
2608	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2609	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2610	pvInterface, cbInterface,
2611	pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2612	pszSymPrefix, pszSymList,
2613	true /fRing0OrRC/);
2614	else
2615	{
2616	AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2617	rc = VERR_PERMISSION_DENIED;
2618	}
2619	}
2620	else
2621	{
2622	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2623	pszSymPrefix, pDevIns->pReg->szName));
2624	rc = VERR_INVALID_NAME;
2625	}
2626
2627	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2628	pDevIns->iInstance, rc));
2629	return rc;
2630	}
2631
2632
2633	/** @interface_method_impl{PDMDEVHLPR3,pfnCallR0} */
2634	static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2635	{
2636	PDMDEV_ASSERT_DEVINS(pDevIns);
2637	PVM pVM = pDevIns->Internal.s.pVMR3;
2638	VM_ASSERT_EMT(pVM);
2639	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2640	pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2641
2642	/*
2643	* Resolve the ring-0 entry point. There is not need to remember this like
2644	* we do for drivers since this is mainly for construction time hacks and
2645	* other things that aren't performance critical.
2646	*/
2647	int rc;
2648	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2649	{
2650	char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2651	strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2652	szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2653
2654	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2655	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2656	if (RT_SUCCESS(rc))
2657	{
2658	/*
2659	* Make the ring-0 call.
2660	*/
2661	PDMDEVICECALLREQHANDLERREQ Req;
2662	Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2663	Req.Hdr.cbReq = sizeof(Req);
2664	Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2665	Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2666	Req.uOperation = uOperation;
2667	Req.u32Alignment = 0;
2668	Req.u64Arg = u64Arg;
2669	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2670	}
2671	else
2672	pfnReqHandlerR0 = NIL_RTR0PTR;
2673	}
2674	else
2675	rc = VERR_ACCESS_DENIED;
2676	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2677	pDevIns->iInstance, rc));
2678	return rc;
2679	}
2680
2681
2682	/** @interface_method_impl{PDMDEVHLPR3,pfnVMGetSuspendReason} */
2683	static DECLCALLBACK(VMSUSPENDREASON) pdmR3DevHlp_VMGetSuspendReason(PPDMDEVINS pDevIns)
2684	{
2685	PDMDEV_ASSERT_DEVINS(pDevIns);
2686	PVM pVM = pDevIns->Internal.s.pVMR3;
2687	VM_ASSERT_EMT(pVM);
2688	VMSUSPENDREASON enmReason = VMR3GetSuspendReason(pVM->pUVM);
2689	LogFlow(("pdmR3DevHlp_VMGetSuspendReason: caller='%s'/%d: returns %d\n",
2690	pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2691	return enmReason;
2692	}
2693
2694
2695	/** @interface_method_impl{PDMDEVHLPR3,pfnVMGetResumeReason} */
2696	static DECLCALLBACK(VMRESUMEREASON) pdmR3DevHlp_VMGetResumeReason(PPDMDEVINS pDevIns)
2697	{
2698	PDMDEV_ASSERT_DEVINS(pDevIns);
2699	PVM pVM = pDevIns->Internal.s.pVMR3;
2700	VM_ASSERT_EMT(pVM);
2701	VMRESUMEREASON enmReason = VMR3GetResumeReason(pVM->pUVM);
2702	LogFlow(("pdmR3DevHlp_VMGetResumeReason: caller='%s'/%d: returns %d\n",
2703	pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2704	return enmReason;
2705	}
2706
2707
2708	/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
2709	static DECLCALLBACK(PUVM) pdmR3DevHlp_GetUVM(PPDMDEVINS pDevIns)
2710	{
2711	PDMDEV_ASSERT_DEVINS(pDevIns);
2712	LogFlow(("pdmR3DevHlp_GetUVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2713	return pDevIns->Internal.s.pVMR3->pUVM;
2714	}
2715
2716
2717	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2718	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2719	{
2720	PDMDEV_ASSERT_DEVINS(pDevIns);
2721	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2722	return pDevIns->Internal.s.pVMR3;
2723	}
2724
2725
2726	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2727	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2728	{
2729	PDMDEV_ASSERT_DEVINS(pDevIns);
2730	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2731	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2732	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2733	}
2734
2735
2736	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCurrentCpuId} */
2737	static DECLCALLBACK(VMCPUID) pdmR3DevHlp_GetCurrentCpuId(PPDMDEVINS pDevIns)
2738	{
2739	PDMDEV_ASSERT_DEVINS(pDevIns);
2740	VMCPUID idCpu = VMMGetCpuId(pDevIns->Internal.s.pVMR3);
2741	LogFlow(("pdmR3DevHlp_GetCurrentCpuId: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, idCpu));
2742	return idCpu;
2743	}
2744
2745
2746	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2747	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg,
2748	PCPDMPCIHLPR3 ppPciHlpR3, uint32_t piBus)
2749	{
2750	PDMDEV_ASSERT_DEVINS(pDevIns);
2751	PVM pVM = pDevIns->Internal.s.pVMR3;
2752	VM_ASSERT_EMT(pVM);
2753	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, "
2754	".pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p piBus=%p\n",
2755	pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2756	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC,
2757	pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3, piBus));
2758
2759	/*
2760	* Validate the structure.
2761	*/
2762	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2763	{
2764	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2765	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2766	return VERR_INVALID_PARAMETER;
2767	}
2768	if ( !pPciBusReg->pfnRegisterR3
2769	\|\| !pPciBusReg->pfnIORegionRegisterR3
2770	\|\| !pPciBusReg->pfnSetIrqR3)
2771	{
2772	Assert(pPciBusReg->pfnRegisterR3);
2773	Assert(pPciBusReg->pfnIORegionRegisterR3);
2774	Assert(pPciBusReg->pfnSetIrqR3);
2775	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2776	return VERR_INVALID_PARAMETER;
2777	}
2778	if ( pPciBusReg->pszSetIrqRC
2779	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
2780	{
2781	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2782	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2783	return VERR_INVALID_PARAMETER;
2784	}
2785	if ( pPciBusReg->pszSetIrqR0
2786	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
2787	{
2788	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2789	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2790	return VERR_INVALID_PARAMETER;
2791	}
2792	if (!ppPciHlpR3)
2793	{
2794	Assert(ppPciHlpR3);
2795	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2796	return VERR_INVALID_PARAMETER;
2797	}
2798	AssertLogRelMsgReturn(RT_VALID_PTR(piBus) \|\| !piBus,
2799	("caller='%s'/%d: piBus=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, piBus),
2800	VERR_INVALID_POINTER);
2801
2802	/*
2803	* Find free PCI bus entry.
2804	*/
2805	unsigned iBus = 0;
2806	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2807	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2808	break;
2809	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2810	{
2811	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2812	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2813	return VERR_INVALID_PARAMETER;
2814	}
2815	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2816
2817	/*
2818	* Resolve and init the RC bits.
2819	*/
2820	if (pPciBusReg->pszSetIrqRC)
2821	{
2822	int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2823	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2824	if (RT_FAILURE(rc))
2825	{
2826	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2827	return rc;
2828	}
2829	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2830	}
2831	else
2832	{
2833	pPciBus->pfnSetIrqRC = 0;
2834	pPciBus->pDevInsRC = 0;
2835	}
2836
2837	/*
2838	* Resolve and init the R0 bits.
2839	*/
2840	if (pPciBusReg->pszSetIrqR0)
2841	{
2842	int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2843	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2844	if (RT_FAILURE(rc))
2845	{
2846	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2847	return rc;
2848	}
2849	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2850	}
2851	else
2852	{
2853	pPciBus->pfnSetIrqR0 = 0;
2854	pPciBus->pDevInsR0 = 0;
2855	}
2856
2857	/*
2858	* Init the R3 bits.
2859	*/
2860	pPciBus->iBus = iBus;
2861	pPciBus->pDevInsR3 = pDevIns;
2862	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2863	pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2864	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2865	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2866	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2867
2868	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2869
2870	/* set the helper pointer and return. */
2871	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
2872	if (piBus)
2873	*piBus = iBus;
2874	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc *piBus=%u\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS, iBus));
2875	return VINF_SUCCESS;
2876	}
2877
2878
2879	/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2880	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2881	{
2882	PDMDEV_ASSERT_DEVINS(pDevIns);
2883	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2884	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2885	pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2886	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2887	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2888	ppPicHlpR3));
2889
2890	/*
2891	* Validate input.
2892	*/
2893	if (pPicReg->u32Version != PDM_PICREG_VERSION)
2894	{
2895	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2896	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2897	return VERR_INVALID_PARAMETER;
2898	}
2899	if ( !pPicReg->pfnSetIrqR3
2900	\|\| !pPicReg->pfnGetInterruptR3)
2901	{
2902	Assert(pPicReg->pfnSetIrqR3);
2903	Assert(pPicReg->pfnGetInterruptR3);
2904	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2905	return VERR_INVALID_PARAMETER;
2906	}
2907	if ( ( pPicReg->pszSetIrqRC
2908	\|\| pPicReg->pszGetInterruptRC)
2909	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
2910	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
2911	)
2912	{
2913	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2914	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2915	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2916	return VERR_INVALID_PARAMETER;
2917	}
2918	if ( pPicReg->pszSetIrqRC
2919	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2920	{
2921	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2922	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2923	return VERR_INVALID_PARAMETER;
2924	}
2925	if ( pPicReg->pszSetIrqR0
2926	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2927	{
2928	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2929	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2930	return VERR_INVALID_PARAMETER;
2931	}
2932	if (!ppPicHlpR3)
2933	{
2934	Assert(ppPicHlpR3);
2935	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2936	return VERR_INVALID_PARAMETER;
2937	}
2938
2939	/*
2940	* Only one PIC device.
2941	*/
2942	PVM pVM = pDevIns->Internal.s.pVMR3;
2943	if (pVM->pdm.s.Pic.pDevInsR3)
2944	{
2945	AssertMsgFailed(("Only one pic device is supported!\n"));
2946	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2947	return VERR_INVALID_PARAMETER;
2948	}
2949
2950	/*
2951	* RC stuff.
2952	*/
2953	if (pPicReg->pszSetIrqRC)
2954	{
2955	int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2956	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2957	if (RT_SUCCESS(rc))
2958	{
2959	rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2960	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2961	}
2962	if (RT_FAILURE(rc))
2963	{
2964	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2965	return rc;
2966	}
2967	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2968	}
2969	else
2970	{
2971	pVM->pdm.s.Pic.pDevInsRC = 0;
2972	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2973	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2974	}
2975
2976	/*
2977	* R0 stuff.
2978	*/
2979	if (pPicReg->pszSetIrqR0)
2980	{
2981	int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2982	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2983	if (RT_SUCCESS(rc))
2984	{
2985	rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2986	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2987	}
2988	if (RT_FAILURE(rc))
2989	{
2990	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2991	return rc;
2992	}
2993	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2994	Assert(pVM->pdm.s.Pic.pDevInsR0);
2995	}
2996	else
2997	{
2998	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2999	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
3000	pVM->pdm.s.Pic.pDevInsR0 = 0;
3001	}
3002
3003	/*
3004	* R3 stuff.
3005	*/
3006	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
3007	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
3008	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
3009	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3010
3011	/* set the helper pointer and return. */
3012	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
3013	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3014	return VINF_SUCCESS;
3015	}
3016
3017
3018	/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
3019	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns)
3020	{
3021	PDMDEV_ASSERT_DEVINS(pDevIns);
3022	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3023
3024	/*
3025	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
3026	* as they need to communicate and share state easily.
3027	*/
3028	PVM pVM = pDevIns->Internal.s.pVMR3;
3029	if (pVM->pdm.s.Apic.pDevInsR3)
3030	{
3031	AssertMsgFailed(("Only one APIC device is supported!\n"));
3032	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3033	return VERR_INVALID_PARAMETER;
3034	}
3035
3036	/*
3037	* Initialize the RC, R0 and HC bits.
3038	*/
3039	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3040	Assert(pVM->pdm.s.Apic.pDevInsRC);
3041
3042	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3043	Assert(pVM->pdm.s.Apic.pDevInsR0);
3044
3045	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
3046	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3047	return VINF_SUCCESS;
3048	}
3049
3050
3051	/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
3052	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
3053	{
3054	PDMDEV_ASSERT_DEVINS(pDevIns);
3055	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3056	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
3057	pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
3058	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
3059
3060	/*
3061	* Validate input.
3062	*/
3063	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
3064	{
3065	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
3066	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3067	return VERR_INVALID_PARAMETER;
3068	}
3069	if (!pIoApicReg->pfnSetIrqR3 \|\| !pIoApicReg->pfnSendMsiR3 \|\| !pIoApicReg->pfnSetEoiR3)
3070	{
3071	Assert(pIoApicReg->pfnSetIrqR3);
3072	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3073	return VERR_INVALID_PARAMETER;
3074	}
3075	if ( pIoApicReg->pszSetIrqRC
3076	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
3077	{
3078	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
3079	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3080	return VERR_INVALID_PARAMETER;
3081	}
3082	if ( pIoApicReg->pszSendMsiRC
3083	&& !VALID_PTR(pIoApicReg->pszSendMsiRC))
3084	{
3085	Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
3086	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3087	return VERR_INVALID_PARAMETER;
3088	}
3089	if ( pIoApicReg->pszSetEoiRC
3090	&& !VALID_PTR(pIoApicReg->pszSetEoiRC))
3091	{
3092	Assert(VALID_PTR(pIoApicReg->pszSetEoiRC));
3093	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3094	return VERR_INVALID_PARAMETER;
3095	}
3096	if ( pIoApicReg->pszSetIrqR0
3097	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
3098	{
3099	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
3100	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3101	return VERR_INVALID_PARAMETER;
3102	}
3103	if ( pIoApicReg->pszSendMsiR0
3104	&& !VALID_PTR(pIoApicReg->pszSendMsiR0))
3105	{
3106	Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
3107	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3108	return VERR_INVALID_PARAMETER;
3109	}
3110	if ( pIoApicReg->pszSetEoiR0
3111	&& !VALID_PTR(pIoApicReg->pszSetEoiR0))
3112	{
3113	Assert(VALID_PTR(pIoApicReg->pszSetEoiR0));
3114	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3115	return VERR_INVALID_PARAMETER;
3116	}
3117	if (!ppIoApicHlpR3)
3118	{
3119	Assert(ppIoApicHlpR3);
3120	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3121	return VERR_INVALID_PARAMETER;
3122	}
3123
3124	/*
3125	* The I/O APIC requires the APIC to be present (hacks++).
3126	* If the I/O APIC does GC stuff so must the APIC.
3127	*/
3128	PVM pVM = pDevIns->Internal.s.pVMR3;
3129	if (!pVM->pdm.s.Apic.pDevInsR3)
3130	{
3131	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
3132	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3133	return VERR_INVALID_PARAMETER;
3134	}
3135	if ( pIoApicReg->pszSetIrqRC
3136	&& !pVM->pdm.s.Apic.pDevInsRC)
3137	{
3138	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
3139	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3140	return VERR_INVALID_PARAMETER;
3141	}
3142
3143	/*
3144	* Only one I/O APIC device.
3145	*/
3146	if (pVM->pdm.s.IoApic.pDevInsR3)
3147	{
3148	AssertMsgFailed(("Only one ioapic device is supported!\n"));
3149	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3150	return VERR_INVALID_PARAMETER;
3151	}
3152
3153	/*
3154	* Resolve & initialize the GC bits.
3155	*/
3156	if (pIoApicReg->pszSetIrqRC)
3157	{
3158	int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
3159	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
3160	if (RT_FAILURE(rc))
3161	{
3162	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3163	return rc;
3164	}
3165	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3166	}
3167	else
3168	{
3169	pVM->pdm.s.IoApic.pDevInsRC = 0;
3170	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
3171	}
3172
3173	if (pIoApicReg->pszSendMsiRC)
3174	{
3175	int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSendMsiRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
3176	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
3177	if (RT_FAILURE(rc))
3178	{
3179	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3180	return rc;
3181	}
3182	}
3183	else
3184	{
3185	pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
3186	}
3187
3188	if (pIoApicReg->pszSetEoiRC)
3189	{
3190	int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetEoiRC, &pVM->pdm.s.IoApic.pfnSetEoiRC);
3191	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetEoiRC, rc));
3192	if (RT_FAILURE(rc))
3193	{
3194	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3195	return rc;
3196	}
3197	}
3198	else
3199	{
3200	pVM->pdm.s.IoApic.pfnSetEoiRC = 0;
3201	}
3202
3203	/*
3204	* Resolve & initialize the R0 bits.
3205	*/
3206	if (pIoApicReg->pszSetIrqR0)
3207	{
3208	int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3209	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3210	if (RT_FAILURE(rc))
3211	{
3212	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3213	return rc;
3214	}
3215	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3216	Assert(pVM->pdm.s.IoApic.pDevInsR0);
3217	}
3218	else
3219	{
3220	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3221	pVM->pdm.s.IoApic.pDevInsR0 = 0;
3222	}
3223
3224	if (pIoApicReg->pszSendMsiR0)
3225	{
3226	int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSendMsiR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
3227	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
3228	if (RT_FAILURE(rc))
3229	{
3230	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3231	return rc;
3232	}
3233	}
3234	else
3235	{
3236	pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
3237	}
3238
3239	if (pIoApicReg->pszSetEoiR0)
3240	{
3241	int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetEoiR0, &pVM->pdm.s.IoApic.pfnSetEoiR0);
3242	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetEoiR0, rc));
3243	if (RT_FAILURE(rc))
3244	{
3245	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3246	return rc;
3247	}
3248	}
3249	else
3250	{
3251	pVM->pdm.s.IoApic.pfnSetEoiR0 = 0;
3252	}
3253
3254
3255	/*
3256	* Initialize the R3 bits.
3257	*/
3258	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3259	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
3260	pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
3261	pVM->pdm.s.IoApic.pfnSetEoiR3 = pIoApicReg->pfnSetEoiR3;
3262	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3263
3264	/* set the helper pointer and return. */
3265	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3266	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3267	return VINF_SUCCESS;
3268	}
3269
3270
3271	/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
3272	static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
3273	{
3274	PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
3275	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3276	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
3277
3278	/*
3279	* Validate input.
3280	*/
3281	if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
3282	{
3283	AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
3284	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3285	return VERR_INVALID_PARAMETER;
3286	}
3287
3288	if (!ppHpetHlpR3)
3289	{
3290	Assert(ppHpetHlpR3);
3291	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3292	return VERR_INVALID_PARAMETER;
3293	}
3294
3295	/* set the helper pointer and return. */
3296	*ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
3297	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3298	return VINF_SUCCESS;
3299	}
3300
3301
3302	/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
3303	static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
3304	{
3305	PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
3306	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3307	LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
3308
3309	/*
3310	* Validate input.
3311	*/
3312	if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
3313	{
3314	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
3315	LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3316	return VERR_INVALID_PARAMETER;
3317	}
3318
3319	if (!ppPciRawHlpR3)
3320	{
3321	Assert(ppPciRawHlpR3);
3322	LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppPciRawHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3323	return VERR_INVALID_PARAMETER;
3324	}
3325
3326	/* set the helper pointer and return. */
3327	*ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
3328	LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3329	return VINF_SUCCESS;
3330	}
3331
3332
3333	/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
3334	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3335	{
3336	PDMDEV_ASSERT_DEVINS(pDevIns);
3337	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3338	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3339	pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3340	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3341
3342	/*
3343	* Validate input.
3344	*/
3345	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3346	{
3347	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3348	PDM_DMACREG_VERSION));
3349	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
3350	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3351	return VERR_INVALID_PARAMETER;
3352	}
3353	if ( !pDmacReg->pfnRun
3354	\|\| !pDmacReg->pfnRegister
3355	\|\| !pDmacReg->pfnReadMemory
3356	\|\| !pDmacReg->pfnWriteMemory
3357	\|\| !pDmacReg->pfnSetDREQ
3358	\|\| !pDmacReg->pfnGetChannelMode)
3359	{
3360	Assert(pDmacReg->pfnRun);
3361	Assert(pDmacReg->pfnRegister);
3362	Assert(pDmacReg->pfnReadMemory);
3363	Assert(pDmacReg->pfnWriteMemory);
3364	Assert(pDmacReg->pfnSetDREQ);
3365	Assert(pDmacReg->pfnGetChannelMode);
3366	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3367	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3368	return VERR_INVALID_PARAMETER;
3369	}
3370
3371	if (!ppDmacHlp)
3372	{
3373	Assert(ppDmacHlp);
3374	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
3375	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3376	return VERR_INVALID_PARAMETER;
3377	}
3378
3379	/*
3380	* Only one DMA device.
3381	*/
3382	PVM pVM = pDevIns->Internal.s.pVMR3;
3383	if (pVM->pdm.s.pDmac)
3384	{
3385	AssertMsgFailed(("Only one DMA device is supported!\n"));
3386	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3387	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3388	return VERR_INVALID_PARAMETER;
3389	}
3390
3391	/*
3392	* Allocate and initialize pci bus structure.
3393	*/
3394	int rc = VINF_SUCCESS;
3395	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3396	if (pDmac)
3397	{
3398	pDmac->pDevIns = pDevIns;
3399	pDmac->Reg = *pDmacReg;
3400	pVM->pdm.s.pDmac = pDmac;
3401
3402	/* set the helper pointer. */
3403	*ppDmacHlp = &g_pdmR3DevDmacHlp;
3404	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3405	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3406	}
3407	else
3408	rc = VERR_NO_MEMORY;
3409
3410	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3411	pDevIns->pReg->szName, pDevIns->iInstance, rc));
3412	return rc;
3413	}
3414
3415
3416	/**
3417	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3418	*/
3419	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap)
3420	{
3421	PDMDEV_ASSERT_DEVINS(pDevIns);
3422	PVM pVM = pDevIns->Internal.s.pVMR3;
3423	VM_ASSERT_EMT(pVM);
3424	LogFlow(("pdmR3DevHlp_RegisterVMMDevHeap: caller='%s'/%d: GCPhys=%RGp pvHeap=%p cbHeap=%#x\n",
3425	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvHeap, cbHeap));
3426
3427	if (pVM->pdm.s.pvVMMDevHeap == NULL)
3428	{
3429	pVM->pdm.s.pvVMMDevHeap = pvHeap;
3430	pVM->pdm.s.GCPhysVMMDevHeap = GCPhys;
3431	pVM->pdm.s.cbVMMDevHeap = cbHeap;
3432	pVM->pdm.s.cbVMMDevHeapLeft = cbHeap;
3433	}
3434	else
3435	{
3436	Assert(pVM->pdm.s.pvVMMDevHeap == pvHeap);
3437	Assert(pVM->pdm.s.cbVMMDevHeap == cbHeap);
3438	Assert(pVM->pdm.s.GCPhysVMMDevHeap != GCPhys \|\| GCPhys == NIL_RTGCPHYS);
3439	if (pVM->pdm.s.GCPhysVMMDevHeap != GCPhys)
3440	{
3441	pVM->pdm.s.GCPhysVMMDevHeap = GCPhys;
3442	if (pVM->pdm.s.pfnVMMDevHeapNotify)
3443	pVM->pdm.s.pfnVMMDevHeapNotify(pVM, pvHeap, GCPhys);
3444	}
3445	}
3446
3447	LogFlow(("pdmR3DevHlp_RegisterVMMDevHeap: caller='%s'/%d: returns %Rrc\n",
3448	pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3449	return VINF_SUCCESS;
3450	}
3451
3452
3453	/**
3454	* @interface_method_impl{PDMDEVHLPR3,pfnFirmwareRegister}
3455	*/
3456	static DECLCALLBACK(int) pdmR3DevHlp_FirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
3457	{
3458	PDMDEV_ASSERT_DEVINS(pDevIns);
3459	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3460	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: pFWReg=%p:{.u32Version=%#x, .pfnIsHardReset=%p, .u32TheEnd=%#x} ppFwHlp=%p\n",
3461	pDevIns->pReg->szName, pDevIns->iInstance, pFwReg, pFwReg->u32Version, pFwReg->pfnIsHardReset, pFwReg->u32TheEnd, ppFwHlp));
3462
3463	/*
3464	* Validate input.
3465	*/
3466	if (pFwReg->u32Version != PDM_FWREG_VERSION)
3467	{
3468	AssertMsgFailed(("u32Version=%#x expected %#x\n", pFwReg->u32Version, PDM_FWREG_VERSION));
3469	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (version)\n",
3470	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3471	return VERR_INVALID_PARAMETER;
3472	}
3473	if (!pFwReg->pfnIsHardReset)
3474	{
3475	Assert(pFwReg->pfnIsHardReset);
3476	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3477	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3478	return VERR_INVALID_PARAMETER;
3479	}
3480
3481	if (!ppFwHlp)
3482	{
3483	Assert(ppFwHlp);
3484	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (ppFwHlp)\n",
3485	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3486	return VERR_INVALID_PARAMETER;
3487	}
3488
3489	/*
3490	* Only one DMA device.
3491	*/
3492	PVM pVM = pDevIns->Internal.s.pVMR3;
3493	if (pVM->pdm.s.pFirmware)
3494	{
3495	AssertMsgFailed(("Only one firmware device is supported!\n"));
3496	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc\n",
3497	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3498	return VERR_INVALID_PARAMETER;
3499	}
3500
3501	/*
3502	* Allocate and initialize pci bus structure.
3503	*/
3504	int rc = VINF_SUCCESS;
3505	PPDMFW pFirmware = (PPDMFW)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pFirmware));
3506	if (pFirmware)
3507	{
3508	pFirmware->pDevIns = pDevIns;
3509	pFirmware->Reg = *pFwReg;
3510	pVM->pdm.s.pFirmware = pFirmware;
3511
3512	/* set the helper pointer. */
3513	*ppFwHlp = &g_pdmR3DevFirmwareHlp;
3514	Log(("PDM: Registered firmware device '%s'/%d pDevIns=%p\n",
3515	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3516	}
3517	else
3518	rc = VERR_NO_MEMORY;
3519
3520	LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc\n",
3521	pDevIns->pReg->szName, pDevIns->iInstance, rc));
3522	return rc;
3523	}
3524
3525
3526	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3527	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
3528	{
3529	PDMDEV_ASSERT_DEVINS(pDevIns);
3530	PVM pVM = pDevIns->Internal.s.pVMR3;
3531	VM_ASSERT_EMT(pVM);
3532	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: fFlags=%#x VM_FF_RESET %d -> 1\n",
3533	pDevIns->pReg->szName, pDevIns->iInstance, fFlags, VM_FF_IS_SET(pVM, VM_FF_RESET)));
3534
3535	/*
3536	* We postpone this operation because we're likely to be inside a I/O instruction
3537	* and the EIP will be updated when we return.
3538	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3539	*/
3540	bool fHaltOnReset;
3541	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3542	if (RT_SUCCESS(rc) && fHaltOnReset)
3543	{
3544	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3545	rc = VINF_EM_HALT;
3546	}
3547	else
3548	{
3549	pVM->pdm.s.fResetFlags = fFlags;
3550	VM_FF_SET(pVM, VM_FF_RESET);
3551	rc = VINF_EM_RESET;
3552	}
3553
3554	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3555	return rc;
3556	}
3557
3558
3559	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3560	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3561	{
3562	int rc;
3563	PDMDEV_ASSERT_DEVINS(pDevIns);
3564	PVM pVM = pDevIns->Internal.s.pVMR3;
3565	VM_ASSERT_EMT(pVM);
3566	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3567	pDevIns->pReg->szName, pDevIns->iInstance));
3568
3569	/** @todo Always take the SMP path - fewer code paths. */
3570	if (pVM->cCpus > 1)
3571	{
3572	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3573	rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 2, pVM->pUVM, VMSUSPENDREASON_VM);
3574	AssertRC(rc);
3575	rc = VINF_EM_SUSPEND;
3576	}
3577	else
3578	rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3579
3580	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3581	return rc;
3582	}
3583
3584
3585	/**
3586	* Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3587	* EMT request to avoid deadlocks.
3588	*
3589	* @returns VBox status code fit for scheduling.
3590	* @param pVM The cross context VM structure.
3591	* @param pDevIns The device that triggered this action.
3592	*/
3593	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3594	{
3595	/*
3596	* Suspend the VM first then do the saving.
3597	*/
3598	int rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3599	if (RT_SUCCESS(rc))
3600	{
3601	PUVM pUVM = pVM->pUVM;
3602	rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3603
3604	/*
3605	* On success, power off the VM, on failure we'll leave it suspended.
3606	*/
3607	if (RT_SUCCESS(rc))
3608	{
3609	rc = VMR3PowerOff(pVM->pUVM);
3610	if (RT_FAILURE(rc))
3611	LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3612	}
3613	else
3614	LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3615	}
3616	else
3617	LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3618	return rc;
3619	}
3620
3621
3622	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3623	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3624	{
3625	PDMDEV_ASSERT_DEVINS(pDevIns);
3626	PVM pVM = pDevIns->Internal.s.pVMR3;
3627	VM_ASSERT_EMT(pVM);
3628	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3629	pDevIns->pReg->szName, pDevIns->iInstance));
3630
3631	int rc;
3632	if ( pVM->pUVM->pVmm2UserMethods
3633	&& pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3634	{
3635	rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3636	if (RT_SUCCESS(rc))
3637	{
3638	LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3639	rc = VINF_EM_SUSPEND;
3640	}
3641	}
3642	else
3643	rc = VERR_NOT_SUPPORTED;
3644
3645	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3646	return rc;
3647	}
3648
3649
3650	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3651	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3652	{
3653	int rc;
3654	PDMDEV_ASSERT_DEVINS(pDevIns);
3655	PVM pVM = pDevIns->Internal.s.pVMR3;
3656	VM_ASSERT_EMT(pVM);
3657	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3658	pDevIns->pReg->szName, pDevIns->iInstance));
3659
3660	/** @todo Always take the SMP path - fewer code paths. */
3661	if (pVM->cCpus > 1)
3662	{
3663	/* We might be holding locks here and could cause a deadlock since
3664	VMR3PowerOff rendezvous with the other CPUs. */
3665	rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM->pUVM);
3666	AssertRC(rc);
3667	/* Set the VCPU state to stopped here as well to make sure no
3668	inconsistency with the EM state occurs. */
3669	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3670	rc = VINF_EM_OFF;
3671	}
3672	else
3673	rc = VMR3PowerOff(pVM->pUVM);
3674
3675	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3676	return rc;
3677	}
3678
3679
3680	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3681	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3682	{
3683	PDMDEV_ASSERT_DEVINS(pDevIns);
3684	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3685
3686	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3687
3688	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3689	return fRc;
3690	}
3691
3692
3693	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3694	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3695	{
3696	PDMDEV_ASSERT_DEVINS(pDevIns);
3697	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3698	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3699	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3700	}
3701
3702
3703	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3704	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3705	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3706	{
3707	PDMDEV_ASSERT_DEVINS(pDevIns);
3708	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3709
3710	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3711	pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3712	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3713
3714	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, 0 /iSubLeaf/, pEax, pEbx, pEcx, pEdx);
3715
3716	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
3717	pDevIns->pReg->szName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
3718	}
3719
3720
3721	/**
3722	* The device helper structure for trusted devices.
3723	*/
3724	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3725	{
3726	PDM_DEVHLPR3_VERSION,
3727	pdmR3DevHlp_IOPortRegister,
3728	pdmR3DevHlp_IOPortRegisterRC,
3729	pdmR3DevHlp_IOPortRegisterR0,
3730	pdmR3DevHlp_IOPortDeregister,
3731	pdmR3DevHlp_MMIORegister,
3732	pdmR3DevHlp_MMIORegisterRC,
3733	pdmR3DevHlp_MMIORegisterR0,
3734	pdmR3DevHlp_MMIODeregister,
3735	pdmR3DevHlp_MMIO2Register,
3736	pdmR3DevHlp_MMIOExPreRegister,
3737	pdmR3DevHlp_MMIOExDeregister,
3738	pdmR3DevHlp_MMIOExMap,
3739	pdmR3DevHlp_MMIOExUnmap,
3740	pdmR3DevHlp_MMIOExReduce,
3741	pdmR3DevHlp_MMHyperMapMMIO2,
3742	pdmR3DevHlp_MMIO2MapKernel,
3743	pdmR3DevHlp_ROMRegister,
3744	pdmR3DevHlp_ROMProtectShadow,
3745	pdmR3DevHlp_SSMRegister,
3746	pdmR3DevHlp_TMTimerCreate,
3747	pdmR3DevHlp_TMUtcNow,
3748	pdmR3DevHlp_PhysRead,
3749	pdmR3DevHlp_PhysWrite,
3750	pdmR3DevHlp_PhysGCPhys2CCPtr,
3751	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3752	pdmR3DevHlp_PhysReleasePageMappingLock,
3753	pdmR3DevHlp_PhysReadGCVirt,
3754	pdmR3DevHlp_PhysWriteGCVirt,
3755	pdmR3DevHlp_PhysGCPtr2GCPhys,
3756	pdmR3DevHlp_MMHeapAlloc,
3757	pdmR3DevHlp_MMHeapAllocZ,
3758	pdmR3DevHlp_MMHeapFree,
3759	pdmR3DevHlp_VMState,
3760	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3761	pdmR3DevHlp_VMSetError,
3762	pdmR3DevHlp_VMSetErrorV,
3763	pdmR3DevHlp_VMSetRuntimeError,
3764	pdmR3DevHlp_VMSetRuntimeErrorV,
3765	pdmR3DevHlp_DBGFStopV,
3766	pdmR3DevHlp_DBGFInfoRegister,
3767	pdmR3DevHlp_DBGFRegRegister,
3768	pdmR3DevHlp_DBGFTraceBuf,
3769	pdmR3DevHlp_STAMRegister,
3770	pdmR3DevHlp_STAMRegisterF,
3771	pdmR3DevHlp_STAMRegisterV,
3772	pdmR3DevHlp_PCIRegister,
3773	pdmR3DevHlp_PCIRegisterMsi,
3774	pdmR3DevHlp_PCIIORegionRegister,
3775	pdmR3DevHlp_PCISetConfigCallbacks,
3776	pdmR3DevHlp_PCIPhysRead,
3777	pdmR3DevHlp_PCIPhysWrite,
3778	pdmR3DevHlp_PCISetIrq,
3779	pdmR3DevHlp_PCISetIrqNoWait,
3780	pdmR3DevHlp_ISASetIrq,
3781	pdmR3DevHlp_ISASetIrqNoWait,
3782	pdmR3DevHlp_IoApicSendMsi,
3783	pdmR3DevHlp_DriverAttach,
3784	pdmR3DevHlp_DriverDetach,
3785	pdmR3DevHlp_QueueCreate,
3786	pdmR3DevHlp_CritSectInit,
3787	pdmR3DevHlp_CritSectGetNop,
3788	pdmR3DevHlp_CritSectGetNopR0,
3789	pdmR3DevHlp_CritSectGetNopRC,
3790	pdmR3DevHlp_SetDeviceCritSect,
3791	pdmR3DevHlp_ThreadCreate,
3792	pdmR3DevHlp_SetAsyncNotification,
3793	pdmR3DevHlp_AsyncNotificationCompleted,
3794	pdmR3DevHlp_RTCRegister,
3795	pdmR3DevHlp_PCIBusRegister,
3796	pdmR3DevHlp_PICRegister,
3797	pdmR3DevHlp_APICRegister,
3798	pdmR3DevHlp_IOAPICRegister,
3799	pdmR3DevHlp_HPETRegister,
3800	pdmR3DevHlp_PciRawRegister,
3801	pdmR3DevHlp_DMACRegister,
3802	pdmR3DevHlp_DMARegister,
3803	pdmR3DevHlp_DMAReadMemory,
3804	pdmR3DevHlp_DMAWriteMemory,
3805	pdmR3DevHlp_DMASetDREQ,
3806	pdmR3DevHlp_DMAGetChannelMode,
3807	pdmR3DevHlp_DMASchedule,
3808	pdmR3DevHlp_CMOSWrite,
3809	pdmR3DevHlp_CMOSRead,
3810	pdmR3DevHlp_AssertEMT,
3811	pdmR3DevHlp_AssertOther,
3812	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3813	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3814	pdmR3DevHlp_CallR0,
3815	pdmR3DevHlp_VMGetSuspendReason,
3816	pdmR3DevHlp_VMGetResumeReason,
3817	pdmR3DevHlp_PhysBulkGCPhys2CCPtr,
3818	pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly,
3819	pdmR3DevHlp_PhysBulkReleasePageMappingLocks,
3820	pdmR3DevHlp_MMIOExChangeRegionNo,
3821	0,
3822	0,
3823	0,
3824	0,
3825	0,
3826	0,
3827	pdmR3DevHlp_GetUVM,
3828	pdmR3DevHlp_GetVM,
3829	pdmR3DevHlp_GetVMCPU,
3830	pdmR3DevHlp_GetCurrentCpuId,
3831	pdmR3DevHlp_RegisterVMMDevHeap,
3832	pdmR3DevHlp_FirmwareRegister,
3833	pdmR3DevHlp_VMReset,
3834	pdmR3DevHlp_VMSuspend,
3835	pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3836	pdmR3DevHlp_VMPowerOff,
3837	pdmR3DevHlp_A20IsEnabled,
3838	pdmR3DevHlp_A20Set,
3839	pdmR3DevHlp_GetCpuId,
3840	pdmR3DevHlp_TMTimeVirtGet,
3841	pdmR3DevHlp_TMTimeVirtGetFreq,
3842	pdmR3DevHlp_TMTimeVirtGetNano,
3843	pdmR3DevHlp_GetSupDrvSession,
3844	pdmR3DevHlp_QueryGenericUserObject,
3845	PDM_DEVHLPR3_VERSION /* the end */
3846	};
3847
3848
3849
3850
3851	/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
3852	static DECLCALLBACK(PUVM) pdmR3DevHlp_Untrusted_GetUVM(PPDMDEVINS pDevIns)
3853	{
3854	PDMDEV_ASSERT_DEVINS(pDevIns);
3855	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3856	return NULL;
3857	}
3858
3859
3860	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3861	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3862	{
3863	PDMDEV_ASSERT_DEVINS(pDevIns);
3864	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3865	return NULL;
3866	}
3867
3868
3869	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3870	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3871	{
3872	PDMDEV_ASSERT_DEVINS(pDevIns);
3873	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3874	return NULL;
3875	}
3876
3877
3878	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCurrentCpuId} */
3879	static DECLCALLBACK(VMCPUID) pdmR3DevHlp_Untrusted_GetCurrentCpuId(PPDMDEVINS pDevIns)
3880	{
3881	PDMDEV_ASSERT_DEVINS(pDevIns);
3882	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3883	return NIL_VMCPUID;
3884	}
3885
3886
3887	/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3888	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys,
3889	RTR3PTR pvHeap, unsigned cbHeap)
3890	{
3891	PDMDEV_ASSERT_DEVINS(pDevIns);
3892	NOREF(GCPhys); NOREF(pvHeap); NOREF(cbHeap);
3893	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3894	return VERR_ACCESS_DENIED;
3895	}
3896
3897
3898	/** @interface_method_impl{PDMDEVHLPR3,pfnFirmwareRegister} */
3899	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_FirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
3900	{
3901	PDMDEV_ASSERT_DEVINS(pDevIns);
3902	NOREF(pFwReg); NOREF(ppFwHlp);
3903	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3904	return VERR_ACCESS_DENIED;
3905	}
3906
3907
3908	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3909	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
3910	{
3911	PDMDEV_ASSERT_DEVINS(pDevIns); NOREF(fFlags);
3912	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3913	return VERR_ACCESS_DENIED;
3914	}
3915
3916
3917	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3918	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3919	{
3920	PDMDEV_ASSERT_DEVINS(pDevIns);
3921	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3922	return VERR_ACCESS_DENIED;
3923	}
3924
3925
3926	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3927	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3928	{
3929	PDMDEV_ASSERT_DEVINS(pDevIns);
3930	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3931	return VERR_ACCESS_DENIED;
3932	}
3933
3934
3935	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3936	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3937	{
3938	PDMDEV_ASSERT_DEVINS(pDevIns);
3939	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3940	return VERR_ACCESS_DENIED;
3941	}
3942
3943
3944	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3945	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3946	{
3947	PDMDEV_ASSERT_DEVINS(pDevIns);
3948	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3949	return false;
3950	}
3951
3952
3953	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3954	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3955	{
3956	PDMDEV_ASSERT_DEVINS(pDevIns);
3957	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3958	NOREF(fEnable);
3959	}
3960
3961
3962	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3963	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3964	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3965	{
3966	PDMDEV_ASSERT_DEVINS(pDevIns);
3967	NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
3968	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3969	}
3970
3971
3972	/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
3973	static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_Untrusted_GetSupDrvSession(PPDMDEVINS pDevIns)
3974	{
3975	PDMDEV_ASSERT_DEVINS(pDevIns);
3976	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3977	return (PSUPDRVSESSION)0;
3978	}
3979
3980
3981	/** @interface_method_impl{PDMDEVHLPR3,pfnQueryGenericUserObject} */
3982	static DECLCALLBACK(void *) pdmR3DevHlp_Untrusted_QueryGenericUserObject(PPDMDEVINS pDevIns, PCRTUUID pUuid)
3983	{
3984	PDMDEV_ASSERT_DEVINS(pDevIns);
3985	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d %RTuuid\n",
3986	pDevIns->pReg->szName, pDevIns->iInstance, pUuid));
3987	return NULL;
3988	}
3989
3990
3991	/**
3992	* The device helper structure for non-trusted devices.
3993	*/
3994	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3995	{
3996	PDM_DEVHLPR3_VERSION,
3997	pdmR3DevHlp_IOPortRegister,
3998	pdmR3DevHlp_IOPortRegisterRC,
3999	pdmR3DevHlp_IOPortRegisterR0,
4000	pdmR3DevHlp_IOPortDeregister,
4001	pdmR3DevHlp_MMIORegister,
4002	pdmR3DevHlp_MMIORegisterRC,
4003	pdmR3DevHlp_MMIORegisterR0,
4004	pdmR3DevHlp_MMIODeregister,
4005	pdmR3DevHlp_MMIO2Register,
4006	pdmR3DevHlp_MMIOExPreRegister,
4007	pdmR3DevHlp_MMIOExDeregister,
4008	pdmR3DevHlp_MMIOExMap,
4009	pdmR3DevHlp_MMIOExUnmap,
4010	pdmR3DevHlp_MMIOExReduce,
4011	pdmR3DevHlp_MMHyperMapMMIO2,
4012	pdmR3DevHlp_MMIO2MapKernel,
4013	pdmR3DevHlp_ROMRegister,
4014	pdmR3DevHlp_ROMProtectShadow,
4015	pdmR3DevHlp_SSMRegister,
4016	pdmR3DevHlp_TMTimerCreate,
4017	pdmR3DevHlp_TMUtcNow,
4018	pdmR3DevHlp_PhysRead,
4019	pdmR3DevHlp_PhysWrite,
4020	pdmR3DevHlp_PhysGCPhys2CCPtr,
4021	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
4022	pdmR3DevHlp_PhysReleasePageMappingLock,
4023	pdmR3DevHlp_PhysReadGCVirt,
4024	pdmR3DevHlp_PhysWriteGCVirt,
4025	pdmR3DevHlp_PhysGCPtr2GCPhys,
4026	pdmR3DevHlp_MMHeapAlloc,
4027	pdmR3DevHlp_MMHeapAllocZ,
4028	pdmR3DevHlp_MMHeapFree,
4029	pdmR3DevHlp_VMState,
4030	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
4031	pdmR3DevHlp_VMSetError,
4032	pdmR3DevHlp_VMSetErrorV,
4033	pdmR3DevHlp_VMSetRuntimeError,
4034	pdmR3DevHlp_VMSetRuntimeErrorV,
4035	pdmR3DevHlp_DBGFStopV,
4036	pdmR3DevHlp_DBGFInfoRegister,
4037	pdmR3DevHlp_DBGFRegRegister,
4038	pdmR3DevHlp_DBGFTraceBuf,
4039	pdmR3DevHlp_STAMRegister,
4040	pdmR3DevHlp_STAMRegisterF,
4041	pdmR3DevHlp_STAMRegisterV,
4042	pdmR3DevHlp_PCIRegister,
4043	pdmR3DevHlp_PCIRegisterMsi,
4044	pdmR3DevHlp_PCIIORegionRegister,
4045	pdmR3DevHlp_PCISetConfigCallbacks,
4046	pdmR3DevHlp_PCIPhysRead,
4047	pdmR3DevHlp_PCIPhysWrite,
4048	pdmR3DevHlp_PCISetIrq,
4049	pdmR3DevHlp_PCISetIrqNoWait,
4050	pdmR3DevHlp_ISASetIrq,
4051	pdmR3DevHlp_ISASetIrqNoWait,
4052	pdmR3DevHlp_IoApicSendMsi,
4053	pdmR3DevHlp_DriverAttach,
4054	pdmR3DevHlp_DriverDetach,
4055	pdmR3DevHlp_QueueCreate,
4056	pdmR3DevHlp_CritSectInit,
4057	pdmR3DevHlp_CritSectGetNop,
4058	pdmR3DevHlp_CritSectGetNopR0,
4059	pdmR3DevHlp_CritSectGetNopRC,
4060	pdmR3DevHlp_SetDeviceCritSect,
4061	pdmR3DevHlp_ThreadCreate,
4062	pdmR3DevHlp_SetAsyncNotification,
4063	pdmR3DevHlp_AsyncNotificationCompleted,
4064	pdmR3DevHlp_RTCRegister,
4065	pdmR3DevHlp_PCIBusRegister,
4066	pdmR3DevHlp_PICRegister,
4067	pdmR3DevHlp_APICRegister,
4068	pdmR3DevHlp_IOAPICRegister,
4069	pdmR3DevHlp_HPETRegister,
4070	pdmR3DevHlp_PciRawRegister,
4071	pdmR3DevHlp_DMACRegister,
4072	pdmR3DevHlp_DMARegister,
4073	pdmR3DevHlp_DMAReadMemory,
4074	pdmR3DevHlp_DMAWriteMemory,
4075	pdmR3DevHlp_DMASetDREQ,
4076	pdmR3DevHlp_DMAGetChannelMode,
4077	pdmR3DevHlp_DMASchedule,
4078	pdmR3DevHlp_CMOSWrite,
4079	pdmR3DevHlp_CMOSRead,
4080	pdmR3DevHlp_AssertEMT,
4081	pdmR3DevHlp_AssertOther,
4082	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
4083	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
4084	pdmR3DevHlp_CallR0,
4085	pdmR3DevHlp_VMGetSuspendReason,
4086	pdmR3DevHlp_VMGetResumeReason,
4087	pdmR3DevHlp_PhysBulkGCPhys2CCPtr,
4088	pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly,
4089	pdmR3DevHlp_PhysBulkReleasePageMappingLocks,
4090	pdmR3DevHlp_MMIOExChangeRegionNo,
4091	0,
4092	0,
4093	0,
4094	0,
4095	0,
4096	0,
4097	pdmR3DevHlp_Untrusted_GetUVM,
4098	pdmR3DevHlp_Untrusted_GetVM,
4099	pdmR3DevHlp_Untrusted_GetVMCPU,
4100	pdmR3DevHlp_Untrusted_GetCurrentCpuId,
4101	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
4102	pdmR3DevHlp_Untrusted_FirmwareRegister,
4103	pdmR3DevHlp_Untrusted_VMReset,
4104	pdmR3DevHlp_Untrusted_VMSuspend,
4105	pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
4106	pdmR3DevHlp_Untrusted_VMPowerOff,
4107	pdmR3DevHlp_Untrusted_A20IsEnabled,
4108	pdmR3DevHlp_Untrusted_A20Set,
4109	pdmR3DevHlp_Untrusted_GetCpuId,
4110	pdmR3DevHlp_TMTimeVirtGet,
4111	pdmR3DevHlp_TMTimeVirtGetFreq,
4112	pdmR3DevHlp_TMTimeVirtGetNano,
4113	pdmR3DevHlp_Untrusted_GetSupDrvSession,
4114	pdmR3DevHlp_Untrusted_QueryGenericUserObject,
4115	PDM_DEVHLPR3_VERSION /* the end */
4116	};
4117
4118
4119
4120	/**
4121	* Queue consumer callback for internal component.
4122	*
4123	* @returns Success indicator.
4124	* If false the item will not be removed and the flushing will stop.
4125	* @param pVM The cross context VM structure.
4126	* @param pItem The item to consume. Upon return this item will be freed.
4127	*/
4128	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
4129	{
4130	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
4131	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
4132	switch (pTask->enmOp)
4133	{
4134	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
4135	PDMIsaSetIrq(pVM, pTask->u.IsaSetIRQ.iIrq, pTask->u.IsaSetIRQ.iLevel, pTask->u.IsaSetIRQ.uTagSrc);
4136	break;
4137
4138	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
4139	{
4140	/* Same as pdmR3DevHlp_PCISetIrq, except we've got a tag already. */
4141	PPDMPCIDEV pPciDev = pTask->u.PciSetIRQ.pPciDevR3;
4142	if (pPciDev)
4143	{
4144	PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
4145	Assert(pBus);
4146
4147	pdmLock(pVM);
4148	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, pTask->u.PciSetIRQ.iIrq,
4149	pTask->u.PciSetIRQ.iLevel, pTask->u.PciSetIRQ.uTagSrc);
4150	pdmUnlock(pVM);
4151	}
4152	else
4153	AssertReleaseMsgFailed(("No PCI device registered!\n"));
4154	break;
4155	}
4156
4157	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
4158	PDMIoApicSetIrq(pVM, pTask->u.IoApicSetIRQ.iIrq, pTask->u.IoApicSetIRQ.iLevel, pTask->u.IoApicSetIRQ.uTagSrc);
4159	break;
4160
4161	default:
4162	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
4163	break;
4164	}
4165	return true;
4166	}
4167
4168	/** @} */
4169

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source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 77807

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