VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 95248

Last change on this file since 95248 was 95248, checked in by vboxsync, 3 years ago

VMM/CPUM: Started changing the way we advertise SYSCALL, SEP, NX, and others as well as deduplicating the code for enabling 64-bit guest support (long mode). Also, the SYSCALL CPUID bit is now correctly suppressed when not in 64-bit mode on Intel CPUs. bugref:9898
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1/* $Id: NEMR3.cpp 95248 2022-06-10 16:40:34Z vboxsync $ */
2/** @file
3 * NEM - Native execution manager.
4 */
5
6/*
7 * Copyright (C) 2018-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_nem NEM - Native Execution Manager.
19 *
20 * This is an alternative execution manage to HM and raw-mode. On one host
21 * (Windows) we're forced to use this, on the others we just do it because we
22 * can. Since this is host specific in nature, information about an
23 * implementation is contained in the NEMR3Native-xxxx.cpp files.
24 *
25 * @ref pg_nem_win
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_NEM
33#include <VBox/vmm/dbgf.h>
34#include <VBox/vmm/nem.h>
35#include <VBox/vmm/gim.h>
36#include "NEMInternal.h"
37#include <VBox/vmm/vm.h>
38#include <VBox/vmm/uvm.h>
39#include <VBox/err.h>
40
41#include <iprt/asm.h>
42
43
44
45/**
46 * Basic init and configuration reading.
47 *
48 * Always call NEMR3Term after calling this.
49 *
50 * @returns VBox status code.
51 * @param pVM The cross context VM structure.
52 */
53VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
54{
55 LogFlow(("NEMR3Init\n"));
56
57 /*
58 * Assert alignment and sizes.
59 */
60 AssertCompileMemberAlignment(VM, nem.s, 64);
61 AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
62
63 /*
64 * Initialize state info so NEMR3Term will always be happy.
65 * No returning prior to setting magics!
66 */
67 pVM->nem.s.u32Magic = NEM_MAGIC;
68 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
69 {
70 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
71 pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
72 }
73
74 /*
75 * Read configuration.
76 */
77 PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
78
79 /*
80 * Validate the NEM settings.
81 */
82 int rc = CFGMR3ValidateConfig(pCfgNem,
83 "/NEM/",
84 "Enabled"
85 "|Allow64BitGuests"
86 "|LovelyMesaDrvWorkaround"
87#ifdef RT_OS_WINDOWS
88 "|UseRing0Runloop"
89#elif defined(RT_OS_DARWIN)
90 "|VmxPleGap"
91 "|VmxPleWindow"
92 "|VmxLbr"
93#endif
94 ,
95 "" /* pszValidNodes */, "NEM" /* pszWho */, 0 /* uInstance */);
96 if (RT_FAILURE(rc))
97 return rc;
98
99 /** @cfgm{/NEM/NEMEnabled, bool, true}
100 * Whether NEM is enabled. */
101 rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
102 AssertLogRelRCReturn(rc, rc);
103
104
105#ifdef VBOX_WITH_64_BITS_GUESTS
106 /** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
107 * Enables AMD64 CPU features.
108 * On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
109 * already have the support. */
110 rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
111 AssertLogRelRCReturn(rc, rc);
112#else
113 pVM->nem.s.fAllow64BitGuests = false;
114#endif
115
116 /** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
117 * Workaround for mesa vmsvga 3d driver making incorrect assumptions about
118 * the hypervisor it is running under. */
119 bool f;
120 rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
121 AssertLogRelRCReturn(rc, rc);
122 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
123 {
124 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
125 pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
126 }
127
128 return VINF_SUCCESS;
129}
130
131
132/**
133 * This is called by HMR3Init() when HM cannot be used.
134 *
135 * Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
136 * native hypervisor API to execute the VM.
137 *
138 * @returns VBox status code.
139 * @param pVM The cross context VM structure.
140 * @param fFallback Whether this is a fallback call. Cleared if the VM is
141 * configured to use NEM instead of HM.
142 * @param fForced Whether /HM/HMForced was set. If set and we fail to
143 * enable NEM, we'll return a failure status code.
144 * Otherwise we'll assume HMR3Init falls back on raw-mode.
145 */
146VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
147{
148 Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
149 int rc;
150 if (pVM->nem.s.fEnabled)
151 {
152#ifdef VBOX_WITH_NATIVE_NEM
153 rc = nemR3NativeInit(pVM, fFallback, fForced);
154 ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
155#else
156 RT_NOREF(fFallback);
157 rc = VINF_SUCCESS;
158#endif
159 if (RT_SUCCESS(rc))
160 {
161 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
162 {
163#ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
164 KVM APIs are much faster, thus the different mode name. :-) */
165 LogRel(("NEM:\n"
166 "NEM: NEMR3Init: Snail execution mode is active!\n"
167 "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
168 "NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
169 "NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
170 "NEM: consider the consequences of disabling these features.\n"
171 "NEM:\n"));
172#else
173 LogRel(("NEM:\n"
174 "NEM: NEMR3Init: Turtle execution mode is active!\n"
175 "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
176 "NEM:\n"));
177#endif
178 }
179 else
180 {
181 LogRel(("NEM: NEMR3Init: Not available.\n"));
182 if (fForced)
183 rc = VERR_NEM_NOT_AVAILABLE;
184 }
185 }
186 else
187 LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
188 }
189 else
190 {
191 LogRel(("NEM: NEMR3Init: Disabled.\n"));
192 rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
193 }
194 return rc;
195}
196
197
198/**
199 * Perform initialization that depends on CPUM working.
200 *
201 * This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
202 *
203 * @returns VBox status code.
204 * @param pVM The cross context VM structure.
205 */
206VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
207{
208 int rc = VINF_SUCCESS;
209 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
210 {
211 if (pVM->nem.s.fAllow64BitGuests)
212 CPUMR3CpuIdEnable64BitGuests(pVM);
213
214 /*
215 * Do native after-CPUM init.
216 */
217#ifdef VBOX_WITH_NATIVE_NEM
218 rc = nemR3NativeInitAfterCPUM(pVM);
219#else
220 RT_NOREF(pVM);
221#endif
222 }
223 return rc;
224}
225
226
227/**
228 * Called when a init phase has completed.
229 *
230 * @returns VBox status code.
231 * @param pVM The cross context VM structure.
232 * @param enmWhat The phase that completed.
233 */
234VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
235{
236 /*
237 * Check if GIM needs #UD, since that applies to everyone.
238 */
239 if (enmWhat == VMINITCOMPLETED_RING3)
240 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
241 {
242 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
243 pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
244 }
245
246 /*
247 * Call native code.
248 */
249 int rc = VINF_SUCCESS;
250#ifdef VBOX_WITH_NATIVE_NEM
251 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
252 rc = nemR3NativeInitCompleted(pVM, enmWhat);
253#else
254 RT_NOREF(pVM, enmWhat);
255#endif
256 return rc;
257}
258
259
260/**
261 *
262 * @returns VBox status code.
263 * @param pVM The cross context VM structure.
264 */
265VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
266{
267 AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
268 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
269 AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
270
271 /* Do native termination. */
272 int rc = VINF_SUCCESS;
273#ifdef VBOX_WITH_NATIVE_NEM
274 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
275 rc = nemR3NativeTerm(pVM);
276#endif
277
278 /* Mark it as terminated. */
279 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
280 {
281 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
282 pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
283 }
284 pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
285 return rc;
286}
287
288/**
289 * External interface for querying whether native execution API is used.
290 *
291 * @returns true if NEM is being used, otherwise false.
292 * @param pUVM The user mode VM handle.
293 * @sa HMR3IsEnabled
294 */
295VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
296{
297 UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
298 PVM pVM = pUVM->pVM;
299 VM_ASSERT_VALID_EXT_RETURN(pVM, false);
300 return VM_IS_NEM_ENABLED(pVM);
301}
302
303
304/**
305 * The VM is being reset.
306 *
307 * @param pVM The cross context VM structure.
308 */
309VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
310{
311#ifdef VBOX_WITH_NATIVE_NEM
312 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
313 nemR3NativeReset(pVM);
314#else
315 RT_NOREF(pVM);
316#endif
317}
318
319
320/**
321 * Resets a virtual CPU.
322 *
323 * Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
324 *
325 * @param pVCpu The cross context virtual CPU structure to reset.
326 * @param fInitIpi Set if being reset due to INIT IPI.
327 */
328VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
329{
330#ifdef VBOX_WITH_NATIVE_NEM
331 if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
332 nemR3NativeResetCpu(pVCpu, fInitIpi);
333#else
334 RT_NOREF(pVCpu, fInitIpi);
335#endif
336}
337
338
339/**
340 * Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
341 *
342 * @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
343 * @param pVM The cross context VM structure.
344 */
345VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
346{
347#ifdef VBOX_WITH_NATIVE_NEM
348 if (VM_IS_NEM_ENABLED(pVM))
349 return true;
350#else
351 RT_NOREF(pVM);
352#endif
353 return false;
354}
355
356
357/**
358 * Gets the name of a generic NEM exit code.
359 *
360 * @returns Pointer to read only string if @a uExit is known, otherwise NULL.
361 * @param uExit The NEM exit to name.
362 */
363VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
364{
365 switch ((NEMEXITTYPE)uExit)
366 {
367 case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
368 case NEMEXITTYPE_HALT: return "NEM halt";
369
370 case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
371 case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
372 case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
373 case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
374 case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
375 case NEMEXITTYPE_CANCELED: return "NEM canceled";
376 case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
377
378 case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
379 case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
380 case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
381 case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
382
383 case NEMEXITTYPE_INVALID:
384 case NEMEXITTYPE_END:
385 break;
386 }
387
388 return NULL;
389}
390
391
392VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
393{
394 Assert(VM_IS_NEM_ENABLED(pVM));
395#ifdef VBOX_WITH_NATIVE_NEM
396 return nemR3NativeRunGC(pVM, pVCpu);
397#else
398 NOREF(pVM); NOREF(pVCpu);
399 return VERR_INTERNAL_ERROR_3;
400#endif
401}
402
403
404#ifndef VBOX_WITH_NATIVE_NEM
405VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
406{
407 RT_NOREF(pVM, pVCpu);
408 return false;
409}
410#endif
411
412
413VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
414{
415 Assert(VM_IS_NEM_ENABLED(pVM));
416#ifdef VBOX_WITH_NATIVE_NEM
417 return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
418#else
419 NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
420 return false;
421#endif
422}
423
424
425VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
426{
427 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
428#ifdef VBOX_WITH_NATIVE_NEM
429 nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
430#else
431 RT_NOREF(pVM, pVCpu, fFlags);
432#endif
433}
434
435#ifndef VBOX_WITH_NATIVE_NEM
436
437VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
438{
439 RT_NOREF(pVCpu, fEnabled);
440}
441
442# ifdef VBOX_WITH_PGM_NEM_MODE
443
444VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM)
445{
446 RT_NOREF(pVM);
447 return false;
448}
449
450
451VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
452 void *pvBitmap, size_t cbBitmap)
453{
454 RT_NOREF(pVM, GCPhys, cb, uNemRange, pvBitmap, cbBitmap);
455 AssertFailed();
456 return VERR_INTERNAL_ERROR_2;
457}
458
459
460VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
461 void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange)
462{
463 RT_NOREF(pVM, GCPhys, cb, fFlags, pvRam, pvMmio2, pu2State, puNemRange);
464 AssertFailed();
465 return VERR_INTERNAL_ERROR_2;
466}
467
468# endif /* VBOX_WITH_PGM_NEM_MODE */
469#endif /* !VBOX_WITH_NATIVE_NEM */
470
471/**
472 * Notification callback from DBGF when interrupt breakpoints or generic debug
473 * event settings changes.
474 *
475 * DBGF will call NEMR3NotifyDebugEventChangedPerCpu on each CPU afterwards, this
476 * function is just updating the VM globals.
477 *
478 * @param pVM The VM cross context VM structure.
479 * @thread EMT(0)
480 */
481VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM)
482{
483 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
484
485#ifdef VBOX_WITH_NATIVE_NEM
486 /* Interrupts. */
487 bool fUseDebugLoop = pVM->dbgf.ro.cSoftIntBreakpoints > 0
488 || pVM->dbgf.ro.cHardIntBreakpoints > 0;
489
490 /* CPU Exceptions. */
491 for (DBGFEVENTTYPE enmEvent = DBGFEVENT_XCPT_FIRST;
492 !fUseDebugLoop && enmEvent <= DBGFEVENT_XCPT_LAST;
493 enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
494 fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
495
496 /* Common VM exits. */
497 for (DBGFEVENTTYPE enmEvent = DBGFEVENT_EXIT_FIRST;
498 !fUseDebugLoop && enmEvent <= DBGFEVENT_EXIT_LAST_COMMON;
499 enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
500 fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
501
502 /* Done. */
503 pVM->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChanged(pVM, fUseDebugLoop);
504#else
505 RT_NOREF(pVM);
506#endif
507}
508
509
510/**
511 * Follow up notification callback to NEMR3NotifyDebugEventChanged for each CPU.
512 *
513 * NEM uses this to combine the decision made NEMR3NotifyDebugEventChanged with
514 * per CPU settings.
515 *
516 * @param pVM The VM cross context VM structure.
517 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
518 */
519VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu)
520{
521 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
522
523#ifdef VBOX_WITH_NATIVE_NEM
524 pVCpu->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChangedPerCpu(pVM, pVCpu,
525 pVCpu->nem.s.fSingleInstruction | pVM->nem.s.fUseDebugLoop);
526#else
527 RT_NOREF(pVM, pVCpu);
528#endif
529}
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