NEMR3.cpp@ 92525

Last change on this file since 92525 was 92525, checked in by vboxsync, 3 years ago
VMM/NEM-linux: Exit history updates. bugref:9044
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1	/* $Id: NEMR3.cpp 92525 2021-11-21 00:08:49Z vboxsync $ */
2	/** @file
3	* NEM - Native execution manager.
4	*/
5
6	/*
7	* Copyright (C) 2018-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/** @page pg_nem NEM - Native Execution Manager.
19	*
20	* This is an alternative execution manage to HM and raw-mode. On one host
21	* (Windows) we're forced to use this, on the others we just do it because we
22	* can. Since this is host specific in nature, information about an
23	* implementation is contained in the NEMR3Native-xxxx.cpp files.
24	*
25	* @ref pg_nem_win
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_NEM
33	#include <VBox/vmm/nem.h>
34	#include <VBox/vmm/gim.h>
35	#include "NEMInternal.h"
36	#include <VBox/vmm/vm.h>
37	#include <VBox/vmm/uvm.h>
38	#include <VBox/err.h>
39
40	#include <iprt/asm.h>
41
42
43
44	/**
45	* Basic init and configuration reading.
46	*
47	* Always call NEMR3Term after calling this.
48	*
49	* @returns VBox status code.
50	* @param pVM The cross context VM structure.
51	*/
52	VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
53	{
54	LogFlow(("NEMR3Init\n"));
55
56	/*
57	* Assert alignment and sizes.
58	*/
59	AssertCompileMemberAlignment(VM, nem.s, 64);
60	AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
61
62	/*
63	* Initialize state info so NEMR3Term will always be happy.
64	* No returning prior to setting magics!
65	*/
66	pVM->nem.s.u32Magic = NEM_MAGIC;
67	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
68	{
69	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
70	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
71	}
72
73	/*
74	* Read configuration.
75	*/
76	PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
77
78	/*
79	* Validate the NEM settings.
80	*/
81	int rc = CFGMR3ValidateConfig(pCfgNem,
82	"/NEM/",
83	"Enabled"
84	"\|Allow64BitGuests"
85	"\|LovelyMesaDrvWorkaround"
86	#ifdef RT_OS_WINDOWS
87	"\|UseRing0Runloop"
88	#endif
89	,
90	"" /* pszValidNodes /, "NEM" / pszWho /, 0 / uInstance */);
91	if (RT_FAILURE(rc))
92	return rc;
93
94	/** @cfgm{/NEM/NEMEnabled, bool, true}
95	* Whether NEM is enabled. */
96	rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
97	AssertLogRelRCReturn(rc, rc);
98
99
100	#ifdef VBOX_WITH_64_BITS_GUESTS
101	/** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
102	* Enables AMD64 CPU features.
103	* On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
104	* already have the support. */
105	rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
106	AssertLogRelRCReturn(rc, rc);
107	#else
108	pVM->nem.s.fAllow64BitGuests = false;
109	#endif
110
111	/** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
112	* Workaround for mesa vmsvga 3d driver making incorrect assumptions about
113	* the hypervisor it is running under. */
114	bool f;
115	rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
116	AssertLogRelRCReturn(rc, rc);
117	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
118	{
119	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
120	pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
121	}
122
123	#ifdef RT_OS_WINDOWS
124	/** @cfgm{/NEM/UseRing0Runloop, bool, true}
125	* Whether to use the ring-0 runloop (if enabled in the build) or the ring-3 one.
126	* The latter is generally slower. This option serves as a way out in case
127	* something breaks in the ring-0 loop. */
128	# ifdef NEM_WIN_USE_RING0_RUNLOOP_BY_DEFAULT
129	bool fUseRing0Runloop = true;
130	# else
131	bool fUseRing0Runloop = false;
132	# endif
133	rc = CFGMR3QueryBoolDef(pCfgNem, "UseRing0Runloop", &fUseRing0Runloop, fUseRing0Runloop);
134	AssertLogRelRCReturn(rc, rc);
135	pVM->nem.s.fUseRing0Runloop = fUseRing0Runloop;
136	#endif
137
138	return VINF_SUCCESS;
139	}
140
141
142	/**
143	* This is called by HMR3Init() when HM cannot be used.
144	*
145	* Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
146	* native hypervisor API to execute the VM.
147	*
148	* @returns VBox status code.
149	* @param pVM The cross context VM structure.
150	* @param fFallback Whether this is a fallback call. Cleared if the VM is
151	* configured to use NEM instead of HM.
152	* @param fForced Whether /HM/HMForced was set. If set and we fail to
153	* enable NEM, we'll return a failure status code.
154	* Otherwise we'll assume HMR3Init falls back on raw-mode.
155	*/
156	VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
157	{
158	Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
159	int rc;
160	if (pVM->nem.s.fEnabled)
161	{
162	#ifdef VBOX_WITH_NATIVE_NEM
163	rc = nemR3NativeInit(pVM, fFallback, fForced);
164	ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
165	#else
166	RT_NOREF(fFallback);
167	rc = VINF_SUCCESS;
168	#endif
169	if (RT_SUCCESS(rc))
170	{
171	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
172	{
173	#ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
174	KVM APIs are much faster, thus the different mode name. :-) */
175	LogRel(("NEM:\n"
176	"NEM: NEMR3Init: Snail execution mode is active!\n"
177	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
178	"NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
179	"NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
180	"NEM: consider the consequences of disabling these features.\n"
181	"NEM:\n"));
182	#else
183	LogRel(("NEM:\n"
184	"NEM: NEMR3Init: Turtle execution mode is active!\n"
185	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
186	"NEM:\n"));
187	#endif
188	}
189	else
190	{
191	LogRel(("NEM: NEMR3Init: Not available.\n"));
192	if (fForced)
193	rc = VERR_NEM_NOT_AVAILABLE;
194	}
195	}
196	else
197	LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
198	}
199	else
200	{
201	LogRel(("NEM: NEMR3Init: Disabled.\n"));
202	rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
203	}
204	return rc;
205	}
206
207
208	/**
209	* Perform initialization that depends on CPUM working.
210	*
211	* This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
212	*
213	* @returns VBox status code.
214	* @param pVM The cross context VM structure.
215	*/
216	VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
217	{
218	int rc = VINF_SUCCESS;
219	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
220	{
221	/*
222	* Enable CPU features making general ASSUMPTIONS (there are two similar
223	* blocks of code in HM.cpp), to avoid duplicating this code. The
224	* native backend can make check capabilities and adjust as needed.
225	*/
226	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP);
227	if ( CPUMGetGuestCpuVendor(pVM) == CPUMCPUVENDOR_AMD
228	\|\| CPUMGetGuestCpuVendor(pVM) == CPUMCPUVENDOR_HYGON)
229	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL); /* 64 bits only on Intel CPUs */
230	if (pVM->nem.s.fAllow64BitGuests)
231	{
232	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL);
233	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE);
234	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LONG_MODE);
235	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LAHF);
236	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX);
237	}
238	/* Turn on NXE if PAE has been enabled. */
239	else if (CPUMR3GetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE))
240	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX);
241
242	/*
243	* Do native after-CPUM init.
244	*/
245	#ifdef VBOX_WITH_NATIVE_NEM
246	rc = nemR3NativeInitAfterCPUM(pVM);
247	#else
248	RT_NOREF(pVM);
249	#endif
250	}
251	return rc;
252	}
253
254
255	/**
256	* Called when a init phase has completed.
257	*
258	* @returns VBox status code.
259	* @param pVM The cross context VM structure.
260	* @param enmWhat The phase that completed.
261	*/
262	VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
263	{
264	/*
265	* Check if GIM needs #UD, since that applies to everyone.
266	*/
267	if (enmWhat == VMINITCOMPLETED_RING3)
268	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
269	{
270	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
271	pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
272	}
273
274	/*
275	* Call native code.
276	*/
277	int rc = VINF_SUCCESS;
278	#ifdef VBOX_WITH_NATIVE_NEM
279	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
280	rc = nemR3NativeInitCompleted(pVM, enmWhat);
281	#else
282	RT_NOREF(pVM, enmWhat);
283	#endif
284	return rc;
285	}
286
287
288	/**
289	*
290	* @returns VBox status code.
291	* @param pVM The cross context VM structure.
292	*/
293	VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
294	{
295	AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
296	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
297	AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
298
299	/* Do native termination. */
300	int rc = VINF_SUCCESS;
301	#ifdef VBOX_WITH_NATIVE_NEM
302	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
303	rc = nemR3NativeTerm(pVM);
304	#endif
305
306	/* Mark it as terminated. */
307	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
308	{
309	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
310	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
311	}
312	pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
313	return rc;
314	}
315
316	/**
317	* External interface for querying whether native execution API is used.
318	*
319	* @returns true if NEM is being used, otherwise false.
320	* @param pUVM The user mode VM handle.
321	* @sa HMR3IsEnabled
322	*/
323	VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
324	{
325	UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
326	PVM pVM = pUVM->pVM;
327	VM_ASSERT_VALID_EXT_RETURN(pVM, false);
328	return VM_IS_NEM_ENABLED(pVM);
329	}
330
331
332	/**
333	* The VM is being reset.
334	*
335	* @param pVM The cross context VM structure.
336	*/
337	VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
338	{
339	#ifdef VBOX_WITH_NATIVE_NEM
340	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
341	nemR3NativeReset(pVM);
342	#else
343	RT_NOREF(pVM);
344	#endif
345	}
346
347
348	/**
349	* Resets a virtual CPU.
350	*
351	* Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
352	*
353	* @param pVCpu The cross context virtual CPU structure to reset.
354	* @param fInitIpi Set if being reset due to INIT IPI.
355	*/
356	VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
357	{
358	#ifdef VBOX_WITH_NATIVE_NEM
359	if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
360	nemR3NativeResetCpu(pVCpu, fInitIpi);
361	#else
362	RT_NOREF(pVCpu, fInitIpi);
363	#endif
364	}
365
366
367	/**
368	* Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
369	*
370	* @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
371	* @param pVM The cross context VM structure.
372	*/
373	VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
374	{
375	#ifdef VBOX_WITH_NATIVE_NEM
376	if (VM_IS_NEM_ENABLED(pVM))
377	return true;
378	#else
379	RT_NOREF(pVM);
380	#endif
381	return false;
382	}
383
384
385	/**
386	* Gets the name of a generic NEM exit code.
387	*
388	* @returns Pointer to read only string if @a uExit is known, otherwise NULL.
389	* @param uExit The NEM exit to name.
390	*/
391	VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
392	{
393	switch ((NEMEXITTYPE)uExit)
394	{
395	case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
396	case NEMEXITTYPE_HALT: return "NEM halt";
397
398	case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
399	case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
400	case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
401	case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
402	case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
403	case NEMEXITTYPE_CANCELED: return "NEM canceled";
404	case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
405
406	case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
407	case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
408	case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
409	case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
410
411	case NEMEXITTYPE_INVALID:
412	case NEMEXITTYPE_END:
413	break;
414	}
415
416	return NULL;
417	}
418
419
420	VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
421	{
422	Assert(VM_IS_NEM_ENABLED(pVM));
423	#ifdef VBOX_WITH_NATIVE_NEM
424	return nemR3NativeRunGC(pVM, pVCpu);
425	#else
426	NOREF(pVM); NOREF(pVCpu);
427	return VERR_INTERNAL_ERROR_3;
428	#endif
429	}
430
431
432	#ifndef VBOX_WITH_NATIVE_NEM
433	VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
434	{
435	RT_NOREF(pVM, pVCpu);
436	return false;
437	}
438	#endif
439
440
441	VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
442	{
443	Assert(VM_IS_NEM_ENABLED(pVM));
444	#ifdef VBOX_WITH_NATIVE_NEM
445	return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
446	#else
447	NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
448	return false;
449	#endif
450	}
451
452
453	VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
454	{
455	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
456	#ifdef VBOX_WITH_NATIVE_NEM
457	nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
458	#else
459	RT_NOREF(pVM, pVCpu, fFlags);
460	#endif
461	}
462
463
464	#ifndef VBOX_WITH_NATIVE_NEM
465	VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
466	{
467	RT_NOREF(pVCpu, fEnabled);
468	}
469	#endif
470

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source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 92525

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