NEMR3.cpp@ 106951

Last change on this file since 106951 was 106951, checked in by vboxsync, 3 weeks ago
VMM/NEM: Don't print the turtle/snail execution mode message on ARMv8 as long as we don't have a native hypervisor to compare against, bugref:10392
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1	/* $Id: NEMR3.cpp 106951 2024-11-12 09:46:29Z vboxsync $ */
2	/** @file
3	* NEM - Native execution manager.
4	*/
5
6	/*
7	* Copyright (C) 2018-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	/** @page pg_nem NEM - Native Execution Manager.
29	*
30	* This is an alternative execution manage to HM and raw-mode. On one host
31	* (Windows) we're forced to use this, on the others we just do it because we
32	* can. Since this is host specific in nature, information about an
33	* implementation is contained in the NEMR3Native-xxxx.cpp files.
34	*
35	* @ref pg_nem_win
36	*/
37
38
39	/*********************************************************************************************************************************
40	* Header Files *
41	*********************************************************************************************************************************/
42	#define LOG_GROUP LOG_GROUP_NEM
43	#include <VBox/vmm/dbgf.h>
44	#include <VBox/vmm/nem.h>
45	#include <VBox/vmm/gim.h>
46	#include "NEMInternal.h"
47	#include <VBox/vmm/vm.h>
48	#include <VBox/vmm/uvm.h>
49	#include <VBox/err.h>
50
51	#include <iprt/asm.h>
52	#include <iprt/string.h>
53
54
55
56	/**
57	* Basic init and configuration reading.
58	*
59	* Always call NEMR3Term after calling this.
60	*
61	* @returns VBox status code.
62	* @param pVM The cross context VM structure.
63	*/
64	VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
65	{
66	LogFlow(("NEMR3Init\n"));
67
68	/*
69	* Assert alignment and sizes.
70	*/
71	AssertCompileMemberAlignment(VM, nem.s, 64);
72	AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
73
74	/*
75	* Initialize state info so NEMR3Term will always be happy.
76	* No returning prior to setting magics!
77	*/
78	pVM->nem.s.u32Magic = NEM_MAGIC;
79	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
80	{
81	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
82	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
83	}
84
85	/*
86	* Read configuration.
87	*/
88	PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
89
90	/*
91	* Validate the NEM settings.
92	*/
93	int rc = CFGMR3ValidateConfig(pCfgNem,
94	"/NEM/",
95	"Enabled"
96	"\|Allow64BitGuests"
97	"\|LovelyMesaDrvWorkaround"
98	#ifdef RT_OS_WINDOWS
99	"\|UseRing0Runloop"
100	#elif defined(RT_OS_DARWIN)
101	"\|VmxPleGap"
102	"\|VmxPleWindow"
103	"\|VmxLbr"
104	#endif
105	#if defined(VBOX_VMM_TARGET_ARMV8)
106	"\|VTimerInterrupt"
107	#endif
108	,
109	"" /* pszValidNodes /, "NEM" / pszWho /, 0 / uInstance */);
110	if (RT_FAILURE(rc))
111	return rc;
112
113	/** @cfgm{/NEM/NEMEnabled, bool, true}
114	* Whether NEM is enabled. */
115	rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
116	AssertLogRelRCReturn(rc, rc);
117
118
119	#ifdef VBOX_WITH_64_BITS_GUESTS
120	/** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
121	* Enables AMD64 CPU features.
122	* On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
123	* already have the support. */
124	rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
125	AssertLogRelRCReturn(rc, rc);
126	#else
127	pVM->nem.s.fAllow64BitGuests = false;
128	#endif
129
130	/** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
131	* Workaround for mesa vmsvga 3d driver making incorrect assumptions about
132	* the hypervisor it is running under. */
133	bool f;
134	rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
135	AssertLogRelRCReturn(rc, rc);
136	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
137	{
138	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
139	pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
140	}
141
142	#if defined(VBOX_VMM_TARGET_ARMV8)
143	/** @cfgm{/NEM/VTimerInterrupt, uint32_t}
144	* Specifies the interrupt identifier for the VTimer. */
145	rc = CFGMR3QueryU32(pCfgNem, "VTimerInterrupt", &pVM->nem.s.u32GicPpiVTimer);
146	AssertLogRelRCReturn(rc, rc);
147	#endif
148
149	return VINF_SUCCESS;
150	}
151
152
153	/**
154	* This is called by HMR3Init() when HM cannot be used.
155	*
156	* Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
157	* native hypervisor API to execute the VM.
158	*
159	* @returns VBox status code.
160	* @param pVM The cross context VM structure.
161	* @param fFallback Whether this is a fallback call. Cleared if the VM is
162	* configured to use NEM instead of HM.
163	* @param fForced Whether /HM/HMForced was set. If set and we fail to
164	* enable NEM, we'll return a failure status code.
165	* Otherwise we'll assume HMR3Init falls back on raw-mode.
166	*/
167	VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
168	{
169	Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
170	int rc;
171	if (pVM->nem.s.fEnabled)
172	{
173	#ifdef VBOX_WITH_NATIVE_NEM
174	rc = nemR3NativeInit(pVM, fFallback, fForced);
175	ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
176	#else
177	RT_NOREF(fFallback);
178	rc = VINF_SUCCESS;
179	#endif
180	if (RT_SUCCESS(rc))
181	{
182	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
183	{
184	#ifndef VBOX_VMM_TARGET_ARMV8 /* NEM is the only option on ARM for now, so calling it turtle and snail mode
185	* is a bit unfair as long as we don't have a native hypervisor to compare against :). */
186	# ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
187	KVM APIs are much faster, thus the different mode name. :-) */
188	LogRel(("NEM:\n"
189	"NEM: NEMR3Init: Snail execution mode is active!\n"
190	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
191	"NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
192	"NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
193	"NEM: consider the consequences of disabling these features.\n"
194	"NEM:\n"));
195	# else
196	LogRel(("NEM:\n"
197	"NEM: NEMR3Init: Turtle execution mode is active!\n"
198	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
199	"NEM:\n"));
200	# endif
201	#endif
202	}
203	else
204	{
205	LogRel(("NEM: NEMR3Init: Not available.\n"));
206	if (fForced)
207	rc = VERR_NEM_NOT_AVAILABLE;
208	}
209	}
210	else
211	LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
212	}
213	else
214	{
215	LogRel(("NEM: NEMR3Init: Disabled.\n"));
216	rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
217	}
218	return rc;
219	}
220
221
222	/**
223	* Perform initialization that depends on CPUM working.
224	*
225	* This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
226	*
227	* @returns VBox status code.
228	* @param pVM The cross context VM structure.
229	*/
230	VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
231	{
232	int rc = VINF_SUCCESS;
233	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
234	{
235	/*
236	* Do native after-CPUM init.
237	*/
238	#ifdef VBOX_WITH_NATIVE_NEM
239	rc = nemR3NativeInitAfterCPUM(pVM);
240	#else
241	RT_NOREF(pVM);
242	#endif
243	}
244	return rc;
245	}
246
247
248	/**
249	* Called when a init phase has completed.
250	*
251	* @returns VBox status code.
252	* @param pVM The cross context VM structure.
253	* @param enmWhat The phase that completed.
254	*/
255	VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
256	{
257	/*
258	* Check if GIM needs #UD, since that applies to everyone.
259	*/
260	if (enmWhat == VMINITCOMPLETED_RING3)
261	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
262	{
263	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
264	pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
265	}
266
267	/*
268	* Call native code.
269	*/
270	int rc = VINF_SUCCESS;
271	#ifdef VBOX_WITH_NATIVE_NEM
272	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
273	rc = nemR3NativeInitCompleted(pVM, enmWhat);
274	#else
275	RT_NOREF(pVM, enmWhat);
276	#endif
277	return rc;
278	}
279
280
281	/**
282	*
283	* @returns VBox status code.
284	* @param pVM The cross context VM structure.
285	*/
286	VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
287	{
288	AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
289	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
290	AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
291
292	/* Do native termination. */
293	int rc = VINF_SUCCESS;
294	#ifdef VBOX_WITH_NATIVE_NEM
295	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
296	rc = nemR3NativeTerm(pVM);
297	#endif
298
299	/* Mark it as terminated. */
300	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
301	{
302	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
303	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
304	}
305	pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
306	return rc;
307	}
308
309	/**
310	* External interface for querying whether native execution API is used.
311	*
312	* @returns true if NEM is being used, otherwise false.
313	* @param pUVM The user mode VM handle.
314	* @sa HMR3IsEnabled
315	*/
316	VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
317	{
318	UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
319	PVM pVM = pUVM->pVM;
320	VM_ASSERT_VALID_EXT_RETURN(pVM, false);
321	return VM_IS_NEM_ENABLED(pVM);
322	}
323
324
325	/**
326	* The VM is being reset.
327	*
328	* @param pVM The cross context VM structure.
329	*/
330	VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
331	{
332	#ifdef VBOX_WITH_NATIVE_NEM
333	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
334	nemR3NativeReset(pVM);
335	#else
336	RT_NOREF(pVM);
337	#endif
338	}
339
340
341	/**
342	* Resets a virtual CPU.
343	*
344	* Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
345	*
346	* @param pVCpu The cross context virtual CPU structure to reset.
347	* @param fInitIpi Set if being reset due to INIT IPI.
348	*/
349	VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
350	{
351	#ifdef VBOX_WITH_NATIVE_NEM
352	if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
353	nemR3NativeResetCpu(pVCpu, fInitIpi);
354	#else
355	RT_NOREF(pVCpu, fInitIpi);
356	#endif
357	}
358
359
360	/**
361	* Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
362	*
363	* @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
364	* @param pVM The cross context VM structure.
365	*/
366	VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
367	{
368	#ifdef VBOX_WITH_NATIVE_NEM
369	if (VM_IS_NEM_ENABLED(pVM))
370	return true;
371	#else
372	RT_NOREF(pVM);
373	#endif
374	return false;
375	}
376
377
378	/**
379	* Gets the name of a generic NEM exit code.
380	*
381	* @returns Pointer to read only string if @a uExit is known, otherwise NULL.
382	* @param uExit The NEM exit to name.
383	*/
384	VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
385	{
386	switch ((NEMEXITTYPE)uExit)
387	{
388	case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
389	case NEMEXITTYPE_HALT: return "NEM halt";
390
391	case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
392	case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
393	case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
394	case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
395	case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
396	case NEMEXITTYPE_CANCELED: return "NEM canceled";
397	case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
398
399	case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
400	case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
401	case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
402	case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
403
404	case NEMEXITTYPE_INVALID:
405	case NEMEXITTYPE_END:
406	break;
407	}
408
409	return NULL;
410	}
411
412
413	VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
414	{
415	Assert(VM_IS_NEM_ENABLED(pVM));
416	#ifdef VBOX_WITH_NATIVE_NEM
417	return nemR3NativeRunGC(pVM, pVCpu);
418	#else
419	NOREF(pVM); NOREF(pVCpu);
420	return VERR_INTERNAL_ERROR_3;
421	#endif
422	}
423
424
425	#ifndef VBOX_WITH_NATIVE_NEM
426	VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
427	{
428	RT_NOREF(pVM, pVCpu);
429	return false;
430	}
431	#endif
432
433
434	VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
435	{
436	Assert(VM_IS_NEM_ENABLED(pVM));
437	#ifdef VBOX_WITH_NATIVE_NEM
438	return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
439	#else
440	NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
441	return false;
442	#endif
443	}
444
445
446	VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
447	{
448	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
449	#ifdef VBOX_WITH_NATIVE_NEM
450	nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
451	#else
452	RT_NOREF(pVM, pVCpu, fFlags);
453	#endif
454	}
455
456	#ifndef VBOX_WITH_NATIVE_NEM
457
458	VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
459	{
460	RT_NOREF(pVCpu, fEnabled);
461	}
462
463	# ifdef VBOX_WITH_PGM_NEM_MODE
464
465	VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM)
466	{
467	RT_NOREF(pVM);
468	return false;
469	}
470
471
472	VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
473	void *pvBitmap, size_t cbBitmap)
474	{
475	RT_NOREF(pVM, GCPhys, cb, uNemRange, pvBitmap, cbBitmap);
476	AssertFailed();
477	return VERR_INTERNAL_ERROR_2;
478	}
479
480
481	VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
482	void pvRam, void pvMmio2, uint8_t pu2State, uint32_t puNemRange)
483	{
484	RT_NOREF(pVM, GCPhys, cb, fFlags, pvRam, pvMmio2, pu2State, puNemRange);
485	AssertFailed();
486	return VERR_INTERNAL_ERROR_2;
487	}
488
489	# endif /* VBOX_WITH_PGM_NEM_MODE */
490	#endif /* !VBOX_WITH_NATIVE_NEM */
491
492	/**
493	* Notification callback from DBGF when interrupt breakpoints or generic debug
494	* event settings changes.
495	*
496	* DBGF will call NEMR3NotifyDebugEventChangedPerCpu on each CPU afterwards, this
497	* function is just updating the VM globals.
498	*
499	* @param pVM The VM cross context VM structure.
500	* @thread EMT(0)
501	*/
502	VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM)
503	{
504	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
505
506	#ifdef VBOX_WITH_NATIVE_NEM
507	/* Interrupts. */
508	bool fUseDebugLoop = pVM->dbgf.ro.cSoftIntBreakpoints > 0
509	\|\| pVM->dbgf.ro.cHardIntBreakpoints > 0;
510
511	/* CPU Exceptions. */
512	for (DBGFEVENTTYPE enmEvent = DBGFEVENT_XCPT_FIRST;
513	!fUseDebugLoop && enmEvent <= DBGFEVENT_XCPT_LAST;
514	enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
515	fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
516
517	/* Common VM exits. */
518	for (DBGFEVENTTYPE enmEvent = DBGFEVENT_EXIT_FIRST;
519	!fUseDebugLoop && enmEvent <= DBGFEVENT_EXIT_LAST_COMMON;
520	enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
521	fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
522
523	/* Done. */
524	pVM->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChanged(pVM, fUseDebugLoop);
525	#else
526	RT_NOREF(pVM);
527	#endif
528	}
529
530
531	/**
532	* Follow up notification callback to NEMR3NotifyDebugEventChanged for each CPU.
533	*
534	* NEM uses this to combine the decision made NEMR3NotifyDebugEventChanged with
535	* per CPU settings.
536	*
537	* @param pVM The VM cross context VM structure.
538	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
539	*/
540	VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu)
541	{
542	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
543
544	#ifdef VBOX_WITH_NATIVE_NEM
545	pVCpu->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChangedPerCpu(pVM, pVCpu,
546	pVCpu->nem.s.fSingleInstruction \| pVM->nem.s.fUseDebugLoop);
547	#else
548	RT_NOREF(pVM, pVCpu);
549	#endif
550	}
551
552
553	/**
554	* Disables a CPU ISA extension, like MONITOR/MWAIT.
555	*
556	* @returns VBox status code
557	* @param pVM The cross context VM structure.
558	* @param pszIsaExt The ISA extension name in the config tree.
559	*/
560	int nemR3DisableCpuIsaExt(PVM pVM, const char *pszIsaExt)
561	{
562	/*
563	* Get IsaExts config node under CPUM.
564	*/
565	PCFGMNODE pIsaExts = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/CPUM/IsaExts");
566	if (!pIsaExts)
567	{
568	int rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "/CPUM/IsaExts", &pIsaExts);
569	AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertNode: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
570	}
571
572	/*
573	* Look for a value by the given name (pszIsaExt).
574	*/
575	/* Integer values 1 (CPUMISAEXTCFG_ENABLED_SUPPORTED) and 9 (CPUMISAEXTCFG_ENABLED_PORTABLE) will be replaced. */
576	uint64_t u64Value;
577	int rc = CFGMR3QueryInteger(pIsaExts, pszIsaExt, &u64Value);
578	if (RT_SUCCESS(rc))
579	{
580	if (u64Value != 1 && u64Value != 9)
581	{
582	LogRel(("NEM: Not disabling IsaExt '%s', already configured with int value %lld\n", pszIsaExt, u64Value));
583	return VINF_SUCCESS;
584	}
585	CFGMR3RemoveValue(pIsaExts, pszIsaExt);
586	}
587	/* String value 'default', 'enabled' and 'portable' will be replaced. */
588	else if (rc == VERR_CFGM_NOT_INTEGER)
589	{
590	char szValue[32];
591	rc = CFGMR3QueryString(pIsaExts, pszIsaExt, szValue, sizeof(szValue));
592	AssertRCReturn(rc, VINF_SUCCESS);
593
594	if ( RTStrICmpAscii(szValue, "default") != 0
595	&& RTStrICmpAscii(szValue, "def") != 0
596	&& RTStrICmpAscii(szValue, "enabled") != 0
597	&& RTStrICmpAscii(szValue, "enable") != 0
598	&& RTStrICmpAscii(szValue, "on") != 0
599	&& RTStrICmpAscii(szValue, "yes") != 0
600	&& RTStrICmpAscii(szValue, "portable") != 0)
601	{
602	LogRel(("NEM: Not disabling IsaExt '%s', already configured with string value '%s'\n", pszIsaExt, szValue));
603	return VINF_SUCCESS;
604	}
605	CFGMR3RemoveValue(pIsaExts, pszIsaExt);
606	}
607	else
608	AssertLogRelMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND, ("CFGMR3QueryInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt),
609	VERR_NEM_IPE_8);
610
611	/*
612	* Insert the disabling value.
613	*/
614	rc = CFGMR3InsertInteger(pIsaExts, pszIsaExt, 0 /* disabled */);
615	AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
616
617	return VINF_SUCCESS;
618	}
619

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source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 106951

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