NEMR3.cpp@ 106061

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1	/* $Id: NEMR3.cpp 106061 2024-09-16 14:03:52Z vboxsync $ */
2	/** @file
3	* NEM - Native execution manager.
4	*/
5
6	/*
7	* Copyright (C) 2018-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	/** @page pg_nem NEM - Native Execution Manager.
29	*
30	* This is an alternative execution manage to HM and raw-mode. On one host
31	* (Windows) we're forced to use this, on the others we just do it because we
32	* can. Since this is host specific in nature, information about an
33	* implementation is contained in the NEMR3Native-xxxx.cpp files.
34	*
35	* @ref pg_nem_win
36	*/
37
38
39	/*********************************************************************************************************************************
40	* Header Files *
41	*********************************************************************************************************************************/
42	#define LOG_GROUP LOG_GROUP_NEM
43	#include <VBox/vmm/dbgf.h>
44	#include <VBox/vmm/nem.h>
45	#include <VBox/vmm/gim.h>
46	#include "NEMInternal.h"
47	#include <VBox/vmm/vm.h>
48	#include <VBox/vmm/uvm.h>
49	#include <VBox/err.h>
50
51	#include <iprt/asm.h>
52	#include <iprt/string.h>
53
54
55
56	/**
57	* Basic init and configuration reading.
58	*
59	* Always call NEMR3Term after calling this.
60	*
61	* @returns VBox status code.
62	* @param pVM The cross context VM structure.
63	*/
64	VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
65	{
66	LogFlow(("NEMR3Init\n"));
67
68	/*
69	* Assert alignment and sizes.
70	*/
71	AssertCompileMemberAlignment(VM, nem.s, 64);
72	AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
73
74	/*
75	* Initialize state info so NEMR3Term will always be happy.
76	* No returning prior to setting magics!
77	*/
78	pVM->nem.s.u32Magic = NEM_MAGIC;
79	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
80	{
81	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
82	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
83	}
84
85	/*
86	* Read configuration.
87	*/
88	PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
89
90	/*
91	* Validate the NEM settings.
92	*/
93	int rc = CFGMR3ValidateConfig(pCfgNem,
94	"/NEM/",
95	"Enabled"
96	"\|Allow64BitGuests"
97	"\|LovelyMesaDrvWorkaround"
98	#ifdef RT_OS_WINDOWS
99	"\|UseRing0Runloop"
100	#elif defined(RT_OS_DARWIN)
101	"\|VmxPleGap"
102	"\|VmxPleWindow"
103	"\|VmxLbr"
104	#endif
105	#if defined(VBOX_VMM_TARGET_ARMV8)
106	"\|VTimerInterrupt"
107	#endif
108	,
109	"" /* pszValidNodes /, "NEM" / pszWho /, 0 / uInstance */);
110	if (RT_FAILURE(rc))
111	return rc;
112
113	/** @cfgm{/NEM/NEMEnabled, bool, true}
114	* Whether NEM is enabled. */
115	rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
116	AssertLogRelRCReturn(rc, rc);
117
118
119	#ifdef VBOX_WITH_64_BITS_GUESTS
120	/** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
121	* Enables AMD64 CPU features.
122	* On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
123	* already have the support. */
124	rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
125	AssertLogRelRCReturn(rc, rc);
126	#else
127	pVM->nem.s.fAllow64BitGuests = false;
128	#endif
129
130	/** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
131	* Workaround for mesa vmsvga 3d driver making incorrect assumptions about
132	* the hypervisor it is running under. */
133	bool f;
134	rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
135	AssertLogRelRCReturn(rc, rc);
136	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
137	{
138	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
139	pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
140	}
141
142	#if defined(VBOX_VMM_TARGET_ARMV8)
143	/** @cfgm{/NEM/VTimerInterrupt, uint32_t}
144	* Specifies the interrupt identifier for the VTimer. */
145	rc = CFGMR3QueryU32(pCfgNem, "VTimerInterrupt", &pVM->nem.s.u32GicPpiVTimer);
146	AssertLogRelRCReturn(rc, rc);
147	#endif
148
149	return VINF_SUCCESS;
150	}
151
152
153	/**
154	* This is called by HMR3Init() when HM cannot be used.
155	*
156	* Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
157	* native hypervisor API to execute the VM.
158	*
159	* @returns VBox status code.
160	* @param pVM The cross context VM structure.
161	* @param fFallback Whether this is a fallback call. Cleared if the VM is
162	* configured to use NEM instead of HM.
163	* @param fForced Whether /HM/HMForced was set. If set and we fail to
164	* enable NEM, we'll return a failure status code.
165	* Otherwise we'll assume HMR3Init falls back on raw-mode.
166	*/
167	VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
168	{
169	Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
170	int rc;
171	if (pVM->nem.s.fEnabled)
172	{
173	#ifdef VBOX_WITH_NATIVE_NEM
174	rc = nemR3NativeInit(pVM, fFallback, fForced);
175	ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
176	#else
177	RT_NOREF(fFallback);
178	rc = VINF_SUCCESS;
179	#endif
180	if (RT_SUCCESS(rc))
181	{
182	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
183	{
184	#ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
185	KVM APIs are much faster, thus the different mode name. :-) */
186	LogRel(("NEM:\n"
187	"NEM: NEMR3Init: Snail execution mode is active!\n"
188	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
189	"NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
190	"NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
191	"NEM: consider the consequences of disabling these features.\n"
192	"NEM:\n"));
193	#else
194	LogRel(("NEM:\n"
195	"NEM: NEMR3Init: Turtle execution mode is active!\n"
196	"NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
197	"NEM:\n"));
198	#endif
199	}
200	else
201	{
202	LogRel(("NEM: NEMR3Init: Not available.\n"));
203	if (fForced)
204	rc = VERR_NEM_NOT_AVAILABLE;
205	}
206	}
207	else
208	LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
209	}
210	else
211	{
212	LogRel(("NEM: NEMR3Init: Disabled.\n"));
213	rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
214	}
215	return rc;
216	}
217
218
219	/**
220	* Perform initialization that depends on CPUM working.
221	*
222	* This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
223	*
224	* @returns VBox status code.
225	* @param pVM The cross context VM structure.
226	*/
227	VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
228	{
229	int rc = VINF_SUCCESS;
230	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
231	{
232	/*
233	* Do native after-CPUM init.
234	*/
235	#ifdef VBOX_WITH_NATIVE_NEM
236	rc = nemR3NativeInitAfterCPUM(pVM);
237	#else
238	RT_NOREF(pVM);
239	#endif
240	}
241	return rc;
242	}
243
244
245	/**
246	* Called when a init phase has completed.
247	*
248	* @returns VBox status code.
249	* @param pVM The cross context VM structure.
250	* @param enmWhat The phase that completed.
251	*/
252	VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
253	{
254	/*
255	* Check if GIM needs #UD, since that applies to everyone.
256	*/
257	if (enmWhat == VMINITCOMPLETED_RING3)
258	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
259	{
260	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
261	pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
262	}
263
264	/*
265	* Call native code.
266	*/
267	int rc = VINF_SUCCESS;
268	#ifdef VBOX_WITH_NATIVE_NEM
269	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
270	rc = nemR3NativeInitCompleted(pVM, enmWhat);
271	#else
272	RT_NOREF(pVM, enmWhat);
273	#endif
274	return rc;
275	}
276
277
278	/**
279	*
280	* @returns VBox status code.
281	* @param pVM The cross context VM structure.
282	*/
283	VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
284	{
285	AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
286	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
287	AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
288
289	/* Do native termination. */
290	int rc = VINF_SUCCESS;
291	#ifdef VBOX_WITH_NATIVE_NEM
292	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
293	rc = nemR3NativeTerm(pVM);
294	#endif
295
296	/* Mark it as terminated. */
297	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
298	{
299	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
300	pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
301	}
302	pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
303	return rc;
304	}
305
306	/**
307	* External interface for querying whether native execution API is used.
308	*
309	* @returns true if NEM is being used, otherwise false.
310	* @param pUVM The user mode VM handle.
311	* @sa HMR3IsEnabled
312	*/
313	VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
314	{
315	UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
316	PVM pVM = pUVM->pVM;
317	VM_ASSERT_VALID_EXT_RETURN(pVM, false);
318	return VM_IS_NEM_ENABLED(pVM);
319	}
320
321
322	/**
323	* The VM is being reset.
324	*
325	* @param pVM The cross context VM structure.
326	*/
327	VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
328	{
329	#ifdef VBOX_WITH_NATIVE_NEM
330	if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
331	nemR3NativeReset(pVM);
332	#else
333	RT_NOREF(pVM);
334	#endif
335	}
336
337
338	/**
339	* Resets a virtual CPU.
340	*
341	* Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
342	*
343	* @param pVCpu The cross context virtual CPU structure to reset.
344	* @param fInitIpi Set if being reset due to INIT IPI.
345	*/
346	VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
347	{
348	#ifdef VBOX_WITH_NATIVE_NEM
349	if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
350	nemR3NativeResetCpu(pVCpu, fInitIpi);
351	#else
352	RT_NOREF(pVCpu, fInitIpi);
353	#endif
354	}
355
356
357	/**
358	* Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
359	*
360	* @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
361	* @param pVM The cross context VM structure.
362	*/
363	VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
364	{
365	#ifdef VBOX_WITH_NATIVE_NEM
366	if (VM_IS_NEM_ENABLED(pVM))
367	return true;
368	#else
369	RT_NOREF(pVM);
370	#endif
371	return false;
372	}
373
374
375	/**
376	* Gets the name of a generic NEM exit code.
377	*
378	* @returns Pointer to read only string if @a uExit is known, otherwise NULL.
379	* @param uExit The NEM exit to name.
380	*/
381	VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
382	{
383	switch ((NEMEXITTYPE)uExit)
384	{
385	case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
386	case NEMEXITTYPE_HALT: return "NEM halt";
387
388	case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
389	case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
390	case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
391	case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
392	case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
393	case NEMEXITTYPE_CANCELED: return "NEM canceled";
394	case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
395
396	case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
397	case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
398	case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
399	case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
400
401	case NEMEXITTYPE_INVALID:
402	case NEMEXITTYPE_END:
403	break;
404	}
405
406	return NULL;
407	}
408
409
410	VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
411	{
412	Assert(VM_IS_NEM_ENABLED(pVM));
413	#ifdef VBOX_WITH_NATIVE_NEM
414	return nemR3NativeRunGC(pVM, pVCpu);
415	#else
416	NOREF(pVM); NOREF(pVCpu);
417	return VERR_INTERNAL_ERROR_3;
418	#endif
419	}
420
421
422	#ifndef VBOX_WITH_NATIVE_NEM
423	VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
424	{
425	RT_NOREF(pVM, pVCpu);
426	return false;
427	}
428	#endif
429
430
431	VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
432	{
433	Assert(VM_IS_NEM_ENABLED(pVM));
434	#ifdef VBOX_WITH_NATIVE_NEM
435	return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
436	#else
437	NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
438	return false;
439	#endif
440	}
441
442
443	VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
444	{
445	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
446	#ifdef VBOX_WITH_NATIVE_NEM
447	nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
448	#else
449	RT_NOREF(pVM, pVCpu, fFlags);
450	#endif
451	}
452
453	#ifndef VBOX_WITH_NATIVE_NEM
454
455	VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
456	{
457	RT_NOREF(pVCpu, fEnabled);
458	}
459
460	# ifdef VBOX_WITH_PGM_NEM_MODE
461
462	VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM)
463	{
464	RT_NOREF(pVM);
465	return false;
466	}
467
468
469	VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
470	void *pvBitmap, size_t cbBitmap)
471	{
472	RT_NOREF(pVM, GCPhys, cb, uNemRange, pvBitmap, cbBitmap);
473	AssertFailed();
474	return VERR_INTERNAL_ERROR_2;
475	}
476
477
478	VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
479	void pvRam, void pvMmio2, uint8_t pu2State, uint32_t puNemRange)
480	{
481	RT_NOREF(pVM, GCPhys, cb, fFlags, pvRam, pvMmio2, pu2State, puNemRange);
482	AssertFailed();
483	return VERR_INTERNAL_ERROR_2;
484	}
485
486	# endif /* VBOX_WITH_PGM_NEM_MODE */
487	#endif /* !VBOX_WITH_NATIVE_NEM */
488
489	/**
490	* Notification callback from DBGF when interrupt breakpoints or generic debug
491	* event settings changes.
492	*
493	* DBGF will call NEMR3NotifyDebugEventChangedPerCpu on each CPU afterwards, this
494	* function is just updating the VM globals.
495	*
496	* @param pVM The VM cross context VM structure.
497	* @thread EMT(0)
498	*/
499	VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM)
500	{
501	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
502
503	#ifdef VBOX_WITH_NATIVE_NEM
504	/* Interrupts. */
505	bool fUseDebugLoop = pVM->dbgf.ro.cSoftIntBreakpoints > 0
506	\|\| pVM->dbgf.ro.cHardIntBreakpoints > 0;
507
508	/* CPU Exceptions. */
509	for (DBGFEVENTTYPE enmEvent = DBGFEVENT_XCPT_FIRST;
510	!fUseDebugLoop && enmEvent <= DBGFEVENT_XCPT_LAST;
511	enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
512	fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
513
514	/* Common VM exits. */
515	for (DBGFEVENTTYPE enmEvent = DBGFEVENT_EXIT_FIRST;
516	!fUseDebugLoop && enmEvent <= DBGFEVENT_EXIT_LAST_COMMON;
517	enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
518	fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
519
520	/* Done. */
521	pVM->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChanged(pVM, fUseDebugLoop);
522	#else
523	RT_NOREF(pVM);
524	#endif
525	}
526
527
528	/**
529	* Follow up notification callback to NEMR3NotifyDebugEventChanged for each CPU.
530	*
531	* NEM uses this to combine the decision made NEMR3NotifyDebugEventChanged with
532	* per CPU settings.
533	*
534	* @param pVM The VM cross context VM structure.
535	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
536	*/
537	VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu)
538	{
539	AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
540
541	#ifdef VBOX_WITH_NATIVE_NEM
542	pVCpu->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChangedPerCpu(pVM, pVCpu,
543	pVCpu->nem.s.fSingleInstruction \| pVM->nem.s.fUseDebugLoop);
544	#else
545	RT_NOREF(pVM, pVCpu);
546	#endif
547	}
548
549
550	/**
551	* Disables a CPU ISA extension, like MONITOR/MWAIT.
552	*
553	* @returns VBox status code
554	* @param pVM The cross context VM structure.
555	* @param pszIsaExt The ISA extension name in the config tree.
556	*/
557	int nemR3DisableCpuIsaExt(PVM pVM, const char *pszIsaExt)
558	{
559	/*
560	* Get IsaExts config node under CPUM.
561	*/
562	PCFGMNODE pIsaExts = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/CPUM/IsaExts");
563	if (!pIsaExts)
564	{
565	int rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "/CPUM/IsaExts", &pIsaExts);
566	AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertNode: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
567	}
568
569	/*
570	* Look for a value by the given name (pszIsaExt).
571	*/
572	/* Integer values 1 (CPUMISAEXTCFG_ENABLED_SUPPORTED) and 9 (CPUMISAEXTCFG_ENABLED_PORTABLE) will be replaced. */
573	uint64_t u64Value;
574	int rc = CFGMR3QueryInteger(pIsaExts, pszIsaExt, &u64Value);
575	if (RT_SUCCESS(rc))
576	{
577	if (u64Value != 1 && u64Value != 9)
578	{
579	LogRel(("NEM: Not disabling IsaExt '%s', already configured with int value %lld\n", pszIsaExt, u64Value));
580	return VINF_SUCCESS;
581	}
582	CFGMR3RemoveValue(pIsaExts, pszIsaExt);
583	}
584	/* String value 'default', 'enabled' and 'portable' will be replaced. */
585	else if (rc == VERR_CFGM_NOT_INTEGER)
586	{
587	char szValue[32];
588	rc = CFGMR3QueryString(pIsaExts, pszIsaExt, szValue, sizeof(szValue));
589	AssertRCReturn(rc, VINF_SUCCESS);
590
591	if ( RTStrICmpAscii(szValue, "default") != 0
592	&& RTStrICmpAscii(szValue, "def") != 0
593	&& RTStrICmpAscii(szValue, "enabled") != 0
594	&& RTStrICmpAscii(szValue, "enable") != 0
595	&& RTStrICmpAscii(szValue, "on") != 0
596	&& RTStrICmpAscii(szValue, "yes") != 0
597	&& RTStrICmpAscii(szValue, "portable") != 0)
598	{
599	LogRel(("NEM: Not disabling IsaExt '%s', already configured with string value '%s'\n", pszIsaExt, szValue));
600	return VINF_SUCCESS;
601	}
602	CFGMR3RemoveValue(pIsaExts, pszIsaExt);
603	}
604	else
605	AssertLogRelMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND, ("CFGMR3QueryInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt),
606	VERR_NEM_IPE_8);
607
608	/*
609	* Insert the disabling value.
610	*/
611	rc = CFGMR3InsertInteger(pIsaExts, pszIsaExt, 0 /* disabled */);
612	AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
613
614	return VINF_SUCCESS;
615	}
616

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source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 106061

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