1 | /* $Id: IOMR3Mmio.cpp 92716 2021-12-02 21:17:42Z vboxsync $ */
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2 | /** @file
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3 | * IOM - Input / Output Monitor, MMIO related APIs.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2020 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 |
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19 | /*********************************************************************************************************************************
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20 | * Header Files *
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21 | *********************************************************************************************************************************/
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22 | #define LOG_GROUP LOG_GROUP_IOM_MMIO
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23 | #include <VBox/vmm/iom.h>
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24 | #include <VBox/sup.h>
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25 | #include <VBox/vmm/mm.h>
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26 | #include <VBox/vmm/stam.h>
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27 | #include <VBox/vmm/dbgf.h>
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28 | #include <VBox/vmm/pdmapi.h>
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29 | #include <VBox/vmm/pdmdev.h>
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30 | #include "IOMInternal.h"
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31 | #include <VBox/vmm/vm.h>
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32 |
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33 | #include <VBox/param.h>
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34 | #include <iprt/assert.h>
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35 | #include <iprt/mem.h>
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36 | #include <iprt/string.h>
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37 | #include <VBox/log.h>
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38 | #include <VBox/err.h>
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39 |
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40 | #include "IOMInline.h"
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41 |
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42 |
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43 | #ifdef VBOX_WITH_STATISTICS
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44 |
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45 | /**
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46 | * Register statistics for a MMIO entry.
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47 | */
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48 | void iomR3MmioRegStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry)
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49 | {
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50 | bool const fDoRZ = pRegEntry->fRing0 || pRegEntry->fRawMode;
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51 | PIOMMMIOSTATSENTRY pStats = &pVM->iom.s.paMmioStats[pRegEntry->idxStats];
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52 |
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53 | /* Format the prefix: */
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54 | char szName[80];
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55 | size_t cchPrefix = RTStrPrintf(szName, sizeof(szName), "/IOM/MmioRegions/%RGp-%RGp",
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56 | pRegEntry->GCPhysMapping, pRegEntry->GCPhysMapping + pRegEntry->cbRegion - 1);
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57 |
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58 | /* Mangle the description if this isn't the first device instance: */
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59 | const char *pszDesc = pRegEntry->pszDesc;
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60 | char *pszFreeDesc = NULL;
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61 | if (pRegEntry->pDevIns && pRegEntry->pDevIns->iInstance > 0 && pszDesc)
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62 | pszDesc = pszFreeDesc = RTStrAPrintf2("%u / %s", pRegEntry->pDevIns->iInstance, pszDesc);
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63 |
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64 | /* Register statistics: */
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65 | int rc = STAMR3Register(pVM, &pRegEntry->idxSelf, STAMTYPE_U16, STAMVISIBILITY_ALWAYS, szName, STAMUNIT_NONE, pszDesc); AssertRC(rc);
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66 | RTStrFree(pszFreeDesc);
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67 |
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68 | # define SET_NM_SUFFIX(a_sz) memcpy(&szName[cchPrefix], a_sz, sizeof(a_sz))
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69 | SET_NM_SUFFIX("/Read-Complicated");
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70 | rc = STAMR3Register(pVM, &pStats->ComplicatedReads, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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71 | SET_NM_SUFFIX("/Read-FFor00");
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72 | rc = STAMR3Register(pVM, &pStats->FFor00Reads, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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73 | SET_NM_SUFFIX("/Read-R3");
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74 | rc = STAMR3Register(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, NULL); AssertRC(rc);
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75 | if (fDoRZ)
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76 | {
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77 | SET_NM_SUFFIX("/Read-RZ");
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78 | rc = STAMR3Register(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, NULL); AssertRC(rc);
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79 | SET_NM_SUFFIX("/Read-RZtoR3");
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80 | rc = STAMR3Register(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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81 | }
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82 | SET_NM_SUFFIX("/Read-Total");
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83 | rc = STAMR3Register(pVM, &pStats->Reads, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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84 |
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85 | SET_NM_SUFFIX("/Write-Complicated");
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86 | rc = STAMR3Register(pVM, &pStats->ComplicatedWrites, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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87 | SET_NM_SUFFIX("/Write-R3");
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88 | rc = STAMR3Register(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, NULL); AssertRC(rc);
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89 | if (fDoRZ)
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90 | {
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91 | SET_NM_SUFFIX("/Write-RZ");
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92 | rc = STAMR3Register(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, NULL); AssertRC(rc);
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93 | SET_NM_SUFFIX("/Write-RZtoR3");
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94 | rc = STAMR3Register(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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95 | SET_NM_SUFFIX("/Write-RZtoR3-Commit");
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96 | rc = STAMR3Register(pVM, &pStats->CommitRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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97 | }
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98 | SET_NM_SUFFIX("/Write-Total");
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99 | rc = STAMR3Register(pVM, &pStats->Writes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
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100 | }
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101 |
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102 |
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103 | /**
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104 | * Deregister statistics for a MMIO entry.
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105 | */
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106 | static void iomR3MmioDeregStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry, RTGCPHYS GCPhys)
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107 | {
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108 | char szPrefix[80];
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109 | RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/MmioRegions/%RGp-%RGp", GCPhys, GCPhys + pRegEntry->cbRegion - 1);
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110 | STAMR3DeregisterByPrefix(pVM->pUVM, szPrefix);
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111 | }
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112 |
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113 |
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114 | /**
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115 | * Grows the statistics table.
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116 | *
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117 | * @returns VBox status code.
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118 | * @param pVM The cross context VM structure.
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119 | * @param cNewEntries The minimum number of new entrie.
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120 | * @see IOMR0IoPortGrowStatisticsTable
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121 | */
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122 | static int iomR3MmioGrowStatisticsTable(PVM pVM, uint32_t cNewEntries)
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123 | {
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124 | AssertReturn(cNewEntries <= _64K, VERR_IOM_TOO_MANY_MMIO_REGISTRATIONS);
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125 |
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126 | int rc;
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127 | if (!SUPR3IsDriverless())
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128 | {
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129 | rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_MMIO_STATS, cNewEntries, NULL);
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130 | AssertLogRelRCReturn(rc, rc);
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131 | AssertReturn(cNewEntries <= pVM->iom.s.cMmioStatsAllocation, VERR_IOM_MMIO_IPE_2);
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132 | }
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133 | else
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134 | {
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135 | /*
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136 | * Validate input and state.
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137 | */
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138 | uint32_t const cOldEntries = pVM->iom.s.cMmioStatsAllocation;
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139 | AssertReturn(cNewEntries > cOldEntries, VERR_IOM_MMIO_IPE_1);
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140 | AssertReturn(pVM->iom.s.cMmioStats <= cOldEntries, VERR_IOM_MMIO_IPE_2);
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141 |
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142 | /*
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143 | * Calc size and allocate a new table.
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144 | */
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145 | uint32_t const cbNew = RT_ALIGN_32(cNewEntries * sizeof(IOMMMIOSTATSENTRY), PAGE_SIZE);
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146 | cNewEntries = cbNew / sizeof(IOMMMIOSTATSENTRY);
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147 |
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148 | PIOMMMIOSTATSENTRY const paMmioStats = (PIOMMMIOSTATSENTRY)RTMemPageAllocZ(cbNew);
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149 | if (paMmioStats)
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150 | {
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151 | /*
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152 | * Anything to copy over, update and free the old one.
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153 | */
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154 | PIOMMMIOSTATSENTRY const pOldMmioStats = pVM->iom.s.paMmioStats;
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155 | if (pOldMmioStats)
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156 | memcpy(paMmioStats, pOldMmioStats, cOldEntries * sizeof(IOMMMIOSTATSENTRY));
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157 |
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158 | pVM->iom.s.paMmioStats = paMmioStats;
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159 | pVM->iom.s.cMmioStatsAllocation = cNewEntries;
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160 |
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161 | RTMemPageFree(pOldMmioStats, RT_ALIGN_32(cOldEntries * sizeof(IOMMMIOSTATSENTRY), PAGE_SIZE));
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162 |
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163 | rc = VINF_SUCCESS;
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164 | }
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165 | else
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166 | rc = VERR_NO_PAGE_MEMORY;
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167 | }
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168 |
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169 | return rc;
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170 | }
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171 |
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172 | #endif /* VBOX_WITH_STATISTICS */
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173 |
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174 | /**
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175 | * Grows the I/O port registration statistics table.
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176 | *
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177 | * @returns VBox status code.
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178 | * @param pVM The cross context VM structure.
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179 | * @param cNewEntries The minimum number of new entrie.
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180 | * @see IOMR0MmioGrowRegistrationTables
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181 | */
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182 | static int iomR3MmioGrowTable(PVM pVM, uint32_t cNewEntries)
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183 | {
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184 | AssertReturn(cNewEntries <= _4K, VERR_IOM_TOO_MANY_MMIO_REGISTRATIONS);
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185 |
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186 | int rc;
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187 | if (!SUPR3IsDriverless())
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188 | {
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189 | rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_MMIO_REGS, cNewEntries, NULL);
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190 | AssertLogRelRCReturn(rc, rc);
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191 | AssertReturn(cNewEntries <= pVM->iom.s.cMmioAlloc, VERR_IOM_MMIO_IPE_2);
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192 | }
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193 | else
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194 | {
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195 | /*
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196 | * Validate input and state.
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197 | */
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198 | uint32_t const cOldEntries = pVM->iom.s.cMmioAlloc;
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199 | AssertReturn(cNewEntries >= cOldEntries, VERR_IOM_MMIO_IPE_1);
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200 |
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201 | /*
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202 | * Allocate the new tables. We use a single allocation for the three tables (ring-0,
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203 | * ring-3, lookup) and does a partial mapping of the result to ring-3.
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204 | */
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205 | uint32_t const cbRing3 = RT_ALIGN_32(cNewEntries * sizeof(IOMMMIOENTRYR3), PAGE_SIZE);
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206 | uint32_t const cbShared = RT_ALIGN_32(cNewEntries * sizeof(IOMMMIOLOOKUPENTRY), PAGE_SIZE);
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207 | uint32_t const cbNew = cbRing3 + cbShared;
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208 |
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209 | /* Use the rounded up space as best we can. */
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210 | cNewEntries = RT_MIN(cbRing3 / sizeof(IOMMMIOENTRYR3), cbShared / sizeof(IOMMMIOLOOKUPENTRY));
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211 |
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212 | PIOMMMIOENTRYR3 const paRing3 = (PIOMMMIOENTRYR3)RTMemPageAllocZ(cbNew);
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213 | if (paRing3)
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214 | {
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215 | PIOMMMIOLOOKUPENTRY const paLookup = (PIOMMMIOLOOKUPENTRY)((uintptr_t)paRing3 + cbRing3);
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216 |
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217 | /*
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218 | * Copy over the old info and initialize the idxSelf and idxStats members.
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219 | */
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220 | if (pVM->iom.s.paMmioRegs != NULL)
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221 | {
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222 | memcpy(paRing3, pVM->iom.s.paMmioRegs, sizeof(paRing3[0]) * cOldEntries);
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223 | memcpy(paLookup, pVM->iom.s.paMmioLookup, sizeof(paLookup[0]) * cOldEntries);
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224 | }
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225 |
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226 | size_t i = cbRing3 / sizeof(*paRing3);
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227 | while (i-- > cOldEntries)
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228 | {
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229 | paRing3[i].idxSelf = (uint16_t)i;
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230 | paRing3[i].idxStats = UINT16_MAX;
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231 | }
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232 |
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233 | /*
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234 | * Update the variables and free the old memory.
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235 | */
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236 | void * const pvFree = pVM->iom.s.paMmioRegs;
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237 |
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238 | pVM->iom.s.paMmioRegs = paRing3;
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239 | pVM->iom.s.paMmioLookup = paLookup;
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240 | pVM->iom.s.cMmioAlloc = cNewEntries;
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241 |
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242 | RTMemPageFree(pvFree,
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243 | RT_ALIGN_32(cOldEntries * sizeof(IOMMMIOENTRYR3), PAGE_SIZE)
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244 | + RT_ALIGN_32(cOldEntries * sizeof(IOMMMIOLOOKUPENTRY), PAGE_SIZE));
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245 |
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246 | rc = VINF_SUCCESS;
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247 | }
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248 | else
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249 | rc = VERR_NO_PAGE_MEMORY;
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250 | }
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251 | return rc;
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252 | }
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253 |
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254 |
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255 | /**
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256 | * Worker for PDMDEVHLPR3::pfnMmioCreateEx.
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257 | */
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258 | VMMR3_INT_DECL(int) IOMR3MmioCreate(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS cbRegion, uint32_t fFlags, PPDMPCIDEV pPciDev,
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259 | uint32_t iPciRegion, PFNIOMMMIONEWWRITE pfnWrite, PFNIOMMMIONEWREAD pfnRead,
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260 | PFNIOMMMIONEWFILL pfnFill, void *pvUser, const char *pszDesc, PIOMMMIOHANDLE phRegion)
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261 | {
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262 | /*
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263 | * Validate input.
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264 | */
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265 | AssertPtrReturn(phRegion, VERR_INVALID_POINTER);
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266 | *phRegion = UINT32_MAX;
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267 | VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
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268 | VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
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269 |
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270 | AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
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271 |
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272 | AssertMsgReturn(cbRegion > 0 && cbRegion <= MM_MMIO_64_MAX, ("cbRegion=%#RGp (max %#RGp)\n", cbRegion, MM_MMIO_64_MAX),
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273 | VERR_OUT_OF_RANGE);
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274 | AssertMsgReturn(!(cbRegion & PAGE_OFFSET_MASK), ("cbRegion=%#RGp\n", cbRegion), VERR_UNSUPPORTED_ALIGNMENT);
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275 |
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276 | AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
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277 | && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
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278 | && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
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279 | ("%#x\n", fFlags),
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280 | VERR_INVALID_FLAGS);
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281 |
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282 | AssertReturn(pfnWrite || pfnRead, VERR_INVALID_PARAMETER);
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283 | AssertPtrNullReturn(pfnWrite, VERR_INVALID_POINTER);
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284 | AssertPtrNullReturn(pfnRead, VERR_INVALID_POINTER);
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285 | AssertPtrNullReturn(pfnFill, VERR_INVALID_POINTER);
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286 |
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287 | AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
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288 | AssertReturn(*pszDesc != '\0', VERR_INVALID_POINTER);
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289 | AssertReturn(strlen(pszDesc) < 128, VERR_INVALID_POINTER);
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290 |
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291 | /*
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292 | * Ensure that we've got table space for it.
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293 | */
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294 | #ifndef VBOX_WITH_STATISTICS
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295 | uint16_t const idxStats = UINT16_MAX;
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296 | #else
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297 | uint32_t const idxStats = pVM->iom.s.cMmioStats;
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298 | uint32_t const cNewMmioStats = idxStats + 1;
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299 | AssertReturn(cNewMmioStats <= _64K, VERR_IOM_TOO_MANY_MMIO_REGISTRATIONS);
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300 | if (cNewMmioStats > pVM->iom.s.cMmioStatsAllocation)
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301 | {
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302 | int rc = iomR3MmioGrowStatisticsTable(pVM, cNewMmioStats);
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303 | AssertRCReturn(rc, rc);
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304 | AssertReturn(idxStats == pVM->iom.s.cMmioStats, VERR_IOM_MMIO_IPE_1);
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305 | }
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306 | #endif
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307 |
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308 | uint32_t idx = pVM->iom.s.cMmioRegs;
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309 | if (idx >= pVM->iom.s.cMmioAlloc)
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310 | {
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311 | int rc = iomR3MmioGrowTable(pVM, pVM->iom.s.cMmioAlloc + 1);
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312 | AssertRCReturn(rc, rc);
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313 | AssertReturn(idx == pVM->iom.s.cMmioRegs, VERR_IOM_MMIO_IPE_1);
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314 | }
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315 |
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316 | /*
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317 | * Enter it.
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318 | */
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319 | pVM->iom.s.paMmioRegs[idx].cbRegion = cbRegion;
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320 | pVM->iom.s.paMmioRegs[idx].GCPhysMapping = NIL_RTGCPHYS;
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321 | pVM->iom.s.paMmioRegs[idx].pvUser = pvUser;
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322 | pVM->iom.s.paMmioRegs[idx].pDevIns = pDevIns;
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323 | pVM->iom.s.paMmioRegs[idx].pfnWriteCallback = pfnWrite;
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324 | pVM->iom.s.paMmioRegs[idx].pfnReadCallback = pfnRead;
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325 | pVM->iom.s.paMmioRegs[idx].pfnFillCallback = pfnFill;
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326 | pVM->iom.s.paMmioRegs[idx].pszDesc = pszDesc;
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327 | pVM->iom.s.paMmioRegs[idx].pPciDev = pPciDev;
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328 | pVM->iom.s.paMmioRegs[idx].iPciRegion = iPciRegion;
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329 | pVM->iom.s.paMmioRegs[idx].idxStats = (uint16_t)idxStats;
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330 | pVM->iom.s.paMmioRegs[idx].fMapped = false;
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331 | pVM->iom.s.paMmioRegs[idx].fFlags = fFlags;
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332 | pVM->iom.s.paMmioRegs[idx].idxSelf = idx;
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333 |
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334 | pVM->iom.s.cMmioRegs = idx + 1;
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335 | #ifdef VBOX_WITH_STATISTICS
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336 | pVM->iom.s.cMmioStats = cNewMmioStats;
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337 | #endif
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338 | *phRegion = idx;
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339 | return VINF_SUCCESS;
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340 | }
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341 |
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342 |
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343 | /**
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344 | * Worker for PDMDEVHLPR3::pfnMmioMap.
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345 | */
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346 | VMMR3_INT_DECL(int) IOMR3MmioMap(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS GCPhys)
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347 | {
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348 | /*
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349 | * Validate input and state.
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350 | */
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351 | AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
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352 | AssertReturn(hRegion < pVM->iom.s.cMmioRegs, VERR_IOM_INVALID_MMIO_HANDLE);
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353 | PIOMMMIOENTRYR3 const pRegEntry = &pVM->iom.s.paMmioRegs[hRegion];
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354 | AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_MMIO_HANDLE);
|
---|
355 |
|
---|
356 | RTGCPHYS const cbRegion = pRegEntry->cbRegion;
|
---|
357 | AssertMsgReturn(cbRegion > 0 && cbRegion <= MM_MMIO_64_MAX, ("cbRegion=%RGp\n", cbRegion), VERR_IOM_MMIO_IPE_1);
|
---|
358 | RTGCPHYS const GCPhysLast = GCPhys + cbRegion - 1;
|
---|
359 |
|
---|
360 | AssertLogRelMsgReturn(!(GCPhys & PAGE_OFFSET_MASK),
|
---|
361 | ("Misaligned! GCPhys=%RGp LB %RGp %s (%s[#%u])\n",
|
---|
362 | GCPhys, cbRegion, pRegEntry->pszDesc, pDevIns->pReg->szName, pDevIns->iInstance),
|
---|
363 | VERR_IOM_INVALID_MMIO_RANGE);
|
---|
364 | AssertLogRelMsgReturn(GCPhysLast > GCPhys,
|
---|
365 | ("Wrapped! GCPhys=%RGp LB %RGp %s (%s[#%u])\n",
|
---|
366 | GCPhys, cbRegion, pRegEntry->pszDesc, pDevIns->pReg->szName, pDevIns->iInstance),
|
---|
367 | VERR_IOM_INVALID_MMIO_RANGE);
|
---|
368 |
|
---|
369 | /*
|
---|
370 | * Do the mapping.
|
---|
371 | */
|
---|
372 | int rc = VINF_SUCCESS;
|
---|
373 | IOM_LOCK_EXCL(pVM);
|
---|
374 |
|
---|
375 | if (!pRegEntry->fMapped)
|
---|
376 | {
|
---|
377 | uint32_t const cEntries = RT_MIN(pVM->iom.s.cMmioLookupEntries, pVM->iom.s.cMmioRegs);
|
---|
378 | Assert(pVM->iom.s.cMmioLookupEntries == cEntries);
|
---|
379 |
|
---|
380 | PIOMMMIOLOOKUPENTRY paEntries = pVM->iom.s.paMmioLookup;
|
---|
381 | PIOMMMIOLOOKUPENTRY pEntry;
|
---|
382 | if (cEntries > 0)
|
---|
383 | {
|
---|
384 | uint32_t iFirst = 0;
|
---|
385 | uint32_t iEnd = cEntries;
|
---|
386 | uint32_t i = cEntries / 2;
|
---|
387 | for (;;)
|
---|
388 | {
|
---|
389 | pEntry = &paEntries[i];
|
---|
390 | if (pEntry->GCPhysLast < GCPhys)
|
---|
391 | {
|
---|
392 | i += 1;
|
---|
393 | if (i < iEnd)
|
---|
394 | iFirst = i;
|
---|
395 | else
|
---|
396 | {
|
---|
397 | /* Register with PGM before we shuffle the array: */
|
---|
398 | ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys);
|
---|
399 | rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,
|
---|
400 | (void *)(uintptr_t)hRegion, hRegion, hRegion, pRegEntry->pszDesc);
|
---|
401 | AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc);
|
---|
402 |
|
---|
403 | /* Insert after the entry we just considered: */
|
---|
404 | pEntry += 1;
|
---|
405 | if (i < cEntries)
|
---|
406 | memmove(pEntry + 1, pEntry, sizeof(*pEntry) * (cEntries - i));
|
---|
407 | break;
|
---|
408 | }
|
---|
409 | }
|
---|
410 | else if (pEntry->GCPhysFirst > GCPhysLast)
|
---|
411 | {
|
---|
412 | if (i > iFirst)
|
---|
413 | iEnd = i;
|
---|
414 | else
|
---|
415 | {
|
---|
416 | /* Register with PGM before we shuffle the array: */
|
---|
417 | ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys);
|
---|
418 | rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,
|
---|
419 | (void *)(uintptr_t)hRegion, hRegion, hRegion, pRegEntry->pszDesc);
|
---|
420 | AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc);
|
---|
421 |
|
---|
422 | /* Insert at the entry we just considered: */
|
---|
423 | if (i < cEntries)
|
---|
424 | memmove(pEntry + 1, pEntry, sizeof(*pEntry) * (cEntries - i));
|
---|
425 | break;
|
---|
426 | }
|
---|
427 | }
|
---|
428 | else
|
---|
429 | {
|
---|
430 | /* Oops! We've got a conflict. */
|
---|
431 | AssertLogRelMsgFailed(("%RGp..%RGp (%s) conflicts with existing mapping %RGp..%RGp (%s)\n",
|
---|
432 | GCPhys, GCPhysLast, pRegEntry->pszDesc,
|
---|
433 | pEntry->GCPhysFirst, pEntry->GCPhysLast, pVM->iom.s.paMmioRegs[pEntry->idx].pszDesc));
|
---|
434 | IOM_UNLOCK_EXCL(pVM);
|
---|
435 | return VERR_IOM_MMIO_RANGE_CONFLICT;
|
---|
436 | }
|
---|
437 |
|
---|
438 | i = iFirst + (iEnd - iFirst) / 2;
|
---|
439 | }
|
---|
440 | }
|
---|
441 | else
|
---|
442 | {
|
---|
443 | /* First entry in the lookup table: */
|
---|
444 | ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys);
|
---|
445 | rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,
|
---|
446 | (void *)(uintptr_t)hRegion, hRegion, hRegion, pRegEntry->pszDesc);
|
---|
447 | AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc);
|
---|
448 |
|
---|
449 | pEntry = paEntries;
|
---|
450 | }
|
---|
451 |
|
---|
452 | /*
|
---|
453 | * Fill in the entry and bump the table size.
|
---|
454 | */
|
---|
455 | pRegEntry->fMapped = true;
|
---|
456 | pEntry->idx = hRegion;
|
---|
457 | pEntry->GCPhysFirst = GCPhys;
|
---|
458 | pEntry->GCPhysLast = GCPhysLast;
|
---|
459 | pVM->iom.s.cMmioLookupEntries = cEntries + 1;
|
---|
460 |
|
---|
461 | #ifdef VBOX_WITH_STATISTICS
|
---|
462 | /* Don't register stats here when we're creating the VM as the
|
---|
463 | statistics table may still be reallocated. */
|
---|
464 | if (pVM->enmVMState >= VMSTATE_CREATED)
|
---|
465 | iomR3MmioRegStats(pVM, pRegEntry);
|
---|
466 | #endif
|
---|
467 |
|
---|
468 | #ifdef VBOX_STRICT
|
---|
469 | /*
|
---|
470 | * Assert table sanity.
|
---|
471 | */
|
---|
472 | AssertMsg(paEntries[0].GCPhysLast >= paEntries[0].GCPhysFirst, ("%RGp %RGp\n", paEntries[0].GCPhysLast, paEntries[0].GCPhysFirst));
|
---|
473 | AssertMsg(paEntries[0].idx < pVM->iom.s.cMmioRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cMmioRegs));
|
---|
474 |
|
---|
475 | RTGCPHYS GCPhysPrev = paEntries[0].GCPhysLast;
|
---|
476 | for (size_t i = 1; i <= cEntries; i++)
|
---|
477 | {
|
---|
478 | AssertMsg(paEntries[i].GCPhysLast >= paEntries[i].GCPhysFirst, ("%u: %RGp %RGp\n", i, paEntries[i].GCPhysLast, paEntries[i].GCPhysFirst));
|
---|
479 | AssertMsg(paEntries[i].idx < pVM->iom.s.cMmioRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cMmioRegs));
|
---|
480 | AssertMsg(GCPhysPrev < paEntries[i].GCPhysFirst, ("%u: %RGp %RGp\n", i, GCPhysPrev, paEntries[i].GCPhysFirst));
|
---|
481 | GCPhysPrev = paEntries[i].GCPhysLast;
|
---|
482 | }
|
---|
483 | #endif
|
---|
484 | }
|
---|
485 | else
|
---|
486 | {
|
---|
487 | AssertFailed();
|
---|
488 | rc = VERR_IOM_MMIO_REGION_ALREADY_MAPPED;
|
---|
489 | }
|
---|
490 |
|
---|
491 | IOM_UNLOCK_EXCL(pVM);
|
---|
492 | return rc;
|
---|
493 | }
|
---|
494 |
|
---|
495 |
|
---|
496 | /**
|
---|
497 | * Worker for PDMDEVHLPR3::pfnMmioUnmap.
|
---|
498 | */
|
---|
499 | VMMR3_INT_DECL(int) IOMR3MmioUnmap(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
|
---|
500 | {
|
---|
501 | /*
|
---|
502 | * Validate input and state.
|
---|
503 | */
|
---|
504 | AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
|
---|
505 | AssertReturn(hRegion < pVM->iom.s.cMmioRegs, VERR_IOM_INVALID_MMIO_HANDLE);
|
---|
506 | PIOMMMIOENTRYR3 const pRegEntry = &pVM->iom.s.paMmioRegs[hRegion];
|
---|
507 | AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_MMIO_HANDLE);
|
---|
508 |
|
---|
509 | /*
|
---|
510 | * Do the mapping.
|
---|
511 | */
|
---|
512 | int rc;
|
---|
513 | IOM_LOCK_EXCL(pVM);
|
---|
514 |
|
---|
515 | if (pRegEntry->fMapped)
|
---|
516 | {
|
---|
517 | RTGCPHYS const GCPhys = pRegEntry->GCPhysMapping;
|
---|
518 | RTGCPHYS const GCPhysLast = GCPhys + pRegEntry->cbRegion - 1;
|
---|
519 | uint32_t const cEntries = RT_MIN(pVM->iom.s.cMmioLookupEntries, pVM->iom.s.cMmioRegs);
|
---|
520 | Assert(pVM->iom.s.cMmioLookupEntries == cEntries);
|
---|
521 | Assert(cEntries > 0);
|
---|
522 |
|
---|
523 | PIOMMMIOLOOKUPENTRY paEntries = pVM->iom.s.paMmioLookup;
|
---|
524 | uint32_t iFirst = 0;
|
---|
525 | uint32_t iEnd = cEntries;
|
---|
526 | uint32_t i = cEntries / 2;
|
---|
527 | for (;;)
|
---|
528 | {
|
---|
529 | PIOMMMIOLOOKUPENTRY pEntry = &paEntries[i];
|
---|
530 | if (pEntry->GCPhysLast < GCPhys)
|
---|
531 | {
|
---|
532 | i += 1;
|
---|
533 | if (i < iEnd)
|
---|
534 | iFirst = i;
|
---|
535 | else
|
---|
536 | {
|
---|
537 | rc = VERR_IOM_MMIO_IPE_1;
|
---|
538 | AssertLogRelMsgFailedBreak(("%RGp..%RGp (%s) not found!\n", GCPhys, GCPhysLast, pRegEntry->pszDesc));
|
---|
539 | }
|
---|
540 | }
|
---|
541 | else if (pEntry->GCPhysFirst > GCPhysLast)
|
---|
542 | {
|
---|
543 | if (i > iFirst)
|
---|
544 | iEnd = i;
|
---|
545 | else
|
---|
546 | {
|
---|
547 | rc = VERR_IOM_MMIO_IPE_1;
|
---|
548 | AssertLogRelMsgFailedBreak(("%RGp..%RGp (%s) not found!\n", GCPhys, GCPhysLast, pRegEntry->pszDesc));
|
---|
549 | }
|
---|
550 | }
|
---|
551 | else if (pEntry->idx == hRegion)
|
---|
552 | {
|
---|
553 | Assert(pEntry->GCPhysFirst == GCPhys);
|
---|
554 | Assert(pEntry->GCPhysLast == GCPhysLast);
|
---|
555 | #ifdef VBOX_WITH_STATISTICS
|
---|
556 | iomR3MmioDeregStats(pVM, pRegEntry, GCPhys);
|
---|
557 | #endif
|
---|
558 | if (i + 1 < cEntries)
|
---|
559 | memmove(pEntry, pEntry + 1, sizeof(*pEntry) * (cEntries - i - 1));
|
---|
560 | pVM->iom.s.cMmioLookupEntries = cEntries - 1;
|
---|
561 |
|
---|
562 | rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRegEntry->cbRegion);
|
---|
563 | AssertRC(rc);
|
---|
564 |
|
---|
565 | pRegEntry->fMapped = false;
|
---|
566 | ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS);
|
---|
567 | break;
|
---|
568 | }
|
---|
569 | else
|
---|
570 | {
|
---|
571 | AssertLogRelMsgFailed(("Lookig for %RGp..%RGp (%s), found %RGp..%RGp (%s) instead!\n",
|
---|
572 | GCPhys, GCPhysLast, pRegEntry->pszDesc,
|
---|
573 | pEntry->GCPhysFirst, pEntry->GCPhysLast, pVM->iom.s.paMmioRegs[pEntry->idx].pszDesc));
|
---|
574 | rc = VERR_IOM_MMIO_IPE_1;
|
---|
575 | break;
|
---|
576 | }
|
---|
577 |
|
---|
578 | i = iFirst + (iEnd - iFirst) / 2;
|
---|
579 | }
|
---|
580 |
|
---|
581 | #ifdef VBOX_STRICT
|
---|
582 | /*
|
---|
583 | * Assert table sanity.
|
---|
584 | */
|
---|
585 | AssertMsg(paEntries[0].GCPhysLast >= paEntries[0].GCPhysFirst, ("%RGp %RGp\n", paEntries[0].GCPhysLast, paEntries[0].GCPhysFirst));
|
---|
586 | AssertMsg(paEntries[0].idx < pVM->iom.s.cMmioRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cMmioRegs));
|
---|
587 |
|
---|
588 | RTGCPHYS GCPhysPrev = paEntries[0].GCPhysLast;
|
---|
589 | for (i = 1; i < cEntries - 1; i++)
|
---|
590 | {
|
---|
591 | AssertMsg(paEntries[i].GCPhysLast >= paEntries[i].GCPhysFirst, ("%u: %RGp %RGp\n", i, paEntries[i].GCPhysLast, paEntries[i].GCPhysFirst));
|
---|
592 | AssertMsg(paEntries[i].idx < pVM->iom.s.cMmioRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cMmioRegs));
|
---|
593 | AssertMsg(GCPhysPrev < paEntries[i].GCPhysFirst, ("%u: %RGp %RGp\n", i, GCPhysPrev, paEntries[i].GCPhysFirst));
|
---|
594 | GCPhysPrev = paEntries[i].GCPhysLast;
|
---|
595 | }
|
---|
596 | #endif
|
---|
597 | }
|
---|
598 | else
|
---|
599 | {
|
---|
600 | AssertFailed();
|
---|
601 | rc = VERR_IOM_MMIO_REGION_NOT_MAPPED;
|
---|
602 | }
|
---|
603 |
|
---|
604 | IOM_UNLOCK_EXCL(pVM);
|
---|
605 | return rc;
|
---|
606 | }
|
---|
607 |
|
---|
608 |
|
---|
609 | VMMR3_INT_DECL(int) IOMR3MmioReduce(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS cbRegion)
|
---|
610 | {
|
---|
611 | RT_NOREF(pVM, pDevIns, hRegion, cbRegion);
|
---|
612 | return VERR_NOT_IMPLEMENTED;
|
---|
613 | }
|
---|
614 |
|
---|
615 |
|
---|
616 | /**
|
---|
617 | * Validates @a hRegion, making sure it belongs to @a pDevIns.
|
---|
618 | *
|
---|
619 | * @returns VBox status code.
|
---|
620 | * @param pVM The cross context VM structure.
|
---|
621 | * @param pDevIns The device which allegedly owns @a hRegion.
|
---|
622 | * @param hRegion The handle to validate.
|
---|
623 | */
|
---|
624 | VMMR3_INT_DECL(int) IOMR3MmioValidateHandle(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
|
---|
625 | {
|
---|
626 | AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
|
---|
627 | AssertReturn(hRegion < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE);
|
---|
628 | PIOMMMIOENTRYR3 const pRegEntry = &pVM->iom.s.paMmioRegs[hRegion];
|
---|
629 | AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_MMIO_HANDLE);
|
---|
630 | return VINF_SUCCESS;
|
---|
631 | }
|
---|
632 |
|
---|
633 |
|
---|
634 | /**
|
---|
635 | * Gets the mapping address of MMIO region @a hRegion.
|
---|
636 | *
|
---|
637 | * @returns Mapping address if mapped, NIL_RTGCPHYS if not mapped or invalid
|
---|
638 | * input.
|
---|
639 | * @param pVM The cross context VM structure.
|
---|
640 | * @param pDevIns The device which allegedly owns @a hRegion.
|
---|
641 | * @param hRegion The handle to validate.
|
---|
642 | */
|
---|
643 | VMMR3_INT_DECL(RTGCPHYS) IOMR3MmioGetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
|
---|
644 | {
|
---|
645 | AssertPtrReturn(pDevIns, NIL_RTGCPHYS);
|
---|
646 | AssertReturn(hRegion < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), NIL_RTGCPHYS);
|
---|
647 | PIOMMMIOENTRYR3 const pRegEntry = &pVM->iom.s.paMmioRegs[hRegion];
|
---|
648 | AssertReturn(pRegEntry->pDevIns == pDevIns, NIL_RTGCPHYS);
|
---|
649 | return pRegEntry->GCPhysMapping;
|
---|
650 | }
|
---|
651 |
|
---|
652 |
|
---|
653 | /**
|
---|
654 | * Display all registered MMIO ranges.
|
---|
655 | *
|
---|
656 | * @param pVM The cross context VM structure.
|
---|
657 | * @param pHlp The info helpers.
|
---|
658 | * @param pszArgs Arguments, ignored.
|
---|
659 | */
|
---|
660 | DECLCALLBACK(void) iomR3MmioInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
|
---|
661 | {
|
---|
662 | RT_NOREF(pszArgs);
|
---|
663 |
|
---|
664 | /* No locking needed here as registerations are only happening during VMSTATE_CREATING. */
|
---|
665 | pHlp->pfnPrintf(pHlp,
|
---|
666 | "MMIO registrations: %u (%u allocated)\n"
|
---|
667 | " ## Ctx %.*s %.*s PCI Description\n",
|
---|
668 | pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc,
|
---|
669 | sizeof(RTGCPHYS) * 2, "Size",
|
---|
670 | sizeof(RTGCPHYS) * 2 * 2 + 1, "Mapping");
|
---|
671 | PIOMMMIOENTRYR3 paRegs = pVM->iom.s.paMmioRegs;
|
---|
672 | for (uint32_t i = 0; i < pVM->iom.s.cMmioRegs; i++)
|
---|
673 | {
|
---|
674 | const char * const pszRing = paRegs[i].fRing0 ? paRegs[i].fRawMode ? "+0+C" : "+0 "
|
---|
675 | : paRegs[i].fRawMode ? "+C " : " ";
|
---|
676 | if (paRegs[i].fMapped && paRegs[i].pPciDev)
|
---|
677 | pHlp->pfnPrintf(pHlp, "%3u R3%s %RGp %RGp-%RGp pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cbRegion,
|
---|
678 | paRegs[i].GCPhysMapping, paRegs[i].GCPhysMapping + paRegs[i].cbRegion - 1,
|
---|
679 | paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
|
---|
680 | else if (paRegs[i].fMapped && !paRegs[i].pPciDev)
|
---|
681 | pHlp->pfnPrintf(pHlp, "%3u R3%s %RGp %RGp-%RGp %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cbRegion,
|
---|
682 | paRegs[i].GCPhysMapping, paRegs[i].GCPhysMapping + paRegs[i].cbRegion - 1, paRegs[i].pszDesc);
|
---|
683 | else if (paRegs[i].pPciDev)
|
---|
684 | pHlp->pfnPrintf(pHlp, "%3u R3%s %RGp %.*s pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cbRegion,
|
---|
685 | sizeof(RTGCPHYS) * 2, "unmapped", paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
|
---|
686 | else
|
---|
687 | pHlp->pfnPrintf(pHlp, "%3u R3%s %RGp %.*s %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cbRegion,
|
---|
688 | sizeof(RTGCPHYS) * 2, "unmapped", paRegs[i].pszDesc);
|
---|
689 | }
|
---|
690 | }
|
---|
691 |
|
---|