VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 93744

Last change on this file since 93744 was 93554, checked in by vboxsync, 3 years ago

VMM: Changed PAGE_SIZE -> GUEST_PAGE_SIZE / HOST_PAGE_SIZE, PAGE_SHIFT -> GUEST_PAGE_SHIFT / HOST_PAGE_SHIFT, and PAGE_OFFSET_MASK -> GUEST_PAGE_OFFSET_MASK / HOST_PAGE_OFFSET_MASK. Also removed most usage of ASMMemIsZeroPage and ASMMemZeroPage since the host and guest page size doesn't need to be the same any more. Some work left to do in the page pool code. bugref:9898
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 84.6 KB
Line 
1/* $Id: GIMHv.cpp 93554 2022-02-02 22:57:02Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Hyper-V implementation.
4 */
5
6/*
7 * Copyright (C) 2014-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_GIM
23#include <VBox/vmm/apic.h>
24#include <VBox/vmm/gim.h>
25#include <VBox/vmm/cpum.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/ssm.h>
28#include <VBox/vmm/hm.h>
29#include <VBox/vmm/pdmapi.h>
30#include <VBox/vmm/em.h>
31#include "GIMInternal.h"
32#include <VBox/vmm/vm.h>
33
34#include <VBox/err.h>
35#include <VBox/version.h>
36
37#include <iprt/assert.h>
38#include <iprt/string.h>
39#include <iprt/mem.h>
40#include <iprt/semaphore.h>
41#include <iprt/spinlock.h>
42#include <iprt/zero.h>
43#ifdef DEBUG_ramshankar
44# include <iprt/udp.h>
45#endif
46
47
48/*********************************************************************************************************************************
49* Defined Constants And Macros *
50*********************************************************************************************************************************/
51/**
52 * GIM Hyper-V saved-state version.
53 */
54#define GIM_HV_SAVED_STATE_VERSION UINT32_C(4)
55/** Saved states, priot to saving debug UDP source/destination ports. */
56#define GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS UINT32_C(3)
57/** Saved states, prior to any synthetic interrupt controller support. */
58#define GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC UINT32_C(2)
59/** Vanilla saved states, prior to any debug support. */
60#define GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG UINT32_C(1)
61
62#ifdef VBOX_WITH_STATISTICS
63# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
64 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
65#else
66# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
67 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
68#endif
69
70
71/*********************************************************************************************************************************
72* Global Variables *
73*********************************************************************************************************************************/
74/**
75 * Array of MSR ranges supported by Hyper-V.
76 */
77static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
78{
79 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_FIRST, MSR_GIM_HV_RANGE0_LAST, "Hyper-V range 0"),
80 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_FIRST, MSR_GIM_HV_RANGE1_LAST, "Hyper-V range 1"),
81 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_FIRST, MSR_GIM_HV_RANGE2_LAST, "Hyper-V range 2"),
82 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_FIRST, MSR_GIM_HV_RANGE3_LAST, "Hyper-V range 3"),
83 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_FIRST, MSR_GIM_HV_RANGE4_LAST, "Hyper-V range 4"),
84 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_FIRST, MSR_GIM_HV_RANGE5_LAST, "Hyper-V range 5"),
85 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_FIRST, MSR_GIM_HV_RANGE6_LAST, "Hyper-V range 6"),
86 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_FIRST, MSR_GIM_HV_RANGE7_LAST, "Hyper-V range 7"),
87 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_FIRST, MSR_GIM_HV_RANGE8_LAST, "Hyper-V range 8"),
88 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_FIRST, MSR_GIM_HV_RANGE9_LAST, "Hyper-V range 9"),
89 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_FIRST, MSR_GIM_HV_RANGE10_LAST, "Hyper-V range 10"),
90 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_FIRST, MSR_GIM_HV_RANGE11_LAST, "Hyper-V range 11"),
91 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE12_FIRST, MSR_GIM_HV_RANGE12_LAST, "Hyper-V range 12")
92};
93#undef GIMHV_MSRRANGE
94
95/**
96 * DHCP OFFER packet response to the guest (client) over the Hyper-V debug
97 * transport.
98 *
99 * - MAC: Destination: broadcast.
100 * - MAC: Source: 00:00:00:00:01 (hypervisor). It's important that it's
101 * different from the client's MAC address which is all 0's.
102 * - IP: Source: 10.0.5.1 (hypervisor)
103 * - IP: Destination: broadcast.
104 * - IP: Checksum included.
105 * - BOOTP: Client IP address: 10.0.5.5.
106 * - BOOTP: Server IP address: 10.0.5.1.
107 * - DHCP options: Subnet mask, router, lease-time, DHCP server identifier.
108 * Options are kept to a minimum required for making Windows guests happy.
109 */
110#define GIMHV_DEBUGCLIENT_IPV4 RT_H2N_U32_C(0x0a000505) /* 10.0.5.5 */
111#define GIMHV_DEBUGSERVER_IPV4 RT_H2N_U32_C(0x0a000501) /* 10.0.5.1 */
112static const uint8_t g_abDhcpOffer[] =
113{
114 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x45, 0x10,
115 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x11, 0x6a, 0xb5, 0x0a, 0x00, 0x05, 0x01, 0xff, 0xff,
116 0xff, 0xff, 0x00, 0x43, 0x00, 0x44, 0x01, 0x14, 0x00, 0x00, 0x02, 0x01, 0x06, 0x00, 0x00, 0x00,
117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05, 0x00, 0x00,
118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
119 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x82, 0x53, 0x63, 0x35, 0x01, 0x02, 0x01, 0x04, 0xff,
132 0xff, 0xff, 0x00, 0x03, 0x04, 0x0a, 0x00, 0x05, 0x01, 0x33, 0x04, 0xff, 0xff, 0xff, 0xff, 0x36,
133 0x04, 0x0a, 0x00, 0x05, 0x01, 0xff
134};
135
136/**
137 * DHCP ACK packet response to the guest (client) over the Hyper-V debug
138 * transport.
139 *
140 * - MAC: Destination: 00:00:00:00:00 (client).
141 * - IP: Destination: 10.0.5.5 (client).
142 * - Rest are mostly similar to the DHCP offer.
143 */
144static const uint8_t g_abDhcpAck[] =
145{
146 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x45, 0x10,
147 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x11, 0x5b, 0xb0, 0x0a, 0x00, 0x05, 0x01, 0x0a, 0x00,
148 0x05, 0x05, 0x00, 0x43, 0x00, 0x44, 0x01, 0x14, 0x00, 0x00, 0x02, 0x01, 0x06, 0x00, 0x00, 0x00,
149 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05, 0x0a, 0x00, 0x05, 0x05, 0x00, 0x00,
150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
159 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
162 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x82, 0x53, 0x63, 0x35, 0x01, 0x05, 0x01, 0x04, 0xff,
164 0xff, 0xff, 0x00, 0x03, 0x04, 0x0a, 0x00, 0x05, 0x01, 0x33, 0x04, 0xff, 0xff, 0xff, 0xff, 0x36,
165 0x04, 0x0a, 0x00, 0x05, 0x01, 0xff
166};
167
168/**
169 * ARP reply to the guest (client) over the Hyper-V debug transport.
170 *
171 * - MAC: Destination: 00:00:00:00:00 (client)
172 * - MAC: Source: 00:00:00:00:01 (hypervisor)
173 * - ARP: Reply: 10.0.5.1 is at Source MAC address.
174 */
175static const uint8_t g_abArpReply[] =
176{
177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x06, 0x00, 0x01,
178 0x08, 0x00, 0x06, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0a, 0x00, 0x05, 0x01,
179 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05
180};
181
182
183/*********************************************************************************************************************************
184* Internal Functions *
185*********************************************************************************************************************************/
186static int gimR3HvInitHypercallSupport(PVM pVM);
187static void gimR3HvTermHypercallSupport(PVM pVM);
188static int gimR3HvInitDebugSupport(PVM pVM);
189static void gimR3HvTermDebugSupport(PVM pVM);
190static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, TMTIMERHANDLE pTimer, void *pvUser);
191
192/**
193 * Initializes the Hyper-V GIM provider.
194 *
195 * @returns VBox status code.
196 * @param pVM The cross context VM structure.
197 * @param pGimCfg The GIM CFGM node.
198 */
199VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM, PCFGMNODE pGimCfg)
200{
201 AssertReturn(pVM, VERR_INVALID_PARAMETER);
202 AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
203
204 PGIMHV pHv = &pVM->gim.s.u.Hv;
205
206 /*
207 * Initialize timer handles and such.
208 */
209 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
210 {
211 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
212 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
213 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
214 pHvCpu->aStimers[idxStimer].hTimer = NIL_TMTIMERHANDLE;
215 }
216
217 /*
218 * Read configuration.
219 */
220 PCFGMNODE pCfgHv = CFGMR3GetChild(pGimCfg, "HyperV");
221 if (pCfgHv)
222 {
223 /*
224 * Validate the Hyper-V settings.
225 */
226 int rc2 = CFGMR3ValidateConfig(pCfgHv, "/HyperV/",
227 "VendorID"
228 "|VSInterface"
229 "|HypercallDebugInterface",
230 "" /* pszValidNodes */, "GIM/HyperV" /* pszWho */, 0 /* uInstance */);
231 if (RT_FAILURE(rc2))
232 return rc2;
233 }
234
235 /** @cfgm{/GIM/HyperV/VendorID, string, 'VBoxVBoxVBox'}
236 * The Hyper-V vendor signature, must be 12 characters. */
237 char szVendor[13];
238 int rc = CFGMR3QueryStringDef(pCfgHv, "VendorID", szVendor, sizeof(szVendor), "VBoxVBoxVBox");
239 AssertLogRelRCReturn(rc, rc);
240 AssertLogRelMsgReturn(strlen(szVendor) == 12,
241 ("The VendorID config value must be exactly 12 chars, '%s' isn't!\n", szVendor),
242 VERR_INVALID_PARAMETER);
243
244 LogRel(("GIM: HyperV: Reporting vendor as '%s'\n", szVendor));
245 /** @todo r=bird: GIM_HV_VENDOR_MICROSOFT is 12 char and the string is max
246 * 12+terminator, so the NCmp is a little bit misleading. */
247 if (!RTStrNCmp(szVendor, GIM_HV_VENDOR_MICROSOFT, sizeof(GIM_HV_VENDOR_MICROSOFT) - 1))
248 {
249 LogRel(("GIM: HyperV: Warning! Posing as the Microsoft vendor may alter guest behaviour!\n"));
250 pHv->fIsVendorMsHv = true;
251 }
252
253 /** @cfgm{/GIM/HyperV/VSInterface, bool, true}
254 * The Microsoft virtualization service interface (debugging). */
255 rc = CFGMR3QueryBoolDef(pCfgHv, "VSInterface", &pHv->fIsInterfaceVs, false);
256 AssertLogRelRCReturn(rc, rc);
257
258 /** @cfgm{/GIM/HyperV/HypercallDebugInterface, bool, false}
259 * Whether we specify the guest to use hypercalls for debugging rather than MSRs. */
260 rc = CFGMR3QueryBoolDef(pCfgHv, "HypercallDebugInterface", &pHv->fDbgHypercallInterface, false);
261 AssertLogRelRCReturn(rc, rc);
262
263 /*
264 * Determine interface capabilities based on the version.
265 */
266 if (!pVM->gim.s.u32Version)
267 {
268 /* Basic features. */
269 pHv->uBaseFeat = 0
270 //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
271 | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
272 //| GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS // Both required for synethetic timers
273 //| GIM_HV_BASE_FEAT_STIMER_MSRS // Both required for synethetic timers
274 | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
275 | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
276 | GIM_HV_BASE_FEAT_VP_ID_MSR
277 | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
278 //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
279 | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
280 //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
281 | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
282 //| GIM_HV_BASE_FEAT_DEBUG_MSRS
283 ;
284
285 /* Miscellaneous features. */
286 pHv->uMiscFeat = 0
287 //| GIM_HV_MISC_FEAT_GUEST_DEBUGGING
288 //| GIM_HV_MISC_FEAT_XMM_HYPERCALL_INPUT
289 | GIM_HV_MISC_FEAT_TIMER_FREQ
290 | GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS
291 //| GIM_HV_MISC_FEAT_DEBUG_MSRS
292 ;
293
294 /* Hypervisor recommendations to the guest. */
295 pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
296 | GIM_HV_HINT_RELAX_TIME_CHECKS
297 | GIM_HV_HINT_X2APIC_MSRS
298 ;
299
300 /* Partition features. */
301 pHv->uPartFlags |= GIM_HV_PART_FLAGS_EXTENDED_HYPERCALLS;
302
303 /* Expose more if we're posing as Microsoft. We can, if needed, force MSR-based Hv
304 debugging by not exposing these bits while exposing the VS interface. The better
305 way is what we do currently, via the GIM_HV_DEBUG_OPTIONS_USE_HYPERCALLS bit. */
306 if (pHv->fIsVendorMsHv)
307 {
308 pHv->uMiscFeat |= GIM_HV_MISC_FEAT_GUEST_DEBUGGING
309 | GIM_HV_MISC_FEAT_DEBUG_MSRS;
310
311 pHv->uPartFlags |= GIM_HV_PART_FLAGS_DEBUGGING;
312 }
313 }
314
315 /*
316 * Populate the required fields in MMIO2 region records for registering.
317 */
318 for (size_t i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
319 pHv->aMmio2Regions[i].hMmio2 = NIL_PGMMMIO2HANDLE;
320
321 AssertCompile(GIM_HV_PAGE_SIZE == GUEST_PAGE_SIZE);
322 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
323 pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
324 pRegion->fRCMapping = false;
325 pRegion->cbRegion = GIM_HV_PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
326 pRegion->GCPhysPage = NIL_RTGCPHYS;
327 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
328
329 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
330 pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
331 pRegion->fRCMapping = false;
332 pRegion->cbRegion = GIM_HV_PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
333 pRegion->GCPhysPage = NIL_RTGCPHYS;
334 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
335
336 /*
337 * Make sure the CPU ID bit are in accordance with the Hyper-V
338 * requirement and other paranoia checks.
339 * See "Requirements for implementing the Microsoft hypervisor interface" spec.
340 */
341 Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
342 | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
343 | GIM_HV_PART_FLAGS_ACCESS_PART_ID
344 | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
345 | GIM_HV_PART_FLAGS_CREATE_PORT
346 | GIM_HV_PART_FLAGS_ACCESS_STATS
347 | GIM_HV_PART_FLAGS_CPU_MGMT
348 | GIM_HV_PART_FLAGS_CPU_PROFILER)));
349 Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
350 == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
351#ifdef VBOX_STRICT
352 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
353 {
354 PCGIMMMIO2REGION pCur = &pHv->aMmio2Regions[i];
355 Assert(!pCur->fRCMapping);
356 Assert(!pCur->fMapped);
357 Assert(pCur->GCPhysPage == NIL_RTGCPHYS);
358 }
359#endif
360
361 /*
362 * Expose HVP (Hypervisor Present) bit to the guest.
363 */
364 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
365
366 /*
367 * Modify the standard hypervisor leaves for Hyper-V.
368 */
369 CPUMCPUIDLEAF HyperLeaf;
370 RT_ZERO(HyperLeaf);
371 HyperLeaf.uLeaf = UINT32_C(0x40000000);
372 if ( pHv->fIsVendorMsHv
373 && pHv->fIsInterfaceVs)
374 HyperLeaf.uEax = UINT32_C(0x40000082); /* Since we expose 0x40000082 below for the Hyper-V PV-debugging case. */
375 else
376 HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V default is 0x40000005. */
377 /*
378 * Don't report vendor as 'Microsoft Hv'[1] by default, see @bugref{7270#c152}.
379 * [1]: ebx=0x7263694d ('rciM') ecx=0x666f736f ('foso') edx=0x76482074 ('vH t')
380 */
381 {
382 uint32_t uVendorEbx;
383 uint32_t uVendorEcx;
384 uint32_t uVendorEdx;
385 uVendorEbx = ((uint32_t)szVendor[ 3]) << 24 | ((uint32_t)szVendor[ 2]) << 16 | ((uint32_t)szVendor[1]) << 8
386 | (uint32_t)szVendor[ 0];
387 uVendorEcx = ((uint32_t)szVendor[ 7]) << 24 | ((uint32_t)szVendor[ 6]) << 16 | ((uint32_t)szVendor[5]) << 8
388 | (uint32_t)szVendor[ 4];
389 uVendorEdx = ((uint32_t)szVendor[11]) << 24 | ((uint32_t)szVendor[10]) << 16 | ((uint32_t)szVendor[9]) << 8
390 | (uint32_t)szVendor[ 8];
391 HyperLeaf.uEbx = uVendorEbx;
392 HyperLeaf.uEcx = uVendorEcx;
393 HyperLeaf.uEdx = uVendorEdx;
394 }
395 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
396 AssertLogRelRCReturn(rc, rc);
397
398 HyperLeaf.uLeaf = UINT32_C(0x40000001);
399 HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
400 HyperLeaf.uEbx = 0; /* Reserved */
401 HyperLeaf.uEcx = 0; /* Reserved */
402 HyperLeaf.uEdx = 0; /* Reserved */
403 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
404 AssertLogRelRCReturn(rc, rc);
405
406 /*
407 * Add Hyper-V specific leaves.
408 */
409 HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
410 HyperLeaf.uEax = 0;
411 HyperLeaf.uEbx = 0;
412 HyperLeaf.uEcx = 0;
413 HyperLeaf.uEdx = 0;
414 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
415 AssertLogRelRCReturn(rc, rc);
416
417 HyperLeaf.uLeaf = UINT32_C(0x40000003);
418 HyperLeaf.uEax = pHv->uBaseFeat;
419 HyperLeaf.uEbx = pHv->uPartFlags;
420 HyperLeaf.uEcx = pHv->uPowMgmtFeat;
421 HyperLeaf.uEdx = pHv->uMiscFeat;
422 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
423 AssertLogRelRCReturn(rc, rc);
424
425 HyperLeaf.uLeaf = UINT32_C(0x40000004);
426 HyperLeaf.uEax = pHv->uHyperHints;
427 HyperLeaf.uEbx = 0xffffffff;
428 HyperLeaf.uEcx = 0;
429 HyperLeaf.uEdx = 0;
430 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
431 AssertLogRelRCReturn(rc, rc);
432
433 RT_ZERO(HyperLeaf);
434 HyperLeaf.uLeaf = UINT32_C(0x40000005);
435 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
436 AssertLogRelRCReturn(rc, rc);
437
438 /* Leaf 0x40000006 is inserted in gimR3HvInitCompleted(). */
439
440 if ( pHv->fIsVendorMsHv
441 && pHv->fIsInterfaceVs)
442 {
443 HyperLeaf.uLeaf = UINT32_C(0x40000080);
444 HyperLeaf.uEax = 0;
445 HyperLeaf.uEbx = 0x7263694d; /* 'rciM' */
446 HyperLeaf.uEcx = 0x666f736f; /* 'foso'*/
447 HyperLeaf.uEdx = 0x53562074; /* 'SV t' */
448 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
449 AssertLogRelRCReturn(rc, rc);
450
451 HyperLeaf.uLeaf = UINT32_C(0x40000081);
452 HyperLeaf.uEax = 0x31235356; /* '1#SV' */
453 HyperLeaf.uEbx = 0;
454 HyperLeaf.uEcx = 0;
455 HyperLeaf.uEdx = 0;
456 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
457 AssertLogRelRCReturn(rc, rc);
458
459 HyperLeaf.uLeaf = UINT32_C(0x40000082);
460 HyperLeaf.uEax = RT_BIT_32(1);
461 HyperLeaf.uEbx = 0;
462 HyperLeaf.uEcx = 0;
463 HyperLeaf.uEdx = 0;
464 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
465 AssertLogRelRCReturn(rc, rc);
466 }
467
468 /*
469 * Insert all MSR ranges of Hyper-V.
470 */
471 for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
472 {
473 int rc2 = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
474 AssertLogRelRCReturn(rc2, rc2);
475 }
476
477 /*
478 * Setup non-zero MSRs.
479 */
480 if (pHv->uMiscFeat & GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS)
481 pHv->uCrashCtlMsr = MSR_GIM_HV_CRASH_CTL_NOTIFY;
482 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
483 {
484 PGIMHVCPU pHvCpu = &pVM->apCpusR3[idCpu]->gim.s.u.HvCpu;
485 for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
486 pHvCpu->auSintMsrs[idxSintMsr] = MSR_GIM_HV_SINT_MASKED;
487 }
488
489 /*
490 * Setup hypercall support.
491 */
492 rc = gimR3HvInitHypercallSupport(pVM);
493 AssertLogRelRCReturn(rc, rc);
494
495 /*
496 * Setup debug support.
497 */
498 rc = gimR3HvInitDebugSupport(pVM);
499 AssertLogRelRCReturn(rc, rc);
500
501 /*
502 * Setup up the per-VCPU synthetic timers.
503 */
504 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS)
505 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS))
506 {
507 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
508 {
509 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
510 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
511
512 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
513 {
514 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
515
516 /* Associate the synthetic timer with its corresponding VCPU. */
517 pHvStimer->idCpu = pVCpu->idCpu;
518 pHvStimer->idxStimer = idxStimer;
519
520 /* Create the timer and associate the context pointers. */
521 char szName[32];
522 RTStrPrintf(szName, sizeof(szName), "Hyper-V[%u] Timer%u", pVCpu->idCpu, idxStimer);
523 rc = TMR3TimerCreate(pVM, TMCLOCK_VIRTUAL_SYNC, gimR3HvTimerCallback, pHvStimer /* pvUser */,
524 TMTIMER_FLAGS_RING0, szName, &pHvStimer->hTimer);
525 AssertLogRelRCReturn(rc, rc);
526 }
527 }
528 }
529
530 /*
531 * Register statistics.
532 */
533 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
534 {
535 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
536 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
537
538 for (size_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired); idxStimer++)
539 {
540 int rc2 = STAMR3RegisterF(pVM, &pHvCpu->aStatStimerFired[idxStimer], STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS,
541 STAMUNIT_OCCURENCES, "Number of times the synthetic timer fired.",
542 "/GIM/HyperV/%u/Stimer%u_Fired", idCpu, idxStimer);
543 AssertLogRelRCReturn(rc2, rc2);
544 }
545 }
546
547 return VINF_SUCCESS;
548}
549
550
551/**
552 * Initializes remaining bits of the Hyper-V provider.
553 *
554 * This is called after initializing HM and almost all other VMM components.
555 *
556 * @returns VBox status code.
557 * @param pVM The cross context VM structure.
558 */
559VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
560{
561 PGIMHV pHv = &pVM->gim.s.u.Hv;
562 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
563
564 /*
565 * Determine interface capabilities based on the version.
566 */
567 if (!pVM->gim.s.u32Version)
568 {
569 /* Hypervisor capabilities; features used by the hypervisor. */
570 pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
571 pHv->uHyperCaps |= HMIsMsrBitmapActive(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
572 }
573
574 CPUMCPUIDLEAF HyperLeaf;
575 RT_ZERO(HyperLeaf);
576 HyperLeaf.uLeaf = UINT32_C(0x40000006);
577 HyperLeaf.uEax = pHv->uHyperCaps;
578 HyperLeaf.uEbx = 0;
579 HyperLeaf.uEcx = 0;
580 HyperLeaf.uEdx = 0;
581 int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
582 AssertLogRelRCReturn(rc, rc);
583
584 /*
585 * Inform APIC whether Hyper-V compatibility mode is enabled or not.
586 * Do this here rather than on gimR3HvInit() as it gets called after APIC
587 * has finished inserting/removing the x2APIC MSR range.
588 */
589 if (pHv->uHyperHints & GIM_HV_HINT_X2APIC_MSRS)
590 APICR3HvSetCompatMode(pVM, true);
591
592 return rc;
593}
594
595
596/**
597 * Terminates the Hyper-V GIM provider.
598 *
599 * @returns VBox status code.
600 * @param pVM The cross context VM structure.
601 */
602VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
603{
604 gimR3HvReset(pVM);
605 gimR3HvTermHypercallSupport(pVM);
606 gimR3HvTermDebugSupport(pVM);
607
608 PCGIMHV pHv = &pVM->gim.s.u.Hv;
609 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS)
610 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS))
611 {
612 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
613 {
614 PGIMHVCPU pHvCpu = &pVM->apCpusR3[idCpu]->gim.s.u.HvCpu;
615 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
616 {
617 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
618 TMR3TimerDestroy(pVM, pHvStimer->hTimer);
619 pHvStimer->hTimer = NIL_TMTIMERHANDLE;
620 }
621 }
622 }
623
624 return VINF_SUCCESS;
625}
626
627
628/**
629 * Applies relocations to data and code managed by this
630 * component. This function will be called at init and
631 * whenever the VMM need to relocate it self inside the GC.
632 *
633 * @param pVM The cross context VM structure.
634 * @param offDelta Relocation delta relative to old location.
635 */
636VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
637{
638 RT_NOREF(pVM, offDelta);
639}
640
641
642/**
643 * This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
644 * the guest may have mapped.
645 *
646 * This is called when the VM is being reset.
647 *
648 * @param pVM The cross context VM structure.
649 *
650 * @thread EMT(0)
651 */
652VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
653{
654 VM_ASSERT_EMT0(pVM);
655
656 /*
657 * Unmap MMIO2 pages that the guest may have setup.
658 */
659 LogRel(("GIM: HyperV: Resetting MMIO2 regions and MSRs\n"));
660 PGIMHV pHv = &pVM->gim.s.u.Hv;
661 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
662 {
663 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
664#if 0
665 gimR3Mmio2Unmap(pVM, pRegion);
666#else
667 pRegion->fMapped = false;
668 pRegion->GCPhysPage = NIL_RTGCPHYS;
669#endif
670 }
671
672 /*
673 * Reset MSRs.
674 */
675 pHv->u64GuestOsIdMsr = 0;
676 pHv->u64HypercallMsr = 0;
677 pHv->u64TscPageMsr = 0;
678 pHv->uCrashP0Msr = 0;
679 pHv->uCrashP1Msr = 0;
680 pHv->uCrashP2Msr = 0;
681 pHv->uCrashP3Msr = 0;
682 pHv->uCrashP4Msr = 0;
683 pHv->uDbgStatusMsr = 0;
684 pHv->uDbgPendingBufferMsr = 0;
685 pHv->uDbgSendBufferMsr = 0;
686 pHv->uDbgRecvBufferMsr = 0;
687 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
688 {
689 PGIMHVCPU pHvCpu = &pVM->apCpusR3[idCpu]->gim.s.u.HvCpu;
690 pHvCpu->uSControlMsr = 0;
691 pHvCpu->uSimpMsr = 0;
692 pHvCpu->uSiefpMsr = 0;
693 pHvCpu->uApicAssistPageMsr = 0;
694
695 for (uint8_t idxSint = 0; idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSint++)
696 pHvCpu->auSintMsrs[idxSint] = MSR_GIM_HV_SINT_MASKED;
697
698 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
699 {
700 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
701 pHvStimer->uStimerConfigMsr = 0;
702 pHvStimer->uStimerCountMsr = 0;
703 }
704 }
705}
706
707
708/**
709 * Callback for when debug data is available over the debugger connection.
710 *
711 * @param pVM The cross context VM structure.
712 */
713static DECLCALLBACK(void) gimR3HvDebugBufAvail(PVM pVM)
714{
715 PGIMHV pHv = &pVM->gim.s.u.Hv;
716 RTGCPHYS GCPhysPendingBuffer = pHv->uDbgPendingBufferMsr;
717 if ( GCPhysPendingBuffer
718 && PGMPhysIsGCPhysNormal(pVM, GCPhysPendingBuffer))
719 {
720 uint8_t bPendingData = 1;
721 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysPendingBuffer, &bPendingData, sizeof(bPendingData));
722 if (RT_FAILURE(rc))
723 {
724 LogRelMax(5, ("GIM: HyperV: Failed to set pending debug receive buffer at %#RGp, rc=%Rrc\n", GCPhysPendingBuffer,
725 rc));
726 }
727 }
728}
729
730
731/**
732 * Callback for when debug data has been read from the debugger connection.
733 *
734 * This will be invoked before signalling read of the next debug buffer.
735 *
736 * @param pVM The cross context VM structure.
737 */
738static DECLCALLBACK(void) gimR3HvDebugBufReadCompleted(PVM pVM)
739{
740 PGIMHV pHv = &pVM->gim.s.u.Hv;
741 RTGCPHYS GCPhysPendingBuffer = pHv->uDbgPendingBufferMsr;
742 if ( GCPhysPendingBuffer
743 && PGMPhysIsGCPhysNormal(pVM, GCPhysPendingBuffer))
744 {
745 uint8_t bPendingData = 0;
746 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysPendingBuffer, &bPendingData, sizeof(bPendingData));
747 if (RT_FAILURE(rc))
748 {
749 LogRelMax(5, ("GIM: HyperV: Failed to clear pending debug receive buffer at %#RGp, rc=%Rrc\n", GCPhysPendingBuffer,
750 rc));
751 }
752 }
753}
754
755
756/**
757 * Get Hyper-V debug setup parameters.
758 *
759 * @returns VBox status code.
760 * @param pVM The cross context VM structure.
761 * @param pDbgSetup Where to store the debug setup details.
762 */
763VMMR3_INT_DECL(int) gimR3HvGetDebugSetup(PVM pVM, PGIMDEBUGSETUP pDbgSetup)
764{
765 Assert(pDbgSetup);
766 PGIMHV pHv = &pVM->gim.s.u.Hv;
767 if (pHv->fDbgEnabled)
768 {
769 pDbgSetup->pfnDbgRecvBufAvail = gimR3HvDebugBufAvail;
770 pDbgSetup->cbDbgRecvBuf = GIM_HV_PAGE_SIZE;
771 return VINF_SUCCESS;
772 }
773 return VERR_GIM_NO_DEBUG_CONNECTION;
774}
775
776
777/**
778 * Hyper-V state-save operation.
779 *
780 * @returns VBox status code.
781 * @param pVM The cross context VM structure.
782 * @param pSSM The saved state handle.
783 */
784VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
785{
786 PCGIMHV pHv = &pVM->gim.s.u.Hv;
787
788 /*
789 * Save the Hyper-V SSM version.
790 */
791 SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
792
793 /*
794 * Save per-VM MSRs.
795 */
796 SSMR3PutU64(pSSM, pHv->u64GuestOsIdMsr);
797 SSMR3PutU64(pSSM, pHv->u64HypercallMsr);
798 SSMR3PutU64(pSSM, pHv->u64TscPageMsr);
799
800 /*
801 * Save Hyper-V features / capabilities.
802 */
803 SSMR3PutU32(pSSM, pHv->uBaseFeat);
804 SSMR3PutU32(pSSM, pHv->uPartFlags);
805 SSMR3PutU32(pSSM, pHv->uPowMgmtFeat);
806 SSMR3PutU32(pSSM, pHv->uMiscFeat);
807 SSMR3PutU32(pSSM, pHv->uHyperHints);
808 SSMR3PutU32(pSSM, pHv->uHyperCaps);
809
810 /*
811 * Save the Hypercall region.
812 */
813 PCGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
814 SSMR3PutU8(pSSM, pRegion->iRegion);
815 SSMR3PutBool(pSSM, pRegion->fRCMapping);
816 SSMR3PutU32(pSSM, pRegion->cbRegion);
817 SSMR3PutGCPhys(pSSM, pRegion->GCPhysPage);
818 SSMR3PutStrZ(pSSM, pRegion->szDescription);
819
820 /*
821 * Save the reference TSC region.
822 */
823 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
824 SSMR3PutU8(pSSM, pRegion->iRegion);
825 SSMR3PutBool(pSSM, pRegion->fRCMapping);
826 SSMR3PutU32(pSSM, pRegion->cbRegion);
827 SSMR3PutGCPhys(pSSM, pRegion->GCPhysPage);
828 SSMR3PutStrZ(pSSM, pRegion->szDescription);
829 /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
830 uint32_t uTscSequence = 0;
831 if ( pRegion->fMapped
832 && MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
833 {
834 PCGIMHVREFTSC pRefTsc = (PCGIMHVREFTSC)pRegion->pvPageR3;
835 uTscSequence = pRefTsc->u32TscSequence;
836 }
837 SSMR3PutU32(pSSM, uTscSequence);
838
839 /*
840 * Save debug support data.
841 */
842 SSMR3PutU64(pSSM, pHv->uDbgPendingBufferMsr);
843 SSMR3PutU64(pSSM, pHv->uDbgSendBufferMsr);
844 SSMR3PutU64(pSSM, pHv->uDbgRecvBufferMsr);
845 SSMR3PutU64(pSSM, pHv->uDbgStatusMsr);
846 SSMR3PutU32(pSSM, pHv->enmDbgReply);
847 SSMR3PutU32(pSSM, pHv->uDbgBootpXId);
848 SSMR3PutU32(pSSM, pHv->DbgGuestIp4Addr.u);
849 SSMR3PutU16(pSSM, pHv->uUdpGuestDstPort);
850 SSMR3PutU16(pSSM, pHv->uUdpGuestSrcPort);
851
852 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
853 {
854 PGIMHVCPU pHvCpu = &pVM->apCpusR3[idCpu]->gim.s.u.HvCpu;
855 SSMR3PutU64(pSSM, pHvCpu->uSimpMsr);
856 for (size_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
857 SSMR3PutU64(pSSM, pHvCpu->auSintMsrs[idxSintMsr]);
858 }
859
860 return SSMR3PutU8(pSSM, UINT8_MAX);
861}
862
863
864/**
865 * Hyper-V state-load operation, final pass.
866 *
867 * @returns VBox status code.
868 * @param pVM The cross context VM structure.
869 * @param pSSM The saved state handle.
870 */
871VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM)
872{
873 /*
874 * Load the Hyper-V SSM version first.
875 */
876 uint32_t uHvSavedStateVersion;
877 int rc = SSMR3GetU32(pSSM, &uHvSavedStateVersion);
878 AssertRCReturn(rc, rc);
879 if ( uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION
880 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS
881 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC
882 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
883 return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
884 N_("Unsupported Hyper-V saved-state version %u (current %u)!"),
885 uHvSavedStateVersion, GIM_HV_SAVED_STATE_VERSION);
886
887 /*
888 * Update the TSC frequency from TM.
889 */
890 PGIMHV pHv = &pVM->gim.s.u.Hv;
891 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
892
893 /*
894 * Load per-VM MSRs.
895 */
896 SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
897 SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
898 SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
899
900 /*
901 * Load Hyper-V features / capabilities.
902 */
903 SSMR3GetU32(pSSM, &pHv->uBaseFeat);
904 SSMR3GetU32(pSSM, &pHv->uPartFlags);
905 SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
906 SSMR3GetU32(pSSM, &pHv->uMiscFeat);
907 SSMR3GetU32(pSSM, &pHv->uHyperHints);
908 SSMR3GetU32(pSSM, &pHv->uHyperCaps);
909
910 /*
911 * Load and enable the Hypercall region.
912 */
913 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
914 SSMR3GetU8(pSSM, &pRegion->iRegion);
915 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
916 SSMR3GetU32(pSSM, &pRegion->cbRegion);
917 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
918 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
919 AssertRCReturn(rc, rc);
920
921 if (pRegion->cbRegion != GIM_HV_PAGE_SIZE)
922 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall page region size %#x invalid, expected %#x"),
923 pRegion->cbRegion, GIM_HV_PAGE_SIZE);
924
925 if (MSR_GIM_HV_HYPERCALL_PAGE_IS_ENABLED(pHv->u64HypercallMsr))
926 {
927 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
928 if (RT_LIKELY(pRegion->fRegistered))
929 {
930 rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
931 if (RT_FAILURE(rc))
932 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
933 pRegion->GCPhysPage, rc);
934 }
935 else
936 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
937 }
938
939 /*
940 * Load and enable the reference TSC region.
941 */
942 uint32_t uTscSequence;
943 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
944 SSMR3GetU8(pSSM, &pRegion->iRegion);
945 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
946 SSMR3GetU32(pSSM, &pRegion->cbRegion);
947 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
948 SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
949 rc = SSMR3GetU32(pSSM, &uTscSequence);
950 AssertRCReturn(rc, rc);
951
952 if (pRegion->cbRegion != GIM_HV_PAGE_SIZE)
953 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC page region size %#x invalid, expected %#x"),
954 pRegion->cbRegion, GIM_HV_PAGE_SIZE);
955
956 if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
957 {
958 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
959 if (pRegion->fRegistered)
960 {
961 rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
962 if (RT_FAILURE(rc))
963 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
964 pRegion->GCPhysPage, rc);
965 }
966 else
967 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
968 }
969
970 /*
971 * Load the debug support data.
972 */
973 if (uHvSavedStateVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
974 {
975 SSMR3GetU64(pSSM, &pHv->uDbgPendingBufferMsr);
976 SSMR3GetU64(pSSM, &pHv->uDbgSendBufferMsr);
977 SSMR3GetU64(pSSM, &pHv->uDbgRecvBufferMsr);
978 SSMR3GetU64(pSSM, &pHv->uDbgStatusMsr);
979 SSM_GET_ENUM32_RET(pSSM, pHv->enmDbgReply, GIMHVDEBUGREPLY);
980 SSMR3GetU32(pSSM, &pHv->uDbgBootpXId);
981 rc = SSMR3GetU32(pSSM, &pHv->DbgGuestIp4Addr.u);
982 AssertRCReturn(rc, rc);
983 if (uHvSavedStateVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS)
984 {
985 rc = SSMR3GetU16(pSSM, &pHv->uUdpGuestDstPort); AssertRCReturn(rc, rc);
986 rc = SSMR3GetU16(pSSM, &pHv->uUdpGuestSrcPort); AssertRCReturn(rc, rc);
987 }
988
989 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
990 {
991 PGIMHVCPU pHvCpu = &pVM->apCpusR3[idCpu]->gim.s.u.HvCpu;
992 SSMR3GetU64(pSSM, &pHvCpu->uSimpMsr);
993 if (uHvSavedStateVersion <= GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC)
994 SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[GIM_HV_VMBUS_MSG_SINT]);
995 else
996 {
997 for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
998 SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[idxSintMsr]);
999 }
1000 }
1001
1002 uint8_t bDelim;
1003 rc = SSMR3GetU8(pSSM, &bDelim);
1004 }
1005 else
1006 rc = VINF_SUCCESS;
1007
1008 return rc;
1009}
1010
1011
1012/**
1013 * Hyper-V load-done callback.
1014 *
1015 * @returns VBox status code.
1016 * @param pVM The cross context VM structure.
1017 * @param pSSM The saved state handle.
1018 */
1019VMMR3_INT_DECL(int) gimR3HvLoadDone(PVM pVM, PSSMHANDLE pSSM)
1020{
1021 if (RT_SUCCESS(SSMR3HandleGetStatus(pSSM)))
1022 {
1023 /*
1024 * Update EM on whether MSR_GIM_HV_GUEST_OS_ID allows hypercall instructions.
1025 */
1026 if (pVM->gim.s.u.Hv.u64GuestOsIdMsr)
1027 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1028 EMSetHypercallInstructionsEnabled(pVM->apCpusR3[idCpu], true);
1029 else
1030 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1031 EMSetHypercallInstructionsEnabled(pVM->apCpusR3[idCpu], false);
1032 }
1033 return VINF_SUCCESS;
1034}
1035
1036
1037/**
1038 * Enables the Hyper-V APIC-assist page.
1039 *
1040 * @returns VBox status code.
1041 * @param pVCpu The cross context virtual CPU structure.
1042 * @param GCPhysApicAssistPage Where to map the APIC-assist page.
1043 */
1044VMMR3_INT_DECL(int) gimR3HvEnableApicAssistPage(PVMCPU pVCpu, RTGCPHYS GCPhysApicAssistPage)
1045{
1046 PVM pVM = pVCpu->CTX_SUFF(pVM);
1047 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1048 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1049
1050 /*
1051 * Map the APIC-assist-page at the specified address.
1052 */
1053 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1054 * @bugref{7532}. Instead of the overlay style mapping, we just
1055 * rewrite guest memory directly. */
1056 AssertCompile(sizeof(g_abRTZero64K) >= GUEST_PAGE_SIZE);
1057 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysApicAssistPage, g_abRTZero64K, GUEST_PAGE_SIZE);
1058 if (RT_SUCCESS(rc))
1059 {
1060 /** @todo Inform APIC. */
1061 LogRel(("GIM%u: HyperV: Enabled APIC-assist page at %#RGp\n", pVCpu->idCpu, GCPhysApicAssistPage));
1062 }
1063 else
1064 {
1065 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1066 rc = VERR_GIM_OPERATION_FAILED;
1067 }
1068 return rc;
1069}
1070
1071
1072/**
1073 * Disables the Hyper-V APIC-assist page.
1074 *
1075 * @returns VBox status code.
1076 * @param pVCpu The cross context virtual CPU structure.
1077 */
1078VMMR3_INT_DECL(int) gimR3HvDisableApicAssistPage(PVMCPU pVCpu)
1079{
1080 LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
1081 /** @todo inform APIC */
1082 return VINF_SUCCESS;
1083}
1084
1085
1086/**
1087 * @callback_method_impl{FNTMTIMERINT, Hyper-V synthetic timer callback.}
1088 */
1089static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1090{
1091 PGIMHVSTIMER pHvStimer = (PGIMHVSTIMER)pvUser;
1092 Assert(pHvStimer);
1093 Assert(TMTimerIsLockOwner(pVM, hTimer));
1094 Assert(pHvStimer->idCpu < pVM->cCpus);
1095 Assert(pHvStimer->hTimer == hTimer);
1096 RT_NOREF(hTimer);
1097
1098 PVMCPU pVCpu = pVM->apCpusR3[pHvStimer->idCpu];
1099 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
1100 Assert(pHvStimer->idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired));
1101
1102 STAM_COUNTER_INC(&pHvCpu->aStatStimerFired[pHvStimer->idxStimer]);
1103
1104 uint64_t const uStimerConfig = pHvStimer->uStimerConfigMsr;
1105 uint16_t const idxSint = MSR_GIM_HV_STIMER_GET_SINTX(uStimerConfig);
1106 if (RT_LIKELY(idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs)))
1107 {
1108 uint64_t const uSint = pHvCpu->auSintMsrs[idxSint];
1109 if (!MSR_GIM_HV_SINT_IS_MASKED(uSint))
1110 {
1111 uint8_t const uVector = MSR_GIM_HV_SINT_GET_VECTOR(uSint);
1112 bool const fAutoEoi = MSR_GIM_HV_SINT_IS_AUTOEOI(uSint);
1113 APICHvSendInterrupt(pVCpu, uVector, fAutoEoi, XAPICTRIGGERMODE_EDGE);
1114 }
1115 }
1116
1117 /* Re-arm the timer if it's periodic. */
1118 if (MSR_GIM_HV_STIMER_IS_PERIODIC(uStimerConfig))
1119 gimHvStartStimer(pVCpu, pHvStimer);
1120}
1121
1122
1123/**
1124 * Enables the Hyper-V SIEF page.
1125 *
1126 * @returns VBox status code.
1127 * @param pVCpu The cross context virtual CPU structure.
1128 * @param GCPhysSiefPage Where to map the SIEF page.
1129 */
1130VMMR3_INT_DECL(int) gimR3HvEnableSiefPage(PVMCPU pVCpu, RTGCPHYS GCPhysSiefPage)
1131{
1132 PVM pVM = pVCpu->CTX_SUFF(pVM);
1133 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1134 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1135
1136 /*
1137 * Map the SIEF page at the specified address.
1138 */
1139 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1140 * @bugref{7532}. Instead of the overlay style mapping, we just
1141 * rewrite guest memory directly. */
1142 AssertCompile(sizeof(g_abRTZero64K) >= GUEST_PAGE_SIZE);
1143 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysSiefPage, g_abRTZero64K, GUEST_PAGE_SIZE);
1144 if (RT_SUCCESS(rc))
1145 {
1146 /** @todo SIEF setup. */
1147 LogRel(("GIM%u: HyperV: Enabled SIEF page at %#RGp\n", pVCpu->idCpu, GCPhysSiefPage));
1148 }
1149 else
1150 {
1151 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1152 rc = VERR_GIM_OPERATION_FAILED;
1153 }
1154 return rc;
1155}
1156
1157
1158/**
1159 * Disables the Hyper-V SIEF page.
1160 *
1161 * @returns VBox status code.
1162 * @param pVCpu The cross context virtual CPU structure.
1163 */
1164VMMR3_INT_DECL(int) gimR3HvDisableSiefPage(PVMCPU pVCpu)
1165{
1166 LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
1167 /** @todo SIEF teardown. */
1168 return VINF_SUCCESS;
1169}
1170
1171
1172/**
1173 * Enables the Hyper-V TSC page.
1174 *
1175 * @returns VBox status code.
1176 * @param pVM The cross context VM structure.
1177 * @param GCPhysTscPage Where to map the TSC page.
1178 * @param fUseThisTscSeq Whether to set the TSC sequence number to the one
1179 * specified in @a uTscSeq.
1180 * @param uTscSeq The TSC sequence value to use. Ignored if
1181 * @a fUseThisTscSeq is false.
1182 */
1183VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
1184{
1185 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1186 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
1187 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1188
1189 int rc;
1190 if (pRegion->fMapped)
1191 {
1192 /*
1193 * Is it already enabled at the given guest-address?
1194 */
1195 if (pRegion->GCPhysPage == GCPhysTscPage)
1196 return VINF_SUCCESS;
1197
1198 /*
1199 * If it's mapped at a different address, unmap the previous address.
1200 */
1201 rc = gimR3HvDisableTscPage(pVM);
1202 AssertRC(rc);
1203 }
1204
1205 /*
1206 * Map the TSC-page at the specified address.
1207 */
1208 Assert(!pRegion->fMapped);
1209
1210 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1211 * @bugref{7532}. Instead of the overlay style mapping, we just
1212 * rewrite guest memory directly. */
1213#if 0
1214 rc = gimR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
1215 if (RT_SUCCESS(rc))
1216 {
1217 Assert(pRegion->GCPhysPage == GCPhysTscPage);
1218
1219 /*
1220 * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
1221 * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
1222 *
1223 * Also, Hyper-V normalizes the time in 10 MHz, see:
1224 * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
1225 */
1226 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
1227 Assert(pRefTsc);
1228
1229 PGIMHV pHv = &pVM->gim.s.u.Hv;
1230 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
1231 uint32_t u32TscSeq = 1;
1232 if ( fUseThisTscSeq
1233 && uTscSeq < UINT32_C(0xfffffffe))
1234 u32TscSeq = uTscSeq + 1;
1235 pRefTsc->u32TscSequence = u32TscSeq;
1236 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
1237 pRefTsc->i64TscOffset = 0;
1238
1239 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
1240 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
1241
1242 TMR3CpuTickParavirtEnable(pVM);
1243 return VINF_SUCCESS;
1244 }
1245 else
1246 LogRelFunc(("gimR3Mmio2Map failed. rc=%Rrc\n", rc));
1247 return VERR_GIM_OPERATION_FAILED;
1248#else
1249 AssertReturn(pRegion->cbRegion == GUEST_PAGE_SIZE, VERR_GIM_IPE_2);
1250 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)RTMemAllocZ(GUEST_PAGE_SIZE);
1251 if (RT_UNLIKELY(!pRefTsc))
1252 {
1253 LogRelFunc(("Failed to alloc %#x bytes\n", GUEST_PAGE_SIZE));
1254 return VERR_NO_MEMORY;
1255 }
1256
1257 PGIMHV pHv = &pVM->gim.s.u.Hv;
1258 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
1259 uint32_t u32TscSeq = 1;
1260 if ( fUseThisTscSeq
1261 && uTscSeq < UINT32_C(0xfffffffe))
1262 u32TscSeq = uTscSeq + 1;
1263 pRefTsc->u32TscSequence = u32TscSeq;
1264 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
1265 pRefTsc->i64TscOffset = 0;
1266
1267 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysTscPage, pRefTsc, sizeof(*pRefTsc));
1268 if (RT_SUCCESS(rc))
1269 {
1270 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
1271 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
1272
1273 pRegion->GCPhysPage = GCPhysTscPage;
1274 pRegion->fMapped = true;
1275 TMR3CpuTickParavirtEnable(pVM);
1276 }
1277 else
1278 {
1279 LogRelFunc(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", rc));
1280 rc = VERR_GIM_OPERATION_FAILED;
1281 }
1282 RTMemFree(pRefTsc);
1283 return rc;
1284#endif
1285}
1286
1287
1288/**
1289 * Enables the Hyper-V SIM page.
1290 *
1291 * @returns VBox status code.
1292 * @param pVCpu The cross context virtual CPU structure.
1293 * @param GCPhysSimPage Where to map the SIM page.
1294 */
1295VMMR3_INT_DECL(int) gimR3HvEnableSimPage(PVMCPU pVCpu, RTGCPHYS GCPhysSimPage)
1296{
1297 PVM pVM = pVCpu->CTX_SUFF(pVM);
1298 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1299 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1300
1301 /*
1302 * Map the SIMP page at the specified address.
1303 */
1304 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1305 * @bugref{7532}. Instead of the overlay style mapping, we just
1306 * rewrite guest memory directly. */
1307 AssertCompile(sizeof(g_abRTZero64K) >= GUEST_PAGE_SIZE);
1308 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysSimPage, g_abRTZero64K, GUEST_PAGE_SIZE);
1309 if (RT_SUCCESS(rc))
1310 {
1311 /** @todo SIM setup. */
1312 LogRel(("GIM%u: HyperV: Enabled SIM page at %#RGp\n", pVCpu->idCpu, GCPhysSimPage));
1313 }
1314 else
1315 {
1316 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1317 rc = VERR_GIM_OPERATION_FAILED;
1318 }
1319 return rc;
1320}
1321
1322
1323/**
1324 * Disables the Hyper-V SIM page.
1325 *
1326 * @returns VBox status code.
1327 * @param pVCpu The cross context virtual CPU structure.
1328 */
1329VMMR3_INT_DECL(int) gimR3HvDisableSimPage(PVMCPU pVCpu)
1330{
1331 LogRel(("GIM%u: HyperV: Disabled SIM page\n", pVCpu->idCpu));
1332 /** @todo SIM teardown. */
1333 return VINF_SUCCESS;
1334}
1335
1336
1337
1338/**
1339 * Disables the Hyper-V TSC page.
1340 *
1341 * @returns VBox status code.
1342 * @param pVM The cross context VM structure.
1343 */
1344VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
1345{
1346 PGIMHV pHv = &pVM->gim.s.u.Hv;
1347 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
1348 if (pRegion->fMapped)
1349 {
1350#if 0
1351 gimR3Mmio2Unmap(pVM, pRegion);
1352 Assert(!pRegion->fMapped);
1353#else
1354 pRegion->fMapped = false;
1355#endif
1356 LogRel(("GIM: HyperV: Disabled TSC page\n"));
1357
1358 TMR3CpuTickParavirtDisable(pVM);
1359 return VINF_SUCCESS;
1360 }
1361 return VERR_GIM_PVTSC_NOT_ENABLED;
1362}
1363
1364
1365/**
1366 * Disables the Hyper-V Hypercall page.
1367 *
1368 * @returns VBox status code.
1369 */
1370VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
1371{
1372 PGIMHV pHv = &pVM->gim.s.u.Hv;
1373 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
1374 if (pRegion->fMapped)
1375 {
1376#if 0
1377 gimR3Mmio2Unmap(pVM, pRegion);
1378 Assert(!pRegion->fMapped);
1379#else
1380 pRegion->fMapped = false;
1381#endif
1382 LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
1383 return VINF_SUCCESS;
1384 }
1385 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
1386}
1387
1388
1389/**
1390 * Enables the Hyper-V Hypercall page.
1391 *
1392 * @returns VBox status code.
1393 * @param pVM The cross context VM structure.
1394 * @param GCPhysHypercallPage Where to map the hypercall page.
1395 */
1396VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
1397{
1398 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1399 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
1400 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1401
1402 if (pRegion->fMapped)
1403 {
1404 /*
1405 * Is it already enabled at the given guest-address?
1406 */
1407 if (pRegion->GCPhysPage == GCPhysHypercallPage)
1408 return VINF_SUCCESS;
1409
1410 /*
1411 * If it's mapped at a different address, unmap the previous address.
1412 */
1413 int rc2 = gimR3HvDisableHypercallPage(pVM);
1414 AssertRC(rc2);
1415 }
1416
1417 /*
1418 * Map the hypercall-page at the specified address.
1419 */
1420 Assert(!pRegion->fMapped);
1421
1422 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1423 * @bugref{7532}. Instead of the overlay style mapping, we just
1424 * rewrite guest memory directly. */
1425#if 0
1426 int rc = gimR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
1427 if (RT_SUCCESS(rc))
1428 {
1429 Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
1430
1431 /*
1432 * Patch the hypercall-page.
1433 */
1434 size_t cbWritten = 0;
1435 rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, GUEST_PAGE_SIZE, &cbWritten);
1436 if ( RT_SUCCESS(rc)
1437 && cbWritten < GUEST_PAGE_SIZE)
1438 {
1439 uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
1440 *pbLast = 0xc3; /* RET */
1441
1442 /*
1443 * Notify VMM that hypercalls are now enabled for all VCPUs.
1444 */
1445 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1446 VMMHypercallsEnable(pVM->apCpusR3[idCpu]);
1447
1448 LogRel(("GIM: HyperV: Enabled hypercall page at %#RGp\n", GCPhysHypercallPage));
1449 return VINF_SUCCESS;
1450 }
1451 if (rc == VINF_SUCCESS)
1452 rc = VERR_GIM_OPERATION_FAILED;
1453 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
1454
1455 gimR3Mmio2Unmap(pVM, pRegion);
1456 }
1457
1458 LogRel(("GIM: HyperV: gimR3Mmio2Map failed. rc=%Rrc\n", rc));
1459 return rc;
1460#else
1461 AssertReturn(pRegion->cbRegion == GUEST_PAGE_SIZE, VERR_GIM_IPE_3);
1462 void *pvHypercallPage = RTMemAllocZ(GUEST_PAGE_SIZE);
1463 if (RT_UNLIKELY(!pvHypercallPage))
1464 {
1465 LogRelFunc(("Failed to alloc %#x bytes\n", GUEST_PAGE_SIZE));
1466 return VERR_NO_MEMORY;
1467 }
1468
1469 /*
1470 * Patch the hypercall-page.
1471 */
1472 size_t cbHypercall = 0;
1473 int rc = GIMQueryHypercallOpcodeBytes(pVM, pvHypercallPage, GUEST_PAGE_SIZE, &cbHypercall, NULL /*puDisOpcode*/);
1474 if ( RT_SUCCESS(rc)
1475 && cbHypercall < GUEST_PAGE_SIZE)
1476 {
1477 uint8_t *pbLast = (uint8_t *)pvHypercallPage + cbHypercall;
1478 *pbLast = 0xc3; /* RET */
1479
1480 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysHypercallPage, pvHypercallPage, GUEST_PAGE_SIZE);
1481 if (RT_SUCCESS(rc))
1482 {
1483 pRegion->GCPhysPage = GCPhysHypercallPage;
1484 pRegion->fMapped = true;
1485 LogRel(("GIM: HyperV: Enabled hypercall page at %#RGp\n", GCPhysHypercallPage));
1486 }
1487 else
1488 LogRel(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed during hypercall page setup. rc=%Rrc\n", rc));
1489 }
1490 else
1491 {
1492 if (rc == VINF_SUCCESS)
1493 rc = VERR_GIM_OPERATION_FAILED;
1494 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbHypercall=%u\n", rc, cbHypercall));
1495 }
1496
1497 RTMemFree(pvHypercallPage);
1498 return rc;
1499#endif
1500}
1501
1502
1503/**
1504 * Initializes Hyper-V guest hypercall support.
1505 *
1506 * @returns VBox status code.
1507 * @param pVM The cross context VM structure.
1508 */
1509static int gimR3HvInitHypercallSupport(PVM pVM)
1510{
1511 PGIMHV pHv = &pVM->gim.s.u.Hv;
1512 pHv->pbHypercallIn = (uint8_t *)RTMemAllocZ(GIM_HV_PAGE_SIZE);
1513 if (RT_LIKELY(pHv->pbHypercallIn))
1514 {
1515 pHv->pbHypercallOut = (uint8_t *)RTMemAllocZ(GIM_HV_PAGE_SIZE);
1516 if (RT_LIKELY(pHv->pbHypercallOut))
1517 return VINF_SUCCESS;
1518 RTMemFree(pHv->pbHypercallIn);
1519 }
1520 return VERR_NO_MEMORY;
1521}
1522
1523
1524/**
1525 * Terminates Hyper-V guest hypercall support.
1526 *
1527 * @param pVM The cross context VM structure.
1528 */
1529static void gimR3HvTermHypercallSupport(PVM pVM)
1530{
1531 PGIMHV pHv = &pVM->gim.s.u.Hv;
1532 RTMemFree(pHv->pbHypercallIn);
1533 pHv->pbHypercallIn = NULL;
1534
1535 RTMemFree(pHv->pbHypercallOut);
1536 pHv->pbHypercallOut = NULL;
1537}
1538
1539
1540/**
1541 * Initializes Hyper-V guest debug support.
1542 *
1543 * @returns VBox status code.
1544 * @param pVM The cross context VM structure.
1545 */
1546static int gimR3HvInitDebugSupport(PVM pVM)
1547{
1548 PGIMHV pHv = &pVM->gim.s.u.Hv;
1549 if ( (pHv->uPartFlags & GIM_HV_PART_FLAGS_DEBUGGING)
1550 || pHv->fIsInterfaceVs)
1551 {
1552 pHv->fDbgEnabled = true;
1553 pHv->pvDbgBuffer = RTMemAllocZ(GIM_HV_PAGE_SIZE);
1554 if (!pHv->pvDbgBuffer)
1555 return VERR_NO_MEMORY;
1556 }
1557 return VINF_SUCCESS;
1558}
1559
1560
1561/**
1562 * Terminates Hyper-V guest debug support.
1563 *
1564 * @param pVM The cross context VM structure.
1565 */
1566static void gimR3HvTermDebugSupport(PVM pVM)
1567{
1568 PGIMHV pHv = &pVM->gim.s.u.Hv;
1569 if (pHv->pvDbgBuffer)
1570 {
1571 RTMemFree(pHv->pvDbgBuffer);
1572 pHv->pvDbgBuffer = NULL;
1573 }
1574}
1575
1576
1577/**
1578 * Reads data from a debugger connection, asynchronous.
1579 *
1580 * @returns VBox status code.
1581 * @param pVM The cross context VM structure.
1582 * @param pvBuf Where to read the data.
1583 * @param cbBuf Size of the read buffer @a pvBuf, must be >= @a cbRead.
1584 * @param cbRead Number of bytes to read.
1585 * @param pcbRead Where to store how many bytes were really read.
1586 * @param cMsTimeout Timeout of the read operation in milliseconds.
1587 * @param fUdpPkt Whether the debug data returned in @a pvBuf needs to be
1588 * encapsulated in a UDP frame.
1589 *
1590 * @thread EMT.
1591 */
1592VMMR3_INT_DECL(int) gimR3HvDebugRead(PVM pVM, void *pvBuf, uint32_t cbBuf, uint32_t cbRead, uint32_t *pcbRead,
1593 uint32_t cMsTimeout, bool fUdpPkt)
1594{
1595 NOREF(cMsTimeout); /** @todo implement timeout. */
1596 AssertCompile(sizeof(size_t) >= sizeof(uint32_t));
1597 AssertReturn(cbBuf >= cbRead, VERR_INVALID_PARAMETER);
1598
1599 int rc;
1600 if (!fUdpPkt)
1601 {
1602 /*
1603 * Read the raw debug data.
1604 */
1605 size_t cbReallyRead = cbRead;
1606 rc = gimR3DebugRead(pVM, pvBuf, &cbReallyRead, gimR3HvDebugBufReadCompleted);
1607 *pcbRead = (uint32_t)cbReallyRead;
1608 }
1609 else
1610 {
1611 /*
1612 * Guest requires UDP encapsulated frames.
1613 */
1614 PGIMHV pHv = &pVM->gim.s.u.Hv;
1615 rc = VERR_GIM_IPE_1;
1616 switch (pHv->enmDbgReply)
1617 {
1618 case GIMHVDEBUGREPLY_UDP:
1619 {
1620 size_t cbReallyRead = cbRead;
1621 rc = gimR3DebugRead(pVM, pvBuf, &cbReallyRead, gimR3HvDebugBufReadCompleted);
1622 if ( RT_SUCCESS(rc)
1623 && cbReallyRead > 0)
1624 {
1625 uint8_t abFrame[sizeof(RTNETETHERHDR) + RTNETIPV4_MIN_LEN + sizeof(RTNETUDP)];
1626 if (cbReallyRead + sizeof(abFrame) <= cbBuf)
1627 {
1628 /*
1629 * Windows guests pumps ethernet frames over the Hyper-V debug connection as
1630 * explained in gimR3HvHypercallPostDebugData(). Here, we reconstruct the packet
1631 * with the guest's self-chosen IP ARP address we saved in pHv->DbgGuestAddr.
1632 *
1633 * Note! We really need to pass the minimum IPv4 header length. The Windows 10 guest
1634 * is -not- happy if we include the IPv4 options field, i.e. using sizeof(RTNETIPV4)
1635 * instead of RTNETIPV4_MIN_LEN.
1636 */
1637 RT_ZERO(abFrame);
1638 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)&abFrame[0];
1639 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1640 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1641
1642 /* Ethernet */
1643 pEthHdr->EtherType = RT_H2N_U16_C(RTNET_ETHERTYPE_IPV4);
1644 /* IPv4 */
1645 pIpHdr->ip_v = 4;
1646 pIpHdr->ip_hl = RTNETIPV4_MIN_LEN / sizeof(uint32_t);
1647 pIpHdr->ip_tos = 0;
1648 pIpHdr->ip_len = RT_H2N_U16((uint16_t)cbReallyRead + sizeof(RTNETUDP) + RTNETIPV4_MIN_LEN);
1649 pIpHdr->ip_id = 0;
1650 pIpHdr->ip_off = 0;
1651 pIpHdr->ip_ttl = 255;
1652 pIpHdr->ip_p = RTNETIPV4_PROT_UDP;
1653 pIpHdr->ip_sum = 0;
1654 pIpHdr->ip_src.u = 0;
1655 pIpHdr->ip_dst.u = pHv->DbgGuestIp4Addr.u;
1656 pIpHdr->ip_sum = RTNetIPv4HdrChecksum(pIpHdr);
1657 /* UDP */
1658 pUdpHdr->uh_dport = pHv->uUdpGuestSrcPort;
1659 pUdpHdr->uh_sport = pHv->uUdpGuestDstPort;
1660 pUdpHdr->uh_ulen = RT_H2N_U16_C((uint16_t)cbReallyRead + sizeof(*pUdpHdr));
1661
1662 /* Make room by moving the payload and prepending the headers. */
1663 uint8_t *pbData = (uint8_t *)pvBuf;
1664 memmove(pbData + sizeof(abFrame), pbData, cbReallyRead);
1665 memcpy(pbData, &abFrame[0], sizeof(abFrame));
1666
1667 /* Update the adjusted sizes. */
1668 cbReallyRead += sizeof(abFrame);
1669 }
1670 else
1671 rc = VERR_BUFFER_UNDERFLOW;
1672 }
1673 *pcbRead = (uint32_t)cbReallyRead;
1674 break;
1675 }
1676
1677 case GIMHVDEBUGREPLY_ARP_REPLY:
1678 {
1679 uint32_t const cbArpReplyPkt = sizeof(g_abArpReply);
1680 if (cbBuf >= cbArpReplyPkt)
1681 {
1682 memcpy(pvBuf, g_abArpReply, cbArpReplyPkt);
1683 rc = VINF_SUCCESS;
1684 *pcbRead = cbArpReplyPkt;
1685 pHv->enmDbgReply = GIMHVDEBUGREPLY_ARP_REPLY_SENT;
1686 }
1687 else
1688 {
1689 rc = VERR_BUFFER_UNDERFLOW;
1690 *pcbRead = 0;
1691 }
1692 break;
1693 }
1694
1695 case GIMHVDEBUGREPLY_DHCP_OFFER:
1696 {
1697 uint32_t const cbDhcpOfferPkt = sizeof(g_abDhcpOffer);
1698 if (cbBuf >= cbDhcpOfferPkt)
1699 {
1700 memcpy(pvBuf, g_abDhcpOffer, cbDhcpOfferPkt);
1701 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)pvBuf;
1702 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1703 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1704 PRTNETBOOTP pBootpHdr = (PRTNETBOOTP) (pUdpHdr + 1);
1705 pBootpHdr->bp_xid = pHv->uDbgBootpXId;
1706
1707 rc = VINF_SUCCESS;
1708 *pcbRead = cbDhcpOfferPkt;
1709 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_OFFER_SENT;
1710 LogRel(("GIM: HyperV: Debug DHCP offered IP address %RTnaipv4, transaction Id %#x\n", pBootpHdr->bp_yiaddr,
1711 RT_N2H_U32(pHv->uDbgBootpXId)));
1712 }
1713 else
1714 {
1715 rc = VERR_BUFFER_UNDERFLOW;
1716 *pcbRead = 0;
1717 }
1718 break;
1719 }
1720
1721 case GIMHVDEBUGREPLY_DHCP_ACK:
1722 {
1723 uint32_t const cbDhcpAckPkt = sizeof(g_abDhcpAck);
1724 if (cbBuf >= cbDhcpAckPkt)
1725 {
1726 memcpy(pvBuf, g_abDhcpAck, cbDhcpAckPkt);
1727 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)pvBuf;
1728 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1729 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1730 PRTNETBOOTP pBootpHdr = (PRTNETBOOTP) (pUdpHdr + 1);
1731 pBootpHdr->bp_xid = pHv->uDbgBootpXId;
1732
1733 rc = VINF_SUCCESS;
1734 *pcbRead = cbDhcpAckPkt;
1735 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_ACK_SENT;
1736 LogRel(("GIM: HyperV: Debug DHCP acknowledged IP address %RTnaipv4, transaction Id %#x\n",
1737 pBootpHdr->bp_yiaddr, RT_N2H_U32(pHv->uDbgBootpXId)));
1738 }
1739 else
1740 {
1741 rc = VERR_BUFFER_UNDERFLOW;
1742 *pcbRead = 0;
1743 }
1744 break;
1745 }
1746
1747 case GIMHVDEBUGREPLY_ARP_REPLY_SENT:
1748 case GIMHVDEBUGREPLY_DHCP_OFFER_SENT:
1749 case GIMHVDEBUGREPLY_DHCP_ACK_SENT:
1750 {
1751 rc = VINF_SUCCESS;
1752 *pcbRead = 0;
1753 break;
1754 }
1755
1756 default:
1757 {
1758 AssertMsgFailed(("GIM: HyperV: Invalid/unimplemented debug reply type %u\n", pHv->enmDbgReply));
1759 rc = VERR_INTERNAL_ERROR_2;
1760 }
1761 }
1762 Assert(rc != VERR_GIM_IPE_1);
1763
1764#ifdef DEBUG_ramshankar
1765 if ( rc == VINF_SUCCESS
1766 && *pcbRead > 0)
1767 {
1768 RTSOCKET hSocket;
1769 int rc2 = RTUdpCreateClientSocket("localhost", 52000, NULL, &hSocket);
1770 if (RT_SUCCESS(rc2))
1771 {
1772 size_t cbTmpWrite = *pcbRead;
1773 RTSocketWriteNB(hSocket, pvBuf, *pcbRead, &cbTmpWrite); NOREF(cbTmpWrite);
1774 RTSocketClose(hSocket);
1775 }
1776 }
1777#endif
1778 }
1779
1780 return rc;
1781}
1782
1783
1784/**
1785 * Writes data to the debugger connection, asynchronous.
1786 *
1787 * @returns VBox status code.
1788 * @param pVM The cross context VM structure.
1789 * @param pvData Pointer to the data to be written.
1790 * @param cbWrite Size of the write buffer @a pvData.
1791 * @param pcbWritten Where to store the number of bytes written.
1792 * @param fUdpPkt Whether the debug data in @a pvData is encapsulated in a
1793 * UDP frame.
1794 *
1795 * @thread EMT.
1796 */
1797VMMR3_INT_DECL(int) gimR3HvDebugWrite(PVM pVM, void *pvData, uint32_t cbWrite, uint32_t *pcbWritten, bool fUdpPkt)
1798{
1799 Assert(cbWrite > 0);
1800
1801 PGIMHV pHv = &pVM->gim.s.u.Hv;
1802 bool fIgnorePkt = false;
1803 uint8_t *pbData = (uint8_t *)pvData;
1804 if (fUdpPkt)
1805 {
1806#ifdef DEBUG_ramshankar
1807 RTSOCKET hSocket;
1808 int rc2 = RTUdpCreateClientSocket("localhost", 52000, NULL, &hSocket);
1809 if (RT_SUCCESS(rc2))
1810 {
1811 size_t cbTmpWrite = cbWrite;
1812 RTSocketWriteNB(hSocket, pbData, cbWrite, &cbTmpWrite); NOREF(cbTmpWrite);
1813 RTSocketClose(hSocket);
1814 }
1815#endif
1816 /*
1817 * Windows guests sends us ethernet frames over the Hyper-V debug connection.
1818 * It sends DHCP/ARP queries with zero'd out MAC addresses and requires fudging up the
1819 * packets somewhere.
1820 *
1821 * The Microsoft WinDbg debugger talks UDP and thus only expects the actual debug
1822 * protocol payload.
1823 *
1824 * If the guest is configured with the "nodhcp" option it sends ARP queries with
1825 * a self-chosen IP and after a couple of attempts of receiving no replies, the guest
1826 * picks its own IP address. After this, the guest starts sending the UDP packets
1827 * we require. We thus ignore the initial ARP packets until the guest eventually
1828 * starts talking UDP. Then we can finally feed the UDP payload over the debug
1829 * connection.
1830 *
1831 * When 'kdvm.dll' is the debug transport in the guest (Windows 7), it doesn't bother
1832 * with this DHCP/ARP phase. It starts sending debug data in a UDP frame right away.
1833 */
1834 if (cbWrite > sizeof(RTNETETHERHDR))
1835 {
1836 PCRTNETETHERHDR pEtherHdr = (PCRTNETETHERHDR)pbData;
1837 if (pEtherHdr->EtherType == RT_H2N_U16_C(RTNET_ETHERTYPE_IPV4))
1838 {
1839 if (cbWrite > sizeof(RTNETETHERHDR) + RTNETIPV4_MIN_LEN + RTNETUDP_MIN_LEN)
1840 {
1841 size_t const cbMaxIpHdr = cbWrite - sizeof(RTNETETHERHDR) - sizeof(RTNETUDP) - 1;
1842 size_t const cbMaxIpPkt = cbWrite - sizeof(RTNETETHERHDR);
1843 PCRTNETIPV4 pIp4Hdr = (PCRTNETIPV4)(pbData + sizeof(RTNETETHERHDR));
1844 bool const fValidIp4 = RTNetIPv4IsHdrValid(pIp4Hdr, cbMaxIpHdr, cbMaxIpPkt, false /*fChecksum*/);
1845 if ( fValidIp4
1846 && pIp4Hdr->ip_p == RTNETIPV4_PROT_UDP)
1847 {
1848 uint32_t const cbIpHdr = pIp4Hdr->ip_hl * 4;
1849 uint32_t const cbMaxUdpPkt = cbWrite - sizeof(RTNETETHERHDR) - cbIpHdr;
1850 PCRTNETUDP pUdpHdr = (PCRTNETUDP)((uint8_t *)pIp4Hdr + cbIpHdr);
1851 if ( pUdpHdr->uh_ulen > RT_H2N_U16(sizeof(RTNETUDP))
1852 && pUdpHdr->uh_ulen <= RT_H2N_U16((uint16_t)cbMaxUdpPkt))
1853 {
1854 /*
1855 * Check for DHCP.
1856 */
1857 bool fBuggyPkt = false;
1858 size_t const cbUdpPkt = cbMaxIpPkt - cbIpHdr;
1859 if ( pUdpHdr->uh_dport == RT_N2H_U16_C(RTNETIPV4_PORT_BOOTPS)
1860 && pUdpHdr->uh_sport == RT_N2H_U16_C(RTNETIPV4_PORT_BOOTPC))
1861 {
1862 PCRTNETBOOTP pDhcpPkt = (PCRTNETBOOTP)(pUdpHdr + 1);
1863 uint8_t bMsgType;
1864 if ( cbMaxIpPkt >= cbIpHdr + RTNETUDP_MIN_LEN + RTNETBOOTP_DHCP_MIN_LEN
1865 && RTNetIPv4IsDHCPValid(pUdpHdr, pDhcpPkt, cbUdpPkt - sizeof(*pUdpHdr), &bMsgType))
1866 {
1867 switch (bMsgType)
1868 {
1869 case RTNET_DHCP_MT_DISCOVER:
1870 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_OFFER;
1871 pHv->uDbgBootpXId = pDhcpPkt->bp_xid;
1872 break;
1873 case RTNET_DHCP_MT_REQUEST:
1874 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_ACK;
1875 pHv->uDbgBootpXId = pDhcpPkt->bp_xid;
1876 break;
1877 default:
1878 LogRelMax(5, ("GIM: HyperV: Debug DHCP MsgType %#x not implemented! Packet dropped\n",
1879 bMsgType));
1880 break;
1881 }
1882 fIgnorePkt = true;
1883 }
1884 else if ( pIp4Hdr->ip_src.u == GIMHV_DEBUGCLIENT_IPV4
1885 && pIp4Hdr->ip_dst.u == 0)
1886 {
1887 /*
1888 * Windows 8.1 seems to be sending malformed BOOTP packets at the final stage of the
1889 * debugger sequence. It appears that a previously sent DHCP request buffer wasn't cleared
1890 * in the guest and they re-use it instead of sending a zero destination+source port packet
1891 * as expected below.
1892 *
1893 * We workaround Microsoft's bug here, or at least, I'm classifying it as a bug to
1894 * preserve my own sanity, see @bugref{8006#c54}.
1895 */
1896 fBuggyPkt = true;
1897 }
1898 }
1899
1900 if ( ( !pUdpHdr->uh_dport
1901 && !pUdpHdr->uh_sport)
1902 || fBuggyPkt)
1903 {
1904 /*
1905 * Extract the UDP payload and pass it to the debugger and record the guest IP address.
1906 *
1907 * Hyper-V sends UDP debugger packets with source and destination port as 0 except in the
1908 * aforementioned buggy case. The buggy packet case requires us to remember the ports and
1909 * reply to them, otherwise the guest won't receive the replies we sent with port 0.
1910 */
1911 uint32_t const cbFrameHdr = sizeof(RTNETETHERHDR) + cbIpHdr + sizeof(RTNETUDP);
1912 pbData += cbFrameHdr;
1913 cbWrite -= cbFrameHdr;
1914 pHv->DbgGuestIp4Addr.u = pIp4Hdr->ip_src.u;
1915 pHv->uUdpGuestDstPort = pUdpHdr->uh_dport;
1916 pHv->uUdpGuestSrcPort = pUdpHdr->uh_sport;
1917 pHv->enmDbgReply = GIMHVDEBUGREPLY_UDP;
1918 }
1919 else
1920 {
1921 LogFlow(("GIM: HyperV: Ignoring UDP packet SourcePort=%u DstPort=%u\n", pUdpHdr->uh_sport,
1922 pUdpHdr->uh_dport));
1923 fIgnorePkt = true;
1924 }
1925 }
1926 else
1927 {
1928 LogFlow(("GIM: HyperV: Ignoring malformed UDP packet. cbMaxUdpPkt=%u UdpPkt.len=%u\n", cbMaxUdpPkt,
1929 RT_N2H_U16(pUdpHdr->uh_ulen)));
1930 fIgnorePkt = true;
1931 }
1932 }
1933 else
1934 {
1935 LogFlow(("GIM: HyperV: Ignoring non-IP / non-UDP packet. fValidIp4=%RTbool Proto=%u\n", fValidIp4,
1936 pIp4Hdr->ip_p));
1937 fIgnorePkt = true;
1938 }
1939 }
1940 else
1941 {
1942 LogFlow(("GIM: HyperV: Ignoring IPv4 packet; too short to be valid UDP. cbWrite=%u\n", cbWrite));
1943 fIgnorePkt = true;
1944 }
1945 }
1946 else if (pEtherHdr->EtherType == RT_H2N_U16_C(RTNET_ETHERTYPE_ARP))
1947 {
1948 /*
1949 * Check for targetted ARP query.
1950 */
1951 PCRTNETARPHDR pArpHdr = (PCRTNETARPHDR)(pbData + sizeof(RTNETETHERHDR));
1952 if ( pArpHdr->ar_hlen == sizeof(RTMAC)
1953 && pArpHdr->ar_plen == sizeof(RTNETADDRIPV4)
1954 && pArpHdr->ar_htype == RT_H2N_U16(RTNET_ARP_ETHER)
1955 && pArpHdr->ar_ptype == RT_H2N_U16(RTNET_ETHERTYPE_IPV4))
1956 {
1957 uint16_t uArpOp = pArpHdr->ar_oper;
1958 if (uArpOp == RT_H2N_U16_C(RTNET_ARPOP_REQUEST))
1959 {
1960 PCRTNETARPIPV4 pArpPkt = (PCRTNETARPIPV4)pArpHdr;
1961 bool fGratuitous = pArpPkt->ar_spa.u == pArpPkt->ar_tpa.u;
1962 if ( !fGratuitous
1963 && pArpPkt->ar_spa.u == GIMHV_DEBUGCLIENT_IPV4
1964 && pArpPkt->ar_tpa.u == GIMHV_DEBUGSERVER_IPV4)
1965 {
1966 pHv->enmDbgReply = GIMHVDEBUGREPLY_ARP_REPLY;
1967 }
1968 }
1969 }
1970 fIgnorePkt = true;
1971 }
1972 else
1973 {
1974 LogFlow(("GIM: HyperV: Ignoring non-IP packet. Ethertype=%#x\n", RT_N2H_U16(pEtherHdr->EtherType)));
1975 fIgnorePkt = true;
1976 }
1977 }
1978 }
1979
1980 if (!fIgnorePkt)
1981 {
1982 AssertCompile(sizeof(size_t) >= sizeof(uint32_t));
1983 size_t cbWriteBuf = cbWrite;
1984 int rc = gimR3DebugWrite(pVM, pbData, &cbWriteBuf);
1985 if ( RT_SUCCESS(rc)
1986 && cbWriteBuf == cbWrite)
1987 *pcbWritten = (uint32_t)cbWriteBuf;
1988 else
1989 *pcbWritten = 0;
1990 }
1991 else
1992 *pcbWritten = cbWrite;
1993
1994 return VINF_SUCCESS;
1995}
1996
1997
1998/**
1999 * Performs the HvPostDebugData hypercall.
2000 *
2001 * @returns VBox status code.
2002 * @param pVM The cross context VM structure.
2003 * @param prcHv Where to store the result of the hypercall operation.
2004 *
2005 * @thread EMT.
2006 */
2007VMMR3_INT_DECL(int) gimR3HvHypercallPostDebugData(PVM pVM, int *prcHv)
2008{
2009 AssertPtr(pVM);
2010 AssertPtr(prcHv);
2011 PGIMHV pHv = &pVM->gim.s.u.Hv;
2012 int rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2013
2014 /*
2015 * Grab the parameters.
2016 */
2017 PGIMHVDEBUGPOSTIN pIn = (PGIMHVDEBUGPOSTIN)pHv->pbHypercallIn;
2018 AssertPtrReturn(pIn, VERR_GIM_IPE_1);
2019 uint32_t cbWrite = pIn->cbWrite;
2020 uint32_t fFlags = pIn->fFlags;
2021 uint8_t *pbData = ((uint8_t *)pIn) + sizeof(PGIMHVDEBUGPOSTIN);
2022
2023 PGIMHVDEBUGPOSTOUT pOut = (PGIMHVDEBUGPOSTOUT)pHv->pbHypercallOut;
2024
2025 /*
2026 * Perform the hypercall.
2027 */
2028#if 0
2029 /* Currently disabled as Windows 10 guest passes us undocumented flags. */
2030 if (fFlags & ~GIM_HV_DEBUG_POST_OPTIONS_MASK))
2031 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2032#else
2033 RT_NOREF1(fFlags);
2034#endif
2035 if (cbWrite > GIM_HV_DEBUG_MAX_DATA_SIZE)
2036 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2037 else if (!cbWrite)
2038 {
2039 rcHv = GIM_HV_STATUS_SUCCESS;
2040 pOut->cbPending = 0;
2041 }
2042 else if (cbWrite > 0)
2043 {
2044 uint32_t cbWritten = 0;
2045 int rc2 = gimR3HvDebugWrite(pVM, pbData, cbWrite, &cbWritten, pHv->fIsVendorMsHv /*fUdpPkt*/);
2046 if ( RT_SUCCESS(rc2)
2047 && cbWritten == cbWrite)
2048 {
2049 pOut->cbPending = 0;
2050 rcHv = GIM_HV_STATUS_SUCCESS;
2051 }
2052 else
2053 rcHv = GIM_HV_STATUS_INSUFFICIENT_BUFFER;
2054 }
2055
2056 /*
2057 * Update the guest memory with result.
2058 */
2059 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVDEBUGPOSTOUT));
2060 if (RT_FAILURE(rc))
2061 {
2062 LogRelMax(10, ("GIM: HyperV: HvPostDebugData failed to update guest memory. rc=%Rrc\n", rc));
2063 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2064 }
2065 else
2066 Assert(rc == VINF_SUCCESS);
2067
2068 *prcHv = rcHv;
2069 return rc;
2070}
2071
2072
2073/**
2074 * Performs the HvRetrieveDebugData hypercall.
2075 *
2076 * @returns VBox status code.
2077 * @param pVM The cross context VM structure.
2078 * @param prcHv Where to store the result of the hypercall operation.
2079 *
2080 * @thread EMT.
2081 */
2082VMMR3_INT_DECL(int) gimR3HvHypercallRetrieveDebugData(PVM pVM, int *prcHv)
2083{
2084 AssertPtr(pVM);
2085 AssertPtr(prcHv);
2086 PGIMHV pHv = &pVM->gim.s.u.Hv;
2087 int rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2088
2089 /*
2090 * Grab the parameters.
2091 */
2092 PGIMHVDEBUGRETRIEVEIN pIn = (PGIMHVDEBUGRETRIEVEIN)pHv->pbHypercallIn;
2093 AssertPtrReturn(pIn, VERR_GIM_IPE_1);
2094 uint32_t cbRead = pIn->cbRead;
2095 uint32_t fFlags = pIn->fFlags;
2096 uint64_t uTimeout = pIn->u64Timeout;
2097 uint32_t cMsTimeout = (fFlags & GIM_HV_DEBUG_RETREIVE_LOOP) ? (uTimeout * 100) / RT_NS_1MS_64 : 0;
2098
2099 PGIMHVDEBUGRETRIEVEOUT pOut = (PGIMHVDEBUGRETRIEVEOUT)pHv->pbHypercallOut;
2100 AssertPtrReturn(pOut, VERR_GIM_IPE_2);
2101 uint32_t *pcbReallyRead = &pOut->cbRead;
2102 uint32_t *pcbRemainingRead = &pOut->cbRemaining;
2103 void *pvData = ((uint8_t *)pOut) + sizeof(GIMHVDEBUGRETRIEVEOUT);
2104
2105 /*
2106 * Perform the hypercall.
2107 */
2108 *pcbReallyRead = 0;
2109 *pcbRemainingRead = cbRead;
2110#if 0
2111 /* Currently disabled as Windows 10 guest passes us undocumented flags. */
2112 if (fFlags & ~GIM_HV_DEBUG_RETREIVE_OPTIONS_MASK)
2113 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2114#endif
2115 if (cbRead > GIM_HV_DEBUG_MAX_DATA_SIZE)
2116 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2117 else if (fFlags & GIM_HV_DEBUG_RETREIVE_TEST_ACTIVITY)
2118 rcHv = GIM_HV_STATUS_SUCCESS; /** @todo implement this. */
2119 else if (!cbRead)
2120 rcHv = GIM_HV_STATUS_SUCCESS;
2121 else if (cbRead > 0)
2122 {
2123 int rc2 = gimR3HvDebugRead(pVM, pvData, GIM_HV_PAGE_SIZE, cbRead, pcbReallyRead, cMsTimeout,
2124 pHv->fIsVendorMsHv /*fUdpPkt*/);
2125 Assert(*pcbReallyRead <= cbRead);
2126 if ( RT_SUCCESS(rc2)
2127 && *pcbReallyRead > 0)
2128 {
2129 *pcbRemainingRead = cbRead - *pcbReallyRead;
2130 rcHv = GIM_HV_STATUS_SUCCESS;
2131 }
2132 else
2133 rcHv = GIM_HV_STATUS_NO_DATA;
2134 }
2135
2136 /*
2137 * Update the guest memory with result.
2138 */
2139 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut,
2140 sizeof(GIMHVDEBUGRETRIEVEOUT) + *pcbReallyRead);
2141 if (RT_FAILURE(rc))
2142 {
2143 LogRelMax(10, ("GIM: HyperV: HvRetrieveDebugData failed to update guest memory. rc=%Rrc\n", rc));
2144 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2145 }
2146 else
2147 Assert(rc == VINF_SUCCESS);
2148
2149 *prcHv = rcHv;
2150 return rc;
2151}
2152
2153
2154/**
2155 * Performs the HvExtCallQueryCapabilities extended hypercall.
2156 *
2157 * @returns VBox status code.
2158 * @param pVM The cross context VM structure.
2159 * @param prcHv Where to store the result of the hypercall operation.
2160 *
2161 * @thread EMT.
2162 */
2163VMMR3_INT_DECL(int) gimR3HvHypercallExtQueryCap(PVM pVM, int *prcHv)
2164{
2165 AssertPtr(pVM);
2166 AssertPtr(prcHv);
2167 PGIMHV pHv = &pVM->gim.s.u.Hv;
2168
2169 /*
2170 * Grab the parameters.
2171 */
2172 PGIMHVEXTQUERYCAP pOut = (PGIMHVEXTQUERYCAP)pHv->pbHypercallOut;
2173
2174 /*
2175 * Perform the hypercall.
2176 */
2177 pOut->fCapabilities = GIM_HV_EXT_HYPERCALL_CAP_ZERO_MEM;
2178
2179 /*
2180 * Update the guest memory with result.
2181 */
2182 int rcHv;
2183 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVEXTQUERYCAP));
2184 if (RT_SUCCESS(rc))
2185 {
2186 rcHv = GIM_HV_STATUS_SUCCESS;
2187 LogRel(("GIM: HyperV: Queried extended hypercall capabilities %#RX64 at %#RGp\n", pOut->fCapabilities,
2188 pHv->GCPhysHypercallOut));
2189 }
2190 else
2191 {
2192 rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2193 LogRelMax(10, ("GIM: HyperV: HvHypercallExtQueryCap failed to update guest memory. rc=%Rrc\n", rc));
2194 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2195 }
2196
2197 *prcHv = rcHv;
2198 return rc;
2199}
2200
2201
2202/**
2203 * Performs the HvExtCallGetBootZeroedMemory extended hypercall.
2204 *
2205 * @returns VBox status code.
2206 * @param pVM The cross context VM structure.
2207 * @param prcHv Where to store the result of the hypercall operation.
2208 *
2209 * @thread EMT.
2210 */
2211VMMR3_INT_DECL(int) gimR3HvHypercallExtGetBootZeroedMem(PVM pVM, int *prcHv)
2212{
2213 AssertPtr(pVM);
2214 AssertPtr(prcHv);
2215 PGIMHV pHv = &pVM->gim.s.u.Hv;
2216
2217 /*
2218 * Grab the parameters.
2219 */
2220 PGIMHVEXTGETBOOTZEROMEM pOut = (PGIMHVEXTGETBOOTZEROMEM)pHv->pbHypercallOut;
2221
2222 /*
2223 * Perform the hypercall.
2224 */
2225 uint32_t const cRanges = PGMR3PhysGetRamRangeCount(pVM);
2226 pOut->cPages = 0;
2227 for (uint32_t iRange = 0; iRange < cRanges; iRange++)
2228 {
2229 RTGCPHYS GCPhysStart;
2230 RTGCPHYS GCPhysEnd;
2231 int rc = PGMR3PhysGetRange(pVM, iRange, &GCPhysStart, &GCPhysEnd, NULL /* pszDesc */, NULL /* fIsMmio */);
2232 if (RT_FAILURE(rc))
2233 {
2234 LogRelMax(10, ("GIM: HyperV: HvHypercallExtGetBootZeroedMem: PGMR3PhysGetRange failed for iRange(%u) rc=%Rrc\n",
2235 iRange, rc));
2236 *prcHv = GIM_HV_STATUS_OPERATION_DENIED;
2237 return rc;
2238 }
2239
2240 RTGCPHYS const cbRange = RT_ALIGN(GCPhysEnd - GCPhysStart + 1, GUEST_PAGE_SIZE);
2241 pOut->cPages += cbRange >> GIM_HV_PAGE_SHIFT;
2242 if (iRange == 0)
2243 pOut->GCPhysStart = GCPhysStart;
2244 }
2245
2246 /*
2247 * Update the guest memory with result.
2248 */
2249 int rcHv;
2250 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVEXTGETBOOTZEROMEM));
2251 if (RT_SUCCESS(rc))
2252 {
2253 LogRel(("GIM: HyperV: Queried boot zeroed guest memory range (starting at %#RGp spanning %u pages) at %#RGp\n",
2254 pOut->GCPhysStart, pOut->cPages, pHv->GCPhysHypercallOut));
2255 rcHv = GIM_HV_STATUS_SUCCESS;
2256 }
2257 else
2258 {
2259 rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2260 LogRelMax(10, ("GIM: HyperV: HvHypercallExtGetBootZeroedMem failed to update guest memory. rc=%Rrc\n", rc));
2261 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2262 }
2263
2264 *prcHv = rcHv;
2265 return rc;
2266}
2267
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