GIMHv.cpp@ 52750

Last change on this file since 52750 was 52699, checked in by vboxsync, 10 years ago
VMM/GIM: Fix initialization of Hyper-V bits that rely on HM initialization to be completed.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 24.7 KB

Line
1	/* $Id: GIMHv.cpp 52699 2014-09-11 13:31:23Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, Hyper-V implementation.
4	*/
5
6	/*
7	* Copyright (C) 2014 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_GIM
22	#include "GIMInternal.h"
23
24	#include <iprt/assert.h>
25	#include <iprt/err.h>
26	#include <iprt/string.h>
27	#include <iprt/mem.h>
28	#include <iprt/spinlock.h>
29
30	#include <VBox/vmm/cpum.h>
31	#include <VBox/vmm/ssm.h>
32	#include <VBox/vmm/vm.h>
33	#include <VBox/vmm/hm.h>
34	#include <VBox/vmm/pdmapi.h>
35	#include <VBox/version.h>
36
37	/*******************************************************************************
38	* Defined Constants And Macros *
39	*******************************************************************************/
40	//#define GIMHV_HYPERCALL "GIMHvHypercall"
41	#ifdef VBOX_WITH_STATISTICS
42	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
43	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
44	#else
45	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
46	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
47	#endif
48
49	/**
50	* Array of MSR ranges supported by Hyper-V.
51	*/
52	static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
53	{
54	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
55	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
56	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
57	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
58	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
59	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
60	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
61	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
62	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
63	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
64	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
65	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
66	};
67	#undef GIMHV_MSR
68
69
70	/**
71	* Initializes the Hyper-V GIM provider.
72	*
73	* @returns VBox status code.
74	* @param pVM Pointer to the VM.
75	* @param uVersion The interface version this VM should use.
76	*/
77	VMMR3_INT_DECL(int) GIMR3HvInit(PVM pVM)
78	{
79	AssertReturn(pVM, VERR_INVALID_PARAMETER);
80	AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
81
82	int rc;
83	PGIMHV pHv = &pVM->gim.s.u.Hv;
84
85	/*
86	* Determine interface capabilities based on the version.
87	*/
88	if (!pVM->gim.s.u32Version)
89	{
90	/* Basic features. */
91	pHv->uBaseFeat = 0
92	//\| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
93	\| GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
94	//\| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
95	//\| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
96	\| GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
97	\| GIM_HV_BASE_FEAT_HYPERCALL_MSRS
98	\| GIM_HV_BASE_FEAT_VP_ID_MSR
99	\| GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
100	//\| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
101	\| GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
102	//\| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
103	\| GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
104	//\| GIM_HV_BASE_FEAT_DEBUG_MSRS
105	;
106
107	/* Miscellaneous features. */
108	pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ;
109
110	/* Hypervisor recommendations to the guest. */
111	pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
112	\| GIM_HV_HINT_RELAX_TIME_CHECKS;
113	}
114
115	/*
116	* Populate the required fields in MMIO2 region records for registering.
117	*/
118	AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
119	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
120	pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
121	pRegion->fRCMapping = false;
122	pRegion->cbRegion = PAGE_SIZE;
123	pRegion->GCPhysPage = NIL_RTGCPHYS;
124	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
125
126	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
127	pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
128	pRegion->fRCMapping = false;
129	pRegion->cbRegion = PAGE_SIZE;
130	pRegion->GCPhysPage = NIL_RTGCPHYS;
131	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
132
133	/*
134	* Make sure the CPU ID bit are in accordance to the Hyper-V
135	* requirement and other paranoia checks.
136	* See "Requirements for implementing the Microsoft hypervisor interface" spec.
137	*/
138	Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
139	\| GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
140	\| GIM_HV_PART_FLAGS_ACCESS_PART_ID
141	\| GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
142	\| GIM_HV_PART_FLAGS_CREATE_PORT
143	\| GIM_HV_PART_FLAGS_ACCESS_STATS
144	\| GIM_HV_PART_FLAGS_CPU_MGMT
145	\| GIM_HV_PART_FLAGS_CPU_PROFILER)));
146	Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR))
147	== (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR));
148	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
149	{
150	PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
151	Assert(!pcCur->fRCMapping);
152	Assert(!pcCur->fMapped);
153	Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
154	}
155
156	/*
157	* Expose HVP (Hypervisor Present) bit to the guest.
158	*/
159	CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
160
161	/*
162	* Modify the standard hypervisor leaves for Hyper-V.
163	*/
164	CPUMCPUIDLEAF HyperLeaf;
165	RT_ZERO(HyperLeaf);
166	HyperLeaf.uLeaf = UINT32_C(0x40000000);
167	HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
168	HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
169	HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
170	HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
171	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
172	AssertLogRelRCReturn(rc, rc);
173
174	HyperLeaf.uLeaf = UINT32_C(0x40000001);
175	HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
176	HyperLeaf.uEbx = 0; /* Reserved */
177	HyperLeaf.uEcx = 0; /* Reserved */
178	HyperLeaf.uEdx = 0; /* Reserved */
179	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
180	AssertLogRelRCReturn(rc, rc);
181
182	/*
183	* Add Hyper-V specific leaves.
184	*/
185	HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
186	HyperLeaf.uEax = 0;
187	HyperLeaf.uEbx = 0;
188	HyperLeaf.uEcx = 0;
189	HyperLeaf.uEdx = 0;
190	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
191	AssertLogRelRCReturn(rc, rc);
192
193	HyperLeaf.uLeaf = UINT32_C(0x40000003);
194	HyperLeaf.uEax = pHv->uBaseFeat;
195	HyperLeaf.uEbx = pHv->uPartFlags;
196	HyperLeaf.uEcx = pHv->uPowMgmtFeat;
197	HyperLeaf.uEdx = pHv->uMiscFeat;
198	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
199	AssertLogRelRCReturn(rc, rc);
200
201	HyperLeaf.uLeaf = UINT32_C(0x40000004);
202	HyperLeaf.uEax = pHv->uHyperHints;
203	HyperLeaf.uEbx = 0xffffffff;
204	HyperLeaf.uEcx = 0;
205	HyperLeaf.uEdx = 0;
206	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
207	AssertLogRelRCReturn(rc, rc);
208
209	/*
210	* Insert all MSR ranges of Hyper-V.
211	*/
212	for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
213	{
214	rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
215	AssertLogRelRCReturn(rc, rc);
216	}
217
218	return VINF_SUCCESS;
219	}
220
221
222	/**
223	* Initializes remaining bits of the Hyper-V provider.
224	* This is called after initializing HM and almost all other VMM components.
225	*
226	* @returns VBox status code.
227	* @param pVM Pointer to the VM.
228	*/
229	VMMR3_INT_DECL(int) GIMR3HvInitCompleted(PVM pVM)
230	{
231	PGIMHV pHv = &pVM->gim.s.u.Hv;
232
233	/*
234	* Determine interface capabilities based on the version.
235	*/
236	if (!pVM->gim.s.u32Version)
237	{
238	/* Hypervisor capabilities; features used by the hypervisor. */
239	pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
240	pHv->uHyperCaps \|= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
241	}
242
243	CPUMCPUIDLEAF HyperLeaf;
244	RT_ZERO(HyperLeaf);
245	HyperLeaf.uLeaf = UINT32_C(0x40000006);
246	HyperLeaf.uEax = pHv->uHyperCaps;
247	HyperLeaf.uEbx = 0;
248	HyperLeaf.uEcx = 0;
249	HyperLeaf.uEdx = 0;
250	int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
251	AssertLogRelRCReturn(rc, rc);
252
253	return rc;
254	}
255
256
257	#if 0
258	VMMR3_INT_DECL(int) GIMR3HvInitFinalize(PVM pVM)
259	{
260	pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
261	if (!HMIsEnabled(pVM))
262	{
263	rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
264	AssertRCReturn(rc, rc);
265	}
266	rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
267	AssertRCReturn(rc, rc);
268	}
269	#endif
270
271
272	/**
273	* Terminates the Hyper-V GIM provider.
274	*
275	* @returns VBox status code.
276	* @param pVM Pointer to the VM.
277	*/
278	VMMR3_INT_DECL(int) GIMR3HvTerm(PVM pVM)
279	{
280	GIMR3HvReset(pVM);
281	return VINF_SUCCESS;
282	}
283
284
285	/**
286	* Applies relocations to data and code managed by this component. This function
287	* will be called at init and whenever the VMM need to relocate itself inside
288	* the GC.
289	*
290	* @param pVM Pointer to the VM.
291	* @param offDelta Relocation delta relative to old location.
292	*/
293	VMMR3_INT_DECL(void) GIMR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
294	{
295	#if 0
296	int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
297	AssertFatalRC(rc);
298	#endif
299	}
300
301
302	/**
303	* The VM is being reset. This resets Hyper-V provider MSRs and unmaps whatever
304	* Hyper-V regions that the guest may have mapped.
305	*
306	* @param pVM Pointer to the VM.
307	*/
308	VMMR3_INT_DECL(void) GIMR3HvReset(PVM pVM)
309	{
310	/*
311	* Unmap MMIO2 pages that the guest may have setup.
312	*/
313	LogRel(("GIM: HyperV: Resetting Hyper-V MMIO2 regions and MSRs\n"));
314	PGIMHV pHv = &pVM->gim.s.u.Hv;
315	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
316	{
317	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
318	GIMR3Mmio2Unmap(pVM, pRegion);
319	}
320
321	/*
322	* Reset MSRs.
323	*/
324	pHv->u64GuestOsIdMsr = 0;
325	pHv->u64HypercallMsr = 0;
326	pHv->u64TscPageMsr = 0;
327	}
328
329
330	/**
331	* Returns a pointer to the MMIO2 regions supported by Hyper-V.
332	*
333	* @returns Pointer to an array of MMIO2 regions.
334	* @param pVM Pointer to the VM.
335	* @param pcRegions Where to store the number of regions in the array.
336	*/
337	VMMR3_INT_DECL(PGIMMMIO2REGION) GIMR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
338	{
339	Assert(GIMIsEnabled(pVM));
340	PGIMHV pHv = &pVM->gim.s.u.Hv;
341
342	*pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
343	Assert(pcRegions <= UINT8_MAX); / See PGMR3PhysMMIO2Register(). */
344	return pHv->aMmio2Regions;
345	}
346
347
348	/**
349	* Hyper-V state-save operation.
350	*
351	* @returns VBox status code.
352	* @param pVM Pointer to the VM.
353	* @param pSSM Pointer to the SSM handle.
354	*/
355	VMMR3_INT_DECL(int) GIMR3HvSave(PVM pVM, PSSMHANDLE pSSM)
356	{
357	PCGIMHV pcHv = &pVM->gim.s.u.Hv;
358
359	/*
360	* Save the Hyper-V SSM version.
361	*/
362	int rc = SSMR3PutU32(pSSM, GIM_HV_SSM_VERSION); AssertRCReturn(rc, rc);
363
364	/** @todo Save per-VCPU data. */
365
366	/*
367	* Save per-VM MSRs.
368	*/
369	rc = SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
370	rc = SSMR3PutU64(pSSM, pcHv->u64HypercallMsr); AssertRCReturn(rc, rc);
371	rc = SSMR3PutU64(pSSM, pcHv->u64TscPageMsr); AssertRCReturn(rc, rc);
372
373	/*
374	* Save Hyper-V features / capabilities.
375	*/
376	rc = SSMR3PutU32(pSSM, pcHv->uBaseFeat); AssertRCReturn(rc, rc);
377	rc = SSMR3PutU32(pSSM, pcHv->uPartFlags); AssertRCReturn(rc, rc);
378	rc = SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
379	rc = SSMR3PutU32(pSSM, pcHv->uMiscFeat); AssertRCReturn(rc, rc);
380	rc = SSMR3PutU32(pSSM, pcHv->uHyperHints); AssertRCReturn(rc, rc);
381	rc = SSMR3PutU32(pSSM, pcHv->uHyperCaps); AssertRCReturn(rc, rc);
382
383	/*
384	* Save the Hypercall region.
385	*/
386	PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
387	rc = SSMR3PutU8(pSSM, pcRegion->iRegion); AssertRCReturn(rc, rc);
388	rc = SSMR3PutBool(pSSM, pcRegion->fRCMapping); AssertRCReturn(rc, rc);
389	rc = SSMR3PutU32(pSSM, pcRegion->cbRegion); AssertRCReturn(rc, rc);
390	rc = SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage); AssertRCReturn(rc, rc);
391	rc = SSMR3PutStrZ(pSSM, pcRegion->szDescription); AssertRCReturn(rc, rc);
392
393	/*
394	* Save the reference TSC region.
395	*/
396	pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
397	rc = SSMR3PutU8(pSSM, pcRegion->iRegion); AssertRCReturn(rc, rc);
398	rc = SSMR3PutBool(pSSM, pcRegion->fRCMapping); AssertRCReturn(rc, rc);
399	rc = SSMR3PutU32(pSSM, pcRegion->cbRegion); AssertRCReturn(rc, rc);
400	rc = SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage); AssertRCReturn(rc, rc);
401	rc = SSMR3PutStrZ(pSSM, pcRegion->szDescription); AssertRCReturn(rc, rc);
402	/* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
403	uint32_t uTscSequence = 0;
404	if ( pcRegion->fMapped
405	&& MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
406	{
407	PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
408	uTscSequence = pcRefTsc->u32TscSequence;
409	}
410	rc = SSMR3PutU32(pSSM, uTscSequence); AssertRCReturn(rc, rc);
411
412	return VINF_SUCCESS;
413	}
414
415
416	/**
417	* Hyper-V state-load operation, final pass.
418	*
419	* @returns VBox status code.
420	* @param pVM Pointer to the VM.
421	* @param pSSM Pointer to the SSM handle.
422	* @param uSSMVersion The GIM saved-state version.
423	*/
424	VMMR3_INT_DECL(int) GIMR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
425	{
426	PGIMHV pHv = &pVM->gim.s.u.Hv;
427
428	/*
429	* Load the Hyper-V SSM version first.
430	*/
431	uint32_t uHvSSMVersion;
432	int rc = SSMR3GetU32(pSSM, &uHvSSMVersion); AssertRCReturn(rc, rc);
433
434	/** @todo Load per-VCPU data. */
435
436	/*
437	* Load per-VM MSRs.
438	*/
439	rc = SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
440	rc = SSMR3GetU64(pSSM, &pHv->u64HypercallMsr); AssertRCReturn(rc, rc);
441	rc = SSMR3GetU64(pSSM, &pHv->u64TscPageMsr); AssertRCReturn(rc, rc);
442
443	/*
444	* Load Hyper-V features / capabilities.
445	*/
446	rc = SSMR3GetU32(pSSM, &pHv->uBaseFeat); AssertRCReturn(rc, rc);
447	rc = SSMR3GetU32(pSSM, &pHv->uPartFlags); AssertRCReturn(rc, rc);
448	rc = SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
449	rc = SSMR3GetU32(pSSM, &pHv->uMiscFeat); AssertRCReturn(rc, rc);
450	rc = SSMR3GetU32(pSSM, &pHv->uHyperHints); AssertRCReturn(rc, rc);
451	rc = SSMR3GetU32(pSSM, &pHv->uHyperCaps); AssertRCReturn(rc, rc);
452
453	/*
454	* Load and enable the Hypercall region.
455	*/
456	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
457	rc = SSMR3GetU8(pSSM, &pRegion->iRegion); AssertRCReturn(rc, rc);
458	rc = SSMR3GetBool(pSSM, &pRegion->fRCMapping); AssertRCReturn(rc, rc);
459	rc = SSMR3GetU32(pSSM, &pRegion->cbRegion); AssertRCReturn(rc, rc);
460	rc = SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage); AssertRCReturn(rc, rc);
461	rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
462	AssertRCReturn(rc, rc);
463	if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
464	{
465	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
466	if (RT_LIKELY(pRegion->fRegistered))
467	{
468	rc = GIMR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
469	if (RT_FAILURE(rc))
470	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
471	pRegion->GCPhysPage, rc);
472	}
473	else
474	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
475	}
476
477	/*
478	* Load and enable the reference TSC region.
479	*/
480	uint32_t uTscSequence;
481	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
482	rc = SSMR3GetU8(pSSM, &pRegion->iRegion); AssertRCReturn(rc, rc);
483	rc = SSMR3GetBool(pSSM, &pRegion->fRCMapping); AssertRCReturn(rc, rc);
484	rc = SSMR3GetU32(pSSM, &pRegion->cbRegion); AssertRCReturn(rc, rc);
485	rc = SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage); AssertRCReturn(rc, rc);
486	rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
487	rc = SSMR3GetU32(pSSM, &uTscSequence); AssertRCReturn(rc, rc);
488	AssertRCReturn(rc, rc);
489	if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
490	{
491	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
492	if (pRegion->fRegistered)
493	{
494	rc = GIMR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
495	if (RT_FAILURE(rc))
496	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
497	pRegion->GCPhysPage, rc);
498	}
499	else
500	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
501	}
502
503	return rc;
504	}
505
506
507	/**
508	* Enables the Hyper-V TSC page.
509	*
510	* @returns VBox status code.
511	* @param pVM Pointer to the VM.
512	* @param GCPhysTscPage Where to map the TSC page.
513	* @param fUseThisTscSequence Whether to set the TSC sequence number to
514	* the one specified in @a uTscSequence.
515	* @param uTscSequence The TSC sequence value to use. Ignored if @a
516	* fUseThisTscSequence is false.
517	*/
518	VMMR3_INT_DECL(int) GIMR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSequence, uint32_t uTscSequence)
519	{
520	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
521	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
522	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
523
524	int rc;
525	if (pRegion->fMapped)
526	{
527	/*
528	* Is it already enabled at the given guest-address?
529	*/
530	if (pRegion->GCPhysPage == GCPhysTscPage)
531	return VINF_SUCCESS;
532
533	/*
534	* If it's mapped at a different address, unmap the previous address.
535	*/
536	rc = GIMR3HvDisableTscPage(pVM);
537	AssertRC(rc);
538	}
539
540	/*
541	* Map the TSC-page at the specified address.
542	*/
543	Assert(!pRegion->fMapped);
544	rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
545	if (RT_SUCCESS(rc))
546	{
547	Assert(pRegion->GCPhysPage == GCPhysTscPage);
548
549	/*
550	* Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
551	* they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
552	*
553	* Also, Hyper-V normalizes the time in 10 MHz, see:
554	* http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
555	*/
556	PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
557	Assert(pRefTsc);
558
559	uint64_t const u64TscKHz = TMCpuTicksPerSecond(pVM) / UINT64_C(1000);
560	uint32_t u32TscSeq = 1;
561	if ( fUseThisTscSequence
562	&& uTscSequence < UINT32_C(0xfffffffe))
563	{
564	u32TscSeq = uTscSequence + 1;
565	}
566	pRefTsc->u32TscSequence = u32TscSeq;
567	pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
568
569	LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64)\n", GCPhysTscPage,
570	pRefTsc->u64TscScale, u64TscKHz, u64TscKHz));
571	return VINF_SUCCESS;
572	}
573	else
574	LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
575
576	return VERR_GIM_OPERATION_FAILED;
577	}
578
579
580	/**
581	* Disables the Hyper-V TSC page.
582	*
583	* @returns VBox status code.
584	* @param pVM Pointer to the VM.
585	*/
586	VMMR3_INT_DECL(int) GIMR3HvDisableTscPage(PVM pVM)
587	{
588	PGIMHV pHv = &pVM->gim.s.u.Hv;
589	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
590	if (pRegion->fMapped)
591	{
592	GIMR3Mmio2Unmap(pVM, pRegion);
593	Assert(!pRegion->fMapped);
594	LogRel(("GIM: HyperV: Disabled TSC-page\n"));
595	return VINF_SUCCESS;
596	}
597	return VERR_GIM_PVTSC_NOT_ENABLED;
598	}
599
600
601	/**
602	* Disables the Hyper-V Hypercall page.
603	*
604	* @returns VBox status code.
605	*/
606	VMMR3_INT_DECL(int) GIMR3HvDisableHypercallPage(PVM pVM)
607	{
608	PGIMHV pHv = &pVM->gim.s.u.Hv;
609	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
610	if (pRegion->fMapped)
611	{
612	GIMR3Mmio2Unmap(pVM, pRegion);
613	Assert(!pRegion->fMapped);
614	LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
615	return VINF_SUCCESS;
616	}
617	return VERR_GIM_HYPERCALLS_NOT_ENABLED;
618	}
619
620
621	/**
622	* Enables the Hyper-V Hypercall page.
623	*
624	* @returns VBox status code.
625	* @param pVM Pointer to the VM.
626	* @param GCPhysHypercallPage Where to map the hypercall page.
627	*/
628	VMMR3_INT_DECL(int) GIMR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
629	{
630	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
631	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
632	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
633
634	if (pRegion->fMapped)
635	{
636	/*
637	* Is it already enabled at the given guest-address?
638	*/
639	if (pRegion->GCPhysPage == GCPhysHypercallPage)
640	return VINF_SUCCESS;
641
642	/*
643	* If it's mapped at a different address, unmap the previous address.
644	*/
645	int rc2 = GIMR3HvDisableHypercallPage(pVM);
646	AssertRC(rc2);
647	}
648
649	/*
650	* Map the hypercall-page at the specified address.
651	*/
652	Assert(!pRegion->fMapped);
653	int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
654	if (RT_SUCCESS(rc))
655	{
656	Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
657
658	/*
659	* Patch the hypercall-page.
660	*/
661	if (HMIsEnabled(pVM))
662	{
663	size_t cbWritten = 0;
664	rc = HMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
665	if ( RT_SUCCESS(rc)
666	&& cbWritten < PAGE_SIZE)
667	{
668	uint8_t pbLast = (uint8_t )pRegion->pvPageR3 + cbWritten;
669	pbLast = 0xc3; / RET */
670
671	LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
672	return VINF_SUCCESS;
673	}
674	else
675	{
676	if (rc == VINF_SUCCESS)
677	rc = VERR_GIM_OPERATION_FAILED;
678	LogRelFunc(("HMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
679	}
680	}
681	else
682	{
683	/** @todo Handle raw-mode hypercall page patching. */
684	LogRel(("GIM: HyperV: Raw-mode hypercalls not yet implemented!\n"));
685	}
686	GIMR3Mmio2Unmap(pVM, pRegion);
687	}
688	else
689	LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
690
691	return rc;
692	}
693

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 52750

Download in other formats: