VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 78126

Last change on this file since 78126 was 76553, checked in by vboxsync, 6 years ago

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1/* $Id: GIMHv.cpp 76553 2019-01-01 01:45:53Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Hyper-V implementation.
4 */
5
6/*
7 * Copyright (C) 2014-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_GIM
23#include <VBox/vmm/apic.h>
24#include <VBox/vmm/gim.h>
25#include <VBox/vmm/cpum.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/ssm.h>
28#include <VBox/vmm/hm.h>
29#include <VBox/vmm/pdmapi.h>
30#include <VBox/vmm/em.h>
31#include "GIMInternal.h"
32#include <VBox/vmm/vm.h>
33
34#include <VBox/err.h>
35#include <VBox/version.h>
36
37#include <iprt/assert.h>
38#include <iprt/string.h>
39#include <iprt/mem.h>
40#include <iprt/semaphore.h>
41#include <iprt/spinlock.h>
42#ifdef DEBUG_ramshankar
43# include <iprt/udp.h>
44#endif
45
46
47/*********************************************************************************************************************************
48* Defined Constants And Macros *
49*********************************************************************************************************************************/
50/**
51 * GIM Hyper-V saved-state version.
52 */
53#define GIM_HV_SAVED_STATE_VERSION UINT32_C(4)
54/** Saved states, priot to saving debug UDP source/destination ports. */
55#define GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS UINT32_C(3)
56/** Saved states, prior to any synthetic interrupt controller support. */
57#define GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC UINT32_C(2)
58/** Vanilla saved states, prior to any debug support. */
59#define GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG UINT32_C(1)
60
61#ifdef VBOX_WITH_STATISTICS
62# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
63 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
64#else
65# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
66 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
67#endif
68
69
70/*********************************************************************************************************************************
71* Global Variables *
72*********************************************************************************************************************************/
73/**
74 * Array of MSR ranges supported by Hyper-V.
75 */
76static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
77{
78 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_FIRST, MSR_GIM_HV_RANGE0_LAST, "Hyper-V range 0"),
79 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_FIRST, MSR_GIM_HV_RANGE1_LAST, "Hyper-V range 1"),
80 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_FIRST, MSR_GIM_HV_RANGE2_LAST, "Hyper-V range 2"),
81 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_FIRST, MSR_GIM_HV_RANGE3_LAST, "Hyper-V range 3"),
82 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_FIRST, MSR_GIM_HV_RANGE4_LAST, "Hyper-V range 4"),
83 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_FIRST, MSR_GIM_HV_RANGE5_LAST, "Hyper-V range 5"),
84 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_FIRST, MSR_GIM_HV_RANGE6_LAST, "Hyper-V range 6"),
85 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_FIRST, MSR_GIM_HV_RANGE7_LAST, "Hyper-V range 7"),
86 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_FIRST, MSR_GIM_HV_RANGE8_LAST, "Hyper-V range 8"),
87 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_FIRST, MSR_GIM_HV_RANGE9_LAST, "Hyper-V range 9"),
88 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_FIRST, MSR_GIM_HV_RANGE10_LAST, "Hyper-V range 10"),
89 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_FIRST, MSR_GIM_HV_RANGE11_LAST, "Hyper-V range 11"),
90 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE12_FIRST, MSR_GIM_HV_RANGE12_LAST, "Hyper-V range 12")
91};
92#undef GIMHV_MSRRANGE
93
94/**
95 * DHCP OFFER packet response to the guest (client) over the Hyper-V debug
96 * transport.
97 *
98 * - MAC: Destination: broadcast.
99 * - MAC: Source: 00:00:00:00:01 (hypervisor). It's important that it's
100 * different from the client's MAC address which is all 0's.
101 * - IP: Source: 10.0.5.1 (hypervisor)
102 * - IP: Destination: broadcast.
103 * - IP: Checksum included.
104 * - BOOTP: Client IP address: 10.0.5.5.
105 * - BOOTP: Server IP address: 10.0.5.1.
106 * - DHCP options: Subnet mask, router, lease-time, DHCP server identifier.
107 * Options are kept to a minimum required for making Windows guests happy.
108 */
109#define GIMHV_DEBUGCLIENT_IPV4 RT_H2N_U32_C(0x0a000505) /* 10.0.5.5 */
110#define GIMHV_DEBUGSERVER_IPV4 RT_H2N_U32_C(0x0a000501) /* 10.0.5.1 */
111static const uint8_t g_abDhcpOffer[] =
112{
113 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x45, 0x10,
114 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x11, 0x6a, 0xb5, 0x0a, 0x00, 0x05, 0x01, 0xff, 0xff,
115 0xff, 0xff, 0x00, 0x43, 0x00, 0x44, 0x01, 0x14, 0x00, 0x00, 0x02, 0x01, 0x06, 0x00, 0x00, 0x00,
116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05, 0x00, 0x00,
117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
119 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x82, 0x53, 0x63, 0x35, 0x01, 0x02, 0x01, 0x04, 0xff,
131 0xff, 0xff, 0x00, 0x03, 0x04, 0x0a, 0x00, 0x05, 0x01, 0x33, 0x04, 0xff, 0xff, 0xff, 0xff, 0x36,
132 0x04, 0x0a, 0x00, 0x05, 0x01, 0xff
133};
134
135/**
136 * DHCP ACK packet response to the guest (client) over the Hyper-V debug
137 * transport.
138 *
139 * - MAC: Destination: 00:00:00:00:00 (client).
140 * - IP: Destination: 10.0.5.5 (client).
141 * - Rest are mostly similar to the DHCP offer.
142 */
143static const uint8_t g_abDhcpAck[] =
144{
145 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x45, 0x10,
146 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x11, 0x5b, 0xb0, 0x0a, 0x00, 0x05, 0x01, 0x0a, 0x00,
147 0x05, 0x05, 0x00, 0x43, 0x00, 0x44, 0x01, 0x14, 0x00, 0x00, 0x02, 0x01, 0x06, 0x00, 0x00, 0x00,
148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05, 0x0a, 0x00, 0x05, 0x05, 0x00, 0x00,
149 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
159 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
162 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x82, 0x53, 0x63, 0x35, 0x01, 0x05, 0x01, 0x04, 0xff,
163 0xff, 0xff, 0x00, 0x03, 0x04, 0x0a, 0x00, 0x05, 0x01, 0x33, 0x04, 0xff, 0xff, 0xff, 0xff, 0x36,
164 0x04, 0x0a, 0x00, 0x05, 0x01, 0xff
165};
166
167/**
168 * ARP reply to the guest (client) over the Hyper-V debug transport.
169 *
170 * - MAC: Destination: 00:00:00:00:00 (client)
171 * - MAC: Source: 00:00:00:00:01 (hypervisor)
172 * - ARP: Reply: 10.0.5.1 is at Source MAC address.
173 */
174static const uint8_t g_abArpReply[] =
175{
176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x06, 0x00, 0x01,
177 0x08, 0x00, 0x06, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0a, 0x00, 0x05, 0x01,
178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0x05
179};
180
181
182/*********************************************************************************************************************************
183* Internal Functions *
184*********************************************************************************************************************************/
185static int gimR3HvInitHypercallSupport(PVM pVM);
186static void gimR3HvTermHypercallSupport(PVM pVM);
187static int gimR3HvInitDebugSupport(PVM pVM);
188static void gimR3HvTermDebugSupport(PVM pVM);
189static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, PTMTIMER pTimer, void *pvUser);
190
191/**
192 * Initializes the Hyper-V GIM provider.
193 *
194 * @returns VBox status code.
195 * @param pVM The cross context VM structure.
196 * @param pGimCfg The GIM CFGM node.
197 */
198VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM, PCFGMNODE pGimCfg)
199{
200 AssertReturn(pVM, VERR_INVALID_PARAMETER);
201 AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
202
203 PGIMHV pHv = &pVM->gim.s.u.Hv;
204
205 /*
206 * Read configuration.
207 */
208 PCFGMNODE pCfgHv = CFGMR3GetChild(pGimCfg, "HyperV");
209 if (pCfgHv)
210 {
211 /*
212 * Validate the Hyper-V settings.
213 */
214 int rc2 = CFGMR3ValidateConfig(pCfgHv, "/HyperV/",
215 "VendorID"
216 "|VSInterface"
217 "|HypercallDebugInterface",
218 "" /* pszValidNodes */, "GIM/HyperV" /* pszWho */, 0 /* uInstance */);
219 if (RT_FAILURE(rc2))
220 return rc2;
221 }
222
223 /** @cfgm{/GIM/HyperV/VendorID, string, 'VBoxVBoxVBox'}
224 * The Hyper-V vendor signature, must be 12 characters. */
225 char szVendor[13];
226 int rc = CFGMR3QueryStringDef(pCfgHv, "VendorID", szVendor, sizeof(szVendor), "VBoxVBoxVBox");
227 AssertLogRelRCReturn(rc, rc);
228 AssertLogRelMsgReturn(strlen(szVendor) == 12,
229 ("The VendorID config value must be exactly 12 chars, '%s' isn't!\n", szVendor),
230 VERR_INVALID_PARAMETER);
231
232 LogRel(("GIM: HyperV: Reporting vendor as '%s'\n", szVendor));
233 /** @todo r=bird: GIM_HV_VENDOR_MICROSOFT is 12 char and the string is max
234 * 12+terminator, so the NCmp is a little bit misleading. */
235 if (!RTStrNCmp(szVendor, GIM_HV_VENDOR_MICROSOFT, sizeof(GIM_HV_VENDOR_MICROSOFT) - 1))
236 {
237 LogRel(("GIM: HyperV: Warning! Posing as the Microsoft vendor may alter guest behaviour!\n"));
238 pHv->fIsVendorMsHv = true;
239 }
240
241 /** @cfgm{/GIM/HyperV/VSInterface, bool, true}
242 * The Microsoft virtualization service interface (debugging). */
243 rc = CFGMR3QueryBoolDef(pCfgHv, "VSInterface", &pHv->fIsInterfaceVs, false);
244 AssertLogRelRCReturn(rc, rc);
245
246 /** @cfgm{/GIM/HyperV/HypercallDebugInterface, bool, false}
247 * Whether we specify the guest to use hypercalls for debugging rather than MSRs. */
248 rc = CFGMR3QueryBoolDef(pCfgHv, "HypercallDebugInterface", &pHv->fDbgHypercallInterface, false);
249 AssertLogRelRCReturn(rc, rc);
250
251 /*
252 * Determine interface capabilities based on the version.
253 */
254 if (!pVM->gim.s.u32Version)
255 {
256 /* Basic features. */
257 pHv->uBaseFeat = 0
258 //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
259 | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
260 //| GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS // Both required for synethetic timers
261 //| GIM_HV_BASE_FEAT_STIMER_MSRS // Both required for synethetic timers
262 | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
263 | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
264 | GIM_HV_BASE_FEAT_VP_ID_MSR
265 | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
266 //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
267 | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
268 //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
269 | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
270 //| GIM_HV_BASE_FEAT_DEBUG_MSRS
271 ;
272
273 /* Miscellaneous features. */
274 pHv->uMiscFeat = 0
275 //| GIM_HV_MISC_FEAT_GUEST_DEBUGGING
276 //| GIM_HV_MISC_FEAT_XMM_HYPERCALL_INPUT
277 | GIM_HV_MISC_FEAT_TIMER_FREQ
278 | GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS
279 //| GIM_HV_MISC_FEAT_DEBUG_MSRS
280 ;
281
282 /* Hypervisor recommendations to the guest. */
283 pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
284 | GIM_HV_HINT_RELAX_TIME_CHECKS
285 | GIM_HV_HINT_X2APIC_MSRS
286 ;
287
288 /* Partition features. */
289 pHv->uPartFlags |= GIM_HV_PART_FLAGS_EXTENDED_HYPERCALLS;
290
291 /* Expose more if we're posing as Microsoft. We can, if needed, force MSR-based Hv
292 debugging by not exposing these bits while exposing the VS interface. The better
293 way is what we do currently, via the GIM_HV_DEBUG_OPTIONS_USE_HYPERCALLS bit. */
294 if (pHv->fIsVendorMsHv)
295 {
296 pHv->uMiscFeat |= GIM_HV_MISC_FEAT_GUEST_DEBUGGING
297 | GIM_HV_MISC_FEAT_DEBUG_MSRS;
298
299 pHv->uPartFlags |= GIM_HV_PART_FLAGS_DEBUGGING;
300 }
301 }
302
303 /*
304 * Populate the required fields in MMIO2 region records for registering.
305 */
306 AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
307 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
308 pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
309 pRegion->fRCMapping = false;
310 pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
311 pRegion->GCPhysPage = NIL_RTGCPHYS;
312 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
313
314 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
315 pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
316 pRegion->fRCMapping = false;
317 pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
318 pRegion->GCPhysPage = NIL_RTGCPHYS;
319 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
320
321 /*
322 * Make sure the CPU ID bit are in accordance to the Hyper-V
323 * requirement and other paranoia checks.
324 * See "Requirements for implementing the Microsoft hypervisor interface" spec.
325 */
326 Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
327 | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
328 | GIM_HV_PART_FLAGS_ACCESS_PART_ID
329 | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
330 | GIM_HV_PART_FLAGS_CREATE_PORT
331 | GIM_HV_PART_FLAGS_ACCESS_STATS
332 | GIM_HV_PART_FLAGS_CPU_MGMT
333 | GIM_HV_PART_FLAGS_CPU_PROFILER)));
334 Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
335 == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
336#ifdef VBOX_STRICT
337 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
338 {
339 PCGIMMMIO2REGION pCur = &pHv->aMmio2Regions[i];
340 Assert(!pCur->fRCMapping);
341 Assert(!pCur->fMapped);
342 Assert(pCur->GCPhysPage == NIL_RTGCPHYS);
343 }
344#endif
345
346 /*
347 * Expose HVP (Hypervisor Present) bit to the guest.
348 */
349 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
350
351 /*
352 * Modify the standard hypervisor leaves for Hyper-V.
353 */
354 CPUMCPUIDLEAF HyperLeaf;
355 RT_ZERO(HyperLeaf);
356 HyperLeaf.uLeaf = UINT32_C(0x40000000);
357 if ( pHv->fIsVendorMsHv
358 && pHv->fIsInterfaceVs)
359 HyperLeaf.uEax = UINT32_C(0x40000082); /* Since we expose 0x40000082 below for the Hyper-V PV-debugging case. */
360 else
361 HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V default is 0x40000005. */
362 /*
363 * Don't report vendor as 'Microsoft Hv'[1] by default, see @bugref{7270#c152}.
364 * [1]: ebx=0x7263694d ('rciM') ecx=0x666f736f ('foso') edx=0x76482074 ('vH t')
365 */
366 {
367 uint32_t uVendorEbx;
368 uint32_t uVendorEcx;
369 uint32_t uVendorEdx;
370 uVendorEbx = ((uint32_t)szVendor[ 3]) << 24 | ((uint32_t)szVendor[ 2]) << 16 | ((uint32_t)szVendor[1]) << 8
371 | (uint32_t)szVendor[ 0];
372 uVendorEcx = ((uint32_t)szVendor[ 7]) << 24 | ((uint32_t)szVendor[ 6]) << 16 | ((uint32_t)szVendor[5]) << 8
373 | (uint32_t)szVendor[ 4];
374 uVendorEdx = ((uint32_t)szVendor[11]) << 24 | ((uint32_t)szVendor[10]) << 16 | ((uint32_t)szVendor[9]) << 8
375 | (uint32_t)szVendor[ 8];
376 HyperLeaf.uEbx = uVendorEbx;
377 HyperLeaf.uEcx = uVendorEcx;
378 HyperLeaf.uEdx = uVendorEdx;
379 }
380 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
381 AssertLogRelRCReturn(rc, rc);
382
383 HyperLeaf.uLeaf = UINT32_C(0x40000001);
384 HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
385 HyperLeaf.uEbx = 0; /* Reserved */
386 HyperLeaf.uEcx = 0; /* Reserved */
387 HyperLeaf.uEdx = 0; /* Reserved */
388 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
389 AssertLogRelRCReturn(rc, rc);
390
391 /*
392 * Add Hyper-V specific leaves.
393 */
394 HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
395 HyperLeaf.uEax = 0;
396 HyperLeaf.uEbx = 0;
397 HyperLeaf.uEcx = 0;
398 HyperLeaf.uEdx = 0;
399 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
400 AssertLogRelRCReturn(rc, rc);
401
402 HyperLeaf.uLeaf = UINT32_C(0x40000003);
403 HyperLeaf.uEax = pHv->uBaseFeat;
404 HyperLeaf.uEbx = pHv->uPartFlags;
405 HyperLeaf.uEcx = pHv->uPowMgmtFeat;
406 HyperLeaf.uEdx = pHv->uMiscFeat;
407 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
408 AssertLogRelRCReturn(rc, rc);
409
410 HyperLeaf.uLeaf = UINT32_C(0x40000004);
411 HyperLeaf.uEax = pHv->uHyperHints;
412 HyperLeaf.uEbx = 0xffffffff;
413 HyperLeaf.uEcx = 0;
414 HyperLeaf.uEdx = 0;
415 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
416 AssertLogRelRCReturn(rc, rc);
417
418 RT_ZERO(HyperLeaf);
419 HyperLeaf.uLeaf = UINT32_C(0x40000005);
420 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
421 AssertLogRelRCReturn(rc, rc);
422
423 /* Leaf 0x40000006 is inserted in gimR3HvInitCompleted(). */
424
425 if ( pHv->fIsVendorMsHv
426 && pHv->fIsInterfaceVs)
427 {
428 HyperLeaf.uLeaf = UINT32_C(0x40000080);
429 HyperLeaf.uEax = 0;
430 HyperLeaf.uEbx = 0x7263694d; /* 'rciM' */
431 HyperLeaf.uEcx = 0x666f736f; /* 'foso'*/
432 HyperLeaf.uEdx = 0x53562074; /* 'SV t' */
433 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
434 AssertLogRelRCReturn(rc, rc);
435
436 HyperLeaf.uLeaf = UINT32_C(0x40000081);
437 HyperLeaf.uEax = 0x31235356; /* '1#SV' */
438 HyperLeaf.uEbx = 0;
439 HyperLeaf.uEcx = 0;
440 HyperLeaf.uEdx = 0;
441 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
442 AssertLogRelRCReturn(rc, rc);
443
444 HyperLeaf.uLeaf = UINT32_C(0x40000082);
445 HyperLeaf.uEax = RT_BIT_32(1);
446 HyperLeaf.uEbx = 0;
447 HyperLeaf.uEcx = 0;
448 HyperLeaf.uEdx = 0;
449 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
450 AssertLogRelRCReturn(rc, rc);
451 }
452
453 /*
454 * Insert all MSR ranges of Hyper-V.
455 */
456 for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
457 {
458 int rc2 = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
459 AssertLogRelRCReturn(rc2, rc2);
460 }
461
462 /*
463 * Setup non-zero MSRs.
464 */
465 if (pHv->uMiscFeat & GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS)
466 pHv->uCrashCtlMsr = MSR_GIM_HV_CRASH_CTL_NOTIFY;
467 for (VMCPUID i = 0; i < pVM->cCpus; i++)
468 {
469 PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
470 for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
471 pHvCpu->auSintMsrs[idxSintMsr] = MSR_GIM_HV_SINT_MASKED;
472 }
473
474 /*
475 * Setup hypercall support.
476 */
477 rc = gimR3HvInitHypercallSupport(pVM);
478 AssertLogRelRCReturn(rc, rc);
479
480 /*
481 * Setup debug support.
482 */
483 rc = gimR3HvInitDebugSupport(pVM);
484 AssertLogRelRCReturn(rc, rc);
485
486 /*
487 * Setup up the per-VCPU synthetic timers.
488 */
489 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS)
490 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS))
491 {
492 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
493 {
494 PVMCPU pVCpu = &pVM->aCpus[idCpu];
495 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
496
497 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
498 {
499 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
500
501 /* Associate the synthetic timer with its corresponding VCPU. */
502 pHvStimer->idCpu = pVCpu->idCpu;
503 pHvStimer->idxStimer = idxStimer;
504
505 /* Create the timer and associate the context pointers. */
506 RTStrPrintf(&pHvStimer->szTimerDesc[0], sizeof(pHvStimer->szTimerDesc), "Hyper-V[%u] Timer%u", pVCpu->idCpu,
507 idxStimer);
508 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_VIRTUAL_SYNC, gimR3HvTimerCallback, pHvStimer /* pvUser */,
509 pHvStimer->szTimerDesc, &pHvStimer->pTimerR3);
510 AssertLogRelRCReturn(rc, rc);
511 pHvStimer->pTimerR0 = TMTimerR0Ptr(pHvStimer->pTimerR3);
512 pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3);
513 }
514 }
515 }
516
517 /*
518 * Register statistics.
519 */
520 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
521 {
522 PVMCPU pVCpu = &pVM->aCpus[idCpu];
523 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
524
525 for (size_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired); idxStimer++)
526 {
527 int rc2 = STAMR3RegisterF(pVM, &pHvCpu->aStatStimerFired[idxStimer], STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS,
528 STAMUNIT_OCCURENCES, "Number of times the synthetic timer fired.",
529 "/GIM/HyperV/%u/Stimer%u_Fired", idCpu, idxStimer);
530 AssertLogRelRCReturn(rc2, rc2);
531 }
532 }
533
534 return VINF_SUCCESS;
535}
536
537
538/**
539 * Initializes remaining bits of the Hyper-V provider.
540 *
541 * This is called after initializing HM and almost all other VMM components.
542 *
543 * @returns VBox status code.
544 * @param pVM The cross context VM structure.
545 */
546VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
547{
548 PGIMHV pHv = &pVM->gim.s.u.Hv;
549 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
550
551 /*
552 * Determine interface capabilities based on the version.
553 */
554 if (!pVM->gim.s.u32Version)
555 {
556 /* Hypervisor capabilities; features used by the hypervisor. */
557 pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
558 pHv->uHyperCaps |= HMIsMsrBitmapActive(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
559 }
560
561 CPUMCPUIDLEAF HyperLeaf;
562 RT_ZERO(HyperLeaf);
563 HyperLeaf.uLeaf = UINT32_C(0x40000006);
564 HyperLeaf.uEax = pHv->uHyperCaps;
565 HyperLeaf.uEbx = 0;
566 HyperLeaf.uEcx = 0;
567 HyperLeaf.uEdx = 0;
568 int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
569 AssertLogRelRCReturn(rc, rc);
570
571 /*
572 * Inform APIC whether Hyper-V compatibility mode is enabled or not.
573 * Do this here rather than on gimR3HvInit() as it gets called after APIC
574 * has finished inserting/removing the x2APIC MSR range.
575 */
576 if (pHv->uHyperHints & GIM_HV_HINT_X2APIC_MSRS)
577 APICR3HvSetCompatMode(pVM, true);
578
579 return rc;
580}
581
582
583/**
584 * Terminates the Hyper-V GIM provider.
585 *
586 * @returns VBox status code.
587 * @param pVM The cross context VM structure.
588 */
589VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
590{
591 gimR3HvReset(pVM);
592 gimR3HvTermHypercallSupport(pVM);
593 gimR3HvTermDebugSupport(pVM);
594
595 PCGIMHV pHv = &pVM->gim.s.u.Hv;
596 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS)
597 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS))
598 {
599 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
600 {
601 PGIMHVCPU pHvCpu = &pVM->aCpus[idCpu].gim.s.u.HvCpu;
602 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
603 {
604 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
605 TMR3TimerDestroy(pHvStimer->pTimerR3);
606 }
607 }
608 }
609
610 return VINF_SUCCESS;
611}
612
613
614/**
615 * Applies relocations to data and code managed by this
616 * component. This function will be called at init and
617 * whenever the VMM need to relocate it self inside the GC.
618 *
619 * @param pVM The cross context VM structure.
620 * @param offDelta Relocation delta relative to old location.
621 */
622VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
623{
624 RT_NOREF1(offDelta);
625
626 PCGIMHV pHv = &pVM->gim.s.u.Hv;
627 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS)
628 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS))
629 {
630 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
631 {
632 PGIMHVCPU pHvCpu = &pVM->aCpus[idCpu].gim.s.u.HvCpu;
633 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
634 {
635 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
636 pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3);
637 }
638 }
639 }
640}
641
642
643/**
644 * This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
645 * the guest may have mapped.
646 *
647 * This is called when the VM is being reset.
648 *
649 * @param pVM The cross context VM structure.
650 *
651 * @thread EMT(0)
652 */
653VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
654{
655 VM_ASSERT_EMT0(pVM);
656
657 /*
658 * Unmap MMIO2 pages that the guest may have setup.
659 */
660 LogRel(("GIM: HyperV: Resetting MMIO2 regions and MSRs\n"));
661 PGIMHV pHv = &pVM->gim.s.u.Hv;
662 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
663 {
664 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
665#if 0
666 gimR3Mmio2Unmap(pVM, pRegion);
667#else
668 pRegion->fMapped = false;
669 pRegion->GCPhysPage = NIL_RTGCPHYS;
670#endif
671 }
672
673 /*
674 * Reset MSRs.
675 */
676 pHv->u64GuestOsIdMsr = 0;
677 pHv->u64HypercallMsr = 0;
678 pHv->u64TscPageMsr = 0;
679 pHv->uCrashP0Msr = 0;
680 pHv->uCrashP1Msr = 0;
681 pHv->uCrashP2Msr = 0;
682 pHv->uCrashP3Msr = 0;
683 pHv->uCrashP4Msr = 0;
684 pHv->uDbgStatusMsr = 0;
685 pHv->uDbgPendingBufferMsr = 0;
686 pHv->uDbgSendBufferMsr = 0;
687 pHv->uDbgRecvBufferMsr = 0;
688 for (VMCPUID i = 0; i < pVM->cCpus; i++)
689 {
690 PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
691 pHvCpu->uSControlMsr = 0;
692 pHvCpu->uSimpMsr = 0;
693 pHvCpu->uSiefpMsr = 0;
694 pHvCpu->uApicAssistPageMsr = 0;
695
696 for (uint8_t idxSint = 0; idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSint++)
697 pHvCpu->auSintMsrs[idxSint] = MSR_GIM_HV_SINT_MASKED;
698
699 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++)
700 {
701 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer];
702 pHvStimer->uStimerConfigMsr = 0;
703 pHvStimer->uStimerCountMsr = 0;
704 }
705 }
706}
707
708
709/**
710 * Returns a pointer to the MMIO2 regions supported by Hyper-V.
711 *
712 * @returns Pointer to an array of MMIO2 regions.
713 * @param pVM The cross context VM structure.
714 * @param pcRegions Where to store the number of regions in the array.
715 */
716VMMR3_INT_DECL(PGIMMMIO2REGION) gimR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
717{
718 Assert(GIMIsEnabled(pVM));
719 PGIMHV pHv = &pVM->gim.s.u.Hv;
720
721 *pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
722 Assert(*pcRegions <= UINT8_MAX); /* See PGMR3PhysMMIO2Register(). */
723 return pHv->aMmio2Regions;
724}
725
726
727/**
728 * Callback for when debug data is available over the debugger connection.
729 *
730 * @param pVM The cross context VM structure.
731 */
732static DECLCALLBACK(void) gimR3HvDebugBufAvail(PVM pVM)
733{
734 PGIMHV pHv = &pVM->gim.s.u.Hv;
735 RTGCPHYS GCPhysPendingBuffer = pHv->uDbgPendingBufferMsr;
736 if ( GCPhysPendingBuffer
737 && PGMPhysIsGCPhysNormal(pVM, GCPhysPendingBuffer))
738 {
739 uint8_t bPendingData = 1;
740 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysPendingBuffer, &bPendingData, sizeof(bPendingData));
741 if (RT_FAILURE(rc))
742 {
743 LogRelMax(5, ("GIM: HyperV: Failed to set pending debug receive buffer at %#RGp, rc=%Rrc\n", GCPhysPendingBuffer,
744 rc));
745 }
746 }
747}
748
749
750/**
751 * Callback for when debug data has been read from the debugger connection.
752 *
753 * This will be invoked before signalling read of the next debug buffer.
754 *
755 * @param pVM The cross context VM structure.
756 */
757static DECLCALLBACK(void) gimR3HvDebugBufReadCompleted(PVM pVM)
758{
759 PGIMHV pHv = &pVM->gim.s.u.Hv;
760 RTGCPHYS GCPhysPendingBuffer = pHv->uDbgPendingBufferMsr;
761 if ( GCPhysPendingBuffer
762 && PGMPhysIsGCPhysNormal(pVM, GCPhysPendingBuffer))
763 {
764 uint8_t bPendingData = 0;
765 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysPendingBuffer, &bPendingData, sizeof(bPendingData));
766 if (RT_FAILURE(rc))
767 {
768 LogRelMax(5, ("GIM: HyperV: Failed to clear pending debug receive buffer at %#RGp, rc=%Rrc\n", GCPhysPendingBuffer,
769 rc));
770 }
771 }
772}
773
774
775/**
776 * Get Hyper-V debug setup parameters.
777 *
778 * @returns VBox status code.
779 * @param pVM The cross context VM structure.
780 * @param pDbgSetup Where to store the debug setup details.
781 */
782VMMR3_INT_DECL(int) gimR3HvGetDebugSetup(PVM pVM, PGIMDEBUGSETUP pDbgSetup)
783{
784 Assert(pDbgSetup);
785 PGIMHV pHv = &pVM->gim.s.u.Hv;
786 if (pHv->fDbgEnabled)
787 {
788 pDbgSetup->pfnDbgRecvBufAvail = gimR3HvDebugBufAvail;
789 pDbgSetup->cbDbgRecvBuf = GIM_HV_PAGE_SIZE;
790 return VINF_SUCCESS;
791 }
792 return VERR_GIM_NO_DEBUG_CONNECTION;
793}
794
795
796/**
797 * Hyper-V state-save operation.
798 *
799 * @returns VBox status code.
800 * @param pVM The cross context VM structure.
801 * @param pSSM The saved state handle.
802 */
803VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
804{
805 PCGIMHV pHv = &pVM->gim.s.u.Hv;
806
807 /*
808 * Save the Hyper-V SSM version.
809 */
810 SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
811
812 /*
813 * Save per-VM MSRs.
814 */
815 SSMR3PutU64(pSSM, pHv->u64GuestOsIdMsr);
816 SSMR3PutU64(pSSM, pHv->u64HypercallMsr);
817 SSMR3PutU64(pSSM, pHv->u64TscPageMsr);
818
819 /*
820 * Save Hyper-V features / capabilities.
821 */
822 SSMR3PutU32(pSSM, pHv->uBaseFeat);
823 SSMR3PutU32(pSSM, pHv->uPartFlags);
824 SSMR3PutU32(pSSM, pHv->uPowMgmtFeat);
825 SSMR3PutU32(pSSM, pHv->uMiscFeat);
826 SSMR3PutU32(pSSM, pHv->uHyperHints);
827 SSMR3PutU32(pSSM, pHv->uHyperCaps);
828
829 /*
830 * Save the Hypercall region.
831 */
832 PCGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
833 SSMR3PutU8(pSSM, pRegion->iRegion);
834 SSMR3PutBool(pSSM, pRegion->fRCMapping);
835 SSMR3PutU32(pSSM, pRegion->cbRegion);
836 SSMR3PutGCPhys(pSSM, pRegion->GCPhysPage);
837 SSMR3PutStrZ(pSSM, pRegion->szDescription);
838
839 /*
840 * Save the reference TSC region.
841 */
842 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
843 SSMR3PutU8(pSSM, pRegion->iRegion);
844 SSMR3PutBool(pSSM, pRegion->fRCMapping);
845 SSMR3PutU32(pSSM, pRegion->cbRegion);
846 SSMR3PutGCPhys(pSSM, pRegion->GCPhysPage);
847 SSMR3PutStrZ(pSSM, pRegion->szDescription);
848 /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
849 uint32_t uTscSequence = 0;
850 if ( pRegion->fMapped
851 && MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
852 {
853 PCGIMHVREFTSC pRefTsc = (PCGIMHVREFTSC)pRegion->pvPageR3;
854 uTscSequence = pRefTsc->u32TscSequence;
855 }
856 SSMR3PutU32(pSSM, uTscSequence);
857
858 /*
859 * Save debug support data.
860 */
861 SSMR3PutU64(pSSM, pHv->uDbgPendingBufferMsr);
862 SSMR3PutU64(pSSM, pHv->uDbgSendBufferMsr);
863 SSMR3PutU64(pSSM, pHv->uDbgRecvBufferMsr);
864 SSMR3PutU64(pSSM, pHv->uDbgStatusMsr);
865 SSMR3PutU32(pSSM, pHv->enmDbgReply);
866 SSMR3PutU32(pSSM, pHv->uDbgBootpXId);
867 SSMR3PutU32(pSSM, pHv->DbgGuestIp4Addr.u);
868 SSMR3PutU16(pSSM, pHv->uUdpGuestDstPort);
869 SSMR3PutU16(pSSM, pHv->uUdpGuestSrcPort);
870
871 for (VMCPUID i = 0; i < pVM->cCpus; i++)
872 {
873 PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
874 SSMR3PutU64(pSSM, pHvCpu->uSimpMsr);
875 for (size_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
876 SSMR3PutU64(pSSM, pHvCpu->auSintMsrs[idxSintMsr]);
877 }
878
879 return SSMR3PutU8(pSSM, UINT8_MAX);
880}
881
882
883/**
884 * Hyper-V state-load operation, final pass.
885 *
886 * @returns VBox status code.
887 * @param pVM The cross context VM structure.
888 * @param pSSM The saved state handle.
889 */
890VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM)
891{
892 /*
893 * Load the Hyper-V SSM version first.
894 */
895 uint32_t uHvSavedStateVersion;
896 int rc = SSMR3GetU32(pSSM, &uHvSavedStateVersion);
897 AssertRCReturn(rc, rc);
898 if ( uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION
899 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS
900 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC
901 && uHvSavedStateVersion != GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
902 return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
903 N_("Unsupported Hyper-V saved-state version %u (current %u)!"),
904 uHvSavedStateVersion, GIM_HV_SAVED_STATE_VERSION);
905
906 /*
907 * Update the TSC frequency from TM.
908 */
909 PGIMHV pHv = &pVM->gim.s.u.Hv;
910 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
911
912 /*
913 * Load per-VM MSRs.
914 */
915 SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
916 SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
917 SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
918
919 /*
920 * Load Hyper-V features / capabilities.
921 */
922 SSMR3GetU32(pSSM, &pHv->uBaseFeat);
923 SSMR3GetU32(pSSM, &pHv->uPartFlags);
924 SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
925 SSMR3GetU32(pSSM, &pHv->uMiscFeat);
926 SSMR3GetU32(pSSM, &pHv->uHyperHints);
927 SSMR3GetU32(pSSM, &pHv->uHyperCaps);
928
929 /*
930 * Load and enable the Hypercall region.
931 */
932 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
933 SSMR3GetU8(pSSM, &pRegion->iRegion);
934 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
935 SSMR3GetU32(pSSM, &pRegion->cbRegion);
936 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
937 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
938 AssertRCReturn(rc, rc);
939
940 if (pRegion->cbRegion != PAGE_SIZE)
941 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall page region size %u invalid, expected %u"),
942 pRegion->cbRegion, PAGE_SIZE);
943
944 if (MSR_GIM_HV_HYPERCALL_PAGE_IS_ENABLED(pHv->u64HypercallMsr))
945 {
946 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
947 if (RT_LIKELY(pRegion->fRegistered))
948 {
949 rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
950 if (RT_FAILURE(rc))
951 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
952 pRegion->GCPhysPage, rc);
953 }
954 else
955 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
956 }
957
958 /*
959 * Load and enable the reference TSC region.
960 */
961 uint32_t uTscSequence;
962 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
963 SSMR3GetU8(pSSM, &pRegion->iRegion);
964 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
965 SSMR3GetU32(pSSM, &pRegion->cbRegion);
966 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
967 SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
968 rc = SSMR3GetU32(pSSM, &uTscSequence);
969 AssertRCReturn(rc, rc);
970
971 if (pRegion->cbRegion != PAGE_SIZE)
972 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC page region size %u invalid, expected %u"),
973 pRegion->cbRegion, PAGE_SIZE);
974
975 if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
976 {
977 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
978 if (pRegion->fRegistered)
979 {
980 rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
981 if (RT_FAILURE(rc))
982 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
983 pRegion->GCPhysPage, rc);
984 }
985 else
986 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
987 }
988
989 /*
990 * Load the debug support data.
991 */
992 if (uHvSavedStateVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG)
993 {
994 SSMR3GetU64(pSSM, &pHv->uDbgPendingBufferMsr);
995 SSMR3GetU64(pSSM, &pHv->uDbgSendBufferMsr);
996 SSMR3GetU64(pSSM, &pHv->uDbgRecvBufferMsr);
997 SSMR3GetU64(pSSM, &pHv->uDbgStatusMsr);
998 SSMR3GetU32(pSSM, (uint32_t *)&pHv->enmDbgReply);
999 SSMR3GetU32(pSSM, &pHv->uDbgBootpXId);
1000 rc = SSMR3GetU32(pSSM, &pHv->DbgGuestIp4Addr.u);
1001 AssertRCReturn(rc, rc);
1002 if (uHvSavedStateVersion > GIM_HV_SAVED_STATE_VERSION_PRE_DEBUG_UDP_PORTS)
1003 {
1004 rc = SSMR3GetU16(pSSM, &pHv->uUdpGuestDstPort); AssertRCReturn(rc, rc);
1005 rc = SSMR3GetU16(pSSM, &pHv->uUdpGuestSrcPort); AssertRCReturn(rc, rc);
1006 }
1007
1008 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1009 {
1010 PGIMHVCPU pHvCpu = &pVM->aCpus[i].gim.s.u.HvCpu;
1011 SSMR3GetU64(pSSM, &pHvCpu->uSimpMsr);
1012 if (uHvSavedStateVersion <= GIM_HV_SAVED_STATE_VERSION_PRE_SYNIC)
1013 SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[GIM_HV_VMBUS_MSG_SINT]);
1014 else
1015 {
1016 for (uint8_t idxSintMsr = 0; idxSintMsr < RT_ELEMENTS(pHvCpu->auSintMsrs); idxSintMsr++)
1017 SSMR3GetU64(pSSM, &pHvCpu->auSintMsrs[idxSintMsr]);
1018 }
1019 }
1020
1021 uint8_t bDelim;
1022 rc = SSMR3GetU8(pSSM, &bDelim);
1023 }
1024 else
1025 rc = VINF_SUCCESS;
1026
1027 return rc;
1028}
1029
1030
1031/**
1032 * Hyper-V load-done callback.
1033 *
1034 * @returns VBox status code.
1035 * @param pVM The cross context VM structure.
1036 * @param pSSM The saved state handle.
1037 */
1038VMMR3_INT_DECL(int) gimR3HvLoadDone(PVM pVM, PSSMHANDLE pSSM)
1039{
1040 if (RT_SUCCESS(SSMR3HandleGetStatus(pSSM)))
1041 {
1042 /*
1043 * Update EM on whether MSR_GIM_HV_GUEST_OS_ID allows hypercall instructions.
1044 */
1045 if (pVM->gim.s.u.Hv.u64GuestOsIdMsr)
1046 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1047 EMSetHypercallInstructionsEnabled(&pVM->aCpus[i], true);
1048 else
1049 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1050 EMSetHypercallInstructionsEnabled(&pVM->aCpus[i], false);
1051 }
1052 return VINF_SUCCESS;
1053}
1054
1055
1056/**
1057 * Enables the Hyper-V APIC-assist page.
1058 *
1059 * @returns VBox status code.
1060 * @param pVCpu The cross context virtual CPU structure.
1061 * @param GCPhysApicAssistPage Where to map the APIC-assist page.
1062 */
1063VMMR3_INT_DECL(int) gimR3HvEnableApicAssistPage(PVMCPU pVCpu, RTGCPHYS GCPhysApicAssistPage)
1064{
1065 PVM pVM = pVCpu->CTX_SUFF(pVM);
1066 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1067 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1068
1069 /*
1070 * Map the APIC-assist-page at the specified address.
1071 */
1072 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1073 * @bugref{7532}. Instead of the overlay style mapping, we just
1074 * rewrite guest memory directly. */
1075 size_t const cbApicAssistPage = PAGE_SIZE;
1076 void *pvApicAssist = RTMemAllocZ(cbApicAssistPage);
1077 if (RT_LIKELY(pvApicAssist))
1078 {
1079 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysApicAssistPage, pvApicAssist, cbApicAssistPage);
1080 if (RT_SUCCESS(rc))
1081 {
1082 /** @todo Inform APIC. */
1083 LogRel(("GIM%u: HyperV: Enabled APIC-assist page at %#RGp\n", pVCpu->idCpu, GCPhysApicAssistPage));
1084 }
1085 else
1086 {
1087 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1088 rc = VERR_GIM_OPERATION_FAILED;
1089 }
1090
1091 RTMemFree(pvApicAssist);
1092 return rc;
1093 }
1094
1095 LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbApicAssistPage));
1096 return VERR_NO_MEMORY;
1097}
1098
1099
1100/**
1101 * Disables the Hyper-V APIC-assist page.
1102 *
1103 * @returns VBox status code.
1104 * @param pVCpu The cross context virtual CPU structure.
1105 */
1106VMMR3_INT_DECL(int) gimR3HvDisableApicAssistPage(PVMCPU pVCpu)
1107{
1108 LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
1109 /** @todo inform APIC */
1110 return VINF_SUCCESS;
1111}
1112
1113
1114/**
1115 * Hyper-V synthetic timer callback.
1116 *
1117 * @param pVM The cross context VM structure.
1118 * @param pTimer Pointer to timer.
1119 * @param pvUser Pointer to the synthetic timer.
1120 */
1121static DECLCALLBACK(void) gimR3HvTimerCallback(PVM pVM, PTMTIMER pTimer, void *pvUser)
1122{
1123 PGIMHVSTIMER pHvStimer = (PGIMHVSTIMER)pvUser;
1124 Assert(pHvStimer);
1125 Assert(TMTimerIsLockOwner(pTimer)); RT_NOREF(pTimer);
1126 Assert(pHvStimer->idCpu < pVM->cCpus);
1127
1128 PVMCPU pVCpu = &pVM->aCpus[pHvStimer->idCpu];
1129 PGIMHVCPU pHvCpu = &pVCpu->gim.s.u.HvCpu;
1130 Assert(pHvStimer->idxStimer < RT_ELEMENTS(pHvCpu->aStatStimerFired));
1131
1132 STAM_COUNTER_INC(&pHvCpu->aStatStimerFired[pHvStimer->idxStimer]);
1133
1134 uint64_t const uStimerConfig = pHvStimer->uStimerConfigMsr;
1135 uint16_t const idxSint = MSR_GIM_HV_STIMER_GET_SINTX(uStimerConfig);
1136 if (RT_LIKELY(idxSint < RT_ELEMENTS(pHvCpu->auSintMsrs)))
1137 {
1138 uint64_t const uSint = pHvCpu->auSintMsrs[idxSint];
1139 if (!MSR_GIM_HV_SINT_IS_MASKED(uSint))
1140 {
1141 uint8_t const uVector = MSR_GIM_HV_SINT_GET_VECTOR(uSint);
1142 bool const fAutoEoi = MSR_GIM_HV_SINT_IS_AUTOEOI(uSint);
1143 APICHvSendInterrupt(pVCpu, uVector, fAutoEoi, XAPICTRIGGERMODE_EDGE);
1144 }
1145 }
1146
1147 /* Re-arm the timer if it's periodic. */
1148 if (MSR_GIM_HV_STIMER_IS_PERIODIC(uStimerConfig))
1149 gimHvStartStimer(pVCpu, pHvStimer);
1150}
1151
1152
1153/**
1154 * Enables the Hyper-V SIEF page.
1155 *
1156 * @returns VBox status code.
1157 * @param pVCpu The cross context virtual CPU structure.
1158 * @param GCPhysSiefPage Where to map the SIEF page.
1159 */
1160VMMR3_INT_DECL(int) gimR3HvEnableSiefPage(PVMCPU pVCpu, RTGCPHYS GCPhysSiefPage)
1161{
1162 PVM pVM = pVCpu->CTX_SUFF(pVM);
1163 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1164 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1165
1166 /*
1167 * Map the SIEF page at the specified address.
1168 */
1169 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1170 * @bugref{7532}. Instead of the overlay style mapping, we just
1171 * rewrite guest memory directly. */
1172 size_t const cbSiefPage = PAGE_SIZE;
1173 void *pvSiefPage = RTMemAllocZ(cbSiefPage);
1174 if (RT_LIKELY(pvSiefPage))
1175 {
1176 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysSiefPage, pvSiefPage, cbSiefPage);
1177 if (RT_SUCCESS(rc))
1178 {
1179 /** @todo SIEF setup. */
1180 LogRel(("GIM%u: HyperV: Enabled SIEF page at %#RGp\n", pVCpu->idCpu, GCPhysSiefPage));
1181 }
1182 else
1183 {
1184 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1185 rc = VERR_GIM_OPERATION_FAILED;
1186 }
1187
1188 RTMemFree(pvSiefPage);
1189 return rc;
1190 }
1191
1192 LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSiefPage));
1193 return VERR_NO_MEMORY;
1194}
1195
1196
1197/**
1198 * Disables the Hyper-V SIEF page.
1199 *
1200 * @returns VBox status code.
1201 * @param pVCpu The cross context virtual CPU structure.
1202 */
1203VMMR3_INT_DECL(int) gimR3HvDisableSiefPage(PVMCPU pVCpu)
1204{
1205 LogRel(("GIM%u: HyperV: Disabled APIC-assist page\n", pVCpu->idCpu));
1206 /** @todo SIEF teardown. */
1207 return VINF_SUCCESS;
1208}
1209
1210
1211/**
1212 * Enables the Hyper-V TSC page.
1213 *
1214 * @returns VBox status code.
1215 * @param pVM The cross context VM structure.
1216 * @param GCPhysTscPage Where to map the TSC page.
1217 * @param fUseThisTscSeq Whether to set the TSC sequence number to the one
1218 * specified in @a uTscSeq.
1219 * @param uTscSeq The TSC sequence value to use. Ignored if
1220 * @a fUseThisTscSeq is false.
1221 */
1222VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
1223{
1224 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1225 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
1226 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1227
1228 int rc;
1229 if (pRegion->fMapped)
1230 {
1231 /*
1232 * Is it already enabled at the given guest-address?
1233 */
1234 if (pRegion->GCPhysPage == GCPhysTscPage)
1235 return VINF_SUCCESS;
1236
1237 /*
1238 * If it's mapped at a different address, unmap the previous address.
1239 */
1240 rc = gimR3HvDisableTscPage(pVM);
1241 AssertRC(rc);
1242 }
1243
1244 /*
1245 * Map the TSC-page at the specified address.
1246 */
1247 Assert(!pRegion->fMapped);
1248
1249 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1250 * @bugref{7532}. Instead of the overlay style mapping, we just
1251 * rewrite guest memory directly. */
1252#if 0
1253 rc = gimR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
1254 if (RT_SUCCESS(rc))
1255 {
1256 Assert(pRegion->GCPhysPage == GCPhysTscPage);
1257
1258 /*
1259 * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
1260 * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
1261 *
1262 * Also, Hyper-V normalizes the time in 10 MHz, see:
1263 * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
1264 */
1265 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
1266 Assert(pRefTsc);
1267
1268 PGIMHV pHv = &pVM->gim.s.u.Hv;
1269 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
1270 uint32_t u32TscSeq = 1;
1271 if ( fUseThisTscSeq
1272 && uTscSeq < UINT32_C(0xfffffffe))
1273 u32TscSeq = uTscSeq + 1;
1274 pRefTsc->u32TscSequence = u32TscSeq;
1275 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
1276 pRefTsc->i64TscOffset = 0;
1277
1278 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
1279 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
1280
1281 TMR3CpuTickParavirtEnable(pVM);
1282 return VINF_SUCCESS;
1283 }
1284 else
1285 LogRelFunc(("gimR3Mmio2Map failed. rc=%Rrc\n", rc));
1286 return VERR_GIM_OPERATION_FAILED;
1287#else
1288 AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_2);
1289 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)RTMemAllocZ(PAGE_SIZE);
1290 if (RT_UNLIKELY(!pRefTsc))
1291 {
1292 LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
1293 return VERR_NO_MEMORY;
1294 }
1295
1296 PGIMHV pHv = &pVM->gim.s.u.Hv;
1297 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
1298 uint32_t u32TscSeq = 1;
1299 if ( fUseThisTscSeq
1300 && uTscSeq < UINT32_C(0xfffffffe))
1301 u32TscSeq = uTscSeq + 1;
1302 pRefTsc->u32TscSequence = u32TscSeq;
1303 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
1304 pRefTsc->i64TscOffset = 0;
1305
1306 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysTscPage, pRefTsc, sizeof(*pRefTsc));
1307 if (RT_SUCCESS(rc))
1308 {
1309 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
1310 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
1311
1312 pRegion->GCPhysPage = GCPhysTscPage;
1313 pRegion->fMapped = true;
1314 TMR3CpuTickParavirtEnable(pVM);
1315 }
1316 else
1317 {
1318 LogRelFunc(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", rc));
1319 rc = VERR_GIM_OPERATION_FAILED;
1320 }
1321 RTMemFree(pRefTsc);
1322 return rc;
1323#endif
1324}
1325
1326
1327/**
1328 * Enables the Hyper-V SIM page.
1329 *
1330 * @returns VBox status code.
1331 * @param pVCpu The cross context virtual CPU structure.
1332 * @param GCPhysSimPage Where to map the SIM page.
1333 */
1334VMMR3_INT_DECL(int) gimR3HvEnableSimPage(PVMCPU pVCpu, RTGCPHYS GCPhysSimPage)
1335{
1336 PVM pVM = pVCpu->CTX_SUFF(pVM);
1337 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1338 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1339
1340 /*
1341 * Map the SIMP page at the specified address.
1342 */
1343 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1344 * @bugref{7532}. Instead of the overlay style mapping, we just
1345 * rewrite guest memory directly. */
1346 size_t const cbSimPage = PAGE_SIZE;
1347 void *pvSimPage = RTMemAllocZ(cbSimPage);
1348 if (RT_LIKELY(pvSimPage))
1349 {
1350 int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysSimPage, pvSimPage, cbSimPage);
1351 if (RT_SUCCESS(rc))
1352 {
1353 /** @todo SIM setup. */
1354 LogRel(("GIM%u: HyperV: Enabled SIM page at %#RGp\n", pVCpu->idCpu, GCPhysSimPage));
1355 }
1356 else
1357 {
1358 LogRelFunc(("GIM%u: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", pVCpu->idCpu, rc));
1359 rc = VERR_GIM_OPERATION_FAILED;
1360 }
1361
1362 RTMemFree(pvSimPage);
1363 return rc;
1364 }
1365
1366 LogRelFunc(("GIM%u: HyperV: Failed to alloc %u bytes\n", pVCpu->idCpu, cbSimPage));
1367 return VERR_NO_MEMORY;
1368}
1369
1370
1371/**
1372 * Disables the Hyper-V SIM page.
1373 *
1374 * @returns VBox status code.
1375 * @param pVCpu The cross context virtual CPU structure.
1376 */
1377VMMR3_INT_DECL(int) gimR3HvDisableSimPage(PVMCPU pVCpu)
1378{
1379 LogRel(("GIM%u: HyperV: Disabled SIM page\n", pVCpu->idCpu));
1380 /** @todo SIM teardown. */
1381 return VINF_SUCCESS;
1382}
1383
1384
1385
1386/**
1387 * Disables the Hyper-V TSC page.
1388 *
1389 * @returns VBox status code.
1390 * @param pVM The cross context VM structure.
1391 */
1392VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
1393{
1394 PGIMHV pHv = &pVM->gim.s.u.Hv;
1395 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
1396 if (pRegion->fMapped)
1397 {
1398#if 0
1399 gimR3Mmio2Unmap(pVM, pRegion);
1400 Assert(!pRegion->fMapped);
1401#else
1402 pRegion->fMapped = false;
1403#endif
1404 LogRel(("GIM: HyperV: Disabled TSC page\n"));
1405
1406 TMR3CpuTickParavirtDisable(pVM);
1407 return VINF_SUCCESS;
1408 }
1409 return VERR_GIM_PVTSC_NOT_ENABLED;
1410}
1411
1412
1413/**
1414 * Disables the Hyper-V Hypercall page.
1415 *
1416 * @returns VBox status code.
1417 */
1418VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
1419{
1420 PGIMHV pHv = &pVM->gim.s.u.Hv;
1421 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
1422 if (pRegion->fMapped)
1423 {
1424#if 0
1425 gimR3Mmio2Unmap(pVM, pRegion);
1426 Assert(!pRegion->fMapped);
1427#else
1428 pRegion->fMapped = false;
1429#endif
1430 LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
1431 return VINF_SUCCESS;
1432 }
1433 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
1434}
1435
1436
1437/**
1438 * Enables the Hyper-V Hypercall page.
1439 *
1440 * @returns VBox status code.
1441 * @param pVM The cross context VM structure.
1442 * @param GCPhysHypercallPage Where to map the hypercall page.
1443 */
1444VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
1445{
1446 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
1447 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
1448 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
1449
1450 if (pRegion->fMapped)
1451 {
1452 /*
1453 * Is it already enabled at the given guest-address?
1454 */
1455 if (pRegion->GCPhysPage == GCPhysHypercallPage)
1456 return VINF_SUCCESS;
1457
1458 /*
1459 * If it's mapped at a different address, unmap the previous address.
1460 */
1461 int rc2 = gimR3HvDisableHypercallPage(pVM);
1462 AssertRC(rc2);
1463 }
1464
1465 /*
1466 * Map the hypercall-page at the specified address.
1467 */
1468 Assert(!pRegion->fMapped);
1469
1470 /** @todo this is buggy when large pages are used due to a PGM limitation, see
1471 * @bugref{7532}. Instead of the overlay style mapping, we just
1472 * rewrite guest memory directly. */
1473#if 0
1474 int rc = gimR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
1475 if (RT_SUCCESS(rc))
1476 {
1477 Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
1478
1479 /*
1480 * Patch the hypercall-page.
1481 */
1482 size_t cbWritten = 0;
1483 rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
1484 if ( RT_SUCCESS(rc)
1485 && cbWritten < PAGE_SIZE)
1486 {
1487 uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
1488 *pbLast = 0xc3; /* RET */
1489
1490 /*
1491 * Notify VMM that hypercalls are now enabled for all VCPUs.
1492 */
1493 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1494 VMMHypercallsEnable(&pVM->aCpus[i]);
1495
1496 LogRel(("GIM: HyperV: Enabled hypercall page at %#RGp\n", GCPhysHypercallPage));
1497 return VINF_SUCCESS;
1498 }
1499 else
1500 {
1501 if (rc == VINF_SUCCESS)
1502 rc = VERR_GIM_OPERATION_FAILED;
1503 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
1504 }
1505
1506 gimR3Mmio2Unmap(pVM, pRegion);
1507 }
1508
1509 LogRel(("GIM: HyperV: gimR3Mmio2Map failed. rc=%Rrc\n", rc));
1510 return rc;
1511#else
1512 AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_3);
1513 void *pvHypercallPage = RTMemAllocZ(PAGE_SIZE);
1514 if (RT_UNLIKELY(!pvHypercallPage))
1515 {
1516 LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
1517 return VERR_NO_MEMORY;
1518 }
1519
1520 /*
1521 * Patch the hypercall-page.
1522 */
1523 size_t cbHypercall = 0;
1524 int rc = GIMQueryHypercallOpcodeBytes(pVM, pvHypercallPage, PAGE_SIZE, &cbHypercall, NULL /*puDisOpcode*/);
1525 if ( RT_SUCCESS(rc)
1526 && cbHypercall < PAGE_SIZE)
1527 {
1528 uint8_t *pbLast = (uint8_t *)pvHypercallPage + cbHypercall;
1529 *pbLast = 0xc3; /* RET */
1530
1531 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysHypercallPage, pvHypercallPage, PAGE_SIZE);
1532 if (RT_SUCCESS(rc))
1533 {
1534 pRegion->GCPhysPage = GCPhysHypercallPage;
1535 pRegion->fMapped = true;
1536 LogRel(("GIM: HyperV: Enabled hypercall page at %#RGp\n", GCPhysHypercallPage));
1537 }
1538 else
1539 LogRel(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed during hypercall page setup. rc=%Rrc\n", rc));
1540 }
1541 else
1542 {
1543 if (rc == VINF_SUCCESS)
1544 rc = VERR_GIM_OPERATION_FAILED;
1545 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbHypercall=%u\n", rc, cbHypercall));
1546 }
1547
1548 RTMemFree(pvHypercallPage);
1549 return rc;
1550#endif
1551}
1552
1553
1554/**
1555 * Initializes Hyper-V guest hypercall support.
1556 *
1557 * @returns VBox status code.
1558 * @param pVM The cross context VM structure.
1559 */
1560static int gimR3HvInitHypercallSupport(PVM pVM)
1561{
1562 PGIMHV pHv = &pVM->gim.s.u.Hv;
1563 pHv->pbHypercallIn = (uint8_t *)RTMemAllocZ(GIM_HV_PAGE_SIZE);
1564 if (RT_LIKELY(pHv->pbHypercallIn))
1565 {
1566 pHv->pbHypercallOut = (uint8_t *)RTMemAllocZ(GIM_HV_PAGE_SIZE);
1567 if (RT_LIKELY(pHv->pbHypercallOut))
1568 return VINF_SUCCESS;
1569 RTMemFree(pHv->pbHypercallIn);
1570 }
1571 return VERR_NO_MEMORY;
1572}
1573
1574
1575/**
1576 * Terminates Hyper-V guest hypercall support.
1577 *
1578 * @param pVM The cross context VM structure.
1579 */
1580static void gimR3HvTermHypercallSupport(PVM pVM)
1581{
1582 PGIMHV pHv = &pVM->gim.s.u.Hv;
1583 RTMemFree(pHv->pbHypercallIn);
1584 pHv->pbHypercallIn = NULL;
1585
1586 RTMemFree(pHv->pbHypercallOut);
1587 pHv->pbHypercallOut = NULL;
1588}
1589
1590
1591/**
1592 * Initializes Hyper-V guest debug support.
1593 *
1594 * @returns VBox status code.
1595 * @param pVM The cross context VM structure.
1596 */
1597static int gimR3HvInitDebugSupport(PVM pVM)
1598{
1599 PGIMHV pHv = &pVM->gim.s.u.Hv;
1600 if ( (pHv->uPartFlags & GIM_HV_PART_FLAGS_DEBUGGING)
1601 || pHv->fIsInterfaceVs)
1602 {
1603 pHv->fDbgEnabled = true;
1604 pHv->pvDbgBuffer = RTMemAllocZ(PAGE_SIZE);
1605 if (!pHv->pvDbgBuffer)
1606 return VERR_NO_MEMORY;
1607 }
1608 return VINF_SUCCESS;
1609}
1610
1611
1612/**
1613 * Terminates Hyper-V guest debug support.
1614 *
1615 * @param pVM The cross context VM structure.
1616 */
1617static void gimR3HvTermDebugSupport(PVM pVM)
1618{
1619 PGIMHV pHv = &pVM->gim.s.u.Hv;
1620 if (pHv->pvDbgBuffer)
1621 {
1622 RTMemFree(pHv->pvDbgBuffer);
1623 pHv->pvDbgBuffer = NULL;
1624 }
1625}
1626
1627
1628/**
1629 * Reads data from a debugger connection, asynchronous.
1630 *
1631 * @returns VBox status code.
1632 * @param pVM The cross context VM structure.
1633 * @param pvBuf Where to read the data.
1634 * @param cbBuf Size of the read buffer @a pvBuf, must be >= @a cbRead.
1635 * @param cbRead Number of bytes to read.
1636 * @param pcbRead Where to store how many bytes were really read.
1637 * @param cMsTimeout Timeout of the read operation in milliseconds.
1638 * @param fUdpPkt Whether the debug data returned in @a pvBuf needs to be
1639 * encapsulated in a UDP frame.
1640 *
1641 * @thread EMT.
1642 */
1643VMMR3_INT_DECL(int) gimR3HvDebugRead(PVM pVM, void *pvBuf, uint32_t cbBuf, uint32_t cbRead, uint32_t *pcbRead,
1644 uint32_t cMsTimeout, bool fUdpPkt)
1645{
1646 NOREF(cMsTimeout); /** @todo implement timeout. */
1647 AssertCompile(sizeof(size_t) >= sizeof(uint32_t));
1648 AssertReturn(cbBuf >= cbRead, VERR_INVALID_PARAMETER);
1649
1650 int rc;
1651 if (!fUdpPkt)
1652 {
1653 /*
1654 * Read the raw debug data.
1655 */
1656 size_t cbReallyRead = cbRead;
1657 rc = gimR3DebugRead(pVM, pvBuf, &cbReallyRead, gimR3HvDebugBufReadCompleted);
1658 *pcbRead = (uint32_t)cbReallyRead;
1659 }
1660 else
1661 {
1662 /*
1663 * Guest requires UDP encapsulated frames.
1664 */
1665 PGIMHV pHv = &pVM->gim.s.u.Hv;
1666 rc = VERR_GIM_IPE_1;
1667 switch (pHv->enmDbgReply)
1668 {
1669 case GIMHVDEBUGREPLY_UDP:
1670 {
1671 size_t cbReallyRead = cbRead;
1672 rc = gimR3DebugRead(pVM, pvBuf, &cbReallyRead, gimR3HvDebugBufReadCompleted);
1673 if ( RT_SUCCESS(rc)
1674 && cbReallyRead > 0)
1675 {
1676 uint8_t abFrame[sizeof(RTNETETHERHDR) + RTNETIPV4_MIN_LEN + sizeof(RTNETUDP)];
1677 if (cbReallyRead + sizeof(abFrame) <= cbBuf)
1678 {
1679 /*
1680 * Windows guests pumps ethernet frames over the Hyper-V debug connection as
1681 * explained in gimR3HvHypercallPostDebugData(). Here, we reconstruct the packet
1682 * with the guest's self-chosen IP ARP address we saved in pHv->DbgGuestAddr.
1683 *
1684 * Note! We really need to pass the minimum IPv4 header length. The Windows 10 guest
1685 * is -not- happy if we include the IPv4 options field, i.e. using sizeof(RTNETIPV4)
1686 * instead of RTNETIPV4_MIN_LEN.
1687 */
1688 RT_ZERO(abFrame);
1689 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)&abFrame[0];
1690 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1691 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1692
1693 /* Ethernet */
1694 pEthHdr->EtherType = RT_H2N_U16_C(RTNET_ETHERTYPE_IPV4);
1695 /* IPv4 */
1696 pIpHdr->ip_v = 4;
1697 pIpHdr->ip_hl = RTNETIPV4_MIN_LEN / sizeof(uint32_t);
1698 pIpHdr->ip_tos = 0;
1699 pIpHdr->ip_len = RT_H2N_U16((uint16_t)cbReallyRead + sizeof(RTNETUDP) + RTNETIPV4_MIN_LEN);
1700 pIpHdr->ip_id = 0;
1701 pIpHdr->ip_off = 0;
1702 pIpHdr->ip_ttl = 255;
1703 pIpHdr->ip_p = RTNETIPV4_PROT_UDP;
1704 pIpHdr->ip_sum = 0;
1705 pIpHdr->ip_src.u = 0;
1706 pIpHdr->ip_dst.u = pHv->DbgGuestIp4Addr.u;
1707 pIpHdr->ip_sum = RTNetIPv4HdrChecksum(pIpHdr);
1708 /* UDP */
1709 pUdpHdr->uh_dport = pHv->uUdpGuestSrcPort;
1710 pUdpHdr->uh_sport = pHv->uUdpGuestDstPort;
1711 pUdpHdr->uh_ulen = RT_H2N_U16_C((uint16_t)cbReallyRead + sizeof(*pUdpHdr));
1712
1713 /* Make room by moving the payload and prepending the headers. */
1714 uint8_t *pbData = (uint8_t *)pvBuf;
1715 memmove(pbData + sizeof(abFrame), pbData, cbReallyRead);
1716 memcpy(pbData, &abFrame[0], sizeof(abFrame));
1717
1718 /* Update the adjusted sizes. */
1719 cbReallyRead += sizeof(abFrame);
1720 }
1721 else
1722 rc = VERR_BUFFER_UNDERFLOW;
1723 }
1724 *pcbRead = (uint32_t)cbReallyRead;
1725 break;
1726 }
1727
1728 case GIMHVDEBUGREPLY_ARP_REPLY:
1729 {
1730 uint32_t const cbArpReplyPkt = sizeof(g_abArpReply);
1731 if (cbBuf >= cbArpReplyPkt)
1732 {
1733 memcpy(pvBuf, g_abArpReply, cbArpReplyPkt);
1734 rc = VINF_SUCCESS;
1735 *pcbRead = cbArpReplyPkt;
1736 pHv->enmDbgReply = GIMHVDEBUGREPLY_ARP_REPLY_SENT;
1737 }
1738 else
1739 {
1740 rc = VERR_BUFFER_UNDERFLOW;
1741 *pcbRead = 0;
1742 }
1743 break;
1744 }
1745
1746 case GIMHVDEBUGREPLY_DHCP_OFFER:
1747 {
1748 uint32_t const cbDhcpOfferPkt = sizeof(g_abDhcpOffer);
1749 if (cbBuf >= cbDhcpOfferPkt)
1750 {
1751 memcpy(pvBuf, g_abDhcpOffer, cbDhcpOfferPkt);
1752 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)pvBuf;
1753 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1754 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1755 PRTNETBOOTP pBootpHdr = (PRTNETBOOTP) (pUdpHdr + 1);
1756 pBootpHdr->bp_xid = pHv->uDbgBootpXId;
1757
1758 rc = VINF_SUCCESS;
1759 *pcbRead = cbDhcpOfferPkt;
1760 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_OFFER_SENT;
1761 LogRel(("GIM: HyperV: Debug DHCP offered IP address %RTnaipv4, transaction Id %#x\n", pBootpHdr->bp_yiaddr,
1762 RT_N2H_U32(pHv->uDbgBootpXId)));
1763 }
1764 else
1765 {
1766 rc = VERR_BUFFER_UNDERFLOW;
1767 *pcbRead = 0;
1768 }
1769 break;
1770 }
1771
1772 case GIMHVDEBUGREPLY_DHCP_ACK:
1773 {
1774 uint32_t const cbDhcpAckPkt = sizeof(g_abDhcpAck);
1775 if (cbBuf >= cbDhcpAckPkt)
1776 {
1777 memcpy(pvBuf, g_abDhcpAck, cbDhcpAckPkt);
1778 PRTNETETHERHDR pEthHdr = (PRTNETETHERHDR)pvBuf;
1779 PRTNETIPV4 pIpHdr = (PRTNETIPV4) (pEthHdr + 1);
1780 PRTNETUDP pUdpHdr = (PRTNETUDP) ((uint8_t *)pIpHdr + RTNETIPV4_MIN_LEN);
1781 PRTNETBOOTP pBootpHdr = (PRTNETBOOTP) (pUdpHdr + 1);
1782 pBootpHdr->bp_xid = pHv->uDbgBootpXId;
1783
1784 rc = VINF_SUCCESS;
1785 *pcbRead = cbDhcpAckPkt;
1786 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_ACK_SENT;
1787 LogRel(("GIM: HyperV: Debug DHCP acknowledged IP address %RTnaipv4, transaction Id %#x\n",
1788 pBootpHdr->bp_yiaddr, RT_N2H_U32(pHv->uDbgBootpXId)));
1789 }
1790 else
1791 {
1792 rc = VERR_BUFFER_UNDERFLOW;
1793 *pcbRead = 0;
1794 }
1795 break;
1796 }
1797
1798 case GIMHVDEBUGREPLY_ARP_REPLY_SENT:
1799 case GIMHVDEBUGREPLY_DHCP_OFFER_SENT:
1800 case GIMHVDEBUGREPLY_DHCP_ACK_SENT:
1801 {
1802 rc = VINF_SUCCESS;
1803 *pcbRead = 0;
1804 break;
1805 }
1806
1807 default:
1808 {
1809 AssertMsgFailed(("GIM: HyperV: Invalid/unimplemented debug reply type %u\n", pHv->enmDbgReply));
1810 rc = VERR_INTERNAL_ERROR_2;
1811 }
1812 }
1813 Assert(rc != VERR_GIM_IPE_1);
1814
1815#ifdef DEBUG_ramshankar
1816 if ( rc == VINF_SUCCESS
1817 && *pcbRead > 0)
1818 {
1819 RTSOCKET hSocket;
1820 int rc2 = RTUdpCreateClientSocket("localhost", 52000, NULL, &hSocket);
1821 if (RT_SUCCESS(rc2))
1822 {
1823 size_t cbTmpWrite = *pcbRead;
1824 RTSocketWriteNB(hSocket, pvBuf, *pcbRead, &cbTmpWrite); NOREF(cbTmpWrite);
1825 RTSocketClose(hSocket);
1826 }
1827 }
1828#endif
1829 }
1830
1831 return rc;
1832}
1833
1834
1835/**
1836 * Writes data to the debugger connection, asynchronous.
1837 *
1838 * @returns VBox status code.
1839 * @param pVM The cross context VM structure.
1840 * @param pvData Pointer to the data to be written.
1841 * @param cbWrite Size of the write buffer @a pvData.
1842 * @param pcbWritten Where to store the number of bytes written.
1843 * @param fUdpPkt Whether the debug data in @a pvData is encapsulated in a
1844 * UDP frame.
1845 *
1846 * @thread EMT.
1847 */
1848VMMR3_INT_DECL(int) gimR3HvDebugWrite(PVM pVM, void *pvData, uint32_t cbWrite, uint32_t *pcbWritten, bool fUdpPkt)
1849{
1850 Assert(cbWrite > 0);
1851
1852 PGIMHV pHv = &pVM->gim.s.u.Hv;
1853 bool fIgnorePkt = false;
1854 uint8_t *pbData = (uint8_t *)pvData;
1855 if (fUdpPkt)
1856 {
1857#ifdef DEBUG_ramshankar
1858 RTSOCKET hSocket;
1859 int rc2 = RTUdpCreateClientSocket("localhost", 52000, NULL, &hSocket);
1860 if (RT_SUCCESS(rc2))
1861 {
1862 size_t cbTmpWrite = cbWrite;
1863 RTSocketWriteNB(hSocket, pbData, cbWrite, &cbTmpWrite); NOREF(cbTmpWrite);
1864 RTSocketClose(hSocket);
1865 }
1866#endif
1867 /*
1868 * Windows guests sends us ethernet frames over the Hyper-V debug connection.
1869 * It sends DHCP/ARP queries with zero'd out MAC addresses and requires fudging up the
1870 * packets somewhere.
1871 *
1872 * The Microsoft WinDbg debugger talks UDP and thus only expects the actual debug
1873 * protocol payload.
1874 *
1875 * If the guest is configured with the "nodhcp" option it sends ARP queries with
1876 * a self-chosen IP and after a couple of attempts of receiving no replies, the guest
1877 * picks its own IP address. After this, the guest starts sending the UDP packets
1878 * we require. We thus ignore the initial ARP packets until the guest eventually
1879 * starts talking UDP. Then we can finally feed the UDP payload over the debug
1880 * connection.
1881 *
1882 * When 'kdvm.dll' is the debug transport in the guest (Windows 7), it doesn't bother
1883 * with this DHCP/ARP phase. It starts sending debug data in a UDP frame right away.
1884 */
1885 if (cbWrite > sizeof(RTNETETHERHDR))
1886 {
1887 PCRTNETETHERHDR pEtherHdr = (PCRTNETETHERHDR)pbData;
1888 if (pEtherHdr->EtherType == RT_H2N_U16_C(RTNET_ETHERTYPE_IPV4))
1889 {
1890 if (cbWrite > sizeof(RTNETETHERHDR) + RTNETIPV4_MIN_LEN + RTNETUDP_MIN_LEN)
1891 {
1892 size_t const cbMaxIpHdr = cbWrite - sizeof(RTNETETHERHDR) - sizeof(RTNETUDP) - 1;
1893 size_t const cbMaxIpPkt = cbWrite - sizeof(RTNETETHERHDR);
1894 PCRTNETIPV4 pIp4Hdr = (PCRTNETIPV4)(pbData + sizeof(RTNETETHERHDR));
1895 bool const fValidIp4 = RTNetIPv4IsHdrValid(pIp4Hdr, cbMaxIpHdr, cbMaxIpPkt, false /*fChecksum*/);
1896 if ( fValidIp4
1897 && pIp4Hdr->ip_p == RTNETIPV4_PROT_UDP)
1898 {
1899 uint32_t const cbIpHdr = pIp4Hdr->ip_hl * 4;
1900 uint32_t const cbMaxUdpPkt = cbWrite - sizeof(RTNETETHERHDR) - cbIpHdr;
1901 PCRTNETUDP pUdpHdr = (PCRTNETUDP)((uint8_t *)pIp4Hdr + cbIpHdr);
1902 if ( pUdpHdr->uh_ulen > RT_H2N_U16(sizeof(RTNETUDP))
1903 && pUdpHdr->uh_ulen <= RT_H2N_U16((uint16_t)cbMaxUdpPkt))
1904 {
1905 /*
1906 * Check for DHCP.
1907 */
1908 bool fBuggyPkt = false;
1909 size_t const cbUdpPkt = cbMaxIpPkt - cbIpHdr;
1910 if ( pUdpHdr->uh_dport == RT_N2H_U16_C(RTNETIPV4_PORT_BOOTPS)
1911 && pUdpHdr->uh_sport == RT_N2H_U16_C(RTNETIPV4_PORT_BOOTPC))
1912 {
1913 PCRTNETBOOTP pDhcpPkt = (PCRTNETBOOTP)(pUdpHdr + 1);
1914 uint8_t bMsgType;
1915 if ( cbMaxIpPkt >= cbIpHdr + RTNETUDP_MIN_LEN + RTNETBOOTP_DHCP_MIN_LEN
1916 && RTNetIPv4IsDHCPValid(pUdpHdr, pDhcpPkt, cbUdpPkt - sizeof(*pUdpHdr), &bMsgType))
1917 {
1918 switch (bMsgType)
1919 {
1920 case RTNET_DHCP_MT_DISCOVER:
1921 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_OFFER;
1922 pHv->uDbgBootpXId = pDhcpPkt->bp_xid;
1923 break;
1924 case RTNET_DHCP_MT_REQUEST:
1925 pHv->enmDbgReply = GIMHVDEBUGREPLY_DHCP_ACK;
1926 pHv->uDbgBootpXId = pDhcpPkt->bp_xid;
1927 break;
1928 default:
1929 LogRelMax(5, ("GIM: HyperV: Debug DHCP MsgType %#x not implemented! Packet dropped\n",
1930 bMsgType));
1931 break;
1932 }
1933 fIgnorePkt = true;
1934 }
1935 else if ( pIp4Hdr->ip_src.u == GIMHV_DEBUGCLIENT_IPV4
1936 && pIp4Hdr->ip_dst.u == 0)
1937 {
1938 /*
1939 * Windows 8.1 seems to be sending malformed BOOTP packets at the final stage of the
1940 * debugger sequence. It appears that a previously sent DHCP request buffer wasn't cleared
1941 * in the guest and they re-use it instead of sending a zero destination+source port packet
1942 * as expected below.
1943 *
1944 * We workaround Microsoft's bug here, or at least, I'm classifying it as a bug to
1945 * preserve my own sanity, see @bugref{8006#c54}.
1946 */
1947 fBuggyPkt = true;
1948 }
1949 }
1950
1951 if ( ( !pUdpHdr->uh_dport
1952 && !pUdpHdr->uh_sport)
1953 || fBuggyPkt)
1954 {
1955 /*
1956 * Extract the UDP payload and pass it to the debugger and record the guest IP address.
1957 *
1958 * Hyper-V sends UDP debugger packets with source and destination port as 0 except in the
1959 * aforementioned buggy case. The buggy packet case requires us to remember the ports and
1960 * reply to them, otherwise the guest won't receive the replies we sent with port 0.
1961 */
1962 uint32_t const cbFrameHdr = sizeof(RTNETETHERHDR) + cbIpHdr + sizeof(RTNETUDP);
1963 pbData += cbFrameHdr;
1964 cbWrite -= cbFrameHdr;
1965 pHv->DbgGuestIp4Addr.u = pIp4Hdr->ip_src.u;
1966 pHv->uUdpGuestDstPort = pUdpHdr->uh_dport;
1967 pHv->uUdpGuestSrcPort = pUdpHdr->uh_sport;
1968 pHv->enmDbgReply = GIMHVDEBUGREPLY_UDP;
1969 }
1970 else
1971 {
1972 LogFlow(("GIM: HyperV: Ignoring UDP packet SourcePort=%u DstPort=%u\n", pUdpHdr->uh_sport,
1973 pUdpHdr->uh_dport));
1974 fIgnorePkt = true;
1975 }
1976 }
1977 else
1978 {
1979 LogFlow(("GIM: HyperV: Ignoring malformed UDP packet. cbMaxUdpPkt=%u UdpPkt.len=%u\n", cbMaxUdpPkt,
1980 RT_N2H_U16(pUdpHdr->uh_ulen)));
1981 fIgnorePkt = true;
1982 }
1983 }
1984 else
1985 {
1986 LogFlow(("GIM: HyperV: Ignoring non-IP / non-UDP packet. fValidIp4=%RTbool Proto=%u\n", fValidIp4,
1987 pIp4Hdr->ip_p));
1988 fIgnorePkt = true;
1989 }
1990 }
1991 else
1992 {
1993 LogFlow(("GIM: HyperV: Ignoring IPv4 packet; too short to be valid UDP. cbWrite=%u\n", cbWrite));
1994 fIgnorePkt = true;
1995 }
1996 }
1997 else if (pEtherHdr->EtherType == RT_H2N_U16_C(RTNET_ETHERTYPE_ARP))
1998 {
1999 /*
2000 * Check for targetted ARP query.
2001 */
2002 PCRTNETARPHDR pArpHdr = (PCRTNETARPHDR)(pbData + sizeof(RTNETETHERHDR));
2003 if ( pArpHdr->ar_hlen == sizeof(RTMAC)
2004 && pArpHdr->ar_plen == sizeof(RTNETADDRIPV4)
2005 && pArpHdr->ar_htype == RT_H2N_U16(RTNET_ARP_ETHER)
2006 && pArpHdr->ar_ptype == RT_H2N_U16(RTNET_ETHERTYPE_IPV4))
2007 {
2008 uint16_t uArpOp = pArpHdr->ar_oper;
2009 if (uArpOp == RT_H2N_U16_C(RTNET_ARPOP_REQUEST))
2010 {
2011 PCRTNETARPIPV4 pArpPkt = (PCRTNETARPIPV4)pArpHdr;
2012 bool fGratuitous = pArpPkt->ar_spa.u == pArpPkt->ar_tpa.u;
2013 if ( !fGratuitous
2014 && pArpPkt->ar_spa.u == GIMHV_DEBUGCLIENT_IPV4
2015 && pArpPkt->ar_tpa.u == GIMHV_DEBUGSERVER_IPV4)
2016 {
2017 pHv->enmDbgReply = GIMHVDEBUGREPLY_ARP_REPLY;
2018 }
2019 }
2020 }
2021 fIgnorePkt = true;
2022 }
2023 else
2024 {
2025 LogFlow(("GIM: HyperV: Ignoring non-IP packet. Ethertype=%#x\n", RT_N2H_U16(pEtherHdr->EtherType)));
2026 fIgnorePkt = true;
2027 }
2028 }
2029 }
2030
2031 if (!fIgnorePkt)
2032 {
2033 AssertCompile(sizeof(size_t) >= sizeof(uint32_t));
2034 size_t cbWriteBuf = cbWrite;
2035 int rc = gimR3DebugWrite(pVM, pbData, &cbWriteBuf);
2036 if ( RT_SUCCESS(rc)
2037 && cbWriteBuf == cbWrite)
2038 *pcbWritten = (uint32_t)cbWriteBuf;
2039 else
2040 *pcbWritten = 0;
2041 }
2042 else
2043 *pcbWritten = cbWrite;
2044
2045 return VINF_SUCCESS;
2046}
2047
2048
2049/**
2050 * Performs the HvPostDebugData hypercall.
2051 *
2052 * @returns VBox status code.
2053 * @param pVM The cross context VM structure.
2054 * @param prcHv Where to store the result of the hypercall operation.
2055 *
2056 * @thread EMT.
2057 */
2058VMMR3_INT_DECL(int) gimR3HvHypercallPostDebugData(PVM pVM, int *prcHv)
2059{
2060 AssertPtr(pVM);
2061 AssertPtr(prcHv);
2062 PGIMHV pHv = &pVM->gim.s.u.Hv;
2063 int rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2064
2065 /*
2066 * Grab the parameters.
2067 */
2068 PGIMHVDEBUGPOSTIN pIn = (PGIMHVDEBUGPOSTIN)pHv->pbHypercallIn;
2069 AssertPtrReturn(pIn, VERR_GIM_IPE_1);
2070 uint32_t cbWrite = pIn->cbWrite;
2071 uint32_t fFlags = pIn->fFlags;
2072 uint8_t *pbData = ((uint8_t *)pIn) + sizeof(PGIMHVDEBUGPOSTIN);
2073
2074 PGIMHVDEBUGPOSTOUT pOut = (PGIMHVDEBUGPOSTOUT)pHv->pbHypercallOut;
2075
2076 /*
2077 * Perform the hypercall.
2078 */
2079#if 0
2080 /* Currently disabled as Windows 10 guest passes us undocumented flags. */
2081 if (fFlags & ~GIM_HV_DEBUG_POST_OPTIONS_MASK))
2082 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2083#else
2084 RT_NOREF1(fFlags);
2085#endif
2086 if (cbWrite > GIM_HV_DEBUG_MAX_DATA_SIZE)
2087 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2088 else if (!cbWrite)
2089 {
2090 rcHv = GIM_HV_STATUS_SUCCESS;
2091 pOut->cbPending = 0;
2092 }
2093 else if (cbWrite > 0)
2094 {
2095 uint32_t cbWritten = 0;
2096 int rc2 = gimR3HvDebugWrite(pVM, pbData, cbWrite, &cbWritten, pHv->fIsVendorMsHv /*fUdpPkt*/);
2097 if ( RT_SUCCESS(rc2)
2098 && cbWritten == cbWrite)
2099 {
2100 pOut->cbPending = 0;
2101 rcHv = GIM_HV_STATUS_SUCCESS;
2102 }
2103 else
2104 rcHv = GIM_HV_STATUS_INSUFFICIENT_BUFFER;
2105 }
2106
2107 /*
2108 * Update the guest memory with result.
2109 */
2110 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVDEBUGPOSTOUT));
2111 if (RT_FAILURE(rc))
2112 {
2113 LogRelMax(10, ("GIM: HyperV: HvPostDebugData failed to update guest memory. rc=%Rrc\n", rc));
2114 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2115 }
2116 else
2117 Assert(rc == VINF_SUCCESS);
2118
2119 *prcHv = rcHv;
2120 return rc;
2121}
2122
2123
2124/**
2125 * Performs the HvRetrieveDebugData hypercall.
2126 *
2127 * @returns VBox status code.
2128 * @param pVM The cross context VM structure.
2129 * @param prcHv Where to store the result of the hypercall operation.
2130 *
2131 * @thread EMT.
2132 */
2133VMMR3_INT_DECL(int) gimR3HvHypercallRetrieveDebugData(PVM pVM, int *prcHv)
2134{
2135 AssertPtr(pVM);
2136 AssertPtr(prcHv);
2137 PGIMHV pHv = &pVM->gim.s.u.Hv;
2138 int rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2139
2140 /*
2141 * Grab the parameters.
2142 */
2143 PGIMHVDEBUGRETRIEVEIN pIn = (PGIMHVDEBUGRETRIEVEIN)pHv->pbHypercallIn;
2144 AssertPtrReturn(pIn, VERR_GIM_IPE_1);
2145 uint32_t cbRead = pIn->cbRead;
2146 uint32_t fFlags = pIn->fFlags;
2147 uint64_t uTimeout = pIn->u64Timeout;
2148 uint32_t cMsTimeout = (fFlags & GIM_HV_DEBUG_RETREIVE_LOOP) ? (uTimeout * 100) / RT_NS_1MS_64 : 0;
2149
2150 PGIMHVDEBUGRETRIEVEOUT pOut = (PGIMHVDEBUGRETRIEVEOUT)pHv->pbHypercallOut;
2151 AssertPtrReturn(pOut, VERR_GIM_IPE_2);
2152 uint32_t *pcbReallyRead = &pOut->cbRead;
2153 uint32_t *pcbRemainingRead = &pOut->cbRemaining;
2154 void *pvData = ((uint8_t *)pOut) + sizeof(GIMHVDEBUGRETRIEVEOUT);
2155
2156 /*
2157 * Perform the hypercall.
2158 */
2159 *pcbReallyRead = 0;
2160 *pcbRemainingRead = cbRead;
2161#if 0
2162 /* Currently disabled as Windows 10 guest passes us undocumented flags. */
2163 if (fFlags & ~GIM_HV_DEBUG_RETREIVE_OPTIONS_MASK)
2164 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2165#endif
2166 if (cbRead > GIM_HV_DEBUG_MAX_DATA_SIZE)
2167 rcHv = GIM_HV_STATUS_INVALID_PARAMETER;
2168 else if (fFlags & GIM_HV_DEBUG_RETREIVE_TEST_ACTIVITY)
2169 rcHv = GIM_HV_STATUS_SUCCESS; /** @todo implement this. */
2170 else if (!cbRead)
2171 rcHv = GIM_HV_STATUS_SUCCESS;
2172 else if (cbRead > 0)
2173 {
2174 int rc2 = gimR3HvDebugRead(pVM, pvData, GIM_HV_PAGE_SIZE, cbRead, pcbReallyRead, cMsTimeout,
2175 pHv->fIsVendorMsHv /*fUdpPkt*/);
2176 Assert(*pcbReallyRead <= cbRead);
2177 if ( RT_SUCCESS(rc2)
2178 && *pcbReallyRead > 0)
2179 {
2180 *pcbRemainingRead = cbRead - *pcbReallyRead;
2181 rcHv = GIM_HV_STATUS_SUCCESS;
2182 }
2183 else
2184 rcHv = GIM_HV_STATUS_NO_DATA;
2185 }
2186
2187 /*
2188 * Update the guest memory with result.
2189 */
2190 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut,
2191 sizeof(GIMHVDEBUGRETRIEVEOUT) + *pcbReallyRead);
2192 if (RT_FAILURE(rc))
2193 {
2194 LogRelMax(10, ("GIM: HyperV: HvRetrieveDebugData failed to update guest memory. rc=%Rrc\n", rc));
2195 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2196 }
2197 else
2198 Assert(rc == VINF_SUCCESS);
2199
2200 *prcHv = rcHv;
2201 return rc;
2202}
2203
2204
2205/**
2206 * Performs the HvExtCallQueryCapabilities extended hypercall.
2207 *
2208 * @returns VBox status code.
2209 * @param pVM The cross context VM structure.
2210 * @param prcHv Where to store the result of the hypercall operation.
2211 *
2212 * @thread EMT.
2213 */
2214VMMR3_INT_DECL(int) gimR3HvHypercallExtQueryCap(PVM pVM, int *prcHv)
2215{
2216 AssertPtr(pVM);
2217 AssertPtr(prcHv);
2218 PGIMHV pHv = &pVM->gim.s.u.Hv;
2219
2220 /*
2221 * Grab the parameters.
2222 */
2223 PGIMHVEXTQUERYCAP pOut = (PGIMHVEXTQUERYCAP)pHv->pbHypercallOut;
2224
2225 /*
2226 * Perform the hypercall.
2227 */
2228 pOut->fCapabilities = GIM_HV_EXT_HYPERCALL_CAP_ZERO_MEM;
2229
2230 /*
2231 * Update the guest memory with result.
2232 */
2233 int rcHv;
2234 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVEXTQUERYCAP));
2235 if (RT_SUCCESS(rc))
2236 {
2237 rcHv = GIM_HV_STATUS_SUCCESS;
2238 LogRel(("GIM: HyperV: Queried extended hypercall capabilities %#RX64 at %#RGp\n", pOut->fCapabilities,
2239 pHv->GCPhysHypercallOut));
2240 }
2241 else
2242 {
2243 rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2244 LogRelMax(10, ("GIM: HyperV: HvHypercallExtQueryCap failed to update guest memory. rc=%Rrc\n", rc));
2245 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2246 }
2247
2248 *prcHv = rcHv;
2249 return rc;
2250}
2251
2252
2253/**
2254 * Performs the HvExtCallGetBootZeroedMemory extended hypercall.
2255 *
2256 * @returns VBox status code.
2257 * @param pVM The cross context VM structure.
2258 * @param prcHv Where to store the result of the hypercall operation.
2259 *
2260 * @thread EMT.
2261 */
2262VMMR3_INT_DECL(int) gimR3HvHypercallExtGetBootZeroedMem(PVM pVM, int *prcHv)
2263{
2264 AssertPtr(pVM);
2265 AssertPtr(prcHv);
2266 PGIMHV pHv = &pVM->gim.s.u.Hv;
2267
2268 /*
2269 * Grab the parameters.
2270 */
2271 PGIMHVEXTGETBOOTZEROMEM pOut = (PGIMHVEXTGETBOOTZEROMEM)pHv->pbHypercallOut;
2272
2273 /*
2274 * Perform the hypercall.
2275 */
2276 uint32_t const cRanges = PGMR3PhysGetRamRangeCount(pVM);
2277 pOut->cPages = 0;
2278 for (uint32_t iRange = 0; iRange < cRanges; iRange++)
2279 {
2280 RTGCPHYS GCPhysStart;
2281 RTGCPHYS GCPhysEnd;
2282 int rc = PGMR3PhysGetRange(pVM, iRange, &GCPhysStart, &GCPhysEnd, NULL /* pszDesc */, NULL /* fIsMmio */);
2283 if (RT_FAILURE(rc))
2284 {
2285 LogRelMax(10, ("GIM: HyperV: HvHypercallExtGetBootZeroedMem: PGMR3PhysGetRange failed for iRange(%u) rc=%Rrc\n",
2286 iRange, rc));
2287 *prcHv = GIM_HV_STATUS_OPERATION_DENIED;
2288 return rc;
2289 }
2290
2291 RTGCPHYS const cbRange = RT_ALIGN(GCPhysEnd - GCPhysStart + 1, PAGE_SIZE);
2292 pOut->cPages += cbRange >> GIM_HV_PAGE_SHIFT;
2293 if (iRange == 0)
2294 pOut->GCPhysStart = GCPhysStart;
2295 }
2296
2297 /*
2298 * Update the guest memory with result.
2299 */
2300 int rcHv;
2301 int rc = PGMPhysSimpleWriteGCPhys(pVM, pHv->GCPhysHypercallOut, pHv->pbHypercallOut, sizeof(GIMHVEXTGETBOOTZEROMEM));
2302 if (RT_SUCCESS(rc))
2303 {
2304 LogRel(("GIM: HyperV: Queried boot zeroed guest memory range (starting at %#RGp spanning %u pages) at %#RGp\n",
2305 pOut->GCPhysStart, pOut->cPages, pHv->GCPhysHypercallOut));
2306 rcHv = GIM_HV_STATUS_SUCCESS;
2307 }
2308 else
2309 {
2310 rcHv = GIM_HV_STATUS_OPERATION_DENIED;
2311 LogRelMax(10, ("GIM: HyperV: HvHypercallExtGetBootZeroedMem failed to update guest memory. rc=%Rrc\n", rc));
2312 rc = VERR_GIM_HYPERCALL_MEMORY_WRITE_FAILED;
2313 }
2314
2315 *prcHv = rcHv;
2316 return rc;
2317}
2318
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