VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 106360

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1/* $Id: EMR3Nem.cpp 106061 2024-09-16 14:03:52Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - NEM interface.
4 */
5
6/*
7 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_EM
33#define VMCPU_INCL_CPUM_GST_CTX
34#include <VBox/vmm/em.h>
35#include <VBox/vmm/vmm.h>
36#include <VBox/vmm/selm.h>
37#include <VBox/vmm/trpm.h>
38#include <VBox/vmm/iem.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/nem.h>
41#include <VBox/vmm/dbgf.h>
42#include <VBox/vmm/pgm.h>
43#include <VBox/vmm/tm.h>
44#include <VBox/vmm/mm.h>
45#include <VBox/vmm/ssm.h>
46#include <VBox/vmm/pdmapi.h>
47#include <VBox/vmm/pdmcritsect.h>
48#include <VBox/vmm/pdmqueue.h>
49#include "EMInternal.h"
50#include <VBox/vmm/vm.h>
51#include <VBox/vmm/gim.h>
52#include <VBox/vmm/cpumdis.h>
53#include <VBox/dis.h>
54#include <VBox/err.h>
55#include <VBox/vmm/dbgf.h>
56#include "VMMTracing.h"
57
58#include <iprt/asm.h>
59
60#include "EMInline.h"
61
62
63/*********************************************************************************************************************************
64* Internal Functions *
65*********************************************************************************************************************************/
66static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
67DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
68static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
69static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
70
71#define EMHANDLERC_WITH_NEM
72#define emR3ExecuteInstruction emR3NemExecuteInstruction
73#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
74#include "EMHandleRCTmpl.h"
75
76
77/**
78 * Executes instruction in NEM mode if we can.
79 *
80 * This is somewhat comparable to REMR3EmulateInstruction.
81 *
82 * @returns VBox strict status code.
83 * @retval VINF_EM_DBG_STEPPED on success.
84 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
85 * HM right now.
86 *
87 * @param pVM The cross context VM structure.
88 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
89 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
90 * @thread EMT.
91 */
92VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
93{
94 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96 if (!NEMR3CanExecuteGuest(pVM, pVCpu))
97 return VINF_EM_RESCHEDULE;
98
99#if defined(VBOX_VMM_TARGET_ARMV8)
100 uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
101#else
102 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
103#endif
104 for (;;)
105 {
106 /*
107 * Service necessary FFs before going into HM.
108 */
109 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
110 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
111 {
112 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
113 if (rcStrict != VINF_SUCCESS)
114 {
115 Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
116 return rcStrict;
117 }
118 }
119
120 /*
121 * Go execute it.
122 */
123 bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
124 VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
125 NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
126 LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
127
128 /*
129 * Handle high priority FFs and informational status codes. We don't do
130 * normal FF processing the caller or the next call can deal with them.
131 */
132 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
133 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
134 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
135 {
136 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
137 LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
138 }
139
140 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
141 {
142 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
143 Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
144 }
145
146 /*
147 * Done?
148 */
149#if defined(VBOX_VMM_TARGET_ARMV8)
150 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
151 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
152 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
153 || pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
154 {
155 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
156 rcStrict = VINF_EM_DBG_STEPPED;
157 Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
158 VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
159 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
160 return rcStrict;
161 }
162#else
163 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
164 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
165 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
166 || pVCpu->cpum.GstCtx.rip != uOldRip)
167 {
168 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
169 rcStrict = VINF_EM_DBG_STEPPED;
170 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
171 VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
172 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
173 return rcStrict;
174 }
175#endif
176 }
177}
178
179
180/**
181 * Executes one (or perhaps a few more) instruction(s).
182 *
183 * @returns VBox status code suitable for EM.
184 *
185 * @param pVM The cross context VM structure.
186 * @param pVCpu The cross context virtual CPU structure.
187 * @param rcRC Return code from RC.
188 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
189 * instruction and prefix the log output with this text.
190 */
191#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
192static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
193#else
194static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
195#endif
196{
197 NOREF(rcRC);
198
199#ifdef LOG_ENABLED
200 /*
201 * Log it.
202 */
203#ifdef VBOX_VMM_TARGET_ARMV8
204 Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
205 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64,
206 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
207 if (pszPrefix)
208 {
209 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
210 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
211 }
212# else
213 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
214 if (pszPrefix)
215 {
216 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
217 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
218 }
219# endif
220#endif
221
222 /*
223 * Use IEM and fallback on REM if the functionality is missing.
224 * Once IEM gets mature enough, nothing should ever fall back.
225 */
226 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
227
228 VBOXSTRICTRC rcStrict;
229 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
230 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
231 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
232 {
233 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
234 rcStrict = IEMExecOne(pVCpu);
235 }
236 else
237 {
238 RT_UNTRUSTED_VALIDATED_FENCE();
239 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
240 LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
241 }
242
243 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
244
245 NOREF(pVM);
246 return VBOXSTRICTRC_TODO(rcStrict);
247}
248
249
250/**
251 * Executes one (or perhaps a few more) instruction(s).
252 * This is just a wrapper for discarding pszPrefix in non-logging builds.
253 *
254 * @returns VBox status code suitable for EM.
255 * @param pVM The cross context VM structure.
256 * @param pVCpu The cross context virtual CPU structure.
257 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
258 * instruction and prefix the log output with this text.
259 * @param rcGC GC return code
260 */
261DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
262{
263#ifdef LOG_ENABLED
264 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
265#else
266 RT_NOREF_PV(pszPrefix);
267 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
268#endif
269}
270
271/**
272 * Executes one (or perhaps a few more) IO instruction(s).
273 *
274 * @returns VBox status code suitable for EM.
275 * @param pVM The cross context VM structure.
276 * @param pVCpu The cross context virtual CPU structure.
277 */
278static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
279{
280 RT_NOREF_PV(pVM);
281 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
282
283 /*
284 * Hand it over to the interpreter.
285 */
286 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
287 VBOXSTRICTRC rcStrict;
288 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
289 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
290 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
291 {
292 rcStrict = IEMExecOne(pVCpu);
293 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
294 STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
295 }
296 else
297 {
298 RT_UNTRUSTED_VALIDATED_FENCE();
299 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
300 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
301 STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
302 }
303
304 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
305 return VBOXSTRICTRC_TODO(rcStrict);
306}
307
308
309/**
310 * Process NEM specific forced actions.
311 *
312 * This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
313 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
314 *
315 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
316 * EM statuses.
317 * @param pVM The cross context VM structure.
318 * @param pVCpu The cross context virtual CPU structure.
319 */
320static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
321{
322 /*
323 * Sync page directory should not happen in NEM mode.
324 */
325 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
326 {
327 Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
328 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
329 }
330
331 /*
332 * Allocate handy pages (just in case the above actions have consumed some pages).
333 */
334 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
335 {
336 int rc = PGMR3PhysAllocateHandyPages(pVM);
337 if (RT_FAILURE(rc))
338 return rc;
339 }
340
341 /*
342 * Check whether we're out of memory now.
343 *
344 * This may stem from some of the above actions or operations that has been executed
345 * since we ran FFs. The allocate handy pages must for instance always be followed by
346 * this check.
347 */
348 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
349 return VINF_EM_NO_MEMORY;
350
351 return VINF_SUCCESS;
352}
353
354
355/**
356 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
357 *
358 * This function contains the inner EM execution loop for NEM (the outer loop
359 * being in EMR3ExecuteVM()).
360 *
361 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
362 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
363 *
364 * @param pVM The cross context VM structure.
365 * @param pVCpu The cross context virtual CPU structure.
366 * @param pfFFDone Where to store an indicator telling whether or not
367 * FFs were done before returning.
368 */
369VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
370{
371 VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
372
373#ifdef VBOX_VMM_TARGET_ARMV8
374 LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
375#else
376 LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
377#endif
378 *pfFFDone = false;
379
380 STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
381
382 /*
383 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
384 */
385 for (;;)
386 {
387 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
388
389 /*
390 * Check that we can execute in NEM mode.
391 */
392 if (NEMR3CanExecuteGuest(pVM, pVCpu))
393 { /* likely */ }
394 else
395 {
396 rcStrict = VINF_EM_RESCHEDULE_REM;
397 break;
398 }
399
400 /*
401 * Process high priority pre-execution raw-mode FFs.
402 */
403 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
404 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
405 {
406 rcStrict = emR3NemForcedActions(pVM, pVCpu);
407 if (rcStrict != VINF_SUCCESS)
408 break;
409 }
410
411#if defined(LOG_ENABLED) && !defined(VBOX_VMM_TARGET_ARMV8)
412 /*
413 * Log important stuff before entering GC.
414 */
415 if (TRPMHasTrap(pVCpu))
416 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
417
418 if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS
419 | CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER)))
420 {
421 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
422 if (pVM->cCpus == 1)
423 {
424 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
425 Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
426 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
427 Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
428 else
429 Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
430 }
431 else
432 {
433 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
434 Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
435 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
436 Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
437 else
438 Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
439 }
440 }
441 else if (pVM->cCpus == 1)
442 Log(("NEMRx: -> NEMR3RunGC\n"));
443 else
444 Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
445#endif /* LOG_ENABLED */
446
447 /*
448 * Execute the code.
449 */
450 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
451 {
452 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
453 STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
454 rcStrict = NEMR3RunGC(pVM, pVCpu);
455 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
456 }
457 else
458 {
459 /* Give up this time slice; virtual time continues */
460 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
461 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
462 RTThreadSleep(5);
463 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
464 rcStrict = VINF_SUCCESS;
465 }
466
467
468 /*
469 * Deal with high priority post execution FFs before doing anything else.
470 */
471 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
472 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
473 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
474 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
475
476 /*
477 * Process the returned status code.
478 */
479 if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
480 break;
481
482 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
483 if (rcStrict != VINF_SUCCESS)
484 break;
485
486 /*
487 * Check and execute forced actions.
488 */
489#ifdef VBOX_HIGH_RES_TIMERS_HACK
490 TMTimerPollVoid(pVM, pVCpu);
491#endif
492 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
493 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
494 {
495 rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
496 VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
497 if ( rcStrict != VINF_SUCCESS
498 && rcStrict != VINF_EM_RESCHEDULE_EXEC_ENGINE)
499 {
500 *pfFFDone = true;
501 break;
502 }
503 }
504 }
505
506 /*
507 * Return to outer loop, making sure the fetch all state as we leave.
508 *
509 * Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
510 * status over import errors.
511 */
512 if (pVCpu->cpum.GstCtx.fExtrn)
513 {
514 int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
515 AssertReturn(RT_SUCCESS(rcImport) || RT_FAILURE_NP(rcStrict), rcImport);
516 }
517#if defined(LOG_ENABLED) && defined(DEBUG)
518 RTLogFlush(NULL);
519#endif
520 return rcStrict;
521}
522
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