EMR3Nem.cpp@ 97405

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1	/* $Id: EMR3Nem.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - NEM interface.
4	*/
5
6	/*
7	* Copyright (C) 2006-2022 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/nem.h>
41	#include <VBox/vmm/dbgf.h>
42	#include <VBox/vmm/pgm.h>
43	#include <VBox/vmm/tm.h>
44	#include <VBox/vmm/mm.h>
45	#include <VBox/vmm/ssm.h>
46	#include <VBox/vmm/pdmapi.h>
47	#include <VBox/vmm/pdmcritsect.h>
48	#include <VBox/vmm/pdmqueue.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/vmm/cpumdis.h>
53	#include <VBox/dis.h>
54	#include <VBox/disopcode.h>
55	#include <VBox/err.h>
56	#include <VBox/vmm/dbgf.h>
57	#include "VMMTracing.h"
58
59	#include <iprt/asm.h>
60
61
62	/*********************************************************************************************************************************
63	* Internal Functions *
64	*********************************************************************************************************************************/
65	static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
66	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
69
70	#define EMHANDLERC_WITH_NEM
71	#define emR3ExecuteInstruction emR3NemExecuteInstruction
72	#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
73	#include "EMHandleRCTmpl.h"
74
75
76	/**
77	* Executes instruction in NEM mode if we can.
78	*
79	* This is somewhat comparable to REMR3EmulateInstruction.
80	*
81	* @returns VBox strict status code.
82	* @retval VINF_EM_DBG_STEPPED on success.
83	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84	* HM right now.
85	*
86	* @param pVM The cross context VM structure.
87	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
88	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89	* @thread EMT.
90	*/
91	VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92	{
93	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
94
95	if (!NEMR3CanExecuteGuest(pVM, pVCpu))
96	return VINF_EM_RESCHEDULE;
97
98	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
99	for (;;)
100	{
101	/*
102	* Service necessary FFs before going into HM.
103	*/
104	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
105	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
106	{
107	VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
108	if (rcStrict != VINF_SUCCESS)
109	{
110	Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
111	return rcStrict;
112	}
113	}
114
115	/*
116	* Go execute it.
117	*/
118	bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
119	VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
120	NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
121	LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
122
123	/*
124	* Handle high priority FFs and informational status codes. We don't do
125	* normal FF processing the caller or the next call can deal with them.
126	*/
127	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
128	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
129	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
130	{
131	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
132	LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
133	}
134
135	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
136	{
137	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
138	Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
139	}
140
141	/*
142	* Done?
143	*/
144	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
145	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
146	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
147	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
148	{
149	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
150	rcStrict = VINF_EM_DBG_STEPPED;
151	Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
152	VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
153	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
154	return rcStrict;
155	}
156	}
157	}
158
159
160	/**
161	* Executes one (or perhaps a few more) instruction(s).
162	*
163	* @returns VBox status code suitable for EM.
164	*
165	* @param pVM The cross context VM structure.
166	* @param pVCpu The cross context virtual CPU structure.
167	* @param rcRC Return code from RC.
168	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
169	* instruction and prefix the log output with this text.
170	*/
171	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
172	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
173	#else
174	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
175	#endif
176	{
177	NOREF(rcRC);
178
179	#ifdef LOG_ENABLED
180	/*
181	* Log it.
182	*/
183	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
184	if (pszPrefix)
185	{
186	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
187	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
188	}
189	#endif
190
191	/*
192	* Use IEM and fallback on REM if the functionality is missing.
193	* Once IEM gets mature enough, nothing should ever fall back.
194	*/
195	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
196
197	VBOXSTRICTRC rcStrict;
198	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
199	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
200	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
201	{
202	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
203	rcStrict = IEMExecOne(pVCpu);
204	}
205	else
206	{
207	RT_UNTRUSTED_VALIDATED_FENCE();
208	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
209	LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
210	}
211
212	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
213
214	NOREF(pVM);
215	return VBOXSTRICTRC_TODO(rcStrict);
216	}
217
218
219	/**
220	* Executes one (or perhaps a few more) instruction(s).
221	* This is just a wrapper for discarding pszPrefix in non-logging builds.
222	*
223	* @returns VBox status code suitable for EM.
224	* @param pVM The cross context VM structure.
225	* @param pVCpu The cross context virtual CPU structure.
226	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
227	* instruction and prefix the log output with this text.
228	* @param rcGC GC return code
229	*/
230	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
231	{
232	#ifdef LOG_ENABLED
233	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
234	#else
235	RT_NOREF_PV(pszPrefix);
236	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
237	#endif
238	}
239
240	/**
241	* Executes one (or perhaps a few more) IO instruction(s).
242	*
243	* @returns VBox status code suitable for EM.
244	* @param pVM The cross context VM structure.
245	* @param pVCpu The cross context virtual CPU structure.
246	*/
247	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
248	{
249	RT_NOREF_PV(pVM);
250	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
251
252	/*
253	* Hand it over to the interpreter.
254	*/
255	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
256	VBOXSTRICTRC rcStrict;
257	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
258	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
259	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
260	{
261	rcStrict = IEMExecOne(pVCpu);
262	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
263	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
264	}
265	else
266	{
267	RT_UNTRUSTED_VALIDATED_FENCE();
268	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
269	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
270	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
271	}
272
273	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
274	return VBOXSTRICTRC_TODO(rcStrict);
275	}
276
277
278	/**
279	* Process NEM specific forced actions.
280	*
281	* This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
282	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
283	*
284	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
285	* EM statuses.
286	* @param pVM The cross context VM structure.
287	* @param pVCpu The cross context virtual CPU structure.
288	*/
289	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
290	{
291	/*
292	* Sync page directory should not happen in NEM mode.
293	*/
294	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
295	{
296	Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
297	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
298	}
299
300	/*
301	* Allocate handy pages (just in case the above actions have consumed some pages).
302	*/
303	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
304	{
305	int rc = PGMR3PhysAllocateHandyPages(pVM);
306	if (RT_FAILURE(rc))
307	return rc;
308	}
309
310	/*
311	* Check whether we're out of memory now.
312	*
313	* This may stem from some of the above actions or operations that has been executed
314	* since we ran FFs. The allocate handy pages must for instance always be followed by
315	* this check.
316	*/
317	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
318	return VINF_EM_NO_MEMORY;
319
320	return VINF_SUCCESS;
321	}
322
323
324	/**
325	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
326	*
327	* This function contains the raw-mode version of the inner
328	* execution loop (the outer loop being in EMR3ExecuteVM()).
329	*
330	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
331	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
332	*
333	* @param pVM The cross context VM structure.
334	* @param pVCpu The cross context virtual CPU structure.
335	* @param pfFFDone Where to store an indicator telling whether or not
336	* FFs were done before returning.
337	*/
338	VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
339	{
340	VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
341
342	LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
343	*pfFFDone = false;
344
345	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
346
347	/*
348	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
349	*/
350	for (;;)
351	{
352	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
353
354	/*
355	* Check that we can execute in NEM mode.
356	*/
357	if (NEMR3CanExecuteGuest(pVM, pVCpu))
358	{ /* likely */ }
359	else
360	{
361	rcStrict = VINF_EM_RESCHEDULE_REM;
362	break;
363	}
364
365	/*
366	* Process high priority pre-execution raw-mode FFs.
367	*/
368	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
369	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
370	{
371	rcStrict = emR3NemForcedActions(pVM, pVCpu);
372	if (rcStrict != VINF_SUCCESS)
373	break;
374	}
375
376	#ifdef LOG_ENABLED
377	/*
378	* Log important stuff before entering GC.
379	*/
380	if (TRPMHasTrap(pVCpu))
381	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
382
383	if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP \| CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_RFLAGS \| CPUMCTX_EXTRN_SS
384	\| CPUMCTX_EXTRN_RSP \| CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR4 \| CPUMCTX_EXTRN_EFER)))
385	{
386	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
387	if (pVM->cCpus == 1)
388	{
389	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
390	Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
391	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
392	Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
393	else
394	Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
395	}
396	else
397	{
398	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
399	Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
400	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
401	Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
402	else
403	Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
404	}
405	}
406	else if (pVM->cCpus == 1)
407	Log(("NEMRx: -> NEMR3RunGC\n"));
408	else
409	Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
410	#endif /* LOG_ENABLED */
411
412	/*
413	* Execute the code.
414	*/
415	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
416	{
417	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
418	STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
419	rcStrict = NEMR3RunGC(pVM, pVCpu);
420	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
421	}
422	else
423	{
424	/* Give up this time slice; virtual time continues */
425	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
426	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
427	RTThreadSleep(5);
428	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
429	rcStrict = VINF_SUCCESS;
430	}
431
432
433	/*
434	* Deal with high priority post execution FFs before doing anything else.
435	*/
436	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
437	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
438	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
439	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
440
441	/*
442	* Process the returned status code.
443	*/
444	if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
445	break;
446
447	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
448	if (rcStrict != VINF_SUCCESS)
449	break;
450
451	/*
452	* Check and execute forced actions.
453	*/
454	#ifdef VBOX_HIGH_RES_TIMERS_HACK
455	TMTimerPollVoid(pVM, pVCpu);
456	#endif
457	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
458	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
459	{
460	rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
461	VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
462	if ( rcStrict != VINF_SUCCESS
463	&& rcStrict != VINF_EM_RESCHEDULE_HM)
464	{
465	*pfFFDone = true;
466	break;
467	}
468	}
469	}
470
471	/*
472	* Return to outer loop, making sure the fetch all state as we leave.
473	*
474	* Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
475	* status over import errors.
476	*/
477	if (pVCpu->cpum.GstCtx.fExtrn)
478	{
479	int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
480	AssertReturn(RT_SUCCESS(rcImport) \|\| RT_FAILURE_NP(rcStrict), rcImport);
481	}
482	#if defined(LOG_ENABLED) && defined(DEBUG)
483	RTLogFlush(NULL);
484	#endif
485	return rcStrict;
486	}
487

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 97405

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