EMHwaccm.cpp@ 40377

Last change on this file since 40377 was 40377, checked in by vboxsync, 13 years ago
Fixes for real dtrace (trailing digits are not allowed in provider names).
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1	/* $Id: EMHwaccm.cpp 40377 2012-03-06 15:00:44Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_EM
22	#include <VBox/vmm/em.h>
23	#include <VBox/vmm/vmm.h>
24	#include <VBox/vmm/csam.h>
25	#include <VBox/vmm/selm.h>
26	#include <VBox/vmm/trpm.h>
27	#include <VBox/vmm/iem.h>
28	#include <VBox/vmm/iom.h>
29	#include <VBox/vmm/dbgf.h>
30	#include <VBox/vmm/pgm.h>
31	#ifdef VBOX_WITH_REM
32	# include <VBox/vmm/rem.h>
33	#endif
34	#include <VBox/vmm/tm.h>
35	#include <VBox/vmm/mm.h>
36	#include <VBox/vmm/ssm.h>
37	#include <VBox/vmm/pdmapi.h>
38	#include <VBox/vmm/pdmcritsect.h>
39	#include <VBox/vmm/pdmqueue.h>
40	#include <VBox/vmm/hwaccm.h>
41	#include "EMInternal.h"
42	#include "internal/em.h"
43	#include <VBox/vmm/vm.h>
44	#include <VBox/vmm/cpumdis.h>
45	#include <VBox/dis.h>
46	#include <VBox/disopcode.h>
47	#include <VBox/vmm/dbgf.h>
48	#include "VMMTracing.h"
49
50	#include <iprt/asm.h>
51
52
53	/*******************************************************************************
54	* Defined Constants And Macros *
55	*******************************************************************************/
56	#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
57	#define EM_NOTIFY_HWACCM
58	#endif
59
60
61	/*******************************************************************************
62	* Internal Functions *
63	*******************************************************************************/
64	DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
65	static int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
66	static int emR3HwaccmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
67
68	#define EMHANDLERC_WITH_HWACCM
69	#include "EMHandleRCTmpl.h"
70
71
72	#if defined(DEBUG) && defined(SOME_UNUSED_FUNCTIONS)
73
74	/**
75	* Steps hardware accelerated mode.
76	*
77	* @returns VBox status code.
78	* @param pVM The VM handle.
79	* @param pVCpu The VMCPU handle.
80	*/
81	static int emR3HwAccStep(PVM pVM, PVMCPU pVCpu)
82	{
83	Assert(pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC);
84
85	int rc;
86	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
87	VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_TSS));
88
89	/*
90	* Check vital forced actions, but ignore pending interrupts and timers.
91	*/
92	if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
93	\|\| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
94	{
95	rc = emR3HwaccmForcedActions(pVM, pVCpu, pCtx);
96	if (rc != VINF_SUCCESS)
97	return rc;
98	}
99	/*
100	* Set flags for single stepping.
101	*/
102	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) \| X86_EFL_TF \| X86_EFL_RF);
103
104	/*
105	* Single step.
106	* We do not start time or anything, if anything we should just do a few nanoseconds.
107	*/
108	do
109	{
110	rc = VMMR3HwAccRunGC(pVM, pVCpu);
111	} while ( rc == VINF_SUCCESS
112	\|\| rc == VINF_EM_RAW_INTERRUPT);
113	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
114
115	/*
116	* Make sure the trap flag is cleared.
117	* (Too bad if the guest is trying to single step too.)
118	*/
119	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
120
121	/*
122	* Deal with the return codes.
123	*/
124	rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
125	rc = emR3HwaccmHandleRC(pVM, pVCpu, pCtx, rc);
126	return rc;
127	}
128
129
130	static int emR3SingleStepExecHwAcc(PVM pVM, PVMCPU pVCpu, uint32_t cIterations)
131	{
132	int rc = VINF_SUCCESS;
133	EMSTATE enmOldState = pVCpu->em.s.enmState;
134	pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_HWACC;
135
136	Log(("Single step BEGIN:\n"));
137	for (uint32_t i = 0; i < cIterations; i++)
138	{
139	DBGFR3PrgStep(pVCpu);
140	DBGFR3DisasInstrCurrentLog(pVCpu, "RSS: ");
141	rc = emR3HwAccStep(pVM, pVCpu);
142	if ( rc != VINF_SUCCESS
143	\|\| !HWACCMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
144	break;
145	}
146	Log(("Single step END: rc=%Rrc\n", rc));
147	CPUMSetGuestEFlags(pVCpu, CPUMGetGuestEFlags(pVCpu) & ~X86_EFL_TF);
148	pVCpu->em.s.enmState = enmOldState;
149	return rc == VINF_SUCCESS ? VINF_EM_RESCHEDULE_REM : rc;
150	}
151
152	#endif /* DEBUG */
153
154
155	/**
156	* Executes one (or perhaps a few more) instruction(s).
157	*
158	* @returns VBox status code suitable for EM.
159	*
160	* @param pVM VM handle.
161	* @param pVCpu VMCPU handle
162	* @param rcRC Return code from RC.
163	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
164	* instruction and prefix the log output with this text.
165	*/
166	#ifdef LOG_ENABLED
167	static int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
168	#else
169	static int emR3ExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
170	#endif
171	{
172	#ifdef LOG_ENABLED
173	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
174	#endif
175	int rc;
176	NOREF(rcRC);
177
178	/*
179	*
180	* The simple solution is to use the recompiler.
181	* The better solution is to disassemble the current instruction and
182	* try handle as many as possible without using REM.
183	*
184	*/
185
186	#ifdef LOG_ENABLED
187	/*
188	* Disassemble the instruction if requested.
189	*/
190	if (pszPrefix)
191	{
192	DBGFR3InfoLog(pVM, "cpumguest", pszPrefix);
193	DBGFR3DisasInstrCurrentLog(pVCpu, pszPrefix);
194	}
195	#endif /* LOG_ENABLED */
196
197	#if 0
198	/* Try our own instruction emulator before falling back to the recompiler. */
199	DISCPUSTATE Cpu;
200	rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "GEN EMU");
201	if (RT_SUCCESS(rc))
202	{
203	uint32_t size;
204
205	switch (Cpu.pCurInstr->opcode)
206	{
207	/* @todo we can do more now */
208	case OP_MOV:
209	case OP_AND:
210	case OP_OR:
211	case OP_XOR:
212	case OP_POP:
213	case OP_INC:
214	case OP_DEC:
215	case OP_XCHG:
216	STAM_PROFILE_START(&pVCpu->em.s.StatMiscEmu, a);
217	rc = EMInterpretInstructionCPU(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, &size);
218	if (RT_SUCCESS(rc))
219	{
220	pCtx->rip += Cpu.opsize;
221	#ifdef EM_NOTIFY_HWACCM
222	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC)
223	HWACCMR3NotifyEmulated(pVCpu);
224	#endif
225	STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
226	return rc;
227	}
228	if (rc != VERR_EM_INTERPRETER)
229	AssertMsgFailedReturn(("rc=%Rrc\n", rc), rc);
230	STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);
231	break;
232	}
233	}
234	#endif /* 0 */
235	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a);
236	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
237	#ifdef VBOX_WITH_REM
238	EMRemLock(pVM);
239	/* Flush the recompiler TLB if the VCPU has changed. */
240	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
241	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
242	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
243
244	rc = REMR3EmulateInstruction(pVM, pVCpu);
245	EMRemUnlock(pVM);
246	#else
247	rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); NOREF(pVM);
248	#endif
249	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, a);
250
251	#ifdef EM_NOTIFY_HWACCM
252	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HWACC)
253	HWACCMR3NotifyEmulated(pVCpu);
254	#endif
255	return rc;
256	}
257
258
259	/**
260	* Executes one (or perhaps a few more) instruction(s).
261	* This is just a wrapper for discarding pszPrefix in non-logging builds.
262	*
263	* @returns VBox status code suitable for EM.
264	* @param pVM VM handle.
265	* @param pVCpu VMCPU handle.
266	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
267	* instruction and prefix the log output with this text.
268	* @param rcGC GC return code
269	*/
270	DECLINLINE(int) emR3ExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
271	{
272	#ifdef LOG_ENABLED
273	return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
274	#else
275	return emR3ExecuteInstructionWorker(pVM, pVCpu, rcGC);
276	#endif
277	}
278
279	/**
280	* Executes one (or perhaps a few more) IO instruction(s).
281	*
282	* @returns VBox status code suitable for EM.
283	* @param pVM VM handle.
284	* @param pVCpu VMCPU handle.
285	*/
286	static int emR3ExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
287	{
288	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
289
290	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
291
292	/* Try to restart the io instruction that was refused in ring-0. */
293	VBOXSTRICTRC rcStrict = HWACCMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
294	if (IOM_SUCCESS(rcStrict))
295	{
296	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
297	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
298	return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
299	}
300	AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
301	RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
302
303	/** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
304	* as io instructions tend to come in packages of more than one
305	*/
306	DISCPUSTATE Cpu;
307	int rc2 = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "IO EMU");
308	if (RT_SUCCESS(rc2))
309	{
310	rcStrict = VINF_EM_RAW_EMULATE_INSTR;
311
312	if (!(Cpu.prefix & (PREFIX_REP \| PREFIX_REPNE)))
313	{
314	switch (Cpu.pCurInstr->opcode)
315	{
316	case OP_IN:
317	{
318	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
319	rcStrict = IOMInterpretIN(pVM, CPUMCTX2CORE(pCtx), &Cpu);
320	break;
321	}
322
323	case OP_OUT:
324	{
325	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
326	rcStrict = IOMInterpretOUT(pVM, CPUMCTX2CORE(pCtx), &Cpu);
327	break;
328	}
329	}
330	}
331	else if (Cpu.prefix & PREFIX_REP)
332	{
333	switch (Cpu.pCurInstr->opcode)
334	{
335	case OP_INSB:
336	case OP_INSWD:
337	{
338	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIn);
339	rcStrict = IOMInterpretINS(pVM, CPUMCTX2CORE(pCtx), &Cpu);
340	break;
341	}
342
343	case OP_OUTSB:
344	case OP_OUTSWD:
345	{
346	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatOut);
347	rcStrict = IOMInterpretOUTS(pVM, CPUMCTX2CORE(pCtx), &Cpu);
348	break;
349	}
350	}
351	}
352
353	/*
354	* Handled the I/O return codes.
355	* (The unhandled cases end up with rcStrict == VINF_EM_RAW_EMULATE_INSTR.)
356	*/
357	if (IOM_SUCCESS(rcStrict))
358	{
359	pCtx->rip += Cpu.opsize;
360	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
361	return VBOXSTRICTRC_TODO(rcStrict);
362	}
363
364	if (rcStrict == VINF_EM_RAW_GUEST_TRAP)
365	{
366	/* The active trap will be dispatched. */
367	Assert(TRPMHasTrap(pVCpu));
368	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
369	return VINF_SUCCESS;
370	}
371	AssertMsg(rcStrict != VINF_TRPM_XCPT_DISPATCHED, ("Handle VINF_TRPM_XCPT_DISPATCHED\n"));
372
373	if (RT_FAILURE(rcStrict))
374	{
375	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
376	return VBOXSTRICTRC_TODO(rcStrict);
377	}
378	AssertMsg(rcStrict == VINF_EM_RAW_EMULATE_INSTR \|\| rcStrict == VINF_EM_RESCHEDULE_REM, ("rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
379	}
380
381	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
382	return emR3ExecuteInstruction(pVM, pVCpu, "IO: ");
383	}
384
385
386	/**
387	* Process raw-mode specific forced actions.
388	*
389	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
390	*
391	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
392	* EM statuses.
393	* @param pVM The VM handle.
394	* @param pVCpu The VMCPU handle.
395	* @param pCtx The guest CPUM register context.
396	*/
397	static int emR3HwaccmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
398	{
399	/*
400	* Sync page directory.
401	*/
402	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
403	{
404	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
405	int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
406	if (RT_FAILURE(rc))
407	return rc;
408
409	Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
410
411	/* Prefetch pages for EIP and ESP. */
412	/** @todo This is rather expensive. Should investigate if it really helps at all. */
413	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
414	if (rc == VINF_SUCCESS)
415	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
416	if (rc != VINF_SUCCESS)
417	{
418	if (rc != VINF_PGM_SYNC_CR3)
419	{
420	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
421	return rc;
422	}
423	rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
424	if (RT_FAILURE(rc))
425	return rc;
426	}
427	/** @todo maybe prefetch the supervisor stack page as well */
428	Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
429	}
430
431	/*
432	* Allocate handy pages (just in case the above actions have consumed some pages).
433	*/
434	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
435	{
436	int rc = PGMR3PhysAllocateHandyPages(pVM);
437	if (RT_FAILURE(rc))
438	return rc;
439	}
440
441	/*
442	* Check whether we're out of memory now.
443	*
444	* This may stem from some of the above actions or operations that has been executed
445	* since we ran FFs. The allocate handy pages must for instance always be followed by
446	* this check.
447	*/
448	if (VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY))
449	return VINF_EM_NO_MEMORY;
450
451	return VINF_SUCCESS;
452	}
453
454
455	/**
456	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
457	*
458	* This function contains the raw-mode version of the inner
459	* execution loop (the outer loop being in EMR3ExecuteVM()).
460	*
461	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
462	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
463	*
464	* @param pVM VM handle.
465	* @param pVCpu VMCPU handle.
466	* @param pfFFDone Where to store an indicator telling whether or not
467	* FFs were done before returning.
468	*/
469	int emR3HwAccExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
470	{
471	int rc = VERR_IPE_UNINITIALIZED_STATUS;
472	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
473
474	LogFlow(("emR3HwAccExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs, (RTGCPTR)pCtx->rip));
475	*pfFFDone = false;
476
477	STAM_COUNTER_INC(&pVCpu->em.s.StatHwAccExecuteEntry);
478
479	#ifdef EM_NOTIFY_HWACCM
480	HWACCMR3NotifyScheduled(pVCpu);
481	#endif
482
483	/*
484	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
485	*/
486	for (;;)
487	{
488	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHwAccEntry, a);
489
490	/* Check if a forced reschedule is pending. */
491	if (HWACCMR3IsRescheduleRequired(pVM, pCtx))
492	{
493	rc = VINF_EM_RESCHEDULE;
494	break;
495	}
496
497	/*
498	* Process high priority pre-execution raw-mode FFs.
499	*/
500	VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_TRPM_SYNC_IDT \| VMCPU_FF_SELM_SYNC_TSS)); /* not relevant in HWACCM mode; shouldn't be set really. */
501	if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
502	\|\| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
503	{
504	rc = emR3HwaccmForcedActions(pVM, pVCpu, pCtx);
505	if (rc != VINF_SUCCESS)
506	break;
507	}
508
509	#ifdef LOG_ENABLED
510	/*
511	* Log important stuff before entering GC.
512	*/
513	if (TRPMHasTrap(pVCpu))
514	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs, (RTGCPTR)pCtx->rip));
515
516	uint32_t cpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
517
518	if (pVM->cCpus == 1)
519	{
520	if (pCtx->eflags.Bits.u1VM)
521	Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
522	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
523	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
524	else
525	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
526	}
527	else
528	{
529	if (pCtx->eflags.Bits.u1VM)
530	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
531	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
532	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
533	else
534	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
535	}
536	#endif /* LOG_ENABLED */
537
538	/*
539	* Execute the code.
540	*/
541	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHwAccEntry, a);
542
543	if (RT_LIKELY(EMR3IsExecutionAllowed(pVM, pVCpu)))
544	{
545	STAM_PROFILE_START(&pVCpu->em.s.StatHwAccExec, x);
546	rc = VMMR3HwAccRunGC(pVM, pVCpu);
547	STAM_PROFILE_STOP(&pVCpu->em.s.StatHwAccExec, x);
548	}
549	else
550	{
551	/* Give up this time slice; virtual time continues */
552	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
553	RTThreadSleep(5);
554	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
555	rc = VINF_SUCCESS;
556	}
557
558
559	/*
560	* Deal with high priority post execution FFs before doing anything else.
561	*/
562	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
563	if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
564	\|\| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
565	rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
566
567	/*
568	* Process the returned status code.
569	*/
570	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
571	break;
572
573	rc = emR3HwaccmHandleRC(pVM, pVCpu, pCtx, rc);
574	if (rc != VINF_SUCCESS)
575	break;
576
577	/*
578	* Check and execute forced actions.
579	*/
580	#ifdef VBOX_HIGH_RES_TIMERS_HACK
581	TMTimerPollVoid(pVM, pVCpu);
582	#endif
583	if ( VM_FF_ISPENDING(pVM, VM_FF_ALL_MASK)
584	\|\| VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_ALL_MASK))
585	{
586	rc = emR3ForcedActions(pVM, pVCpu, rc);
587	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
588	if ( rc != VINF_SUCCESS
589	&& rc != VINF_EM_RESCHEDULE_HWACC)
590	{
591	*pfFFDone = true;
592	break;
593	}
594	}
595	}
596
597	/*
598	* Return to outer loop.
599	*/
600	#if defined(LOG_ENABLED) && defined(DEBUG)
601	RTLogFlush(NULL);
602	#endif
603	return rc;
604	}
605

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp@ 40377

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