VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 77830

Last change on this file since 77830 was 76553, checked in by vboxsync, 6 years ago

scm --update-copyright-year
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 19.5 KB
Line 
1/* $Id: EMHM.cpp 76553 2019-01-01 01:45:53Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - hardware virtualization
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_EM
23#define VMCPU_INCL_CPUM_GST_CTX
24#include <VBox/vmm/em.h>
25#include <VBox/vmm/vmm.h>
26#include <VBox/vmm/csam.h>
27#include <VBox/vmm/selm.h>
28#include <VBox/vmm/trpm.h>
29#include <VBox/vmm/iem.h>
30#include <VBox/vmm/iom.h>
31#include <VBox/vmm/dbgf.h>
32#include <VBox/vmm/pgm.h>
33#ifdef VBOX_WITH_REM
34# include <VBox/vmm/rem.h>
35#endif
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/mm.h>
38#include <VBox/vmm/ssm.h>
39#include <VBox/vmm/pdmapi.h>
40#include <VBox/vmm/pdmcritsect.h>
41#include <VBox/vmm/pdmqueue.h>
42#include <VBox/vmm/hm.h>
43#include "EMInternal.h"
44#include <VBox/vmm/vm.h>
45#include <VBox/vmm/gim.h>
46#include <VBox/vmm/cpumdis.h>
47#include <VBox/dis.h>
48#include <VBox/disopcode.h>
49#include <VBox/err.h>
50#include <VBox/vmm/dbgf.h>
51#include "VMMTracing.h"
52
53#include <iprt/asm.h>
54
55
56/*********************************************************************************************************************************
57* Internal Functions *
58*********************************************************************************************************************************/
59static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
60DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
61static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
62static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
63
64#define EMHANDLERC_WITH_HM
65#define emR3ExecuteInstruction emR3HmExecuteInstruction
66#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
67#include "EMHandleRCTmpl.h"
68
69
70/**
71 * Executes instruction in HM mode if we can.
72 *
73 * This is somewhat comparable to REMR3EmulateInstruction.
74 *
75 * @returns VBox strict status code.
76 * @retval VINF_EM_DBG_STEPPED on success.
77 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
78 * HM right now.
79 *
80 * @param pVM The cross context VM structure.
81 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
82 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
83 * @thread EMT.
84 */
85VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
86{
87 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
88
89 if (!HMCanExecuteGuest(pVCpu, &pVCpu->cpum.GstCtx))
90 return VINF_EM_RESCHEDULE;
91
92 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
93 for (;;)
94 {
95 /*
96 * Service necessary FFs before going into HM.
97 */
98 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
99 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
100 {
101 VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
102 if (rcStrict != VINF_SUCCESS)
103 {
104 Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
105 return rcStrict;
106 }
107 }
108
109 /*
110 * Go execute it.
111 */
112 bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
113 VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
114 HMSetSingleInstruction(pVM, pVCpu, fOld);
115 LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
116
117 /*
118 * Handle high priority FFs and informational status codes. We don't do
119 * normal FF processing the caller or the next call can deal with them.
120 */
121 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
122 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
123 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
124 {
125 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
126 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
127 }
128
129 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
130 {
131 rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
132 Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
133 }
134
135 /*
136 * Done?
137 */
138 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
139 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
140 || pVCpu->cpum.GstCtx.rip != uOldRip)
141 {
142 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
143 rcStrict = VINF_EM_DBG_STEPPED;
144 Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
145 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
146 return rcStrict;
147 }
148 }
149}
150
151
152/**
153 * Executes one (or perhaps a few more) instruction(s).
154 *
155 * @returns VBox status code suitable for EM.
156 *
157 * @param pVM The cross context VM structure.
158 * @param pVCpu The cross context virtual CPU structure.
159 * @param rcRC Return code from RC.
160 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
161 * instruction and prefix the log output with this text.
162 */
163#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
164static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
165#else
166static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
167#endif
168{
169 NOREF(rcRC);
170
171#ifdef LOG_ENABLED
172 /*
173 * Log it.
174 */
175 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
176 if (pszPrefix)
177 {
178 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
179 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
180 }
181#endif
182
183 /*
184 * Use IEM and fallback on REM if the functionality is missing.
185 * Once IEM gets mature enough, nothing should ever fall back.
186 */
187 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
188 VBOXSTRICTRC rcStrict;
189 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
190 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
191 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
192 {
193 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
194 rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
195 }
196 else
197 {
198 RT_UNTRUSTED_VALIDATED_FENCE();
199 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
200 LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
201 }
202 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
203
204 if ( rcStrict == VERR_IEM_ASPECT_NOT_IMPLEMENTED
205 || rcStrict == VERR_IEM_INSTR_NOT_IMPLEMENTED)
206 {
207#ifdef VBOX_WITH_REM
208 STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
209 EMRemLock(pVM);
210 /* Flush the recompiler TLB if the VCPU has changed. */
211 if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
212 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
213 pVM->em.s.idLastRemCpu = pVCpu->idCpu;
214
215 rcStrict = REMR3EmulateInstruction(pVM, pVCpu);
216 EMRemUnlock(pVM);
217 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
218#else /* !VBOX_WITH_REM */
219 NOREF(pVM);
220#endif /* !VBOX_WITH_REM */
221 }
222
223 return VBOXSTRICTRC_TODO(rcStrict);
224}
225
226
227/**
228 * Executes one (or perhaps a few more) instruction(s).
229 * This is just a wrapper for discarding pszPrefix in non-logging builds.
230 *
231 * @returns VBox status code suitable for EM.
232 * @param pVM The cross context VM structure.
233 * @param pVCpu The cross context virtual CPU structure.
234 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
235 * instruction and prefix the log output with this text.
236 * @param rcGC GC return code
237 */
238DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
239{
240#ifdef LOG_ENABLED
241 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
242#else
243 RT_NOREF_PV(pszPrefix);
244 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
245#endif
246}
247
248
249/**
250 * Executes one (or perhaps a few more) IO instruction(s).
251 *
252 * @returns VBox status code suitable for EM.
253 * @param pVM The cross context VM structure.
254 * @param pVCpu The cross context virtual CPU structure.
255 */
256static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
257{
258 RT_NOREF(pVM);
259 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
260
261 VBOXSTRICTRC rcStrict;
262 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
263 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
264 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
265 {
266 /*
267 * Hand it over to the interpreter.
268 */
269 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
270 rcStrict = IEMExecOne(pVCpu);
271 LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
272 }
273 else
274 {
275 RT_UNTRUSTED_VALIDATED_FENCE();
276 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
277 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
278 LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
279 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
280 }
281
282 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
283 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
284 return VBOXSTRICTRC_TODO(rcStrict);
285}
286
287
288/**
289 * Process HM specific forced actions.
290 *
291 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
292 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
293 *
294 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
295 * EM statuses.
296 * @param pVM The cross context VM structure.
297 * @param pVCpu The cross context virtual CPU structure.
298 */
299static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
300{
301 /*
302 * Sync page directory.
303 */
304 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
305 {
306 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
307 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
308 int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
309 if (RT_FAILURE(rc))
310 return rc;
311
312#ifdef VBOX_WITH_RAW_MODE
313 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
314#endif
315
316 /* Prefetch pages for EIP and ESP. */
317 /** @todo This is rather expensive. Should investigate if it really helps at all. */
318 /** @todo this should be skipped! */
319 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
320 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rip));
321 if (rc == VINF_SUCCESS)
322 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rsp));
323 if (rc != VINF_SUCCESS)
324 {
325 if (rc != VINF_PGM_SYNC_CR3)
326 {
327 AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
328 return rc;
329 }
330 rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
331 if (RT_FAILURE(rc))
332 return rc;
333 }
334 /** @todo maybe prefetch the supervisor stack page as well */
335#ifdef VBOX_WITH_RAW_MODE
336 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
337#endif
338 }
339
340 /*
341 * Allocate handy pages (just in case the above actions have consumed some pages).
342 */
343 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
344 {
345 int rc = PGMR3PhysAllocateHandyPages(pVM);
346 if (RT_FAILURE(rc))
347 return rc;
348 }
349
350 /*
351 * Check whether we're out of memory now.
352 *
353 * This may stem from some of the above actions or operations that has been executed
354 * since we ran FFs. The allocate handy pages must for instance always be followed by
355 * this check.
356 */
357 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
358 return VINF_EM_NO_MEMORY;
359
360 return VINF_SUCCESS;
361}
362
363
364/**
365 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
366 *
367 * This function contains the raw-mode version of the inner
368 * execution loop (the outer loop being in EMR3ExecuteVM()).
369 *
370 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
371 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
372 *
373 * @param pVM The cross context VM structure.
374 * @param pVCpu The cross context virtual CPU structure.
375 * @param pfFFDone Where to store an indicator telling whether or not
376 * FFs were done before returning.
377 */
378int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
379{
380 int rc = VERR_IPE_UNINITIALIZED_STATUS;
381
382 LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
383 *pfFFDone = false;
384
385 STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
386
387 /*
388 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
389 */
390 for (;;)
391 {
392 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
393
394 /* Check if a forced reschedule is pending. */
395 if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
396 {
397 rc = VINF_EM_RESCHEDULE;
398 break;
399 }
400
401 /*
402 * Process high priority pre-execution raw-mode FFs.
403 */
404#ifdef VBOX_WITH_RAW_MODE
405 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
406#endif
407 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
408 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
409 {
410 rc = emR3HmForcedActions(pVM, pVCpu);
411 if (rc != VINF_SUCCESS)
412 break;
413 }
414
415#ifdef LOG_ENABLED
416 /*
417 * Log important stuff before entering GC.
418 */
419 if (TRPMHasTrap(pVCpu))
420 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
421
422 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
423 if (pVM->cCpus == 1)
424 {
425 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
426 Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
427 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
428 Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
429 else
430 Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
431 }
432 else
433 {
434 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
435 Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
436 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
437 Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
438 else
439 Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
440 }
441#endif /* LOG_ENABLED */
442
443 /*
444 * Execute the code.
445 */
446 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
447
448 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
449 {
450 STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
451 rc = VMMR3HmRunGC(pVM, pVCpu);
452 STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
453 }
454 else
455 {
456 /* Give up this time slice; virtual time continues */
457 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
458 RTThreadSleep(5);
459 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
460 rc = VINF_SUCCESS;
461 }
462
463
464 /*
465 * Deal with high priority post execution FFs before doing anything else.
466 */
467 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
468 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
469 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
470 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
471
472 /*
473 * Process the returned status code.
474 */
475 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
476 break;
477
478 rc = emR3HmHandleRC(pVM, pVCpu, rc);
479 if (rc != VINF_SUCCESS)
480 break;
481
482 /*
483 * Check and execute forced actions.
484 */
485#ifdef VBOX_HIGH_RES_TIMERS_HACK
486 TMTimerPollVoid(pVM, pVCpu);
487#endif
488 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
489 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
490 {
491 rc = emR3ForcedActions(pVM, pVCpu, rc);
492 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
493 if ( rc != VINF_SUCCESS
494 && rc != VINF_EM_RESCHEDULE_HM)
495 {
496 *pfFFDone = true;
497 break;
498 }
499 }
500 }
501
502 /*
503 * Return to outer loop.
504 */
505#if defined(LOG_ENABLED) && defined(DEBUG)
506 RTLogFlush(NULL);
507#endif
508 return rc;
509}
510
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette