1 | /* $Id: EMHM.cpp 100144 2023-06-09 15:39:42Z vboxsync $ */
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2 | /** @file
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3 | * EM - Execution Monitor / Manager - hardware virtualization
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 |
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29 | /*********************************************************************************************************************************
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30 | * Header Files *
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31 | *********************************************************************************************************************************/
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32 | #define LOG_GROUP LOG_GROUP_EM
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33 | #define VMCPU_INCL_CPUM_GST_CTX
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34 | #include <VBox/vmm/em.h>
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35 | #include <VBox/vmm/vmm.h>
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36 | #include <VBox/vmm/selm.h>
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37 | #include <VBox/vmm/trpm.h>
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38 | #include <VBox/vmm/iem.h>
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39 | #include <VBox/vmm/iom.h>
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40 | #include <VBox/vmm/dbgf.h>
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41 | #include <VBox/vmm/pgm.h>
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42 | #include <VBox/vmm/tm.h>
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43 | #include <VBox/vmm/mm.h>
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44 | #include <VBox/vmm/ssm.h>
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45 | #include <VBox/vmm/pdmapi.h>
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46 | #include <VBox/vmm/pdmcritsect.h>
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47 | #include <VBox/vmm/pdmqueue.h>
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48 | #include <VBox/vmm/hm.h>
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49 | #include "EMInternal.h"
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50 | #include <VBox/vmm/vm.h>
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51 | #include <VBox/vmm/gim.h>
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52 | #include <VBox/vmm/cpumdis.h>
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53 | #include <VBox/dis.h>
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54 | #include <VBox/err.h>
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55 | #include <VBox/vmm/dbgf.h>
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56 | #include "VMMTracing.h"
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57 |
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58 | #include <iprt/asm.h>
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59 |
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60 | #include "EMInline.h"
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61 |
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62 |
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63 | /*********************************************************************************************************************************
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64 | * Internal Functions *
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65 | *********************************************************************************************************************************/
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66 | static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
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67 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
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68 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
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69 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
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70 |
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71 | #define EMHANDLERC_WITH_HM
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72 | #define emR3ExecuteInstruction emR3HmExecuteInstruction
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73 | #define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
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74 | #include "EMHandleRCTmpl.h"
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75 |
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76 |
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77 | /**
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78 | * Executes instruction in HM mode if we can.
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79 | *
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80 | * This is somewhat comparable to REMR3EmulateInstruction.
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81 | *
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82 | * @returns VBox strict status code.
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83 | * @retval VINF_EM_DBG_STEPPED on success.
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84 | * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
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85 | * HM right now.
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86 | *
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87 | * @param pVM The cross context VM structure.
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88 | * @param pVCpu The cross context virtual CPU structure for the calling EMT.
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89 | * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
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90 | * @thread EMT.
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91 | */
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92 | VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
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93 | {
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94 | Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
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95 |
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96 | if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
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97 | return VINF_EM_RESCHEDULE;
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98 |
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99 | uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
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100 | for (;;)
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101 | {
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102 | /*
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103 | * Service necessary FFs before going into HM.
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104 | */
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105 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
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106 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
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107 | {
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108 | VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
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109 | if (rcStrict != VINF_SUCCESS)
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110 | {
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111 | Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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112 | return rcStrict;
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113 | }
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114 | }
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115 |
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116 | /*
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117 | * Go execute it.
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118 | */
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119 | bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
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120 | VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
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121 | HMSetSingleInstruction(pVM, pVCpu, fOld);
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122 | LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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123 |
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124 | /*
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125 | * Handle high priority FFs and informational status codes. We don't do
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126 | * normal FF processing the caller or the next call can deal with them.
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127 | */
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128 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
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129 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
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130 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
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131 | {
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132 | rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
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133 | LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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134 | }
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135 |
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136 | if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
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137 | {
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138 | rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
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139 | Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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140 | }
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141 |
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142 | /*
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143 | * Done?
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144 | */
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145 | if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
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146 | || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
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147 | || pVCpu->cpum.GstCtx.rip != uOldRip)
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148 | {
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149 | if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
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150 | rcStrict = VINF_EM_DBG_STEPPED;
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151 | Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
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152 | CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
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153 | return rcStrict;
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154 | }
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155 | }
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156 | }
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157 |
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158 |
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159 | /**
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160 | * Executes one (or perhaps a few more) instruction(s).
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161 | *
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162 | * @returns VBox status code suitable for EM.
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163 | *
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164 | * @param pVM The cross context VM structure.
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165 | * @param pVCpu The cross context virtual CPU structure.
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166 | * @param rcRC Return code from RC.
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167 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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168 | * instruction and prefix the log output with this text.
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169 | */
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170 | #if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
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171 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
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172 | #else
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173 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
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174 | #endif
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175 | {
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176 | RT_NOREF(rcRC, pVM);
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177 |
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178 | #ifdef LOG_ENABLED
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179 | /*
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180 | * Log it.
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181 | */
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182 | Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
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183 | if (pszPrefix)
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184 | {
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185 | DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
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186 | DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
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187 | }
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188 | #endif
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189 |
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190 | /*
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191 | * Use IEM and fallback on REM if the functionality is missing.
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192 | * Once IEM gets mature enough, nothing should ever fall back.
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193 | */
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194 | STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
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195 | VBOXSTRICTRC rcStrict;
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196 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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197 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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198 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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199 | {
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200 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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201 | rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
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202 | }
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203 | else
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204 | {
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205 | RT_UNTRUSTED_VALIDATED_FENCE();
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206 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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207 | LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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208 | }
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209 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
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210 |
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211 | return VBOXSTRICTRC_TODO(rcStrict);
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212 | }
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213 |
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214 |
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215 | /**
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216 | * Executes one (or perhaps a few more) instruction(s).
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217 | * This is just a wrapper for discarding pszPrefix in non-logging builds.
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218 | *
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219 | * @returns VBox status code suitable for EM.
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220 | * @param pVM The cross context VM structure.
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221 | * @param pVCpu The cross context virtual CPU structure.
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222 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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223 | * instruction and prefix the log output with this text.
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224 | * @param rcGC GC return code
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225 | */
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226 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
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227 | {
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228 | #ifdef LOG_ENABLED
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229 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
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230 | #else
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231 | RT_NOREF_PV(pszPrefix);
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232 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
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233 | #endif
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234 | }
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235 |
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236 |
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237 | /**
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238 | * Executes one (or perhaps a few more) IO instruction(s).
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239 | *
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240 | * @returns VBox status code suitable for EM.
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241 | * @param pVM The cross context VM structure.
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242 | * @param pVCpu The cross context virtual CPU structure.
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243 | */
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244 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
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245 | {
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246 | RT_NOREF(pVM);
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247 | STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
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248 |
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249 | VBOXSTRICTRC rcStrict;
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250 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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251 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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252 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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253 | {
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254 | /*
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255 | * Hand it over to the interpreter.
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256 | */
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257 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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258 | rcStrict = IEMExecOne(pVCpu);
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259 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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260 | }
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261 | else
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262 | {
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263 | RT_UNTRUSTED_VALIDATED_FENCE();
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264 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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265 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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266 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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267 | STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
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268 | }
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269 |
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270 | STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
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271 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
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272 | return VBOXSTRICTRC_TODO(rcStrict);
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273 | }
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274 |
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275 |
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276 | /**
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277 | * Process HM specific forced actions.
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278 | *
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279 | * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
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280 | * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
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281 | *
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282 | * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
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283 | * EM statuses.
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284 | * @param pVM The cross context VM structure.
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285 | * @param pVCpu The cross context virtual CPU structure.
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286 | */
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287 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
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288 | {
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289 | /*
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290 | * Sync page directory.
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291 | */
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292 | if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
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293 | {
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294 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
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295 | Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
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296 | int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
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297 | if (RT_FAILURE(rc))
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298 | return rc;
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299 |
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300 | /* Prefetch pages for EIP and ESP. */
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301 | /** @todo This is rather expensive. Should investigate if it really helps at all. */
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302 | /** @todo this should be skipped! */
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303 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
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304 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_CS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rip));
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305 | if (rc == VINF_SUCCESS)
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306 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_SS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rsp));
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307 | if (rc != VINF_SUCCESS)
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308 | {
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309 | if (rc != VINF_PGM_SYNC_CR3)
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310 | {
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311 | AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
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312 | return rc;
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313 | }
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314 | rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
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315 | if (RT_FAILURE(rc))
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316 | return rc;
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317 | }
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318 | /** @todo maybe prefetch the supervisor stack page as well */
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319 | }
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320 |
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321 | /*
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322 | * Allocate handy pages (just in case the above actions have consumed some pages).
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323 | */
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324 | if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
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325 | {
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326 | int rc = PGMR3PhysAllocateHandyPages(pVM);
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327 | if (RT_FAILURE(rc))
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328 | return rc;
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329 | }
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330 |
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331 | /*
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332 | * Check whether we're out of memory now.
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333 | *
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334 | * This may stem from some of the above actions or operations that has been executed
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335 | * since we ran FFs. The allocate handy pages must for instance always be followed by
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336 | * this check.
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337 | */
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338 | if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
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339 | return VINF_EM_NO_MEMORY;
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340 |
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341 | return VINF_SUCCESS;
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342 | }
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343 |
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344 |
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345 | /**
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346 | * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
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347 | *
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348 | * This function contains the inner EM execution loop for HM (the outer loop
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349 | * being in EMR3ExecuteVM()).
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350 | *
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351 | * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
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352 | * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
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353 | *
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354 | * @param pVM The cross context VM structure.
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355 | * @param pVCpu The cross context virtual CPU structure.
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356 | * @param pfFFDone Where to store an indicator telling whether or not
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357 | * FFs were done before returning.
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358 | */
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359 | int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
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360 | {
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361 | int rc = VERR_IPE_UNINITIALIZED_STATUS;
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362 |
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363 | LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
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364 | *pfFFDone = false;
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365 |
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366 | STAM_REL_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
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367 |
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368 | /*
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369 | * Spin till we get a forced action which returns anything but VINF_SUCCESS.
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370 | */
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371 | for (;;)
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372 | {
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373 | STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
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374 |
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375 | /* Check if a forced reschedule is pending. */
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376 | if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
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377 | {
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378 | rc = VINF_EM_RESCHEDULE;
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379 | break;
|
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380 | }
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381 |
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382 | /*
|
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383 | * Process high priority pre-execution raw-mode FFs.
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384 | */
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385 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
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386 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
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387 | {
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388 | rc = emR3HmForcedActions(pVM, pVCpu);
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389 | if (rc != VINF_SUCCESS)
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390 | break;
|
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391 | }
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392 |
|
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393 | #ifdef LOG_ENABLED
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394 | /*
|
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395 | * Log important stuff before entering GC.
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396 | */
|
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397 | if (TRPMHasTrap(pVCpu))
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398 | Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
|
---|
399 |
|
---|
400 | uint32_t cpl = CPUMGetGuestCPL(pVCpu);
|
---|
401 | if (pVM->cCpus == 1)
|
---|
402 | {
|
---|
403 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
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404 | Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
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405 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
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406 | Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
407 | else
|
---|
408 | Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
409 | }
|
---|
410 | else
|
---|
411 | {
|
---|
412 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
---|
413 | Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
---|
414 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
---|
415 | Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
416 | else
|
---|
417 | Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
418 | }
|
---|
419 | #endif /* LOG_ENABLED */
|
---|
420 |
|
---|
421 | /*
|
---|
422 | * Execute the code.
|
---|
423 | */
|
---|
424 | STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
|
---|
425 |
|
---|
426 | if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
|
---|
427 | {
|
---|
428 | STAM_REL_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
|
---|
429 | rc = VMMR3HmRunGC(pVM, pVCpu);
|
---|
430 | STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
|
---|
431 | }
|
---|
432 | else
|
---|
433 | {
|
---|
434 | /* Give up this time slice; virtual time continues */
|
---|
435 | STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
|
---|
436 | RTThreadSleep(5);
|
---|
437 | STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
|
---|
438 | rc = VINF_SUCCESS;
|
---|
439 | }
|
---|
440 |
|
---|
441 |
|
---|
442 | /*
|
---|
443 | * Deal with high priority post execution FFs before doing anything else.
|
---|
444 | */
|
---|
445 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
|
---|
446 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
|
---|
447 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
|
---|
448 | rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
|
---|
449 |
|
---|
450 | /*
|
---|
451 | * Process the returned status code.
|
---|
452 | */
|
---|
453 | if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
|
---|
454 | break;
|
---|
455 |
|
---|
456 | rc = emR3HmHandleRC(pVM, pVCpu, rc);
|
---|
457 | if (rc != VINF_SUCCESS)
|
---|
458 | break;
|
---|
459 |
|
---|
460 | /*
|
---|
461 | * Check and execute forced actions.
|
---|
462 | */
|
---|
463 | #ifdef VBOX_HIGH_RES_TIMERS_HACK
|
---|
464 | TMTimerPollVoid(pVM, pVCpu);
|
---|
465 | #endif
|
---|
466 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
|
---|
467 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
|
---|
468 | {
|
---|
469 | rc = emR3ForcedActions(pVM, pVCpu, rc);
|
---|
470 | VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
|
---|
471 | if ( rc != VINF_SUCCESS
|
---|
472 | && rc != VINF_EM_RESCHEDULE_EXEC_ENGINE)
|
---|
473 | {
|
---|
474 | *pfFFDone = true;
|
---|
475 | break;
|
---|
476 | }
|
---|
477 | }
|
---|
478 | }
|
---|
479 |
|
---|
480 | /*
|
---|
481 | * Return to outer loop.
|
---|
482 | */
|
---|
483 | #if defined(LOG_ENABLED) && defined(DEBUG)
|
---|
484 | RTLogFlush(NULL);
|
---|
485 | #endif
|
---|
486 | return rc;
|
---|
487 | }
|
---|
488 |
|
---|