EMHM.cpp@ 97698

Last change on this file since 97698 was 97203, checked in by vboxsync, 2 years ago
VMM/SELM,DIS: Changed SELMToFlat and SELMToFlatEx to use PCPUMCTX instead of PCPUMCTXCORE and use X86_SREG_XX indexes instead of DISSELREG.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 18.6 KB

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1	/* $Id: EMHM.cpp 97203 2022-10-18 12:28:22Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2022 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/dbgf.h>
41	#include <VBox/vmm/pgm.h>
42	#include <VBox/vmm/tm.h>
43	#include <VBox/vmm/mm.h>
44	#include <VBox/vmm/ssm.h>
45	#include <VBox/vmm/pdmapi.h>
46	#include <VBox/vmm/pdmcritsect.h>
47	#include <VBox/vmm/pdmqueue.h>
48	#include <VBox/vmm/hm.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/vmm/cpumdis.h>
53	#include <VBox/dis.h>
54	#include <VBox/disopcode.h>
55	#include <VBox/err.h>
56	#include <VBox/vmm/dbgf.h>
57	#include "VMMTracing.h"
58
59	#include <iprt/asm.h>
60
61
62	/*********************************************************************************************************************************
63	* Internal Functions *
64	*********************************************************************************************************************************/
65	static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
66	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
69
70	#define EMHANDLERC_WITH_HM
71	#define emR3ExecuteInstruction emR3HmExecuteInstruction
72	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
73	#include "EMHandleRCTmpl.h"
74
75
76	/**
77	* Executes instruction in HM mode if we can.
78	*
79	* This is somewhat comparable to REMR3EmulateInstruction.
80	*
81	* @returns VBox strict status code.
82	* @retval VINF_EM_DBG_STEPPED on success.
83	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84	* HM right now.
85	*
86	* @param pVM The cross context VM structure.
87	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
88	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89	* @thread EMT.
90	*/
91	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92	{
93	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
94
95	if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
96	return VINF_EM_RESCHEDULE;
97
98	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
99	for (;;)
100	{
101	/*
102	* Service necessary FFs before going into HM.
103	*/
104	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
105	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
106	{
107	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
108	if (rcStrict != VINF_SUCCESS)
109	{
110	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
111	return rcStrict;
112	}
113	}
114
115	/*
116	* Go execute it.
117	*/
118	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
119	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
120	HMSetSingleInstruction(pVM, pVCpu, fOld);
121	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
122
123	/*
124	* Handle high priority FFs and informational status codes. We don't do
125	* normal FF processing the caller or the next call can deal with them.
126	*/
127	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
128	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
129	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
130	{
131	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
132	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
133	}
134
135	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
136	{
137	rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
138	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
139	}
140
141	/*
142	* Done?
143	*/
144	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
145	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
146	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
147	{
148	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
149	rcStrict = VINF_EM_DBG_STEPPED;
150	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
151	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
152	return rcStrict;
153	}
154	}
155	}
156
157
158	/**
159	* Executes one (or perhaps a few more) instruction(s).
160	*
161	* @returns VBox status code suitable for EM.
162	*
163	* @param pVM The cross context VM structure.
164	* @param pVCpu The cross context virtual CPU structure.
165	* @param rcRC Return code from RC.
166	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
167	* instruction and prefix the log output with this text.
168	*/
169	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
170	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
171	#else
172	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
173	#endif
174	{
175	RT_NOREF(rcRC, pVM);
176
177	#ifdef LOG_ENABLED
178	/*
179	* Log it.
180	*/
181	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
182	if (pszPrefix)
183	{
184	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
185	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
186	}
187	#endif
188
189	/*
190	* Use IEM and fallback on REM if the functionality is missing.
191	* Once IEM gets mature enough, nothing should ever fall back.
192	*/
193	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
194	VBOXSTRICTRC rcStrict;
195	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
196	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
197	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
198	{
199	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
200	rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
201	}
202	else
203	{
204	RT_UNTRUSTED_VALIDATED_FENCE();
205	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
206	LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
207	}
208	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
209
210	return VBOXSTRICTRC_TODO(rcStrict);
211	}
212
213
214	/**
215	* Executes one (or perhaps a few more) instruction(s).
216	* This is just a wrapper for discarding pszPrefix in non-logging builds.
217	*
218	* @returns VBox status code suitable for EM.
219	* @param pVM The cross context VM structure.
220	* @param pVCpu The cross context virtual CPU structure.
221	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
222	* instruction and prefix the log output with this text.
223	* @param rcGC GC return code
224	*/
225	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
226	{
227	#ifdef LOG_ENABLED
228	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
229	#else
230	RT_NOREF_PV(pszPrefix);
231	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
232	#endif
233	}
234
235
236	/**
237	* Executes one (or perhaps a few more) IO instruction(s).
238	*
239	* @returns VBox status code suitable for EM.
240	* @param pVM The cross context VM structure.
241	* @param pVCpu The cross context virtual CPU structure.
242	*/
243	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
244	{
245	RT_NOREF(pVM);
246	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
247
248	VBOXSTRICTRC rcStrict;
249	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
250	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
251	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
252	{
253	/*
254	* Hand it over to the interpreter.
255	*/
256	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
257	rcStrict = IEMExecOne(pVCpu);
258	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
259	}
260	else
261	{
262	RT_UNTRUSTED_VALIDATED_FENCE();
263	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
264	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
265	LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
266	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
267	}
268
269	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
270	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
271	return VBOXSTRICTRC_TODO(rcStrict);
272	}
273
274
275	/**
276	* Process HM specific forced actions.
277	*
278	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
279	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
280	*
281	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
282	* EM statuses.
283	* @param pVM The cross context VM structure.
284	* @param pVCpu The cross context virtual CPU structure.
285	*/
286	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
287	{
288	/*
289	* Sync page directory.
290	*/
291	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
292	{
293	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR3 \| CPUMCTX_EXTRN_CR4);
294	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
295	int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
296	if (RT_FAILURE(rc))
297	return rc;
298
299	/* Prefetch pages for EIP and ESP. */
300	/** @todo This is rather expensive. Should investigate if it really helps at all. */
301	/** @todo this should be skipped! */
302	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_SS);
303	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_CS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rip));
304	if (rc == VINF_SUCCESS)
305	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_SS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rsp));
306	if (rc != VINF_SUCCESS)
307	{
308	if (rc != VINF_PGM_SYNC_CR3)
309	{
310	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
311	return rc;
312	}
313	rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
314	if (RT_FAILURE(rc))
315	return rc;
316	}
317	/** @todo maybe prefetch the supervisor stack page as well */
318	}
319
320	/*
321	* Allocate handy pages (just in case the above actions have consumed some pages).
322	*/
323	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
324	{
325	int rc = PGMR3PhysAllocateHandyPages(pVM);
326	if (RT_FAILURE(rc))
327	return rc;
328	}
329
330	/*
331	* Check whether we're out of memory now.
332	*
333	* This may stem from some of the above actions or operations that has been executed
334	* since we ran FFs. The allocate handy pages must for instance always be followed by
335	* this check.
336	*/
337	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
338	return VINF_EM_NO_MEMORY;
339
340	return VINF_SUCCESS;
341	}
342
343
344	/**
345	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
346	*
347	* This function contains the raw-mode version of the inner
348	* execution loop (the outer loop being in EMR3ExecuteVM()).
349	*
350	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
351	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
352	*
353	* @param pVM The cross context VM structure.
354	* @param pVCpu The cross context virtual CPU structure.
355	* @param pfFFDone Where to store an indicator telling whether or not
356	* FFs were done before returning.
357	*/
358	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
359	{
360	int rc = VERR_IPE_UNINITIALIZED_STATUS;
361
362	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
363	*pfFFDone = false;
364
365	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
366
367	/*
368	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
369	*/
370	for (;;)
371	{
372	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
373
374	/* Check if a forced reschedule is pending. */
375	if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
376	{
377	rc = VINF_EM_RESCHEDULE;
378	break;
379	}
380
381	/*
382	* Process high priority pre-execution raw-mode FFs.
383	*/
384	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
385	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
386	{
387	rc = emR3HmForcedActions(pVM, pVCpu);
388	if (rc != VINF_SUCCESS)
389	break;
390	}
391
392	#ifdef LOG_ENABLED
393	/*
394	* Log important stuff before entering GC.
395	*/
396	if (TRPMHasTrap(pVCpu))
397	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
398
399	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
400	if (pVM->cCpus == 1)
401	{
402	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
403	Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
404	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
405	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
406	else
407	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
408	}
409	else
410	{
411	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
412	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
413	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
414	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
415	else
416	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
417	}
418	#endif /* LOG_ENABLED */
419
420	/*
421	* Execute the code.
422	*/
423	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
424
425	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
426	{
427	STAM_REL_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
428	rc = VMMR3HmRunGC(pVM, pVCpu);
429	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
430	}
431	else
432	{
433	/* Give up this time slice; virtual time continues */
434	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
435	RTThreadSleep(5);
436	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
437	rc = VINF_SUCCESS;
438	}
439
440
441	/*
442	* Deal with high priority post execution FFs before doing anything else.
443	*/
444	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
445	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
446	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
447	rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
448
449	/*
450	* Process the returned status code.
451	*/
452	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
453	break;
454
455	rc = emR3HmHandleRC(pVM, pVCpu, rc);
456	if (rc != VINF_SUCCESS)
457	break;
458
459	/*
460	* Check and execute forced actions.
461	*/
462	#ifdef VBOX_HIGH_RES_TIMERS_HACK
463	TMTimerPollVoid(pVM, pVCpu);
464	#endif
465	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
466	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
467	{
468	rc = emR3ForcedActions(pVM, pVCpu, rc);
469	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
470	if ( rc != VINF_SUCCESS
471	&& rc != VINF_EM_RESCHEDULE_HM)
472	{
473	*pfFFDone = true;
474	break;
475	}
476	}
477	}
478
479	/*
480	* Return to outer loop.
481	*/
482	#if defined(LOG_ENABLED) && defined(DEBUG)
483	RTLogFlush(NULL);
484	#endif
485	return rc;
486	}
487

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 97698

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