EMHM.cpp

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1	/* $Id: EMHM.cpp 106061 2024-09-16 14:03:52Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/dbgf.h>
41	#include <VBox/vmm/pgm.h>
42	#include <VBox/vmm/tm.h>
43	#include <VBox/vmm/mm.h>
44	#include <VBox/vmm/ssm.h>
45	#include <VBox/vmm/pdmapi.h>
46	#include <VBox/vmm/pdmcritsect.h>
47	#include <VBox/vmm/pdmqueue.h>
48	#include <VBox/vmm/hm.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/vmm/cpumdis.h>
53	#include <VBox/dis.h>
54	#include <VBox/err.h>
55	#include <VBox/vmm/dbgf.h>
56	#include "VMMTracing.h"
57
58	#include <iprt/asm.h>
59
60	#include "EMInline.h"
61
62
63	/*********************************************************************************************************************************
64	* Internal Functions *
65	*********************************************************************************************************************************/
66	static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
67	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
68	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
69	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
70
71	#define EMHANDLERC_WITH_HM
72	#define emR3ExecuteInstruction emR3HmExecuteInstruction
73	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
74	#include "EMHandleRCTmpl.h"
75
76
77	/**
78	* Executes instruction in HM mode if we can.
79	*
80	* This is somewhat comparable to REMR3EmulateInstruction.
81	*
82	* @returns VBox strict status code.
83	* @retval VINF_EM_DBG_STEPPED on success.
84	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
85	* HM right now.
86	*
87	* @param pVM The cross context VM structure.
88	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
89	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
90	* @thread EMT.
91	*/
92	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
93	{
94	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96	if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
97	return VINF_EM_RESCHEDULE;
98
99	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
100	for (;;)
101	{
102	/*
103	* Service necessary FFs before going into HM.
104	*/
105	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
106	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
107	{
108	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
109	if (rcStrict != VINF_SUCCESS)
110	{
111	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
112	return rcStrict;
113	}
114	}
115
116	/*
117	* Go execute it.
118	*/
119	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
120	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
121	HMSetSingleInstruction(pVM, pVCpu, fOld);
122	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
123
124	/*
125	* Handle high priority FFs and informational status codes. We don't do
126	* normal FF processing the caller or the next call can deal with them.
127	*/
128	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
129	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
130	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
131	{
132	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
133	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
134	}
135
136	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
137	{
138	rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
139	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
140	}
141
142	/*
143	* Done?
144	*/
145	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
146	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
147	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
148	{
149	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
150	rcStrict = VINF_EM_DBG_STEPPED;
151	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
152	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
153	return rcStrict;
154	}
155	}
156	}
157
158
159	/**
160	* Executes one (or perhaps a few more) instruction(s).
161	*
162	* @returns VBox status code suitable for EM.
163	*
164	* @param pVM The cross context VM structure.
165	* @param pVCpu The cross context virtual CPU structure.
166	* @param rcRC Return code from RC.
167	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
168	* instruction and prefix the log output with this text.
169	*/
170	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
171	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
172	#else
173	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
174	#endif
175	{
176	RT_NOREF(rcRC, pVM);
177
178	#ifdef LOG_ENABLED
179	/*
180	* Log it.
181	*/
182	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
183	if (pszPrefix)
184	{
185	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
186	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
187	}
188	#endif
189
190	/*
191	* Use IEM and fallback on REM if the functionality is missing.
192	* Once IEM gets mature enough, nothing should ever fall back.
193	*/
194	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
195	VBOXSTRICTRC rcStrict;
196	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
197	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
198	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
199	{
200	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
201	rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
202	}
203	else
204	{
205	RT_UNTRUSTED_VALIDATED_FENCE();
206	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
207	LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
208	}
209	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
210
211	return VBOXSTRICTRC_TODO(rcStrict);
212	}
213
214
215	/**
216	* Executes one (or perhaps a few more) instruction(s).
217	* This is just a wrapper for discarding pszPrefix in non-logging builds.
218	*
219	* @returns VBox status code suitable for EM.
220	* @param pVM The cross context VM structure.
221	* @param pVCpu The cross context virtual CPU structure.
222	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
223	* instruction and prefix the log output with this text.
224	* @param rcGC GC return code
225	*/
226	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
227	{
228	#ifdef LOG_ENABLED
229	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
230	#else
231	RT_NOREF_PV(pszPrefix);
232	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
233	#endif
234	}
235
236
237	/**
238	* Executes one (or perhaps a few more) IO instruction(s).
239	*
240	* @returns VBox status code suitable for EM.
241	* @param pVM The cross context VM structure.
242	* @param pVCpu The cross context virtual CPU structure.
243	*/
244	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
245	{
246	RT_NOREF(pVM);
247	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
248
249	VBOXSTRICTRC rcStrict;
250	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
251	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
252	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
253	{
254	/*
255	* Hand it over to the interpreter.
256	*/
257	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
258	rcStrict = IEMExecOne(pVCpu);
259	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
260	}
261	else
262	{
263	RT_UNTRUSTED_VALIDATED_FENCE();
264	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
265	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
266	LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
267	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
268	}
269
270	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
271	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
272	return VBOXSTRICTRC_TODO(rcStrict);
273	}
274
275
276	/**
277	* Process HM specific forced actions.
278	*
279	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
280	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
281	*
282	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
283	* EM statuses.
284	* @param pVM The cross context VM structure.
285	* @param pVCpu The cross context virtual CPU structure.
286	*/
287	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
288	{
289	/*
290	* Sync page directory.
291	*/
292	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
293	{
294	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR3 \| CPUMCTX_EXTRN_CR4);
295	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
296	int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
297	if (RT_FAILURE(rc))
298	return rc;
299
300	/* Prefetch pages for EIP and ESP. */
301	/** @todo This is rather expensive. Should investigate if it really helps at all. */
302	/** @todo this should be skipped! */
303	CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_SS);
304	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_CS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rip));
305	if (rc == VINF_SUCCESS)
306	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVCpu, X86_SREG_SS, &pVCpu->cpum.GstCtx, pVCpu->cpum.GstCtx.rsp));
307	if (rc != VINF_SUCCESS)
308	{
309	if (rc != VINF_PGM_SYNC_CR3)
310	{
311	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
312	return rc;
313	}
314	rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
315	if (RT_FAILURE(rc))
316	return rc;
317	}
318	/** @todo maybe prefetch the supervisor stack page as well */
319	}
320
321	/*
322	* Allocate handy pages (just in case the above actions have consumed some pages).
323	*/
324	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
325	{
326	int rc = PGMR3PhysAllocateHandyPages(pVM);
327	if (RT_FAILURE(rc))
328	return rc;
329	}
330
331	/*
332	* Check whether we're out of memory now.
333	*
334	* This may stem from some of the above actions or operations that has been executed
335	* since we ran FFs. The allocate handy pages must for instance always be followed by
336	* this check.
337	*/
338	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
339	return VINF_EM_NO_MEMORY;
340
341	return VINF_SUCCESS;
342	}
343
344
345	/**
346	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
347	*
348	* This function contains the inner EM execution loop for HM (the outer loop
349	* being in EMR3ExecuteVM()).
350	*
351	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
352	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
353	*
354	* @param pVM The cross context VM structure.
355	* @param pVCpu The cross context virtual CPU structure.
356	* @param pfFFDone Where to store an indicator telling whether or not
357	* FFs were done before returning.
358	*/
359	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
360	{
361	int rc = VERR_IPE_UNINITIALIZED_STATUS;
362
363	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
364	*pfFFDone = false;
365
366	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
367
368	/*
369	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
370	*/
371	for (;;)
372	{
373	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
374
375	/* Check if a forced reschedule is pending. */
376	if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
377	{
378	rc = VINF_EM_RESCHEDULE;
379	break;
380	}
381
382	/*
383	* Process high priority pre-execution raw-mode FFs.
384	*/
385	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
386	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
387	{
388	rc = emR3HmForcedActions(pVM, pVCpu);
389	if (rc != VINF_SUCCESS)
390	break;
391	}
392
393	#ifdef LOG_ENABLED
394	/*
395	* Log important stuff before entering GC.
396	*/
397	if (TRPMHasTrap(pVCpu))
398	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
399
400	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
401	if (pVM->cCpus == 1)
402	{
403	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
404	Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
405	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
406	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
407	else
408	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
409	}
410	else
411	{
412	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
413	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
414	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
415	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
416	else
417	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
418	}
419	#endif /* LOG_ENABLED */
420
421	/*
422	* Execute the code.
423	*/
424	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
425
426	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
427	{
428	STAM_REL_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
429	rc = VMMR3HmRunGC(pVM, pVCpu);
430	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
431	}
432	else
433	{
434	/* Give up this time slice; virtual time continues */
435	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
436	RTThreadSleep(5);
437	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
438	rc = VINF_SUCCESS;
439	}
440
441
442	/*
443	* Deal with high priority post execution FFs before doing anything else.
444	*/
445	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
446	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
447	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
448	rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
449
450	/*
451	* Process the returned status code.
452	*/
453	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
454	break;
455
456	rc = emR3HmHandleRC(pVM, pVCpu, rc);
457	if (rc != VINF_SUCCESS)
458	break;
459
460	/*
461	* Check and execute forced actions.
462	*/
463	#ifdef VBOX_HIGH_RES_TIMERS_HACK
464	TMTimerPollVoid(pVM, pVCpu);
465	#endif
466	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
467	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
468	{
469	rc = emR3ForcedActions(pVM, pVCpu, rc);
470	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
471	if ( rc != VINF_SUCCESS
472	&& rc != VINF_EM_RESCHEDULE_EXEC_ENGINE)
473	{
474	*pfFFDone = true;
475	break;
476	}
477	}
478	}
479
480	/*
481	* Return to outer loop.
482	*/
483	#if defined(LOG_ENABLED) && defined(DEBUG)
484	RTLogFlush(NULL);
485	#endif
486	return rc;
487	}
488

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp

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