VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp@ 80191

Last change on this file since 80191 was 80191, checked in by vboxsync, 5 years ago

VMM/r3: Refactored VMCPU enumeration in preparation that aCpus will be replaced with a pointer array. Removed two raw-mode offset members from the CPUM and CPUMCPU sub-structures. bugref:9217 bugref:9517
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1/* $Id: DBGFReg.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Register Methods.
4 */
5
6/*
7 * Copyright (C) 2010-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define VBOX_BUGREF_9217_PART_I
23#define LOG_GROUP LOG_GROUP_DBGF
24#include <VBox/vmm/dbgf.h>
25#include "DBGFInternal.h"
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/vm.h>
28#include <VBox/vmm/uvm.h>
29#include <VBox/param.h>
30#include <VBox/err.h>
31#include <VBox/log.h>
32#include <iprt/ctype.h>
33#include <iprt/string.h>
34#include <iprt/uint128.h>
35
36
37/*********************************************************************************************************************************
38* Defined Constants And Macros *
39*********************************************************************************************************************************/
40/** Locks the register database for writing. */
41#define DBGF_REG_DB_LOCK_WRITE(pUVM) \
42 do { \
43 int rcSem = RTSemRWRequestWrite((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
44 AssertRC(rcSem); \
45 } while (0)
46
47/** Unlocks the register database after writing. */
48#define DBGF_REG_DB_UNLOCK_WRITE(pUVM) \
49 do { \
50 int rcSem = RTSemRWReleaseWrite((pUVM)->dbgf.s.hRegDbLock); \
51 AssertRC(rcSem); \
52 } while (0)
53
54/** Locks the register database for reading. */
55#define DBGF_REG_DB_LOCK_READ(pUVM) \
56 do { \
57 int rcSem = RTSemRWRequestRead((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
58 AssertRC(rcSem); \
59 } while (0)
60
61/** Unlocks the register database after reading. */
62#define DBGF_REG_DB_UNLOCK_READ(pUVM) \
63 do { \
64 int rcSem = RTSemRWReleaseRead((pUVM)->dbgf.s.hRegDbLock); \
65 AssertRC(rcSem); \
66 } while (0)
67
68
69/** The max length of a set, register or sub-field name. */
70#define DBGF_REG_MAX_NAME 40
71
72
73/*********************************************************************************************************************************
74* Structures and Typedefs *
75*********************************************************************************************************************************/
76/**
77 * Register set registration record type.
78 */
79typedef enum DBGFREGSETTYPE
80{
81 /** Invalid zero value. */
82 DBGFREGSETTYPE_INVALID = 0,
83 /** CPU record. */
84 DBGFREGSETTYPE_CPU,
85 /** Device record. */
86 DBGFREGSETTYPE_DEVICE,
87 /** End of valid record types. */
88 DBGFREGSETTYPE_END
89} DBGFREGSETTYPE;
90
91
92/**
93 * Register set registration record.
94 */
95typedef struct DBGFREGSET
96{
97 /** String space core. */
98 RTSTRSPACECORE Core;
99 /** The registration record type. */
100 DBGFREGSETTYPE enmType;
101 /** The user argument for the callbacks. */
102 union
103 {
104 /** The CPU view. */
105 PVMCPU pVCpu;
106 /** The device view. */
107 PPDMDEVINS pDevIns;
108 /** The general view. */
109 void *pv;
110 } uUserArg;
111
112 /** The register descriptors. */
113 PCDBGFREGDESC paDescs;
114 /** The number of register descriptors. */
115 uint32_t cDescs;
116
117 /** Array of lookup records.
118 * The first part of the array runs parallel to paDescs, the rest are
119 * covering for aliases and bitfield variations. It's done this way to
120 * simplify the query all operations. */
121 struct DBGFREGLOOKUP *paLookupRecs;
122 /** The number of lookup records. */
123 uint32_t cLookupRecs;
124
125 /** The register name prefix. */
126 char szPrefix[1];
127} DBGFREGSET;
128/** Pointer to a register registration record. */
129typedef DBGFREGSET *PDBGFREGSET;
130/** Pointer to a const register registration record. */
131typedef DBGFREGSET const *PCDBGFREGSET;
132
133
134/**
135 * Register lookup record.
136 */
137typedef struct DBGFREGLOOKUP
138{
139 /** The string space core. */
140 RTSTRSPACECORE Core;
141 /** Pointer to the set. */
142 PCDBGFREGSET pSet;
143 /** Pointer to the register descriptor. */
144 PCDBGFREGDESC pDesc;
145 /** If an alias this points to the alias descriptor, NULL if not. */
146 PCDBGFREGALIAS pAlias;
147 /** If a sub-field this points to the sub-field descriptor, NULL if not. */
148 PCDBGFREGSUBFIELD pSubField;
149} DBGFREGLOOKUP;
150/** Pointer to a register lookup record. */
151typedef DBGFREGLOOKUP *PDBGFREGLOOKUP;
152/** Pointer to a const register lookup record. */
153typedef DBGFREGLOOKUP const *PCDBGFREGLOOKUP;
154
155
156/**
157 * Argument packet from DBGFR3RegNmQueryAll to dbgfR3RegNmQueryAllWorker.
158 */
159typedef struct DBGFR3REGNMQUERYALLARGS
160{
161 /** The output register array. */
162 PDBGFREGENTRYNM paRegs;
163 /** The number of entries in the output array. */
164 size_t cRegs;
165 /** The current register number when enumerating the string space.
166 * @remarks Only used by EMT(0). */
167 size_t iReg;
168} DBGFR3REGNMQUERYALLARGS;
169/** Pointer to a dbgfR3RegNmQueryAllWorker argument packet. */
170typedef DBGFR3REGNMQUERYALLARGS *PDBGFR3REGNMQUERYALLARGS;
171
172
173/**
174 * Argument packet passed by DBGFR3RegPrintfV to dbgfR3RegPrintfCbOutput and
175 * dbgfR3RegPrintfCbFormat.
176 */
177typedef struct DBGFR3REGPRINTFARGS
178{
179 /** The user mode VM handle. */
180 PUVM pUVM;
181 /** The target CPU. */
182 VMCPUID idCpu;
183 /** Set if we're looking at guest registers. */
184 bool fGuestRegs;
185 /** The output buffer. */
186 char *pszBuf;
187 /** The format string. */
188 const char *pszFormat;
189 /** The va list with format arguments. */
190 va_list va;
191
192 /** The current buffer offset. */
193 size_t offBuf;
194 /** The amount of buffer space left, not counting the terminator char. */
195 size_t cchLeftBuf;
196 /** The status code of the whole operation. First error is return,
197 * subsequent ones are suppressed. */
198 int rc;
199} DBGFR3REGPRINTFARGS;
200/** Pointer to a DBGFR3RegPrintfV argument packet. */
201typedef DBGFR3REGPRINTFARGS *PDBGFR3REGPRINTFARGS;
202
203
204
205/**
206 * Initializes the register database.
207 *
208 * @returns VBox status code.
209 * @param pUVM The user mode VM handle.
210 */
211int dbgfR3RegInit(PUVM pUVM)
212{
213 int rc = VINF_SUCCESS;
214 if (!pUVM->dbgf.s.fRegDbInitialized)
215 {
216 rc = RTSemRWCreate(&pUVM->dbgf.s.hRegDbLock);
217 pUVM->dbgf.s.fRegDbInitialized = RT_SUCCESS(rc);
218 }
219 return rc;
220}
221
222
223/**
224 * Terminates the register database.
225 *
226 * @param pUVM The user mode VM handle.
227 */
228void dbgfR3RegTerm(PUVM pUVM)
229{
230 RTSemRWDestroy(pUVM->dbgf.s.hRegDbLock);
231 pUVM->dbgf.s.hRegDbLock = NIL_RTSEMRW;
232 pUVM->dbgf.s.fRegDbInitialized = false;
233}
234
235
236/**
237 * Validates a register name.
238 *
239 * This is used for prefixes, aliases and field names.
240 *
241 * @returns true if valid, false if not.
242 * @param pszName The register name to validate.
243 * @param chDot Set to '.' if accepted, otherwise 0.
244 */
245static bool dbgfR3RegIsNameValid(const char *pszName, char chDot)
246{
247 const char *psz = pszName;
248 if (!RT_C_IS_ALPHA(*psz))
249 return false;
250 char ch;
251 while ((ch = *++psz))
252 if ( !RT_C_IS_LOWER(ch)
253 && !RT_C_IS_DIGIT(ch)
254 && ch != '_'
255 && ch != chDot)
256 return false;
257 if (psz - pszName > DBGF_REG_MAX_NAME)
258 return false;
259 return true;
260}
261
262
263/**
264 * Common worker for registering a register set.
265 *
266 * @returns VBox status code.
267 * @param pUVM The user mode VM handle.
268 * @param paRegisters The register descriptors.
269 * @param enmType The set type.
270 * @param pvUserArg The user argument for the callbacks.
271 * @param pszPrefix The name prefix.
272 * @param iInstance The instance number to be appended to @a
273 * pszPrefix when creating the set name.
274 */
275static int dbgfR3RegRegisterCommon(PUVM pUVM, PCDBGFREGDESC paRegisters, DBGFREGSETTYPE enmType, void *pvUserArg,
276 const char *pszPrefix, uint32_t iInstance)
277{
278 /*
279 * Validate input.
280 */
281 /* The name components. */
282 AssertMsgReturn(dbgfR3RegIsNameValid(pszPrefix, 0), ("%s\n", pszPrefix), VERR_INVALID_NAME);
283 const char *psz = RTStrEnd(pszPrefix, RTSTR_MAX);
284 bool const fNeedUnderscore = RT_C_IS_DIGIT(psz[-1]);
285 size_t const cchPrefix = psz - pszPrefix + fNeedUnderscore;
286 AssertMsgReturn(cchPrefix < RT_SIZEOFMEMB(DBGFREGSET, szPrefix) - 4 - 1, ("%s\n", pszPrefix), VERR_INVALID_NAME);
287
288 AssertMsgReturn(iInstance <= 9999, ("%d\n", iInstance), VERR_INVALID_NAME);
289
290 /* The descriptors. */
291 uint32_t cLookupRecs = 0;
292 uint32_t iDesc;
293 for (iDesc = 0; paRegisters[iDesc].pszName != NULL; iDesc++)
294 {
295 AssertMsgReturn(dbgfR3RegIsNameValid(paRegisters[iDesc].pszName, 0), ("%s (#%u)\n", paRegisters[iDesc].pszName, iDesc), VERR_INVALID_NAME);
296
297 if (enmType == DBGFREGSETTYPE_CPU)
298 AssertMsgReturn(iDesc < (unsigned)DBGFREG_END && (unsigned)paRegisters[iDesc].enmReg == iDesc,
299 ("%d iDesc=%d\n", paRegisters[iDesc].enmReg, iDesc),
300 VERR_INVALID_PARAMETER);
301 else
302 AssertReturn(paRegisters[iDesc].enmReg == DBGFREG_END, VERR_INVALID_PARAMETER);
303 AssertReturn( paRegisters[iDesc].enmType > DBGFREGVALTYPE_INVALID
304 && paRegisters[iDesc].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
305 AssertMsgReturn(!(paRegisters[iDesc].fFlags & ~DBGFREG_FLAGS_READ_ONLY),
306 ("%#x (#%u)\n", paRegisters[iDesc].fFlags, iDesc),
307 VERR_INVALID_PARAMETER);
308 AssertPtrReturn(paRegisters[iDesc].pfnGet, VERR_INVALID_PARAMETER);
309 AssertReturn(RT_VALID_PTR(paRegisters[iDesc].pfnSet) || (paRegisters[iDesc].fFlags & DBGFREG_FLAGS_READ_ONLY),
310 VERR_INVALID_PARAMETER);
311
312 uint32_t iAlias = 0;
313 PCDBGFREGALIAS paAliases = paRegisters[iDesc].paAliases;
314 if (paAliases)
315 {
316 AssertPtrReturn(paAliases, VERR_INVALID_PARAMETER);
317 for (; paAliases[iAlias].pszName; iAlias++)
318 {
319 AssertMsgReturn(dbgfR3RegIsNameValid(paAliases[iAlias].pszName, 0), ("%s (%s)\n", paAliases[iAlias].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
320 AssertReturn( paAliases[iAlias].enmType > DBGFREGVALTYPE_INVALID
321 && paAliases[iAlias].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
322 }
323 }
324
325 uint32_t iSubField = 0;
326 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
327 if (paSubFields)
328 {
329 AssertPtrReturn(paSubFields, VERR_INVALID_PARAMETER);
330 for (; paSubFields[iSubField].pszName; iSubField++)
331 {
332 AssertMsgReturn(dbgfR3RegIsNameValid(paSubFields[iSubField].pszName, '.'), ("%s (%s)\n", paSubFields[iSubField].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
333 AssertReturn(paSubFields[iSubField].iFirstBit + paSubFields[iSubField].cBits <= 128, VERR_INVALID_PARAMETER);
334 AssertReturn(paSubFields[iSubField].cBits + paSubFields[iSubField].cShift <= 128, VERR_INVALID_PARAMETER);
335 AssertPtrNullReturn(paSubFields[iSubField].pfnGet, VERR_INVALID_POINTER);
336 AssertPtrNullReturn(paSubFields[iSubField].pfnSet, VERR_INVALID_POINTER);
337 }
338 }
339
340 cLookupRecs += (1 + iAlias) * (1 + iSubField);
341 }
342
343 /* Check the instance number of the CPUs. */
344 AssertReturn(enmType != DBGFREGSETTYPE_CPU || iInstance < pUVM->cCpus, VERR_INVALID_CPU_ID);
345
346 /*
347 * Allocate a new record and all associated lookup records.
348 */
349 size_t cbRegSet = RT_UOFFSETOF_DYN(DBGFREGSET, szPrefix[cchPrefix + 4 + 1]);
350 cbRegSet = RT_ALIGN_Z(cbRegSet, 32);
351 size_t const offLookupRecArray = cbRegSet;
352 cbRegSet += cLookupRecs * sizeof(DBGFREGLOOKUP);
353
354 PDBGFREGSET pRegSet = (PDBGFREGSET)MMR3HeapAllocZU(pUVM, MM_TAG_DBGF_REG, cbRegSet);
355 if (!pRegSet)
356 return VERR_NO_MEMORY;
357
358 /*
359 * Initialize the new record.
360 */
361 pRegSet->Core.pszString = pRegSet->szPrefix;
362 pRegSet->enmType = enmType;
363 pRegSet->uUserArg.pv = pvUserArg;
364 pRegSet->paDescs = paRegisters;
365 pRegSet->cDescs = iDesc;
366 pRegSet->cLookupRecs = cLookupRecs;
367 pRegSet->paLookupRecs = (PDBGFREGLOOKUP)((uintptr_t)pRegSet + offLookupRecArray);
368 if (fNeedUnderscore)
369 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s_%u", pszPrefix, iInstance);
370 else
371 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s%u", pszPrefix, iInstance);
372
373
374 /*
375 * Initialize the lookup records. See DBGFREGSET::paLookupRecs.
376 */
377 char szName[DBGF_REG_MAX_NAME * 3 + 16];
378 strcpy(szName, pRegSet->szPrefix);
379 char *pszReg = strchr(szName, '\0');
380 *pszReg++ = '.';
381
382 /* Array parallel to the descriptors. */
383 int rc = VINF_SUCCESS;
384 PDBGFREGLOOKUP pLookupRec = &pRegSet->paLookupRecs[0];
385 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
386 {
387 strcpy(pszReg, paRegisters[iDesc].pszName);
388 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
389 if (!pLookupRec->Core.pszString)
390 rc = VERR_NO_STR_MEMORY;
391 pLookupRec->pSet = pRegSet;
392 pLookupRec->pDesc = &paRegisters[iDesc];
393 pLookupRec->pAlias = NULL;
394 pLookupRec->pSubField = NULL;
395 pLookupRec++;
396 }
397
398 /* Aliases and sub-fields. */
399 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
400 {
401 PCDBGFREGALIAS pCurAlias = NULL; /* first time we add sub-fields for the real name. */
402 PCDBGFREGALIAS pNextAlias = paRegisters[iDesc].paAliases;
403 const char *pszRegName = paRegisters[iDesc].pszName;
404 while (RT_SUCCESS(rc))
405 {
406 /* Add sub-field records. */
407 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
408 if (paSubFields)
409 {
410 size_t cchReg = strlen(pszRegName);
411 memcpy(pszReg, pszRegName, cchReg);
412 char *pszSub = &pszReg[cchReg];
413 *pszSub++ = '.';
414 for (uint32_t iSubField = 0; paSubFields[iSubField].pszName && RT_SUCCESS(rc); iSubField++)
415 {
416 strcpy(pszSub, paSubFields[iSubField].pszName);
417 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
418 if (!pLookupRec->Core.pszString)
419 rc = VERR_NO_STR_MEMORY;
420 pLookupRec->pSet = pRegSet;
421 pLookupRec->pDesc = &paRegisters[iDesc];
422 pLookupRec->pAlias = pCurAlias;
423 pLookupRec->pSubField = &paSubFields[iSubField];
424 pLookupRec++;
425 }
426 }
427
428 /* Advance to the next alias. */
429 pCurAlias = pNextAlias++;
430 if (!pCurAlias)
431 break;
432 pszRegName = pCurAlias->pszName;
433 if (!pszRegName)
434 break;
435
436 /* The alias record. */
437 strcpy(pszReg, pszRegName);
438 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
439 if (!pLookupRec->Core.pszString)
440 rc = VERR_NO_STR_MEMORY;
441 pLookupRec->pSet = pRegSet;
442 pLookupRec->pDesc = &paRegisters[iDesc];
443 pLookupRec->pAlias = pCurAlias;
444 pLookupRec->pSubField = NULL;
445 pLookupRec++;
446 }
447 }
448 Assert(pLookupRec == &pRegSet->paLookupRecs[pRegSet->cLookupRecs]);
449
450 if (RT_SUCCESS(rc))
451 {
452 /*
453 * Insert the record into the register set string space and optionally into
454 * the CPU register set cache.
455 */
456 DBGF_REG_DB_LOCK_WRITE(pUVM);
457
458 bool fInserted = RTStrSpaceInsert(&pUVM->dbgf.s.RegSetSpace, &pRegSet->Core);
459 if (fInserted)
460 {
461 pUVM->dbgf.s.cRegs += pRegSet->cDescs;
462 if (enmType == DBGFREGSETTYPE_CPU)
463 {
464 if (pRegSet->cDescs > DBGFREG_ALL_COUNT)
465 pUVM->dbgf.s.cRegs -= pRegSet->cDescs - DBGFREG_ALL_COUNT;
466 if (!strcmp(pszPrefix, "cpu"))
467 pUVM->aCpus[iInstance].dbgf.s.pGuestRegSet = pRegSet;
468 else
469 pUVM->aCpus[iInstance].dbgf.s.pHyperRegSet = pRegSet;
470 }
471
472 PDBGFREGLOOKUP paLookupRecs = pRegSet->paLookupRecs;
473 uint32_t iLookupRec = pRegSet->cLookupRecs;
474 while (iLookupRec-- > 0)
475 {
476 bool fInserted2 = RTStrSpaceInsert(&pUVM->dbgf.s.RegSpace, &paLookupRecs[iLookupRec].Core);
477 AssertMsg(fInserted2, ("'%s'", paLookupRecs[iLookupRec].Core.pszString)); NOREF(fInserted2);
478 }
479
480 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
481 return VINF_SUCCESS;
482 }
483
484 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
485 rc = VERR_DUPLICATE;
486 }
487
488 /*
489 * Bail out.
490 */
491 for (uint32_t i = 0; i < pRegSet->cLookupRecs; i++)
492 MMR3HeapFree((char *)pRegSet->paLookupRecs[i].Core.pszString);
493 MMR3HeapFree(pRegSet);
494
495 return rc;
496}
497
498
499/**
500 * Registers a set of registers for a CPU.
501 *
502 * @returns VBox status code.
503 * @param pVM The cross context VM structure.
504 * @param pVCpu The cross context virtual CPU structure.
505 * @param paRegisters The register descriptors.
506 * @param fGuestRegs Set if it's the guest registers, clear if
507 * hypervisor registers.
508 */
509VMMR3_INT_DECL(int) DBGFR3RegRegisterCpu(PVM pVM, PVMCPU pVCpu, PCDBGFREGDESC paRegisters, bool fGuestRegs)
510{
511 PUVM pUVM = pVM->pUVM;
512 if (!pUVM->dbgf.s.fRegDbInitialized)
513 {
514 int rc = dbgfR3RegInit(pUVM);
515 if (RT_FAILURE(rc))
516 return rc;
517 }
518
519 return dbgfR3RegRegisterCommon(pUVM, paRegisters, DBGFREGSETTYPE_CPU, pVCpu,
520 fGuestRegs ? "cpu" : "hypercpu", pVCpu->idCpu);
521}
522
523
524/**
525 * Registers a set of registers for a device.
526 *
527 * @returns VBox status code.
528 * @param pVM The cross context VM structure.
529 * @param paRegisters The register descriptors.
530 * @param pDevIns The device instance. This will be the callback user
531 * argument.
532 * @param pszPrefix The device name.
533 * @param iInstance The device instance.
534 */
535VMMR3_INT_DECL(int) DBGFR3RegRegisterDevice(PVM pVM, PCDBGFREGDESC paRegisters, PPDMDEVINS pDevIns,
536 const char *pszPrefix, uint32_t iInstance)
537{
538 AssertPtrReturn(paRegisters, VERR_INVALID_POINTER);
539 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
540 AssertPtrReturn(pszPrefix, VERR_INVALID_POINTER);
541
542 return dbgfR3RegRegisterCommon(pVM->pUVM, paRegisters, DBGFREGSETTYPE_DEVICE, pDevIns, pszPrefix, iInstance);
543}
544
545
546/**
547 * Clears the register value variable.
548 *
549 * @param pValue The variable to clear.
550 */
551DECLINLINE(void) dbgfR3RegValClear(PDBGFREGVAL pValue)
552{
553 pValue->au64[0] = 0;
554 pValue->au64[1] = 0;
555 pValue->au64[2] = 0;
556 pValue->au64[3] = 0;
557 pValue->au64[4] = 0;
558 pValue->au64[5] = 0;
559 pValue->au64[6] = 0;
560 pValue->au64[7] = 0;
561}
562
563
564/**
565 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
566 *
567 * @param pValue The value.
568 * @param u64 The integer value.
569 */
570DECLINLINE(void) dbgfR3RegValR80SetU64(PDBGFREGVAL pValue, uint64_t u64)
571{
572 /** @todo fixme */
573 pValue->r80.s.fSign = 0;
574 pValue->r80.s.uExponent = 16383;
575 pValue->r80.s.u64Mantissa = u64;
576}
577
578
579/**
580 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
581 *
582 * @param pValue The value.
583 * @param u128 The integer value.
584 */
585DECLINLINE(void) dbgfR3RegValR80SetU128(PDBGFREGVAL pValue, RTUINT128U u128)
586{
587 /** @todo fixme */
588 pValue->r80.s.fSign = 0;
589 pValue->r80.s.uExponent = 16383;
590 pValue->r80.s.u64Mantissa = u128.s.Lo;
591}
592
593
594/**
595 * Get a 80-bit floating point variable as a 64-bit unsigned integer.
596 *
597 * @returns 64-bit unsigned integer.
598 * @param pValue The value.
599 */
600DECLINLINE(uint64_t) dbgfR3RegValR80GetU64(PCDBGFREGVAL pValue)
601{
602 /** @todo stupid, stupid MSC. */
603 return pValue->r80.s.u64Mantissa;
604}
605
606
607/**
608 * Get a 80-bit floating point variable as a 128-bit unsigned integer.
609 *
610 * @returns 128-bit unsigned integer.
611 * @param pValue The value.
612 */
613DECLINLINE(RTUINT128U) dbgfR3RegValR80GetU128(PCDBGFREGVAL pValue)
614{
615 /** @todo stupid, stupid MSC. */
616 RTUINT128U uRet;
617#if 0
618 uRet.s.Lo = (uint64_t)InVal.lrd;
619 uRet.s.Hi = (uint64_t)InVal.lrd / _4G / _4G;
620#else
621 uRet.s.Lo = pValue->r80.s.u64Mantissa;
622 uRet.s.Hi = 0;
623#endif
624 return uRet;
625}
626
627
628/**
629 * Performs a cast between register value types.
630 *
631 * @retval VINF_SUCCESS
632 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
633 * @retval VINF_DBGF_TRUNCATED_REGISTER
634 * @retval VERR_DBGF_UNSUPPORTED_CAST
635 *
636 * @param pValue The value to cast (input + output).
637 * @param enmFromType The input value.
638 * @param enmToType The desired output value.
639 */
640static int dbgfR3RegValCast(PDBGFREGVAL pValue, DBGFREGVALTYPE enmFromType, DBGFREGVALTYPE enmToType)
641{
642 DBGFREGVAL const InVal = *pValue;
643 dbgfR3RegValClear(pValue);
644
645 /* Note! No default cases here as gcc warnings about missing enum values
646 are desired. */
647 switch (enmFromType)
648 {
649 case DBGFREGVALTYPE_U8:
650 switch (enmToType)
651 {
652 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u8; return VINF_SUCCESS;
653 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
654 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
655 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
656 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
657 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
658 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
659 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u8); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
660 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
661
662 case DBGFREGVALTYPE_32BIT_HACK:
663 case DBGFREGVALTYPE_END:
664 case DBGFREGVALTYPE_INVALID:
665 break;
666 }
667 break;
668
669 case DBGFREGVALTYPE_U16:
670 switch (enmToType)
671 {
672 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u16; return VINF_DBGF_TRUNCATED_REGISTER;
673 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u16; return VINF_SUCCESS;
674 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
675 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
676 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
677 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
678 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
679 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u16); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
680 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
681
682 case DBGFREGVALTYPE_32BIT_HACK:
683 case DBGFREGVALTYPE_END:
684 case DBGFREGVALTYPE_INVALID:
685 break;
686 }
687 break;
688
689 case DBGFREGVALTYPE_U32:
690 switch (enmToType)
691 {
692 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
693 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
694 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u32; return VINF_SUCCESS;
695 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
696 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
697 case DBGFREGVALTYPE_U256: pValue->u256.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
698 case DBGFREGVALTYPE_U512: pValue->u512.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
699 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u32); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
700 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
701
702 case DBGFREGVALTYPE_32BIT_HACK:
703 case DBGFREGVALTYPE_END:
704 case DBGFREGVALTYPE_INVALID:
705 break;
706 }
707 break;
708
709 case DBGFREGVALTYPE_U64:
710 switch (enmToType)
711 {
712 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
713 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
714 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
715 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u64; return VINF_SUCCESS;
716 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
717 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
718 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
719 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u64); return VINF_DBGF_TRUNCATED_REGISTER;
720 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
721
722 case DBGFREGVALTYPE_32BIT_HACK:
723 case DBGFREGVALTYPE_END:
724 case DBGFREGVALTYPE_INVALID:
725 break;
726 }
727 break;
728
729 case DBGFREGVALTYPE_U128:
730 switch (enmToType)
731 {
732 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
733 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
734 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
735 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
736 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u128; return VINF_SUCCESS;
737 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
738 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
739 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u128); return VINF_DBGF_TRUNCATED_REGISTER;
740 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
741
742 case DBGFREGVALTYPE_32BIT_HACK:
743 case DBGFREGVALTYPE_END:
744 case DBGFREGVALTYPE_INVALID:
745 break;
746 }
747 break;
748
749 case DBGFREGVALTYPE_U256:
750 switch (enmToType)
751 {
752 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
753 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
754 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u256.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
755 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u256.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
756 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u256.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
757 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u256; return VINF_SUCCESS;
758 case DBGFREGVALTYPE_U512: pValue->u512.OWords.ow0 = InVal.u256; return VINF_SUCCESS;
759 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u256.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
760 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
761
762 case DBGFREGVALTYPE_32BIT_HACK:
763 case DBGFREGVALTYPE_END:
764 case DBGFREGVALTYPE_INVALID:
765 break;
766 }
767 break;
768
769 case DBGFREGVALTYPE_U512:
770 switch (enmToType)
771 {
772 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
773 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
774 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u512.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
775 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u512.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
776 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u512.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
777 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u512.OWords.ow0; return VINF_DBGF_TRUNCATED_REGISTER;
778 case DBGFREGVALTYPE_U512: pValue->u512 = InVal.u512; return VINF_SUCCESS;
779 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u512.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
780 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
781
782 case DBGFREGVALTYPE_32BIT_HACK:
783 case DBGFREGVALTYPE_END:
784 case DBGFREGVALTYPE_INVALID:
785 break;
786 }
787 break;
788
789 case DBGFREGVALTYPE_R80:
790 switch (enmToType)
791 {
792 case DBGFREGVALTYPE_U8: pValue->u8 = (uint8_t )dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
793 case DBGFREGVALTYPE_U16: pValue->u16 = (uint16_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
794 case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
795 case DBGFREGVALTYPE_U64: pValue->u64 = (uint64_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
796 case DBGFREGVALTYPE_U128: pValue->u128 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
797 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
798 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
799 case DBGFREGVALTYPE_R80: pValue->r80 = InVal.r80; return VINF_SUCCESS;
800 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
801
802 case DBGFREGVALTYPE_32BIT_HACK:
803 case DBGFREGVALTYPE_END:
804 case DBGFREGVALTYPE_INVALID:
805 break;
806 }
807 break;
808
809 case DBGFREGVALTYPE_DTR:
810 switch (enmToType)
811 {
812 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
813 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
814 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
815 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
816 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
817 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
818 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
819 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.dtr.u64Base); return VINF_DBGF_TRUNCATED_REGISTER;
820 case DBGFREGVALTYPE_DTR: pValue->dtr = InVal.dtr; return VINF_SUCCESS;
821
822 case DBGFREGVALTYPE_32BIT_HACK:
823 case DBGFREGVALTYPE_END:
824 case DBGFREGVALTYPE_INVALID:
825 break;
826 }
827 break;
828
829 case DBGFREGVALTYPE_INVALID:
830 case DBGFREGVALTYPE_END:
831 case DBGFREGVALTYPE_32BIT_HACK:
832 break;
833 }
834
835 AssertMsgFailed(("%d / %d\n", enmFromType, enmToType));
836 return VERR_DBGF_UNSUPPORTED_CAST;
837}
838
839
840/**
841 * Worker for the CPU register queries.
842 *
843 * @returns VBox status code.
844 * @retval VINF_SUCCESS
845 * @retval VERR_INVALID_VM_HANDLE
846 * @retval VERR_INVALID_CPU_ID
847 * @retval VERR_DBGF_REGISTER_NOT_FOUND
848 * @retval VERR_DBGF_UNSUPPORTED_CAST
849 * @retval VINF_DBGF_TRUNCATED_REGISTER
850 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
851 *
852 * @param pUVM The user mode VM handle.
853 * @param idCpu The virtual CPU ID.
854 * @param enmReg The register to query.
855 * @param enmType The desired return type.
856 * @param fGuestRegs Query guest CPU registers if set (true),
857 * hypervisor CPU registers if clear (false).
858 * @param pValue Where to return the register value.
859 */
860static DECLCALLBACK(int) dbgfR3RegCpuQueryWorkerOnCpu(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType,
861 bool fGuestRegs, PDBGFREGVAL pValue)
862{
863 int rc = VINF_SUCCESS;
864 DBGF_REG_DB_LOCK_READ(pUVM);
865
866 /*
867 * Look up the register set of the specified CPU.
868 */
869 PDBGFREGSET pSet = fGuestRegs
870 ? pUVM->aCpus[idCpu].dbgf.s.pGuestRegSet
871 : pUVM->aCpus[idCpu].dbgf.s.pHyperRegSet;
872 if (RT_LIKELY(pSet))
873 {
874 /*
875 * Look up the register and get the register value.
876 */
877 if (RT_LIKELY(pSet->cDescs > (size_t)enmReg))
878 {
879 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
880
881 pValue->au64[0] = pValue->au64[1] = 0;
882 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
883 if (RT_SUCCESS(rc))
884 {
885 /*
886 * Do the cast if the desired return type doesn't match what
887 * the getter returned.
888 */
889 if (pDesc->enmType == enmType)
890 rc = VINF_SUCCESS;
891 else
892 rc = dbgfR3RegValCast(pValue, pDesc->enmType, enmType);
893 }
894 }
895 else
896 rc = VERR_DBGF_REGISTER_NOT_FOUND;
897 }
898 else
899 rc = VERR_INVALID_CPU_ID;
900
901 DBGF_REG_DB_UNLOCK_READ(pUVM);
902 return rc;
903}
904
905
906/**
907 * Internal worker for the CPU register query functions.
908 *
909 * @returns VBox status code.
910 * @retval VINF_SUCCESS
911 * @retval VERR_INVALID_VM_HANDLE
912 * @retval VERR_INVALID_CPU_ID
913 * @retval VERR_DBGF_REGISTER_NOT_FOUND
914 * @retval VERR_DBGF_UNSUPPORTED_CAST
915 * @retval VINF_DBGF_TRUNCATED_REGISTER
916 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
917 *
918 * @param pUVM The user mode VM handle.
919 * @param idCpu The virtual CPU ID. Can be OR'ed with
920 * DBGFREG_HYPER_VMCPUID.
921 * @param enmReg The register to query.
922 * @param enmType The desired return type.
923 * @param pValue Where to return the register value.
924 */
925static int dbgfR3RegCpuQueryWorker(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType, PDBGFREGVAL pValue)
926{
927 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
928 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
929 AssertMsgReturn(enmReg >= DBGFREG_AL && enmReg <= DBGFREG_END, ("%d\n", enmReg), VERR_INVALID_PARAMETER);
930
931 bool const fGuestRegs = !(idCpu & DBGFREG_HYPER_VMCPUID);
932 idCpu &= ~DBGFREG_HYPER_VMCPUID;
933 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
934
935 return VMR3ReqPriorityCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryWorkerOnCpu, 6,
936 pUVM, idCpu, enmReg, enmType, fGuestRegs, pValue);
937}
938
939
940/**
941 * Queries a 8-bit CPU register value.
942 *
943 * @retval VINF_SUCCESS
944 * @retval VERR_INVALID_VM_HANDLE
945 * @retval VERR_INVALID_CPU_ID
946 * @retval VERR_DBGF_REGISTER_NOT_FOUND
947 * @retval VERR_DBGF_UNSUPPORTED_CAST
948 * @retval VINF_DBGF_TRUNCATED_REGISTER
949 *
950 * @param pUVM The user mode VM handle.
951 * @param idCpu The target CPU ID. Can be OR'ed with
952 * DBGFREG_HYPER_VMCPUID.
953 * @param enmReg The register that's being queried.
954 * @param pu8 Where to store the register value.
955 */
956VMMR3DECL(int) DBGFR3RegCpuQueryU8(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint8_t *pu8)
957{
958 DBGFREGVAL Value;
959 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U8, &Value);
960 if (RT_SUCCESS(rc))
961 *pu8 = Value.u8;
962 else
963 *pu8 = 0;
964 return rc;
965}
966
967
968/**
969 * Queries a 16-bit CPU register value.
970 *
971 * @retval VINF_SUCCESS
972 * @retval VERR_INVALID_VM_HANDLE
973 * @retval VERR_INVALID_CPU_ID
974 * @retval VERR_DBGF_REGISTER_NOT_FOUND
975 * @retval VERR_DBGF_UNSUPPORTED_CAST
976 * @retval VINF_DBGF_TRUNCATED_REGISTER
977 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
978 *
979 * @param pUVM The user mode VM handle.
980 * @param idCpu The target CPU ID. Can be OR'ed with
981 * DBGFREG_HYPER_VMCPUID.
982 * @param enmReg The register that's being queried.
983 * @param pu16 Where to store the register value.
984 */
985VMMR3DECL(int) DBGFR3RegCpuQueryU16(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint16_t *pu16)
986{
987 DBGFREGVAL Value;
988 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U16, &Value);
989 if (RT_SUCCESS(rc))
990 *pu16 = Value.u16;
991 else
992 *pu16 = 0;
993 return rc;
994}
995
996
997/**
998 * Queries a 32-bit CPU register value.
999 *
1000 * @retval VINF_SUCCESS
1001 * @retval VERR_INVALID_VM_HANDLE
1002 * @retval VERR_INVALID_CPU_ID
1003 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1004 * @retval VERR_DBGF_UNSUPPORTED_CAST
1005 * @retval VINF_DBGF_TRUNCATED_REGISTER
1006 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1007 *
1008 * @param pUVM The user mode VM handle.
1009 * @param idCpu The target CPU ID. Can be OR'ed with
1010 * DBGFREG_HYPER_VMCPUID.
1011 * @param enmReg The register that's being queried.
1012 * @param pu32 Where to store the register value.
1013 */
1014VMMR3DECL(int) DBGFR3RegCpuQueryU32(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint32_t *pu32)
1015{
1016 DBGFREGVAL Value;
1017 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U32, &Value);
1018 if (RT_SUCCESS(rc))
1019 *pu32 = Value.u32;
1020 else
1021 *pu32 = 0;
1022 return rc;
1023}
1024
1025
1026/**
1027 * Queries a 64-bit CPU register value.
1028 *
1029 * @retval VINF_SUCCESS
1030 * @retval VERR_INVALID_VM_HANDLE
1031 * @retval VERR_INVALID_CPU_ID
1032 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1033 * @retval VERR_DBGF_UNSUPPORTED_CAST
1034 * @retval VINF_DBGF_TRUNCATED_REGISTER
1035 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1036 *
1037 * @param pUVM The user mode VM handle.
1038 * @param idCpu The target CPU ID. Can be OR'ed with
1039 * DBGFREG_HYPER_VMCPUID.
1040 * @param enmReg The register that's being queried.
1041 * @param pu64 Where to store the register value.
1042 */
1043VMMR3DECL(int) DBGFR3RegCpuQueryU64(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64)
1044{
1045 DBGFREGVAL Value;
1046 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U64, &Value);
1047 if (RT_SUCCESS(rc))
1048 *pu64 = Value.u64;
1049 else
1050 *pu64 = 0;
1051 return rc;
1052}
1053
1054
1055/**
1056 * Queries a descriptor table register value.
1057 *
1058 * @retval VINF_SUCCESS
1059 * @retval VERR_INVALID_VM_HANDLE
1060 * @retval VERR_INVALID_CPU_ID
1061 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1062 * @retval VERR_DBGF_UNSUPPORTED_CAST
1063 * @retval VINF_DBGF_TRUNCATED_REGISTER
1064 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1065 *
1066 * @param pUVM The user mode VM handle.
1067 * @param idCpu The target CPU ID. Can be OR'ed with
1068 * DBGFREG_HYPER_VMCPUID.
1069 * @param enmReg The register that's being queried.
1070 * @param pu64Base Where to store the register base value.
1071 * @param pu16Limit Where to store the register limit value.
1072 */
1073VMMR3DECL(int) DBGFR3RegCpuQueryXdtr(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1074{
1075 DBGFREGVAL Value;
1076 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_DTR, &Value);
1077 if (RT_SUCCESS(rc))
1078 {
1079 *pu64Base = Value.dtr.u64Base;
1080 *pu16Limit = Value.dtr.u32Limit;
1081 }
1082 else
1083 {
1084 *pu64Base = 0;
1085 *pu16Limit = 0;
1086 }
1087 return rc;
1088}
1089
1090
1091#if 0 /* rewrite / remove */
1092
1093/**
1094 * Wrapper around CPUMQueryGuestMsr for dbgfR3RegCpuQueryBatchWorker.
1095 *
1096 * @retval VINF_SUCCESS
1097 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1098 *
1099 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1100 * @param pReg The where to store the register value and
1101 * size.
1102 * @param idMsr The MSR to get.
1103 */
1104static void dbgfR3RegGetMsrBatch(PVMCPU pVCpu, PDBGFREGENTRY pReg, uint32_t idMsr)
1105{
1106 pReg->enmType = DBGFREGVALTYPE_U64;
1107 int rc = CPUMQueryGuestMsr(pVCpu, idMsr, &pReg->Val.u64);
1108 if (RT_FAILURE(rc))
1109 {
1110 AssertMsg(rc == VERR_CPUM_RAISE_GP_0, ("%Rrc\n", rc));
1111 pReg->Val.u64 = 0;
1112 }
1113}
1114
1115
1116static DECLCALLBACK(int) dbgfR3RegCpuQueryBatchWorker(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1117{
1118#if 0
1119 PVMCPU pVCpu = &pUVM->pVM->aCpus[idCpu];
1120 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1121
1122 PDBGFREGENTRY pReg = paRegs - 1;
1123 while (cRegs-- > 0)
1124 {
1125 pReg++;
1126 pReg->Val.au64[0] = 0;
1127 pReg->Val.au64[1] = 0;
1128
1129 DBGFREG const enmReg = pReg->enmReg;
1130 AssertMsgReturn(enmReg >= 0 && enmReg <= DBGFREG_END, ("%d (%#x)\n", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1131 if (enmReg != DBGFREG_END)
1132 {
1133 PCDBGFREGDESC pDesc = &g_aDbgfRegDescs[enmReg];
1134 if (!pDesc->pfnGet)
1135 {
1136 PCRTUINT128U pu = (PCRTUINT128U)((uintptr_t)pCtx + pDesc->offCtx);
1137 pReg->enmType = pDesc->enmType;
1138 switch (pDesc->enmType)
1139 {
1140 case DBGFREGVALTYPE_U8: pReg->Val.u8 = pu->au8[0]; break;
1141 case DBGFREGVALTYPE_U16: pReg->Val.u16 = pu->au16[0]; break;
1142 case DBGFREGVALTYPE_U32: pReg->Val.u32 = pu->au32[0]; break;
1143 case DBGFREGVALTYPE_U64: pReg->Val.u64 = pu->au64[0]; break;
1144 case DBGFREGVALTYPE_U128:
1145 pReg->Val.au64[0] = pu->au64[0];
1146 pReg->Val.au64[1] = pu->au64[1];
1147 break;
1148 case DBGFREGVALTYPE_R80:
1149 pReg->Val.au64[0] = pu->au64[0];
1150 pReg->Val.au16[5] = pu->au16[5];
1151 break;
1152 default:
1153 AssertMsgFailedReturn(("%s %d\n", pDesc->pszName, pDesc->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1154 }
1155 }
1156 else
1157 {
1158 int rc = pDesc->pfnGet(pVCpu, pDesc, pCtx, &pReg->Val.u);
1159 if (RT_FAILURE(rc))
1160 return rc;
1161 }
1162 }
1163 }
1164 return VINF_SUCCESS;
1165#else
1166 return VERR_NOT_IMPLEMENTED;
1167#endif
1168}
1169
1170
1171/**
1172 * Query a batch of registers.
1173 *
1174 * @retval VINF_SUCCESS
1175 * @retval VERR_INVALID_VM_HANDLE
1176 * @retval VERR_INVALID_CPU_ID
1177 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1178 *
1179 * @param pUVM The user mode VM handle.
1180 * @param idCpu The target CPU ID. Can be OR'ed with
1181 * DBGFREG_HYPER_VMCPUID.
1182 * @param paRegs Pointer to an array of @a cRegs elements. On
1183 * input the enmReg members indicates which
1184 * registers to query. On successful return the
1185 * other members are set. DBGFREG_END can be used
1186 * as a filler.
1187 * @param cRegs The number of entries in @a paRegs.
1188 */
1189VMMR3DECL(int) DBGFR3RegCpuQueryBatch(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1190{
1191 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1192 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1193 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1194 if (!cRegs)
1195 return VINF_SUCCESS;
1196 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1197 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1198 size_t iReg = cRegs;
1199 while (iReg-- > 0)
1200 {
1201 DBGFREG enmReg = paRegs[iReg].enmReg;
1202 AssertMsgReturn(enmReg < DBGFREG_END && enmReg >= DBGFREG_AL, ("%d (%#x)", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1203 }
1204
1205 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1206}
1207
1208
1209/**
1210 * Query all registers for a Virtual CPU.
1211 *
1212 * @retval VINF_SUCCESS
1213 * @retval VERR_INVALID_VM_HANDLE
1214 * @retval VERR_INVALID_CPU_ID
1215 *
1216 * @param pUVM The user mode VM handle.
1217 * @param idCpu The target CPU ID. Can be OR'ed with
1218 * DBGFREG_HYPER_VMCPUID.
1219 * @param paRegs Pointer to an array of @a cRegs elements.
1220 * These will be filled with the CPU register
1221 * values. Overflowing entries will be set to
1222 * DBGFREG_END. The returned registers can be
1223 * accessed by using the DBGFREG values as index.
1224 * @param cRegs The number of entries in @a paRegs. The
1225 * recommended value is DBGFREG_ALL_COUNT.
1226 */
1227VMMR3DECL(int) DBGFR3RegCpuQueryAll(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1228{
1229 /*
1230 * Validate input.
1231 */
1232 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1233 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1234 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1235 if (!cRegs)
1236 return VINF_SUCCESS;
1237 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1238 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1239
1240 /*
1241 * Convert it into a batch query (lazy bird).
1242 */
1243 unsigned iReg = 0;
1244 while (iReg < cRegs && iReg < DBGFREG_ALL_COUNT)
1245 {
1246 paRegs[iReg].enmReg = (DBGFREG)iReg;
1247 iReg++;
1248 }
1249 while (iReg < cRegs)
1250 paRegs[iReg++].enmReg = DBGFREG_END;
1251
1252 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1253}
1254
1255#endif /* rewrite or remove? */
1256
1257/**
1258 * Gets the name of a register.
1259 *
1260 * @returns Pointer to read-only register name (lower case). NULL if the
1261 * parameters are invalid.
1262 *
1263 * @param pUVM The user mode VM handle.
1264 * @param enmReg The register identifier.
1265 * @param enmType The register type. This is for sort out
1266 * aliases. Pass DBGFREGVALTYPE_INVALID to get
1267 * the standard name.
1268 */
1269VMMR3DECL(const char *) DBGFR3RegCpuName(PUVM pUVM, DBGFREG enmReg, DBGFREGVALTYPE enmType)
1270{
1271 AssertReturn(enmReg >= DBGFREG_AL && enmReg < DBGFREG_END, NULL);
1272 AssertReturn(enmType >= DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, NULL);
1273 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1274 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1275
1276 PCDBGFREGSET pSet = pUVM->aCpus[0].dbgf.s.pGuestRegSet;
1277 if (RT_UNLIKELY(!pSet))
1278 return NULL;
1279
1280 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
1281 PCDBGFREGALIAS pAlias = pDesc->paAliases;
1282 if ( pAlias
1283 && pDesc->enmType != enmType
1284 && enmType != DBGFREGVALTYPE_INVALID)
1285 {
1286 while (pAlias->pszName)
1287 {
1288 if (pAlias->enmType == enmType)
1289 return pAlias->pszName;
1290 pAlias++;
1291 }
1292 }
1293
1294 return pDesc->pszName;
1295}
1296
1297
1298/**
1299 * Fold the string to lower case and copy it into the destination buffer.
1300 *
1301 * @returns Number of folder characters, -1 on overflow.
1302 * @param pszSrc The source string.
1303 * @param cchSrc How much to fold and copy.
1304 * @param pszDst The output buffer.
1305 * @param cbDst The size of the output buffer.
1306 */
1307static ssize_t dbgfR3RegCopyToLower(const char *pszSrc, size_t cchSrc, char *pszDst, size_t cbDst)
1308{
1309 ssize_t cchFolded = 0;
1310 char ch;
1311 while (cchSrc-- > 0 && (ch = *pszSrc++))
1312 {
1313 if (RT_UNLIKELY(cbDst <= 1))
1314 return -1;
1315 cbDst--;
1316
1317 char chLower = RT_C_TO_LOWER(ch);
1318 cchFolded += chLower != ch;
1319 *pszDst++ = chLower;
1320 }
1321 if (RT_UNLIKELY(!cbDst))
1322 return -1;
1323 *pszDst = '\0';
1324 return cchFolded;
1325}
1326
1327
1328/**
1329 * Resolves the register name.
1330 *
1331 * @returns Lookup record.
1332 * @param pUVM The user mode VM handle.
1333 * @param idDefCpu The default CPU ID set.
1334 * @param pszReg The register name.
1335 * @param fGuestRegs Default to guest CPU registers if set, the
1336 * hypervisor CPU registers if clear.
1337 */
1338static PCDBGFREGLOOKUP dbgfR3RegResolve(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, bool fGuestRegs)
1339{
1340 DBGF_REG_DB_LOCK_READ(pUVM);
1341
1342 /* Try looking up the name without any case folding or cpu prefixing. */
1343 PRTSTRSPACE pRegSpace = &pUVM->dbgf.s.RegSpace;
1344 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, pszReg);
1345 if (!pLookupRec)
1346 {
1347 char szName[DBGF_REG_MAX_NAME * 4 + 16];
1348
1349 /* Lower case it and try again. */
1350 ssize_t cchFolded = dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
1351 if (cchFolded > 0)
1352 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1353 if ( !pLookupRec
1354 && cchFolded >= 0
1355 && idDefCpu != VMCPUID_ANY)
1356 {
1357 /* Prefix it with the specified CPU set. */
1358 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), fGuestRegs ? "cpu%u." : "hypercpu%u.", idDefCpu);
1359 dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
1360 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1361 }
1362 }
1363
1364 DBGF_REG_DB_UNLOCK_READ(pUVM);
1365 return pLookupRec;
1366}
1367
1368
1369/**
1370 * Validates the register name.
1371 *
1372 * @returns VBox status code.
1373 * @retval VINF_SUCCESS if the register was found.
1374 * @retval VERR_DBGF_REGISTER_NOT_FOUND if not found.
1375 *
1376 * @param pUVM The user mode VM handle.
1377 * @param idDefCpu The default CPU.
1378 * @param pszReg The registe name.
1379 */
1380VMMR3DECL(int) DBGFR3RegNmValidate(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg)
1381{
1382 /*
1383 * Validate input.
1384 */
1385 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1386 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1387 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1388 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1389
1390 /*
1391 * Resolve the register.
1392 */
1393 bool fGuestRegs = true;
1394 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1395 {
1396 fGuestRegs = false;
1397 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1398 }
1399
1400 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1401 if (!pLookupRec)
1402 return VERR_DBGF_REGISTER_NOT_FOUND;
1403 return VINF_SUCCESS;
1404}
1405
1406
1407/**
1408 * On CPU worker for the register queries, used by dbgfR3RegNmQueryWorker and
1409 * dbgfR3RegPrintfCbFormatNormal.
1410 *
1411 * @returns VBox status code.
1412 *
1413 * @param pUVM The user mode VM handle.
1414 * @param pLookupRec The register lookup record.
1415 * @param enmType The desired return type.
1416 * @param pValue Where to return the register value.
1417 * @param penmType Where to store the register value type.
1418 * Optional.
1419 */
1420static DECLCALLBACK(int) dbgfR3RegNmQueryWorkerOnCpu(PUVM pUVM, PCDBGFREGLOOKUP pLookupRec, DBGFREGVALTYPE enmType,
1421 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1422{
1423 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
1424 PCDBGFREGSET pSet = pLookupRec->pSet;
1425 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
1426 DBGFREGVALTYPE enmValueType = pDesc->enmType;
1427 int rc;
1428
1429 NOREF(pUVM);
1430
1431 /*
1432 * Get the register or sub-field value.
1433 */
1434 dbgfR3RegValClear(pValue);
1435 if (!pSubField)
1436 {
1437 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1438 if ( pLookupRec->pAlias
1439 && pLookupRec->pAlias->enmType != enmValueType
1440 && RT_SUCCESS(rc))
1441 {
1442 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1443 enmValueType = pLookupRec->pAlias->enmType;
1444 }
1445 }
1446 else
1447 {
1448 if (pSubField->pfnGet)
1449 {
1450 rc = pSubField->pfnGet(pSet->uUserArg.pv, pSubField, &pValue->u128);
1451 enmValueType = DBGFREGVALTYPE_U128;
1452 }
1453 else
1454 {
1455 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1456 if ( pLookupRec->pAlias
1457 && pLookupRec->pAlias->enmType != enmValueType
1458 && RT_SUCCESS(rc))
1459 {
1460 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1461 enmValueType = pLookupRec->pAlias->enmType;
1462 }
1463 if (RT_SUCCESS(rc))
1464 {
1465 rc = dbgfR3RegValCast(pValue, enmValueType, DBGFREGVALTYPE_U128);
1466 if (RT_SUCCESS(rc))
1467 {
1468 RTUInt128AssignShiftLeft(&pValue->u128, -pSubField->iFirstBit);
1469 RTUInt128AssignAndNFirstBits(&pValue->u128, pSubField->cBits);
1470 if (pSubField->cShift)
1471 RTUInt128AssignShiftLeft(&pValue->u128, pSubField->cShift);
1472 }
1473 }
1474 }
1475 if (RT_SUCCESS(rc))
1476 {
1477 unsigned const cBits = pSubField->cBits + pSubField->cShift;
1478 if (cBits <= 8)
1479 enmValueType = DBGFREGVALTYPE_U8;
1480 else if (cBits <= 16)
1481 enmValueType = DBGFREGVALTYPE_U16;
1482 else if (cBits <= 32)
1483 enmValueType = DBGFREGVALTYPE_U32;
1484 else if (cBits <= 64)
1485 enmValueType = DBGFREGVALTYPE_U64;
1486 else
1487 enmValueType = DBGFREGVALTYPE_U128;
1488 rc = dbgfR3RegValCast(pValue, DBGFREGVALTYPE_U128, enmValueType);
1489 }
1490 }
1491 if (RT_SUCCESS(rc))
1492 {
1493 /*
1494 * Do the cast if the desired return type doesn't match what
1495 * the getter returned.
1496 */
1497 if ( enmValueType == enmType
1498 || enmType == DBGFREGVALTYPE_END)
1499 {
1500 rc = VINF_SUCCESS;
1501 if (penmType)
1502 *penmType = enmValueType;
1503 }
1504 else
1505 {
1506 rc = dbgfR3RegValCast(pValue, enmValueType, enmType);
1507 if (penmType)
1508 *penmType = RT_SUCCESS(rc) ? enmType : enmValueType;
1509 }
1510 }
1511
1512 return rc;
1513}
1514
1515
1516/**
1517 * Worker for the register queries.
1518 *
1519 * @returns VBox status code.
1520 * @retval VINF_SUCCESS
1521 * @retval VERR_INVALID_VM_HANDLE
1522 * @retval VERR_INVALID_CPU_ID
1523 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1524 * @retval VERR_DBGF_UNSUPPORTED_CAST
1525 * @retval VINF_DBGF_TRUNCATED_REGISTER
1526 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1527 *
1528 * @param pUVM The user mode VM handle.
1529 * @param idDefCpu The virtual CPU ID for the default CPU register
1530 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
1531 * @param pszReg The register to query.
1532 * @param enmType The desired return type.
1533 * @param pValue Where to return the register value.
1534 * @param penmType Where to store the register value type.
1535 * Optional.
1536 */
1537static int dbgfR3RegNmQueryWorker(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, DBGFREGVALTYPE enmType,
1538 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1539{
1540 /*
1541 * Validate input.
1542 */
1543 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1544 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1545 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1546 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1547
1548 Assert(enmType > DBGFREGVALTYPE_INVALID && enmType <= DBGFREGVALTYPE_END);
1549 AssertPtr(pValue);
1550
1551 /*
1552 * Resolve the register and call the getter on the relevant CPU.
1553 */
1554 bool fGuestRegs = true;
1555 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1556 {
1557 fGuestRegs = false;
1558 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1559 }
1560 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1561 if (pLookupRec)
1562 {
1563 if (pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU)
1564 idDefCpu = pLookupRec->pSet->uUserArg.pVCpu->idCpu;
1565 else if (idDefCpu != VMCPUID_ANY)
1566 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1567 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryWorkerOnCpu, 5,
1568 pUVM, pLookupRec, enmType, pValue, penmType);
1569 }
1570 return VERR_DBGF_REGISTER_NOT_FOUND;
1571}
1572
1573
1574/**
1575 * Queries a descriptor table register value.
1576 *
1577 * @retval VINF_SUCCESS
1578 * @retval VERR_INVALID_VM_HANDLE
1579 * @retval VERR_INVALID_CPU_ID
1580 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1581 *
1582 * @param pUVM The user mode VM handle.
1583 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1584 * applicable. Can be OR'ed with
1585 * DBGFREG_HYPER_VMCPUID.
1586 * @param pszReg The register that's being queried. Except for
1587 * CPU registers, this must be on the form
1588 * "set.reg[.sub]".
1589 * @param pValue Where to store the register value.
1590 * @param penmType Where to store the register value type.
1591 */
1592VMMR3DECL(int) DBGFR3RegNmQuery(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1593{
1594 return dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_END, pValue, penmType);
1595}
1596
1597
1598/**
1599 * Queries a 8-bit register value.
1600 *
1601 * @retval VINF_SUCCESS
1602 * @retval VERR_INVALID_VM_HANDLE
1603 * @retval VERR_INVALID_CPU_ID
1604 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1605 * @retval VERR_DBGF_UNSUPPORTED_CAST
1606 * @retval VINF_DBGF_TRUNCATED_REGISTER
1607 *
1608 * @param pUVM The user mode VM handle.
1609 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1610 * applicable. Can be OR'ed with
1611 * DBGFREG_HYPER_VMCPUID.
1612 * @param pszReg The register that's being queried. Except for
1613 * CPU registers, this must be on the form
1614 * "set.reg[.sub]".
1615 * @param pu8 Where to store the register value.
1616 */
1617VMMR3DECL(int) DBGFR3RegNmQueryU8(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint8_t *pu8)
1618{
1619 DBGFREGVAL Value;
1620 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U8, &Value, NULL);
1621 if (RT_SUCCESS(rc))
1622 *pu8 = Value.u8;
1623 else
1624 *pu8 = 0;
1625 return rc;
1626}
1627
1628
1629/**
1630 * Queries a 16-bit register value.
1631 *
1632 * @retval VINF_SUCCESS
1633 * @retval VERR_INVALID_VM_HANDLE
1634 * @retval VERR_INVALID_CPU_ID
1635 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1636 * @retval VERR_DBGF_UNSUPPORTED_CAST
1637 * @retval VINF_DBGF_TRUNCATED_REGISTER
1638 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1639 *
1640 * @param pUVM The user mode VM handle.
1641 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1642 * applicable. Can be OR'ed with
1643 * DBGFREG_HYPER_VMCPUID.
1644 * @param pszReg The register that's being queried. Except for
1645 * CPU registers, this must be on the form
1646 * "set.reg[.sub]".
1647 * @param pu16 Where to store the register value.
1648 */
1649VMMR3DECL(int) DBGFR3RegNmQueryU16(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint16_t *pu16)
1650{
1651 DBGFREGVAL Value;
1652 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U16, &Value, NULL);
1653 if (RT_SUCCESS(rc))
1654 *pu16 = Value.u16;
1655 else
1656 *pu16 = 0;
1657 return rc;
1658}
1659
1660
1661/**
1662 * Queries a 32-bit register value.
1663 *
1664 * @retval VINF_SUCCESS
1665 * @retval VERR_INVALID_VM_HANDLE
1666 * @retval VERR_INVALID_CPU_ID
1667 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1668 * @retval VERR_DBGF_UNSUPPORTED_CAST
1669 * @retval VINF_DBGF_TRUNCATED_REGISTER
1670 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1671 *
1672 * @param pUVM The user mode VM handle.
1673 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1674 * applicable. Can be OR'ed with
1675 * DBGFREG_HYPER_VMCPUID.
1676 * @param pszReg The register that's being queried. Except for
1677 * CPU registers, this must be on the form
1678 * "set.reg[.sub]".
1679 * @param pu32 Where to store the register value.
1680 */
1681VMMR3DECL(int) DBGFR3RegNmQueryU32(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint32_t *pu32)
1682{
1683 DBGFREGVAL Value;
1684 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U32, &Value, NULL);
1685 if (RT_SUCCESS(rc))
1686 *pu32 = Value.u32;
1687 else
1688 *pu32 = 0;
1689 return rc;
1690}
1691
1692
1693/**
1694 * Queries a 64-bit register value.
1695 *
1696 * @retval VINF_SUCCESS
1697 * @retval VERR_INVALID_VM_HANDLE
1698 * @retval VERR_INVALID_CPU_ID
1699 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1700 * @retval VERR_DBGF_UNSUPPORTED_CAST
1701 * @retval VINF_DBGF_TRUNCATED_REGISTER
1702 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1703 *
1704 * @param pUVM The user mode VM handle.
1705 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1706 * applicable. Can be OR'ed with
1707 * DBGFREG_HYPER_VMCPUID.
1708 * @param pszReg The register that's being queried. Except for
1709 * CPU registers, this must be on the form
1710 * "set.reg[.sub]".
1711 * @param pu64 Where to store the register value.
1712 */
1713VMMR3DECL(int) DBGFR3RegNmQueryU64(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64)
1714{
1715 DBGFREGVAL Value;
1716 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U64, &Value, NULL);
1717 if (RT_SUCCESS(rc))
1718 *pu64 = Value.u64;
1719 else
1720 *pu64 = 0;
1721 return rc;
1722}
1723
1724
1725/**
1726 * Queries a 128-bit register value.
1727 *
1728 * @retval VINF_SUCCESS
1729 * @retval VERR_INVALID_VM_HANDLE
1730 * @retval VERR_INVALID_CPU_ID
1731 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1732 * @retval VERR_DBGF_UNSUPPORTED_CAST
1733 * @retval VINF_DBGF_TRUNCATED_REGISTER
1734 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1735 *
1736 * @param pUVM The user mode VM handle.
1737 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1738 * applicable. Can be OR'ed with
1739 * DBGFREG_HYPER_VMCPUID.
1740 * @param pszReg The register that's being queried. Except for
1741 * CPU registers, this must be on the form
1742 * "set.reg[.sub]".
1743 * @param pu128 Where to store the register value.
1744 */
1745VMMR3DECL(int) DBGFR3RegNmQueryU128(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PRTUINT128U pu128)
1746{
1747 DBGFREGVAL Value;
1748 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U128, &Value, NULL);
1749 if (RT_SUCCESS(rc))
1750 *pu128 = Value.u128;
1751 else
1752 pu128->s.Hi = pu128->s.Lo = 0;
1753 return rc;
1754}
1755
1756
1757#if 0
1758/**
1759 * Queries a long double register value.
1760 *
1761 * @retval VINF_SUCCESS
1762 * @retval VERR_INVALID_VM_HANDLE
1763 * @retval VERR_INVALID_CPU_ID
1764 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1765 * @retval VERR_DBGF_UNSUPPORTED_CAST
1766 * @retval VINF_DBGF_TRUNCATED_REGISTER
1767 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1768 *
1769 * @param pUVM The user mode VM handle.
1770 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1771 * applicable. Can be OR'ed with
1772 * DBGFREG_HYPER_VMCPUID.
1773 * @param pszReg The register that's being queried. Except for
1774 * CPU registers, this must be on the form
1775 * "set.reg[.sub]".
1776 * @param plrd Where to store the register value.
1777 */
1778VMMR3DECL(int) DBGFR3RegNmQueryLrd(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, long double *plrd)
1779{
1780 DBGFREGVAL Value;
1781 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_R80, &Value, NULL);
1782 if (RT_SUCCESS(rc))
1783 *plrd = Value.lrd;
1784 else
1785 *plrd = 0;
1786 return rc;
1787}
1788#endif
1789
1790
1791/**
1792 * Queries a descriptor table register value.
1793 *
1794 * @retval VINF_SUCCESS
1795 * @retval VERR_INVALID_VM_HANDLE
1796 * @retval VERR_INVALID_CPU_ID
1797 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1798 * @retval VERR_DBGF_UNSUPPORTED_CAST
1799 * @retval VINF_DBGF_TRUNCATED_REGISTER
1800 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1801 *
1802 * @param pUVM The user mode VM handle.
1803 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1804 * applicable. Can be OR'ed with
1805 * DBGFREG_HYPER_VMCPUID.
1806 * @param pszReg The register that's being queried. Except for
1807 * CPU registers, this must be on the form
1808 * "set.reg[.sub]".
1809 * @param pu64Base Where to store the register base value.
1810 * @param pu16Limit Where to store the register limit value.
1811 */
1812VMMR3DECL(int) DBGFR3RegNmQueryXdtr(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1813{
1814 DBGFREGVAL Value;
1815 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_DTR, &Value, NULL);
1816 if (RT_SUCCESS(rc))
1817 {
1818 *pu64Base = Value.dtr.u64Base;
1819 *pu16Limit = Value.dtr.u32Limit;
1820 }
1821 else
1822 {
1823 *pu64Base = 0;
1824 *pu16Limit = 0;
1825 }
1826 return rc;
1827}
1828
1829
1830/// @todo VMMR3DECL(int) DBGFR3RegNmQueryBatch(PUVM pUVM,VMCPUID idDefCpu, DBGFREGENTRYNM paRegs, size_t cRegs);
1831
1832
1833/**
1834 * Gets the number of registers returned by DBGFR3RegNmQueryAll.
1835 *
1836 * @returns VBox status code.
1837 * @param pUVM The user mode VM handle.
1838 * @param pcRegs Where to return the register count.
1839 */
1840VMMR3DECL(int) DBGFR3RegNmQueryAllCount(PUVM pUVM, size_t *pcRegs)
1841{
1842 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1843 *pcRegs = pUVM->dbgf.s.cRegs;
1844 return VINF_SUCCESS;
1845}
1846
1847
1848/**
1849 * Pad register entries.
1850 *
1851 * @param paRegs The output array.
1852 * @param cRegs The size of the output array.
1853 * @param iReg The first register to pad.
1854 * @param cRegsToPad The number of registers to pad.
1855 */
1856static void dbgfR3RegNmQueryAllPadEntries(PDBGFREGENTRYNM paRegs, size_t cRegs, size_t iReg, size_t cRegsToPad)
1857{
1858 if (iReg < cRegs)
1859 {
1860 size_t iEndReg = iReg + cRegsToPad;
1861 if (iEndReg > cRegs)
1862 iEndReg = cRegs;
1863 while (iReg < iEndReg)
1864 {
1865 paRegs[iReg].pszName = NULL;
1866 paRegs[iReg].enmType = DBGFREGVALTYPE_END;
1867 dbgfR3RegValClear(&paRegs[iReg].Val);
1868 iReg++;
1869 }
1870 }
1871}
1872
1873
1874/**
1875 * Query all registers in a set.
1876 *
1877 * @param pSet The set.
1878 * @param cRegsToQuery The number of registers to query.
1879 * @param paRegs The output array.
1880 * @param cRegs The size of the output array.
1881 */
1882static void dbgfR3RegNmQueryAllInSet(PCDBGFREGSET pSet, size_t cRegsToQuery, PDBGFREGENTRYNM paRegs, size_t cRegs)
1883{
1884 if (cRegsToQuery > pSet->cDescs)
1885 cRegsToQuery = pSet->cDescs;
1886 if (cRegsToQuery > cRegs)
1887 cRegsToQuery = cRegs;
1888
1889 for (size_t iReg = 0; iReg < cRegsToQuery; iReg++)
1890 {
1891 paRegs[iReg].enmType = pSet->paDescs[iReg].enmType;
1892 paRegs[iReg].pszName = pSet->paLookupRecs[iReg].Core.pszString;
1893 dbgfR3RegValClear(&paRegs[iReg].Val);
1894 int rc2 = pSet->paDescs[iReg].pfnGet(pSet->uUserArg.pv, &pSet->paDescs[iReg], &paRegs[iReg].Val);
1895 AssertRCSuccess(rc2);
1896 if (RT_FAILURE(rc2))
1897 dbgfR3RegValClear(&paRegs[iReg].Val);
1898 }
1899}
1900
1901
1902/**
1903 * @callback_method_impl{FNRTSTRSPACECALLBACK, Worker used by
1904 * dbgfR3RegNmQueryAllWorker}
1905 */
1906static DECLCALLBACK(int) dbgfR3RegNmQueryAllEnum(PRTSTRSPACECORE pStr, void *pvUser)
1907{
1908 PCDBGFREGSET pSet = (PCDBGFREGSET)pStr;
1909 if (pSet->enmType != DBGFREGSETTYPE_CPU)
1910 {
1911 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
1912 if (pArgs->iReg < pArgs->cRegs)
1913 dbgfR3RegNmQueryAllInSet(pSet, pSet->cDescs, &pArgs->paRegs[pArgs->iReg], pArgs->cRegs - pArgs->iReg);
1914 pArgs->iReg += pSet->cDescs;
1915 }
1916
1917 return 0;
1918}
1919
1920
1921/**
1922 * @callback_method_impl{FNVMMEMTRENDEZVOUS, Worker used by DBGFR3RegNmQueryAll}
1923 */
1924static DECLCALLBACK(VBOXSTRICTRC) dbgfR3RegNmQueryAllWorker(PVM pVM, PVMCPU pVCpu, void *pvUser)
1925{
1926 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
1927 PDBGFREGENTRYNM paRegs = pArgs->paRegs;
1928 size_t const cRegs = pArgs->cRegs;
1929 PUVM pUVM = pVM->pUVM;
1930 PUVMCPU pUVCpu = pVCpu->pUVCpu;
1931
1932 DBGF_REG_DB_LOCK_READ(pUVM);
1933
1934 /*
1935 * My guest CPU registers.
1936 */
1937 size_t iCpuReg = pVCpu->idCpu * DBGFREG_ALL_COUNT;
1938 if (pUVCpu->dbgf.s.pGuestRegSet)
1939 {
1940 if (iCpuReg < cRegs)
1941 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pGuestRegSet, DBGFREG_ALL_COUNT, &paRegs[iCpuReg], cRegs - iCpuReg);
1942 }
1943 else
1944 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, DBGFREG_ALL_COUNT);
1945
1946 /*
1947 * My hypervisor CPU registers.
1948 */
1949 iCpuReg = pUVM->cCpus * DBGFREG_ALL_COUNT + pUVCpu->idCpu * DBGFREG_ALL_COUNT;
1950 if (pUVCpu->dbgf.s.pHyperRegSet)
1951 {
1952 if (iCpuReg < cRegs)
1953 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pHyperRegSet, DBGFREG_ALL_COUNT, &paRegs[iCpuReg], cRegs - iCpuReg);
1954 }
1955 else
1956 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, DBGFREG_ALL_COUNT);
1957
1958 /*
1959 * The primary CPU does all the other registers.
1960 */
1961 if (pUVCpu->idCpu == 0)
1962 {
1963 pArgs->iReg = pUVM->cCpus * DBGFREG_ALL_COUNT * 2;
1964 RTStrSpaceEnumerate(&pUVM->dbgf.s.RegSetSpace, dbgfR3RegNmQueryAllEnum, pArgs);
1965 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, pArgs->iReg, cRegs);
1966 }
1967
1968 DBGF_REG_DB_UNLOCK_READ(pUVM);
1969 return VINF_SUCCESS; /* Ignore errors. */
1970}
1971
1972
1973/**
1974 * Queries all register.
1975 *
1976 * @returns VBox status code.
1977 * @param pUVM The user mode VM handle.
1978 * @param paRegs The output register value array. The register
1979 * name string is read only and shall not be freed
1980 * or modified.
1981 * @param cRegs The number of entries in @a paRegs. The
1982 * correct size can be obtained by calling
1983 * DBGFR3RegNmQueryAllCount.
1984 */
1985VMMR3DECL(int) DBGFR3RegNmQueryAll(PUVM pUVM, PDBGFREGENTRYNM paRegs, size_t cRegs)
1986{
1987 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1988 PVM pVM = pUVM->pVM;
1989 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1990 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1991 AssertReturn(cRegs > 0, VERR_OUT_OF_RANGE);
1992
1993 DBGFR3REGNMQUERYALLARGS Args;
1994 Args.paRegs = paRegs;
1995 Args.cRegs = cRegs;
1996
1997 return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3RegNmQueryAllWorker, &Args);
1998}
1999
2000
2001/**
2002 * On CPU worker for the register modifications, used by DBGFR3RegNmSet.
2003 *
2004 * @returns VBox status code.
2005 *
2006 * @param pUVM The user mode VM handle.
2007 * @param pLookupRec The register lookup record. Maybe be modified,
2008 * so please pass a copy of the user's one.
2009 * @param pValue The new register value.
2010 * @param pMask Indicate which bits to modify.
2011 */
2012static DECLCALLBACK(int) dbgfR3RegNmSetWorkerOnCpu(PUVM pUVM, PDBGFREGLOOKUP pLookupRec,
2013 PCDBGFREGVAL pValue, PCDBGFREGVAL pMask)
2014{
2015 RT_NOREF_PV(pUVM);
2016 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2017 if (pSubField && pSubField->pfnSet)
2018 return pSubField->pfnSet(pLookupRec->pSet->uUserArg.pv, pSubField, pValue->u128, pMask->u128);
2019 return pLookupRec->pDesc->pfnSet(pLookupRec->pSet->uUserArg.pv, pLookupRec->pDesc, pValue, pMask);
2020}
2021
2022
2023/**
2024 * Worker for the register setting.
2025 *
2026 * @returns VBox status code.
2027 * @retval VINF_SUCCESS
2028 * @retval VERR_INVALID_VM_HANDLE
2029 * @retval VERR_INVALID_CPU_ID
2030 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2031 * @retval VERR_DBGF_UNSUPPORTED_CAST
2032 * @retval VINF_DBGF_TRUNCATED_REGISTER
2033 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2034 *
2035 * @param pUVM The user mode VM handle.
2036 * @param idDefCpu The virtual CPU ID for the default CPU register
2037 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2038 * @param pszReg The register to query.
2039 * @param pValue The value to set
2040 * @param enmType How to interpret the value in @a pValue.
2041 */
2042VMMR3DECL(int) DBGFR3RegNmSet(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType)
2043{
2044 /*
2045 * Validate input.
2046 */
2047 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2048 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2049 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2050 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
2051 AssertReturn(enmType > DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
2052 AssertPtrReturn(pValue, VERR_INVALID_PARAMETER);
2053
2054 /*
2055 * Resolve the register and check that it is writable.
2056 */
2057 bool fGuestRegs = true;
2058 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
2059 {
2060 fGuestRegs = false;
2061 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2062 }
2063 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
2064 if (pLookupRec)
2065 {
2066 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
2067 PCDBGFREGSET pSet = pLookupRec->pSet;
2068 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2069
2070 if ( !(pDesc->fFlags & DBGFREG_FLAGS_READ_ONLY)
2071 && (pSubField
2072 ? !(pSubField->fFlags & DBGFREGSUBFIELD_FLAGS_READ_ONLY)
2073 && (pSubField->pfnSet != NULL || pDesc->pfnSet != NULL)
2074 : pDesc->pfnSet != NULL) )
2075 {
2076 /*
2077 * Calculate the modification mask and cast the input value to the
2078 * type of the target register.
2079 */
2080 DBGFREGVAL Mask = DBGFREGVAL_INITIALIZE_ZERO;
2081 DBGFREGVAL Value = DBGFREGVAL_INITIALIZE_ZERO;
2082 switch (enmType)
2083 {
2084 case DBGFREGVALTYPE_U8:
2085 Value.u8 = pValue->u8;
2086 Mask.u8 = UINT8_MAX;
2087 break;
2088 case DBGFREGVALTYPE_U16:
2089 Value.u16 = pValue->u16;
2090 Mask.u16 = UINT16_MAX;
2091 break;
2092 case DBGFREGVALTYPE_U32:
2093 Value.u32 = pValue->u32;
2094 Mask.u32 = UINT32_MAX;
2095 break;
2096 case DBGFREGVALTYPE_U64:
2097 Value.u64 = pValue->u64;
2098 Mask.u64 = UINT64_MAX;
2099 break;
2100 case DBGFREGVALTYPE_U128:
2101 Value.u128 = pValue->u128;
2102 Mask.u128.s.Lo = UINT64_MAX;
2103 Mask.u128.s.Hi = UINT64_MAX;
2104 break;
2105 case DBGFREGVALTYPE_U256:
2106 Value.u256 = pValue->u256;
2107 Mask.u256.QWords.qw0 = UINT64_MAX;
2108 Mask.u256.QWords.qw1 = UINT64_MAX;
2109 Mask.u256.QWords.qw2 = UINT64_MAX;
2110 Mask.u256.QWords.qw3 = UINT64_MAX;
2111 break;
2112 case DBGFREGVALTYPE_U512:
2113 Value.u512 = pValue->u512;
2114 Mask.u512.QWords.qw0 = UINT64_MAX;
2115 Mask.u512.QWords.qw1 = UINT64_MAX;
2116 Mask.u512.QWords.qw2 = UINT64_MAX;
2117 Mask.u512.QWords.qw3 = UINT64_MAX;
2118 Mask.u512.QWords.qw4 = UINT64_MAX;
2119 Mask.u512.QWords.qw5 = UINT64_MAX;
2120 Mask.u512.QWords.qw6 = UINT64_MAX;
2121 Mask.u512.QWords.qw7 = UINT64_MAX;
2122 break;
2123 case DBGFREGVALTYPE_R80:
2124#ifdef RT_COMPILER_WITH_80BIT_LONG_DOUBLE
2125 Value.r80Ex.lrd = pValue->r80Ex.lrd;
2126#else
2127 Value.r80Ex.au64[0] = pValue->r80Ex.au64[0];
2128 Value.r80Ex.au16[4] = pValue->r80Ex.au16[4];
2129#endif
2130 Value.r80Ex.au64[0] = UINT64_MAX;
2131 Value.r80Ex.au16[4] = UINT16_MAX;
2132 break;
2133 case DBGFREGVALTYPE_DTR:
2134 Value.dtr.u32Limit = pValue->dtr.u32Limit;
2135 Value.dtr.u64Base = pValue->dtr.u64Base;
2136 Mask.dtr.u32Limit = UINT32_MAX;
2137 Mask.dtr.u64Base = UINT64_MAX;
2138 break;
2139 case DBGFREGVALTYPE_32BIT_HACK:
2140 case DBGFREGVALTYPE_END:
2141 case DBGFREGVALTYPE_INVALID:
2142 AssertFailedReturn(VERR_INTERNAL_ERROR_3);
2143 }
2144
2145 int rc = VINF_SUCCESS;
2146 DBGFREGVALTYPE enmRegType = pDesc->enmType;
2147 if (pSubField)
2148 {
2149 unsigned const cBits = pSubField->cBits + pSubField->cShift;
2150 if (cBits <= 8)
2151 enmRegType = DBGFREGVALTYPE_U8;
2152 else if (cBits <= 16)
2153 enmRegType = DBGFREGVALTYPE_U16;
2154 else if (cBits <= 32)
2155 enmRegType = DBGFREGVALTYPE_U32;
2156 else if (cBits <= 64)
2157 enmRegType = DBGFREGVALTYPE_U64;
2158 else if (cBits <= 128)
2159 enmRegType = DBGFREGVALTYPE_U128;
2160 else if (cBits <= 256)
2161 enmRegType = DBGFREGVALTYPE_U256;
2162 else
2163 enmRegType = DBGFREGVALTYPE_U512;
2164 }
2165 else if (pLookupRec->pAlias)
2166 {
2167 /* Restrict the input to the size of the alias register. */
2168 DBGFREGVALTYPE enmAliasType = pLookupRec->pAlias->enmType;
2169 if (enmAliasType != enmType)
2170 {
2171 rc = dbgfR3RegValCast(&Value, enmType, enmAliasType);
2172 if (RT_FAILURE(rc))
2173 return rc;
2174 dbgfR3RegValCast(&Mask, enmType, enmAliasType);
2175 enmType = enmAliasType;
2176 }
2177 }
2178
2179 if (enmType != enmRegType)
2180 {
2181 int rc2 = dbgfR3RegValCast(&Value, enmType, enmRegType);
2182 if (RT_FAILURE(rc2))
2183 return rc2;
2184 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
2185 rc2 = VINF_SUCCESS;
2186 dbgfR3RegValCast(&Mask, enmType, enmRegType);
2187 }
2188
2189 /*
2190 * Subfields needs some extra processing if there is no subfield
2191 * setter, since we'll be feeding it to the normal register setter
2192 * instead. The mask and value must be shifted and truncated to the
2193 * subfield position.
2194 */
2195 if (pSubField && !pSubField->pfnSet)
2196 {
2197 /* The shift factor is for displaying a subfield value
2198 2**cShift times larger than the stored value. We have
2199 to undo this before adjusting value and mask. */
2200 if (pSubField->cShift)
2201 {
2202 /* Warn about trunction of the lower bits that get
2203 shifted out below. */
2204 if (rc == VINF_SUCCESS)
2205 {
2206 DBGFREGVAL Value2 = Value;
2207 RTUInt128AssignAndNFirstBits(&Value2.u128, -pSubField->cShift);
2208 if (!RTUInt128BitAreAllClear(&Value2.u128))
2209 rc = VINF_DBGF_TRUNCATED_REGISTER;
2210 }
2211 RTUInt128AssignShiftRight(&Value.u128, pSubField->cShift);
2212 }
2213
2214 RTUInt128AssignAndNFirstBits(&Value.u128, pSubField->cBits);
2215 if (rc == VINF_SUCCESS && RTUInt128IsNotEqual(&Value.u128, &Value.u128))
2216 rc = VINF_DBGF_TRUNCATED_REGISTER;
2217 RTUInt128AssignAndNFirstBits(&Mask.u128, pSubField->cBits);
2218
2219 RTUInt128AssignShiftLeft(&Value.u128, pSubField->iFirstBit);
2220 RTUInt128AssignShiftLeft(&Mask.u128, pSubField->iFirstBit);
2221 }
2222
2223 /*
2224 * Do the actual work on an EMT.
2225 */
2226 if (pSet->enmType == DBGFREGSETTYPE_CPU)
2227 idDefCpu = pSet->uUserArg.pVCpu->idCpu;
2228 else if (idDefCpu != VMCPUID_ANY)
2229 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2230
2231 int rc2 = VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmSetWorkerOnCpu, 4,
2232 pUVM, pLookupRec, &Value, &Mask);
2233
2234 if (rc == VINF_SUCCESS || RT_FAILURE(rc2))
2235 rc = rc2;
2236 return rc;
2237 }
2238 return VERR_DBGF_READ_ONLY_REGISTER;
2239 }
2240 return VERR_DBGF_REGISTER_NOT_FOUND;
2241}
2242
2243
2244/**
2245 * Internal worker for DBGFR3RegFormatValue, cbBuf is sufficent.
2246 *
2247 * @copydoc DBGFR3RegFormatValueEx
2248 */
2249DECLINLINE(ssize_t) dbgfR3RegFormatValueInt(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2250 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2251{
2252 switch (enmType)
2253 {
2254 case DBGFREGVALTYPE_U8:
2255 return RTStrFormatU8(pszBuf, cbBuf, pValue->u8, uBase, cchWidth, cchPrecision, fFlags);
2256 case DBGFREGVALTYPE_U16:
2257 return RTStrFormatU16(pszBuf, cbBuf, pValue->u16, uBase, cchWidth, cchPrecision, fFlags);
2258 case DBGFREGVALTYPE_U32:
2259 return RTStrFormatU32(pszBuf, cbBuf, pValue->u32, uBase, cchWidth, cchPrecision, fFlags);
2260 case DBGFREGVALTYPE_U64:
2261 return RTStrFormatU64(pszBuf, cbBuf, pValue->u64, uBase, cchWidth, cchPrecision, fFlags);
2262 case DBGFREGVALTYPE_U128:
2263 return RTStrFormatU128(pszBuf, cbBuf, &pValue->u128, uBase, cchWidth, cchPrecision, fFlags);
2264 case DBGFREGVALTYPE_U256:
2265 return RTStrFormatU256(pszBuf, cbBuf, &pValue->u256, uBase, cchWidth, cchPrecision, fFlags);
2266 case DBGFREGVALTYPE_U512:
2267 return RTStrFormatU512(pszBuf, cbBuf, &pValue->u512, uBase, cchWidth, cchPrecision, fFlags);
2268 case DBGFREGVALTYPE_R80:
2269 return RTStrFormatR80u2(pszBuf, cbBuf, &pValue->r80Ex, cchWidth, cchPrecision, fFlags);
2270 case DBGFREGVALTYPE_DTR:
2271 {
2272 ssize_t cch = RTStrFormatU64(pszBuf, cbBuf, pValue->dtr.u64Base,
2273 16, 2+16, 0, RTSTR_F_SPECIAL | RTSTR_F_ZEROPAD);
2274 AssertReturn(cch > 0, VERR_DBGF_REG_IPE_1);
2275 pszBuf[cch++] = ':';
2276 cch += RTStrFormatU64(&pszBuf[cch], cbBuf - cch, pValue->dtr.u32Limit,
2277 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_32BIT);
2278 return cch;
2279 }
2280
2281 case DBGFREGVALTYPE_32BIT_HACK:
2282 case DBGFREGVALTYPE_END:
2283 case DBGFREGVALTYPE_INVALID:
2284 break;
2285 /* no default, want gcc warnings */
2286 }
2287
2288 RTStrPrintf(pszBuf, cbBuf, "!enmType=%d!", enmType);
2289 return VERR_DBGF_REG_IPE_2;
2290}
2291
2292
2293/**
2294 * Format a register value, extended version.
2295 *
2296 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2297 * @param pszBuf The output buffer.
2298 * @param cbBuf The size of the output buffer.
2299 * @param pValue The value to format.
2300 * @param enmType The value type.
2301 * @param uBase The base (ignored if not applicable).
2302 * @param cchWidth The width if RTSTR_F_WIDTH is set, otherwise
2303 * ignored.
2304 * @param cchPrecision The width if RTSTR_F_PRECISION is set, otherwise
2305 * ignored.
2306 * @param fFlags String formatting flags, RTSTR_F_XXX.
2307 */
2308VMMR3DECL(ssize_t) DBGFR3RegFormatValueEx(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2309 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2310{
2311 /*
2312 * Format to temporary buffer using worker shared with dbgfR3RegPrintfCbFormatNormal.
2313 */
2314 char szTmp[160];
2315 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), pValue, enmType, uBase, cchWidth, cchPrecision, fFlags);
2316 if (cchOutput > 0)
2317 {
2318 if ((size_t)cchOutput < cbBuf)
2319 memcpy(pszBuf, szTmp, cchOutput + 1);
2320 else
2321 {
2322 if (cbBuf)
2323 {
2324 memcpy(pszBuf, szTmp, cbBuf - 1);
2325 pszBuf[cbBuf - 1] = '\0';
2326 }
2327 cchOutput = VERR_BUFFER_OVERFLOW;
2328 }
2329 }
2330 return cchOutput;
2331}
2332
2333
2334/**
2335 * Format a register value as hexadecimal and with default width according to
2336 * the type.
2337 *
2338 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2339 * @param pszBuf The output buffer.
2340 * @param cbBuf The size of the output buffer.
2341 * @param pValue The value to format.
2342 * @param enmType The value type.
2343 * @param fSpecial Same as RTSTR_F_SPECIAL.
2344 */
2345VMMR3DECL(ssize_t) DBGFR3RegFormatValue(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType, bool fSpecial)
2346{
2347 int cchWidth = 0;
2348 switch (enmType)
2349 {
2350 case DBGFREGVALTYPE_U8: cchWidth = 2 + fSpecial*2; break;
2351 case DBGFREGVALTYPE_U16: cchWidth = 4 + fSpecial*2; break;
2352 case DBGFREGVALTYPE_U32: cchWidth = 8 + fSpecial*2; break;
2353 case DBGFREGVALTYPE_U64: cchWidth = 16 + fSpecial*2; break;
2354 case DBGFREGVALTYPE_U128: cchWidth = 32 + fSpecial*2; break;
2355 case DBGFREGVALTYPE_U256: cchWidth = 64 + fSpecial*2; break;
2356 case DBGFREGVALTYPE_U512: cchWidth = 128 + fSpecial*2; break;
2357 case DBGFREGVALTYPE_R80: cchWidth = 0; break;
2358 case DBGFREGVALTYPE_DTR: cchWidth = 16+1+4 + fSpecial*2; break;
2359
2360 case DBGFREGVALTYPE_32BIT_HACK:
2361 case DBGFREGVALTYPE_END:
2362 case DBGFREGVALTYPE_INVALID:
2363 break;
2364 /* no default, want gcc warnings */
2365 }
2366 uint32_t fFlags = RTSTR_F_ZEROPAD;
2367 if (fSpecial)
2368 fFlags |= RTSTR_F_SPECIAL;
2369 if (cchWidth != 0)
2370 fFlags |= RTSTR_F_WIDTH;
2371 return DBGFR3RegFormatValueEx(pszBuf, cbBuf, pValue, enmType, 16, cchWidth, 0, fFlags);
2372}
2373
2374
2375/**
2376 * Format a register using special hacks as well as sub-field specifications
2377 * (the latter isn't implemented yet).
2378 */
2379static size_t
2380dbgfR3RegPrintfCbFormatField(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2381 PCDBGFREGLOOKUP pLookupRec, int cchWidth, int cchPrecision, unsigned fFlags)
2382{
2383 char szTmp[160];
2384
2385 NOREF(cchWidth); NOREF(cchPrecision); NOREF(fFlags);
2386
2387 /*
2388 * Retrieve the register value.
2389 */
2390 DBGFREGVAL Value;
2391 DBGFREGVALTYPE enmType;
2392 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2393 if (RT_FAILURE(rc))
2394 {
2395 PCRTSTATUSMSG pErr = RTErrGet(rc);
2396 if (pErr)
2397 return pfnOutput(pvArgOutput, pErr->pszDefine, strlen(pErr->pszDefine));
2398 return pfnOutput(pvArgOutput, szTmp, RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc));
2399 }
2400
2401 char *psz = szTmp;
2402
2403 /*
2404 * Special case: Format eflags.
2405 */
2406 if ( pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU
2407 && pLookupRec->pDesc->enmReg == DBGFREG_RFLAGS
2408 && pLookupRec->pSubField == NULL)
2409 {
2410 rc = dbgfR3RegValCast(&Value, enmType, DBGFREGVALTYPE_U32);
2411 AssertRC(rc);
2412 uint32_t const efl = Value.u32;
2413
2414 /* the iopl */
2415 psz += RTStrPrintf(psz, sizeof(szTmp) / 2, "iopl=%u ", X86_EFL_GET_IOPL(efl));
2416
2417 /* add flags */
2418 static const struct
2419 {
2420 const char *pszSet;
2421 const char *pszClear;
2422 uint32_t fFlag;
2423 } aFlags[] =
2424 {
2425 { "vip",NULL, X86_EFL_VIP },
2426 { "vif",NULL, X86_EFL_VIF },
2427 { "ac", NULL, X86_EFL_AC },
2428 { "vm", NULL, X86_EFL_VM },
2429 { "rf", NULL, X86_EFL_RF },
2430 { "nt", NULL, X86_EFL_NT },
2431 { "ov", "nv", X86_EFL_OF },
2432 { "dn", "up", X86_EFL_DF },
2433 { "ei", "di", X86_EFL_IF },
2434 { "tf", NULL, X86_EFL_TF },
2435 { "ng", "pl", X86_EFL_SF },
2436 { "zr", "nz", X86_EFL_ZF },
2437 { "ac", "na", X86_EFL_AF },
2438 { "po", "pe", X86_EFL_PF },
2439 { "cy", "nc", X86_EFL_CF },
2440 };
2441 for (unsigned i = 0; i < RT_ELEMENTS(aFlags); i++)
2442 {
2443 const char *pszAdd = aFlags[i].fFlag & efl ? aFlags[i].pszSet : aFlags[i].pszClear;
2444 if (pszAdd)
2445 {
2446 *psz++ = *pszAdd++;
2447 *psz++ = *pszAdd++;
2448 if (*pszAdd)
2449 *psz++ = *pszAdd++;
2450 *psz++ = ' ';
2451 }
2452 }
2453
2454 /* drop trailing space */
2455 psz--;
2456 }
2457 else
2458 {
2459 /*
2460 * General case.
2461 */
2462 AssertMsgFailed(("Not implemented: %s\n", pLookupRec->Core.pszString));
2463 return pfnOutput(pvArgOutput, pLookupRec->Core.pszString, pLookupRec->Core.cchString);
2464 }
2465
2466 /* Output the string. */
2467 return pfnOutput(pvArgOutput, szTmp, psz - &szTmp[0]);
2468}
2469
2470
2471/**
2472 * Formats a register having parsed up to the register name.
2473 */
2474static size_t
2475dbgfR3RegPrintfCbFormatNormal(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2476 PCDBGFREGLOOKUP pLookupRec, unsigned uBase, int cchWidth, int cchPrecision, unsigned fFlags)
2477{
2478 char szTmp[160];
2479
2480 /*
2481 * Get the register value.
2482 */
2483 DBGFREGVAL Value;
2484 DBGFREGVALTYPE enmType;
2485 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2486 if (RT_FAILURE(rc))
2487 {
2488 PCRTSTATUSMSG pErr = RTErrGet(rc);
2489 if (pErr)
2490 return pfnOutput(pvArgOutput, pErr->pszDefine, strlen(pErr->pszDefine));
2491 return pfnOutput(pvArgOutput, szTmp, RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc));
2492 }
2493
2494 /*
2495 * Format the value.
2496 */
2497 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), &Value, enmType, uBase, cchWidth, cchPrecision, fFlags);
2498 if (RT_UNLIKELY(cchOutput <= 0))
2499 {
2500 AssertFailed();
2501 return pfnOutput(pvArgOutput, "internal-error", sizeof("internal-error") - 1);
2502 }
2503 return pfnOutput(pvArgOutput, szTmp, cchOutput);
2504}
2505
2506
2507/**
2508 * @callback_method_impl{FNSTRFORMAT}
2509 */
2510static DECLCALLBACK(size_t)
2511dbgfR3RegPrintfCbFormat(void *pvArg, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2512 const char **ppszFormat, va_list *pArgs, int cchWidth,
2513 int cchPrecision, unsigned fFlags, char chArgSize)
2514{
2515 NOREF(pArgs); NOREF(chArgSize);
2516
2517 /*
2518 * Parse the format type and hand the job to the appropriate worker.
2519 */
2520 PDBGFR3REGPRINTFARGS pThis = (PDBGFR3REGPRINTFARGS)pvArg;
2521 const char *pszFormat = *ppszFormat;
2522 if ( pszFormat[0] != 'V'
2523 || pszFormat[1] != 'R')
2524 {
2525 AssertMsgFailed(("'%s'\n", pszFormat));
2526 return 0;
2527 }
2528 unsigned offCurly = 2;
2529 if (pszFormat[offCurly] != '{')
2530 {
2531 AssertMsgReturn(pszFormat[offCurly], ("'%s'\n", pszFormat), 0);
2532 offCurly++;
2533 AssertMsgReturn(pszFormat[offCurly] == '{', ("'%s'\n", pszFormat), 0);
2534 }
2535 const char *pachReg = &pszFormat[offCurly + 1];
2536
2537 /*
2538 * The end and length of the register.
2539 */
2540 const char *pszEnd = strchr(pachReg, '}');
2541 AssertMsgReturn(pszEnd, ("Missing closing curly bracket: '%s'\n", pszFormat), 0);
2542 size_t const cchReg = pszEnd - pachReg;
2543
2544 /*
2545 * Look up the register - same as dbgfR3RegResolve, except for locking and
2546 * input string termination.
2547 */
2548 PRTSTRSPACE pRegSpace = &pThis->pUVM->dbgf.s.RegSpace;
2549 /* Try looking up the name without any case folding or cpu prefixing. */
2550 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGetN(pRegSpace, pachReg, cchReg);
2551 if (!pLookupRec)
2552 {
2553 /* Lower case it and try again. */
2554 char szName[DBGF_REG_MAX_NAME * 4 + 16];
2555 ssize_t cchFolded = dbgfR3RegCopyToLower(pachReg, cchReg, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
2556 if (cchFolded > 0)
2557 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2558 if ( !pLookupRec
2559 && cchFolded >= 0
2560 && pThis->idCpu != VMCPUID_ANY)
2561 {
2562 /* Prefix it with the specified CPU set. */
2563 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), pThis->fGuestRegs ? "cpu%u." : "hypercpu%u.", pThis->idCpu);
2564 dbgfR3RegCopyToLower(pachReg, cchReg, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
2565 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2566 }
2567 }
2568 AssertMsgReturn(pLookupRec, ("'%s'\n", pszFormat), 0);
2569 AssertMsgReturn( pLookupRec->pSet->enmType != DBGFREGSETTYPE_CPU
2570 || pLookupRec->pSet->uUserArg.pVCpu->idCpu == pThis->idCpu,
2571 ("'%s' idCpu=%u, pSet/cpu=%u\n", pszFormat, pThis->idCpu, pLookupRec->pSet->uUserArg.pVCpu->idCpu),
2572 0);
2573
2574 /*
2575 * Commit the parsed format string. Up to this point it is nice to know
2576 * what register lookup failed and such, so we've delayed comitting.
2577 */
2578 *ppszFormat = pszEnd + 1;
2579
2580 /*
2581 * Call the responsible worker.
2582 */
2583 switch (pszFormat[offCurly - 1])
2584 {
2585 case 'R': /* %VR{} */
2586 case 'X': /* %VRX{} */
2587 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2588 16, cchWidth, cchPrecision, fFlags);
2589 case 'U':
2590 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2591 10, cchWidth, cchPrecision, fFlags);
2592 case 'O':
2593 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2594 8, cchWidth, cchPrecision, fFlags);
2595 case 'B':
2596 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2597 2, cchWidth, cchPrecision, fFlags);
2598 case 'F':
2599 return dbgfR3RegPrintfCbFormatField(pThis, pfnOutput, pvArgOutput, pLookupRec, cchWidth, cchPrecision, fFlags);
2600 default:
2601 AssertFailed();
2602 return 0;
2603 }
2604}
2605
2606
2607
2608/**
2609 * @callback_method_impl{FNRTSTROUTPUT}
2610 */
2611static DECLCALLBACK(size_t)
2612dbgfR3RegPrintfCbOutput(void *pvArg, const char *pachChars, size_t cbChars)
2613{
2614 PDBGFR3REGPRINTFARGS pArgs = (PDBGFR3REGPRINTFARGS)pvArg;
2615 size_t cbToCopy = cbChars;
2616 if (cbToCopy >= pArgs->cchLeftBuf)
2617 {
2618 if (RT_SUCCESS(pArgs->rc))
2619 pArgs->rc = VERR_BUFFER_OVERFLOW;
2620 cbToCopy = pArgs->cchLeftBuf;
2621 }
2622 if (cbToCopy > 0)
2623 {
2624 memcpy(&pArgs->pszBuf[pArgs->offBuf], pachChars, cbToCopy);
2625 pArgs->offBuf += cbToCopy;
2626 pArgs->cchLeftBuf -= cbToCopy;
2627 pArgs->pszBuf[pArgs->offBuf] = '\0';
2628 }
2629 return cbToCopy;
2630}
2631
2632
2633/**
2634 * On CPU worker for the register formatting, used by DBGFR3RegPrintfV.
2635 *
2636 * @returns VBox status code.
2637 *
2638 * @param pArgs The argument package and state.
2639 */
2640static DECLCALLBACK(int) dbgfR3RegPrintfWorkerOnCpu(PDBGFR3REGPRINTFARGS pArgs)
2641{
2642 DBGF_REG_DB_LOCK_READ(pArgs->pUVM);
2643 RTStrFormatV(dbgfR3RegPrintfCbOutput, pArgs, dbgfR3RegPrintfCbFormat, pArgs, pArgs->pszFormat, pArgs->va);
2644 DBGF_REG_DB_UNLOCK_READ(pArgs->pUVM);
2645 return pArgs->rc;
2646}
2647
2648
2649/**
2650 * Format a registers.
2651 *
2652 * This is restricted to registers from one CPU, that specified by @a idCpu.
2653 *
2654 * @returns VBox status code.
2655 * @param pUVM The user mode VM handle.
2656 * @param idCpu The CPU ID of any CPU registers that may be
2657 * printed, pass VMCPUID_ANY if not applicable.
2658 * @param pszBuf The output buffer.
2659 * @param cbBuf The size of the output buffer.
2660 * @param pszFormat The format string. Register names are given by
2661 * %VR{name}, they take no arguments.
2662 * @param va Other format arguments.
2663 */
2664VMMR3DECL(int) DBGFR3RegPrintfV(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, va_list va)
2665{
2666 AssertPtrReturn(pszBuf, VERR_INVALID_POINTER);
2667 AssertReturn(cbBuf > 0, VERR_BUFFER_OVERFLOW);
2668 *pszBuf = '\0';
2669
2670 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2671 AssertReturn((idCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2672 AssertPtrReturn(pszFormat, VERR_INVALID_POINTER);
2673
2674 /*
2675 * Set up an argument package and execute the formatting on the
2676 * specified CPU.
2677 */
2678 DBGFR3REGPRINTFARGS Args;
2679 Args.pUVM = pUVM;
2680 Args.idCpu = idCpu != VMCPUID_ANY ? idCpu & ~DBGFREG_HYPER_VMCPUID : idCpu;
2681 Args.fGuestRegs = idCpu != VMCPUID_ANY && !(idCpu & DBGFREG_HYPER_VMCPUID);
2682 Args.pszBuf = pszBuf;
2683 Args.pszFormat = pszFormat;
2684 va_copy(Args.va, va);
2685 Args.offBuf = 0;
2686 Args.cchLeftBuf = cbBuf - 1;
2687 Args.rc = VINF_SUCCESS;
2688 int rc = VMR3ReqPriorityCallWaitU(pUVM, Args.idCpu, (PFNRT)dbgfR3RegPrintfWorkerOnCpu, 1, &Args);
2689 va_end(Args.va);
2690 return rc;
2691}
2692
2693
2694/**
2695 * Format a registers.
2696 *
2697 * This is restricted to registers from one CPU, that specified by @a idCpu.
2698 *
2699 * @returns VBox status code.
2700 * @param pUVM The user mode VM handle.
2701 * @param idCpu The CPU ID of any CPU registers that may be
2702 * printed, pass VMCPUID_ANY if not applicable.
2703 * @param pszBuf The output buffer.
2704 * @param cbBuf The size of the output buffer.
2705 * @param pszFormat The format string. Register names are given by
2706 * %VR{name}, %VRU{name}, %VRO{name} and
2707 * %VRB{name}, which are hexadecimal, (unsigned)
2708 * decimal, octal and binary representation. None
2709 * of these types takes any arguments.
2710 * @param ... Other format arguments.
2711 */
2712VMMR3DECL(int) DBGFR3RegPrintf(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, ...)
2713{
2714 va_list va;
2715 va_start(va, pszFormat);
2716 int rc = DBGFR3RegPrintfV(pUVM, idCpu, pszBuf, cbBuf, pszFormat, va);
2717 va_end(va);
2718 return rc;
2719}
2720
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