VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp@ 106952

Last change on this file since 106952 was 106365, checked in by vboxsync, 5 weeks ago

VMM/DBGFReg/CMM/CPUM: Correct CPU state register sorting and make the register querying methos using DBGFREG_XXX as an input work on ARMv8, bugref:10393
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1/* $Id: DBGFReg.cpp 106365 2024-10-16 13:11:39Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Register Methods.
4 */
5
6/*
7 * Copyright (C) 2010-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DBGF
33#include <VBox/vmm/dbgf.h>
34#include "DBGFInternal.h"
35#include <VBox/vmm/mm.h>
36#include <VBox/vmm/vm.h>
37#include <VBox/vmm/uvm.h>
38#include <VBox/param.h>
39#include <VBox/err.h>
40#include <VBox/log.h>
41#include <iprt/ctype.h>
42#include <iprt/string.h>
43#include <iprt/uint128.h>
44
45
46/*********************************************************************************************************************************
47* Defined Constants And Macros *
48*********************************************************************************************************************************/
49/** Locks the register database for writing. */
50#define DBGF_REG_DB_LOCK_WRITE(pUVM) \
51 do { \
52 int rcSem = RTSemRWRequestWrite((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
53 AssertRC(rcSem); \
54 } while (0)
55
56/** Unlocks the register database after writing. */
57#define DBGF_REG_DB_UNLOCK_WRITE(pUVM) \
58 do { \
59 int rcSem = RTSemRWReleaseWrite((pUVM)->dbgf.s.hRegDbLock); \
60 AssertRC(rcSem); \
61 } while (0)
62
63/** Locks the register database for reading. */
64#define DBGF_REG_DB_LOCK_READ(pUVM) \
65 do { \
66 int rcSem = RTSemRWRequestRead((pUVM)->dbgf.s.hRegDbLock, RT_INDEFINITE_WAIT); \
67 AssertRC(rcSem); \
68 } while (0)
69
70/** Unlocks the register database after reading. */
71#define DBGF_REG_DB_UNLOCK_READ(pUVM) \
72 do { \
73 int rcSem = RTSemRWReleaseRead((pUVM)->dbgf.s.hRegDbLock); \
74 AssertRC(rcSem); \
75 } while (0)
76
77
78/** The max length of a set, register or sub-field name. */
79#define DBGF_REG_MAX_NAME 40
80
81
82/*********************************************************************************************************************************
83* Structures and Typedefs *
84*********************************************************************************************************************************/
85/**
86 * Register set registration record type.
87 */
88typedef enum DBGFREGSETTYPE
89{
90 /** Invalid zero value. */
91 DBGFREGSETTYPE_INVALID = 0,
92 /** CPU record. */
93 DBGFREGSETTYPE_CPU,
94 /** Device record. */
95 DBGFREGSETTYPE_DEVICE,
96 /** End of valid record types. */
97 DBGFREGSETTYPE_END
98} DBGFREGSETTYPE;
99
100
101/**
102 * Register set registration record.
103 */
104typedef struct DBGFREGSET
105{
106 /** String space core. */
107 RTSTRSPACECORE Core;
108 /** The registration record type. */
109 DBGFREGSETTYPE enmType;
110 /** The user argument for the callbacks. */
111 union
112 {
113 /** The CPU view. */
114 PVMCPU pVCpu;
115 /** The device view. */
116 PPDMDEVINS pDevIns;
117 /** The general view. */
118 void *pv;
119 } uUserArg;
120
121 /** The register descriptors. */
122 PCDBGFREGDESC paDescs;
123 /** The number of register descriptors. */
124 uint32_t cDescs;
125
126 /** Array of lookup records.
127 * The first part of the array runs parallel to paDescs, the rest are
128 * covering for aliases and bitfield variations. It's done this way to
129 * simplify the query all operations. */
130 struct DBGFREGLOOKUP *paLookupRecs;
131 /** The number of lookup records. */
132 uint32_t cLookupRecs;
133
134 /** The register name prefix. */
135 char szPrefix[1];
136} DBGFREGSET;
137/** Pointer to a register registration record. */
138typedef DBGFREGSET *PDBGFREGSET;
139/** Pointer to a const register registration record. */
140typedef DBGFREGSET const *PCDBGFREGSET;
141
142
143/**
144 * Register lookup record.
145 */
146typedef struct DBGFREGLOOKUP
147{
148 /** The string space core. */
149 RTSTRSPACECORE Core;
150 /** Pointer to the set. */
151 PCDBGFREGSET pSet;
152 /** Pointer to the register descriptor. */
153 PCDBGFREGDESC pDesc;
154 /** If an alias this points to the alias descriptor, NULL if not. */
155 PCDBGFREGALIAS pAlias;
156 /** If a sub-field this points to the sub-field descriptor, NULL if not. */
157 PCDBGFREGSUBFIELD pSubField;
158} DBGFREGLOOKUP;
159/** Pointer to a register lookup record. */
160typedef DBGFREGLOOKUP *PDBGFREGLOOKUP;
161/** Pointer to a const register lookup record. */
162typedef DBGFREGLOOKUP const *PCDBGFREGLOOKUP;
163
164
165/**
166 * Argument packet from DBGFR3RegNmQueryAll to dbgfR3RegNmQueryAllWorker.
167 */
168typedef struct DBGFR3REGNMQUERYALLARGS
169{
170 /** The output register array. */
171 PDBGFREGENTRYNM paRegs;
172 /** The number of entries in the output array. */
173 size_t cRegs;
174 /** The current register number when enumerating the string space.
175 * @remarks Only used by EMT(0). */
176 size_t iReg;
177} DBGFR3REGNMQUERYALLARGS;
178/** Pointer to a dbgfR3RegNmQueryAllWorker argument packet. */
179typedef DBGFR3REGNMQUERYALLARGS *PDBGFR3REGNMQUERYALLARGS;
180
181
182/**
183 * Argument packet passed by DBGFR3RegPrintfV to dbgfR3RegPrintfCbOutput and
184 * dbgfR3RegPrintfCbFormat.
185 */
186typedef struct DBGFR3REGPRINTFARGS
187{
188 /** The user mode VM handle. */
189 PUVM pUVM;
190 /** The target CPU. */
191 VMCPUID idCpu;
192 /** Set if we're looking at guest registers. */
193 bool fGuestRegs;
194 /** The output buffer. */
195 char *pszBuf;
196 /** The format string. */
197 const char *pszFormat;
198 /** The va list with format arguments. */
199 va_list va;
200
201 /** The current buffer offset. */
202 size_t offBuf;
203 /** The amount of buffer space left, not counting the terminator char. */
204 size_t cchLeftBuf;
205 /** The status code of the whole operation. First error is return,
206 * subsequent ones are suppressed. */
207 int rc;
208} DBGFR3REGPRINTFARGS;
209/** Pointer to a DBGFR3RegPrintfV argument packet. */
210typedef DBGFR3REGPRINTFARGS *PDBGFR3REGPRINTFARGS;
211
212
213
214/**
215 * Initializes the register database.
216 *
217 * @returns VBox status code.
218 * @param pUVM The user mode VM handle.
219 */
220int dbgfR3RegInit(PUVM pUVM)
221{
222 int rc = VINF_SUCCESS;
223 if (!pUVM->dbgf.s.fRegDbInitialized)
224 {
225 rc = RTSemRWCreate(&pUVM->dbgf.s.hRegDbLock);
226 pUVM->dbgf.s.fRegDbInitialized = RT_SUCCESS(rc);
227 }
228 return rc;
229}
230
231
232/**
233 * Terminates the register database.
234 *
235 * @param pUVM The user mode VM handle.
236 */
237void dbgfR3RegTerm(PUVM pUVM)
238{
239 RTSemRWDestroy(pUVM->dbgf.s.hRegDbLock);
240 pUVM->dbgf.s.hRegDbLock = NIL_RTSEMRW;
241 pUVM->dbgf.s.fRegDbInitialized = false;
242}
243
244
245/**
246 * Validates a register name.
247 *
248 * This is used for prefixes, aliases and field names.
249 *
250 * @returns true if valid, false if not.
251 * @param pszName The register name to validate.
252 * @param chDot Set to '.' if accepted, otherwise 0.
253 */
254static bool dbgfR3RegIsNameValid(const char *pszName, char chDot)
255{
256 const char *psz = pszName;
257 if (!RT_C_IS_ALPHA(*psz))
258 return false;
259 char ch;
260 while ((ch = *++psz))
261 if ( !RT_C_IS_LOWER(ch)
262 && !RT_C_IS_DIGIT(ch)
263 && ch != '_'
264 && ch != chDot)
265 return false;
266 if (psz - pszName > DBGF_REG_MAX_NAME)
267 return false;
268 return true;
269}
270
271
272/**
273 * Common worker for registering a register set.
274 *
275 * @returns VBox status code.
276 * @param pUVM The user mode VM handle.
277 * @param paRegisters The register descriptors.
278 * @param enmType The set type.
279 * @param pvUserArg The user argument for the callbacks.
280 * @param pszPrefix The name prefix.
281 * @param iInstance The instance number to be appended to @a
282 * pszPrefix when creating the set name.
283 */
284static int dbgfR3RegRegisterCommon(PUVM pUVM, PCDBGFREGDESC paRegisters, DBGFREGSETTYPE enmType, void *pvUserArg,
285 const char *pszPrefix, uint32_t iInstance)
286{
287 /*
288 * Validate input.
289 */
290 /* The name components. */
291 AssertMsgReturn(dbgfR3RegIsNameValid(pszPrefix, 0), ("%s\n", pszPrefix), VERR_INVALID_NAME);
292 const char *psz = RTStrEnd(pszPrefix, RTSTR_MAX);
293 bool const fNeedUnderscore = RT_C_IS_DIGIT(psz[-1]);
294 size_t const cchPrefix = psz - pszPrefix + fNeedUnderscore;
295 AssertMsgReturn(cchPrefix < RT_SIZEOFMEMB(DBGFREGSET, szPrefix) - 4 - 1, ("%s\n", pszPrefix), VERR_INVALID_NAME);
296
297 AssertMsgReturn(iInstance <= 9999, ("%d\n", iInstance), VERR_INVALID_NAME);
298
299 /* The descriptors. */
300 uint32_t cLookupRecs = 0;
301 uint32_t iDesc;
302 for (iDesc = 0; paRegisters[iDesc].pszName != NULL; iDesc++)
303 {
304 AssertMsgReturn(dbgfR3RegIsNameValid(paRegisters[iDesc].pszName, 0), ("%s (#%u)\n", paRegisters[iDesc].pszName, iDesc), VERR_INVALID_NAME);
305
306 if (enmType == DBGFREGSETTYPE_CPU)
307#if defined(VBOX_VMM_TARGET_ARMV8)
308 /** @todo This needs a general solution to avoid architecture dependent stuff here. */
309 AssertMsgReturn(iDesc < (unsigned)DBGFREG_END,
310 ("%d iDesc=%d\n", paRegisters[iDesc].enmReg, iDesc),
311 VERR_INVALID_PARAMETER);
312#else
313 AssertMsgReturn(iDesc < (unsigned)DBGFREG_END && (unsigned)paRegisters[iDesc].enmReg == iDesc,
314 ("%d iDesc=%d\n", paRegisters[iDesc].enmReg, iDesc),
315 VERR_INVALID_PARAMETER);
316#endif
317 else
318 AssertReturn(paRegisters[iDesc].enmReg == DBGFREG_END, VERR_INVALID_PARAMETER);
319 AssertReturn( paRegisters[iDesc].enmType > DBGFREGVALTYPE_INVALID
320 && paRegisters[iDesc].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
321 AssertMsgReturn(!(paRegisters[iDesc].fFlags & ~DBGFREG_FLAGS_READ_ONLY),
322 ("%#x (#%u)\n", paRegisters[iDesc].fFlags, iDesc),
323 VERR_INVALID_PARAMETER);
324 AssertPtrReturn(paRegisters[iDesc].pfnGet, VERR_INVALID_PARAMETER);
325 AssertReturn(RT_VALID_PTR(paRegisters[iDesc].pfnSet) || (paRegisters[iDesc].fFlags & DBGFREG_FLAGS_READ_ONLY),
326 VERR_INVALID_PARAMETER);
327
328 uint32_t iAlias = 0;
329 PCDBGFREGALIAS paAliases = paRegisters[iDesc].paAliases;
330 if (paAliases)
331 {
332 AssertPtrReturn(paAliases, VERR_INVALID_PARAMETER);
333 for (; paAliases[iAlias].pszName; iAlias++)
334 {
335 AssertMsgReturn(dbgfR3RegIsNameValid(paAliases[iAlias].pszName, 0), ("%s (%s)\n", paAliases[iAlias].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
336 AssertReturn( paAliases[iAlias].enmType > DBGFREGVALTYPE_INVALID
337 && paAliases[iAlias].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
338 }
339 }
340
341 uint32_t iSubField = 0;
342 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
343 if (paSubFields)
344 {
345 AssertPtrReturn(paSubFields, VERR_INVALID_PARAMETER);
346 for (; paSubFields[iSubField].pszName; iSubField++)
347 {
348 AssertMsgReturn(dbgfR3RegIsNameValid(paSubFields[iSubField].pszName, '.'), ("%s (%s)\n", paSubFields[iSubField].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);
349 AssertReturn(paSubFields[iSubField].iFirstBit + paSubFields[iSubField].cBits <= 128, VERR_INVALID_PARAMETER);
350 AssertReturn(paSubFields[iSubField].cBits + paSubFields[iSubField].cShift <= 128, VERR_INVALID_PARAMETER);
351 AssertPtrNullReturn(paSubFields[iSubField].pfnGet, VERR_INVALID_POINTER);
352 AssertPtrNullReturn(paSubFields[iSubField].pfnSet, VERR_INVALID_POINTER);
353 }
354 }
355
356 cLookupRecs += (1 + iAlias) * (1 + iSubField);
357 }
358
359 /* Check the instance number of the CPUs. */
360 AssertReturn(enmType != DBGFREGSETTYPE_CPU || iInstance < pUVM->cCpus, VERR_INVALID_CPU_ID);
361
362 /*
363 * Allocate a new record and all associated lookup records.
364 */
365 size_t cbRegSet = RT_UOFFSETOF_DYN(DBGFREGSET, szPrefix[cchPrefix + 4 + 1]);
366 cbRegSet = RT_ALIGN_Z(cbRegSet, 32);
367 size_t const offLookupRecArray = cbRegSet;
368 cbRegSet += cLookupRecs * sizeof(DBGFREGLOOKUP);
369
370 PDBGFREGSET pRegSet = (PDBGFREGSET)MMR3HeapAllocZU(pUVM, MM_TAG_DBGF_REG, cbRegSet);
371 if (!pRegSet)
372 return VERR_NO_MEMORY;
373
374 /*
375 * Initialize the new record.
376 */
377 pRegSet->Core.pszString = pRegSet->szPrefix;
378 pRegSet->enmType = enmType;
379 pRegSet->uUserArg.pv = pvUserArg;
380 pRegSet->paDescs = paRegisters;
381 pRegSet->cDescs = iDesc;
382 pRegSet->cLookupRecs = cLookupRecs;
383 pRegSet->paLookupRecs = (PDBGFREGLOOKUP)((uintptr_t)pRegSet + offLookupRecArray);
384 if (fNeedUnderscore)
385 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s_%u", pszPrefix, iInstance);
386 else
387 RTStrPrintf(pRegSet->szPrefix, cchPrefix + 4 + 1, "%s%u", pszPrefix, iInstance);
388
389 /*
390 * Initialize the lookup records. See DBGFREGSET::paLookupRecs.
391 */
392 char szName[DBGF_REG_MAX_NAME * 3 + 16];
393 strcpy(szName, pRegSet->szPrefix);
394 char *pszReg = strchr(szName, '\0');
395 *pszReg++ = '.';
396
397 /* Array parallel to the descriptors. */
398 int rc = VINF_SUCCESS;
399 PDBGFREGLOOKUP pLookupRec = &pRegSet->paLookupRecs[0];
400 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
401 {
402 strcpy(pszReg, paRegisters[iDesc].pszName);
403 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
404 if (!pLookupRec->Core.pszString)
405 rc = VERR_NO_STR_MEMORY;
406 pLookupRec->pSet = pRegSet;
407 pLookupRec->pDesc = &paRegisters[iDesc];
408 pLookupRec->pAlias = NULL;
409 pLookupRec->pSubField = NULL;
410 pLookupRec++;
411 }
412
413 /* Aliases and sub-fields. */
414 for (iDesc = 0; paRegisters[iDesc].pszName != NULL && RT_SUCCESS(rc); iDesc++)
415 {
416 PCDBGFREGALIAS pCurAlias = NULL; /* first time we add sub-fields for the real name. */
417 PCDBGFREGALIAS pNextAlias = paRegisters[iDesc].paAliases;
418 const char *pszRegName = paRegisters[iDesc].pszName;
419 while (RT_SUCCESS(rc))
420 {
421 /* Add sub-field records. */
422 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields;
423 if (paSubFields)
424 {
425 size_t cchReg = strlen(pszRegName);
426 memcpy(pszReg, pszRegName, cchReg);
427 char *pszSub = &pszReg[cchReg];
428 *pszSub++ = '.';
429 for (uint32_t iSubField = 0; paSubFields[iSubField].pszName && RT_SUCCESS(rc); iSubField++)
430 {
431 strcpy(pszSub, paSubFields[iSubField].pszName);
432 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
433 if (!pLookupRec->Core.pszString)
434 rc = VERR_NO_STR_MEMORY;
435 pLookupRec->pSet = pRegSet;
436 pLookupRec->pDesc = &paRegisters[iDesc];
437 pLookupRec->pAlias = pCurAlias;
438 pLookupRec->pSubField = &paSubFields[iSubField];
439 pLookupRec++;
440 }
441 }
442
443 /* Advance to the next alias. */
444 if (pNextAlias)
445 pCurAlias = pNextAlias++;
446 if (!pCurAlias)
447 break;
448 pszRegName = pCurAlias->pszName;
449 if (!pszRegName)
450 break;
451
452 /* The alias record. */
453 strcpy(pszReg, pszRegName);
454 pLookupRec->Core.pszString = MMR3HeapStrDupU(pUVM, MM_TAG_DBGF_REG, szName);
455 if (!pLookupRec->Core.pszString)
456 rc = VERR_NO_STR_MEMORY;
457 pLookupRec->pSet = pRegSet;
458 pLookupRec->pDesc = &paRegisters[iDesc];
459 pLookupRec->pAlias = pCurAlias;
460 pLookupRec->pSubField = NULL;
461 pLookupRec++;
462 }
463 }
464 Assert(pLookupRec == &pRegSet->paLookupRecs[pRegSet->cLookupRecs]);
465
466 if (RT_SUCCESS(rc))
467 {
468 /*
469 * Insert the record into the register set string space and optionally into
470 * the CPU register set cache.
471 */
472 DBGF_REG_DB_LOCK_WRITE(pUVM);
473
474 bool fInserted = RTStrSpaceInsert(&pUVM->dbgf.s.RegSetSpace, &pRegSet->Core);
475 if (fInserted)
476 {
477 pUVM->dbgf.s.cRegs += pRegSet->cDescs;
478 if (enmType == DBGFREGSETTYPE_CPU)
479 {
480 if (!strcmp(pszPrefix, "cpu"))
481 {
482 if (!pUVM->dbgf.s.cPerCpuRegs)
483 pUVM->dbgf.s.cPerCpuRegs = pRegSet->cDescs;
484 else
485 AssertLogRelMsgStmt(pUVM->dbgf.s.cPerCpuRegs == pRegSet->cDescs,
486 ("%d vs %d\n", pUVM->dbgf.s.cPerCpuRegs, pRegSet->cDescs),
487 pUVM->dbgf.s.cPerCpuRegs = RT_MAX(pRegSet->cDescs, pUVM->dbgf.s.cPerCpuRegs));
488 pUVM->aCpus[iInstance].dbgf.s.pGuestRegSet = pRegSet;
489 }
490 else
491 {
492 Assert(!strcmp(pszPrefix, "hypercpu"));
493 if (!pUVM->dbgf.s.cPerCpuHyperRegs)
494 pUVM->dbgf.s.cPerCpuHyperRegs = pRegSet->cDescs;
495 else
496 AssertLogRelMsgStmt(pUVM->dbgf.s.cPerCpuHyperRegs == pRegSet->cDescs,
497 ("%d vs %d\n", pUVM->dbgf.s.cPerCpuHyperRegs, pRegSet->cDescs),
498 pUVM->dbgf.s.cPerCpuHyperRegs = RT_MAX(pRegSet->cDescs, pUVM->dbgf.s.cPerCpuHyperRegs));
499 pUVM->aCpus[iInstance].dbgf.s.pHyperRegSet = pRegSet;
500 }
501 }
502
503 PDBGFREGLOOKUP paLookupRecs = pRegSet->paLookupRecs;
504 uint32_t iLookupRec = pRegSet->cLookupRecs;
505 while (iLookupRec-- > 0)
506 {
507 bool fInserted2 = RTStrSpaceInsert(&pUVM->dbgf.s.RegSpace, &paLookupRecs[iLookupRec].Core);
508 AssertMsg(fInserted2, ("'%s'", paLookupRecs[iLookupRec].Core.pszString)); NOREF(fInserted2);
509 }
510
511 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
512 return VINF_SUCCESS;
513 }
514
515 DBGF_REG_DB_UNLOCK_WRITE(pUVM);
516 rc = VERR_DUPLICATE;
517 }
518
519 /*
520 * Bail out.
521 */
522 for (uint32_t i = 0; i < pRegSet->cLookupRecs; i++)
523 MMR3HeapFree((char *)pRegSet->paLookupRecs[i].Core.pszString);
524 MMR3HeapFree(pRegSet);
525
526 return rc;
527}
528
529
530/**
531 * Registers a set of registers for a CPU.
532 *
533 * @returns VBox status code.
534 * @param pVM The cross context VM structure.
535 * @param pVCpu The cross context virtual CPU structure.
536 * @param paRegisters The register descriptors.
537 * @param fGuestRegs Set if it's the guest registers, clear if
538 * hypervisor registers.
539 */
540VMMR3_INT_DECL(int) DBGFR3RegRegisterCpu(PVM pVM, PVMCPU pVCpu, PCDBGFREGDESC paRegisters, bool fGuestRegs)
541{
542 PUVM pUVM = pVM->pUVM;
543 if (!pUVM->dbgf.s.fRegDbInitialized)
544 {
545 int rc = dbgfR3RegInit(pUVM);
546 if (RT_FAILURE(rc))
547 return rc;
548 }
549
550 AssertReturn(fGuestRegs, VERR_RAW_MODE_NOT_SUPPORTED);
551 return dbgfR3RegRegisterCommon(pUVM, paRegisters, DBGFREGSETTYPE_CPU, pVCpu, fGuestRegs ? "cpu" : "hypercpu", pVCpu->idCpu);
552}
553
554
555/**
556 * Registers a set of registers for a device.
557 *
558 * @returns VBox status code.
559 * @param pVM The cross context VM structure.
560 * @param paRegisters The register descriptors.
561 * @param pDevIns The device instance. This will be the callback user
562 * argument.
563 * @param pszPrefix The device name.
564 * @param iInstance The device instance.
565 */
566VMMR3_INT_DECL(int) DBGFR3RegRegisterDevice(PVM pVM, PCDBGFREGDESC paRegisters, PPDMDEVINS pDevIns,
567 const char *pszPrefix, uint32_t iInstance)
568{
569 AssertPtrReturn(paRegisters, VERR_INVALID_POINTER);
570 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
571 AssertPtrReturn(pszPrefix, VERR_INVALID_POINTER);
572
573 return dbgfR3RegRegisterCommon(pVM->pUVM, paRegisters, DBGFREGSETTYPE_DEVICE, pDevIns, pszPrefix, iInstance);
574}
575
576
577/**
578 * Clears the register value variable.
579 *
580 * @param pValue The variable to clear.
581 */
582DECLINLINE(void) dbgfR3RegValClear(PDBGFREGVAL pValue)
583{
584 pValue->au64[0] = 0;
585 pValue->au64[1] = 0;
586 pValue->au64[2] = 0;
587 pValue->au64[3] = 0;
588 pValue->au64[4] = 0;
589 pValue->au64[5] = 0;
590 pValue->au64[6] = 0;
591 pValue->au64[7] = 0;
592}
593
594
595/**
596 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
597 *
598 * @param pValue The value.
599 * @param u64 The integer value.
600 */
601DECLINLINE(void) dbgfR3RegValR80SetU64(PDBGFREGVAL pValue, uint64_t u64)
602{
603 /** @todo fixme */
604 pValue->r80.s.fSign = 0;
605 pValue->r80.s.uExponent = 16383;
606 pValue->r80.s.uMantissa = u64;
607}
608
609
610/**
611 * Sets a 80-bit floating point variable to a 64-bit unsigned interger value.
612 *
613 * @param pValue The value.
614 * @param u128 The integer value.
615 */
616DECLINLINE(void) dbgfR3RegValR80SetU128(PDBGFREGVAL pValue, RTUINT128U u128)
617{
618 /** @todo fixme */
619 pValue->r80.s.fSign = 0;
620 pValue->r80.s.uExponent = 16383;
621 pValue->r80.s.uMantissa = u128.s.Lo;
622}
623
624
625/**
626 * Get a 80-bit floating point variable as a 64-bit unsigned integer.
627 *
628 * @returns 64-bit unsigned integer.
629 * @param pValue The value.
630 */
631DECLINLINE(uint64_t) dbgfR3RegValR80GetU64(PCDBGFREGVAL pValue)
632{
633 /** @todo stupid, stupid MSC. */
634 return pValue->r80.s.uMantissa;
635}
636
637
638/**
639 * Get a 80-bit floating point variable as a 128-bit unsigned integer.
640 *
641 * @returns 128-bit unsigned integer.
642 * @param pValue The value.
643 */
644DECLINLINE(RTUINT128U) dbgfR3RegValR80GetU128(PCDBGFREGVAL pValue)
645{
646 /** @todo stupid, stupid MSC. */
647 RTUINT128U uRet;
648#if 0
649 uRet.s.Lo = (uint64_t)InVal.lrd;
650 uRet.s.Hi = (uint64_t)InVal.lrd / _4G / _4G;
651#else
652 uRet.s.Lo = pValue->r80.s.uMantissa;
653 uRet.s.Hi = 0;
654#endif
655 return uRet;
656}
657
658
659/**
660 * Performs a cast between register value types.
661 *
662 * @retval VINF_SUCCESS
663 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
664 * @retval VINF_DBGF_TRUNCATED_REGISTER
665 * @retval VERR_DBGF_UNSUPPORTED_CAST
666 *
667 * @param pValue The value to cast (input + output).
668 * @param enmFromType The input value.
669 * @param enmToType The desired output value.
670 */
671static int dbgfR3RegValCast(PDBGFREGVAL pValue, DBGFREGVALTYPE enmFromType, DBGFREGVALTYPE enmToType)
672{
673 DBGFREGVAL const InVal = *pValue;
674 dbgfR3RegValClear(pValue);
675
676 /* Note! No default cases here as gcc warnings about missing enum values
677 are desired. */
678 switch (enmFromType)
679 {
680 case DBGFREGVALTYPE_U8:
681 switch (enmToType)
682 {
683 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u8; return VINF_SUCCESS;
684 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
685 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
686 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
687 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
688 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
689 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u8; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
690 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u8); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
691 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
692
693 case DBGFREGVALTYPE_32BIT_HACK:
694 case DBGFREGVALTYPE_END:
695 case DBGFREGVALTYPE_INVALID:
696 break;
697 }
698 break;
699
700 case DBGFREGVALTYPE_U16:
701 switch (enmToType)
702 {
703 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u16; return VINF_DBGF_TRUNCATED_REGISTER;
704 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u16; return VINF_SUCCESS;
705 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
706 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
707 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
708 case DBGFREGVALTYPE_U256: pValue->u256.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
709 case DBGFREGVALTYPE_U512: pValue->u512.Words.w0 = InVal.u16; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
710 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u16); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
711 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
712
713 case DBGFREGVALTYPE_32BIT_HACK:
714 case DBGFREGVALTYPE_END:
715 case DBGFREGVALTYPE_INVALID:
716 break;
717 }
718 break;
719
720 case DBGFREGVALTYPE_U32:
721 switch (enmToType)
722 {
723 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
724 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u32; return VINF_DBGF_TRUNCATED_REGISTER;
725 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u32; return VINF_SUCCESS;
726 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
727 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
728 case DBGFREGVALTYPE_U256: pValue->u256.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
729 case DBGFREGVALTYPE_U512: pValue->u512.DWords.dw0 = InVal.u32; return VINF_DBGF_ZERO_EXTENDED_REGISTER;
730 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u32); return VINF_DBGF_ZERO_EXTENDED_REGISTER;
731 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
732
733 case DBGFREGVALTYPE_32BIT_HACK:
734 case DBGFREGVALTYPE_END:
735 case DBGFREGVALTYPE_INVALID:
736 break;
737 }
738 break;
739
740 case DBGFREGVALTYPE_U64:
741 switch (enmToType)
742 {
743 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
744 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
745 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
746 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u64; return VINF_SUCCESS;
747 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
748 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
749 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.u64; return VINF_DBGF_TRUNCATED_REGISTER;
750 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.u64); return VINF_DBGF_TRUNCATED_REGISTER;
751 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
752
753 case DBGFREGVALTYPE_32BIT_HACK:
754 case DBGFREGVALTYPE_END:
755 case DBGFREGVALTYPE_INVALID:
756 break;
757 }
758 break;
759
760 case DBGFREGVALTYPE_U128:
761 switch (enmToType)
762 {
763 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
764 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
765 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
766 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u128.s.Lo; return VINF_DBGF_TRUNCATED_REGISTER;
767 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u128; return VINF_SUCCESS;
768 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
769 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = InVal.u128; return VINF_SUCCESS;
770 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u128); return VINF_DBGF_TRUNCATED_REGISTER;
771 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
772
773 case DBGFREGVALTYPE_32BIT_HACK:
774 case DBGFREGVALTYPE_END:
775 case DBGFREGVALTYPE_INVALID:
776 break;
777 }
778 break;
779
780 case DBGFREGVALTYPE_U256:
781 switch (enmToType)
782 {
783 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
784 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u256.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
785 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u256.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
786 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u256.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
787 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u256.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
788 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u256; return VINF_SUCCESS;
789 case DBGFREGVALTYPE_U512: pValue->u512.OWords.ow0 = InVal.u256; return VINF_SUCCESS;
790 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u256.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
791 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
792
793 case DBGFREGVALTYPE_32BIT_HACK:
794 case DBGFREGVALTYPE_END:
795 case DBGFREGVALTYPE_INVALID:
796 break;
797 }
798 break;
799
800 case DBGFREGVALTYPE_U512:
801 switch (enmToType)
802 {
803 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
804 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.u512.Words.w0; return VINF_DBGF_TRUNCATED_REGISTER;
805 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.u512.DWords.dw0; return VINF_DBGF_TRUNCATED_REGISTER;
806 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.u512.QWords.qw0; return VINF_DBGF_TRUNCATED_REGISTER;
807 case DBGFREGVALTYPE_U128: pValue->u128 = InVal.u512.DQWords.dqw0; return VINF_DBGF_TRUNCATED_REGISTER;
808 case DBGFREGVALTYPE_U256: pValue->u256 = InVal.u512.OWords.ow0; return VINF_DBGF_TRUNCATED_REGISTER;
809 case DBGFREGVALTYPE_U512: pValue->u512 = InVal.u512; return VINF_SUCCESS;
810 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU128(pValue, InVal.u512.DQWords.dqw0); return VINF_DBGF_TRUNCATED_REGISTER;
811 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
812
813 case DBGFREGVALTYPE_32BIT_HACK:
814 case DBGFREGVALTYPE_END:
815 case DBGFREGVALTYPE_INVALID:
816 break;
817 }
818 break;
819
820 case DBGFREGVALTYPE_R80:
821 switch (enmToType)
822 {
823 case DBGFREGVALTYPE_U8: pValue->u8 = (uint8_t )dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
824 case DBGFREGVALTYPE_U16: pValue->u16 = (uint16_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
825 case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
826 case DBGFREGVALTYPE_U64: pValue->u64 = (uint64_t)dbgfR3RegValR80GetU64(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
827 case DBGFREGVALTYPE_U128: pValue->u128 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
828 case DBGFREGVALTYPE_U256: pValue->u256.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
829 case DBGFREGVALTYPE_U512: pValue->u512.DQWords.dqw0 = dbgfR3RegValR80GetU128(&InVal); return VINF_DBGF_TRUNCATED_REGISTER;
830 case DBGFREGVALTYPE_R80: pValue->r80 = InVal.r80; return VINF_SUCCESS;
831 case DBGFREGVALTYPE_DTR: return VERR_DBGF_UNSUPPORTED_CAST;
832
833 case DBGFREGVALTYPE_32BIT_HACK:
834 case DBGFREGVALTYPE_END:
835 case DBGFREGVALTYPE_INVALID:
836 break;
837 }
838 break;
839
840 case DBGFREGVALTYPE_DTR:
841 switch (enmToType)
842 {
843 case DBGFREGVALTYPE_U8: pValue->u8 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
844 case DBGFREGVALTYPE_U16: pValue->u16 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
845 case DBGFREGVALTYPE_U32: pValue->u32 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
846 case DBGFREGVALTYPE_U64: pValue->u64 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
847 case DBGFREGVALTYPE_U128: pValue->u128.s.Lo = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
848 case DBGFREGVALTYPE_U256: pValue->u256.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
849 case DBGFREGVALTYPE_U512: pValue->u512.QWords.qw0 = InVal.dtr.u64Base; return VINF_DBGF_TRUNCATED_REGISTER;
850 case DBGFREGVALTYPE_R80: dbgfR3RegValR80SetU64(pValue, InVal.dtr.u64Base); return VINF_DBGF_TRUNCATED_REGISTER;
851 case DBGFREGVALTYPE_DTR: pValue->dtr = InVal.dtr; return VINF_SUCCESS;
852
853 case DBGFREGVALTYPE_32BIT_HACK:
854 case DBGFREGVALTYPE_END:
855 case DBGFREGVALTYPE_INVALID:
856 break;
857 }
858 break;
859
860 case DBGFREGVALTYPE_INVALID:
861 case DBGFREGVALTYPE_END:
862 case DBGFREGVALTYPE_32BIT_HACK:
863 break;
864 }
865
866 AssertMsgFailed(("%d / %d\n", enmFromType, enmToType));
867 return VERR_DBGF_UNSUPPORTED_CAST;
868}
869
870
871/**
872 * Worker for the CPU register queries.
873 *
874 * @returns VBox status code.
875 * @retval VINF_SUCCESS
876 * @retval VERR_INVALID_VM_HANDLE
877 * @retval VERR_INVALID_CPU_ID
878 * @retval VERR_DBGF_REGISTER_NOT_FOUND
879 * @retval VERR_DBGF_UNSUPPORTED_CAST
880 * @retval VINF_DBGF_TRUNCATED_REGISTER
881 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
882 *
883 * @param pUVM The user mode VM handle.
884 * @param idCpu The virtual CPU ID.
885 * @param enmReg The register to query.
886 * @param enmType The desired return type.
887 * @param fGuestRegs Query guest CPU registers if set (true),
888 * hypervisor CPU registers if clear (false).
889 * @param pValue Where to return the register value.
890 */
891static DECLCALLBACK(int) dbgfR3RegCpuQueryWorkerOnCpu(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType,
892 bool fGuestRegs, PDBGFREGVAL pValue)
893{
894 int rc = VINF_SUCCESS;
895 DBGF_REG_DB_LOCK_READ(pUVM);
896
897 /*
898 * Look up the register set of the specified CPU.
899 */
900 PDBGFREGSET pSet = fGuestRegs
901 ? pUVM->aCpus[idCpu].dbgf.s.pGuestRegSet
902 : pUVM->aCpus[idCpu].dbgf.s.pHyperRegSet;
903 if (RT_LIKELY(pSet))
904 {
905 /*
906 * Look up the register and get the register value.
907 */
908#ifndef VBOX_VMM_TARGET_ARMV8
909 if (RT_LIKELY(pSet->cDescs > (size_t)enmReg))
910 {
911 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
912#else
913 if (RT_LIKELY(pSet->cDescs > (size_t)(enmReg - DBGFREG_ARMV8_FIRST)))
914 {
915 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg - DBGFREG_ARMV8_FIRST];
916#endif
917
918 pValue->au64[0] = pValue->au64[1] = 0;
919 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
920 if (RT_SUCCESS(rc))
921 {
922 /*
923 * Do the cast if the desired return type doesn't match what
924 * the getter returned.
925 */
926 if (pDesc->enmType == enmType)
927 rc = VINF_SUCCESS;
928 else
929 rc = dbgfR3RegValCast(pValue, pDesc->enmType, enmType);
930 }
931 }
932 else
933 rc = VERR_DBGF_REGISTER_NOT_FOUND;
934 }
935 else
936 rc = VERR_INVALID_CPU_ID;
937
938 DBGF_REG_DB_UNLOCK_READ(pUVM);
939 return rc;
940}
941
942
943/**
944 * Internal worker for the CPU register query functions.
945 *
946 * @returns VBox status code.
947 * @retval VINF_SUCCESS
948 * @retval VERR_INVALID_VM_HANDLE
949 * @retval VERR_INVALID_CPU_ID
950 * @retval VERR_DBGF_REGISTER_NOT_FOUND
951 * @retval VERR_DBGF_UNSUPPORTED_CAST
952 * @retval VINF_DBGF_TRUNCATED_REGISTER
953 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
954 *
955 * @param pUVM The user mode VM handle.
956 * @param idCpu The virtual CPU ID. Can be OR'ed with
957 * DBGFREG_HYPER_VMCPUID.
958 * @param enmReg The register to query.
959 * @param enmType The desired return type.
960 * @param pValue Where to return the register value.
961 */
962static int dbgfR3RegCpuQueryWorker(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, DBGFREGVALTYPE enmType, PDBGFREGVAL pValue)
963{
964 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
965 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
966 AssertMsgReturn(enmReg >= DBGFREG_AL && enmReg <= DBGFREG_END, ("%d\n", enmReg), VERR_INVALID_PARAMETER);
967
968 bool const fGuestRegs = !(idCpu & DBGFREG_HYPER_VMCPUID);
969 idCpu &= ~DBGFREG_HYPER_VMCPUID;
970 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
971
972 return VMR3ReqPriorityCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryWorkerOnCpu, 6,
973 pUVM, idCpu, enmReg, enmType, fGuestRegs, pValue);
974}
975
976
977/**
978 * Queries a 8-bit CPU register value.
979 *
980 * @retval VINF_SUCCESS
981 * @retval VERR_INVALID_VM_HANDLE
982 * @retval VERR_INVALID_CPU_ID
983 * @retval VERR_DBGF_REGISTER_NOT_FOUND
984 * @retval VERR_DBGF_UNSUPPORTED_CAST
985 * @retval VINF_DBGF_TRUNCATED_REGISTER
986 *
987 * @param pUVM The user mode VM handle.
988 * @param idCpu The target CPU ID. Can be OR'ed with
989 * DBGFREG_HYPER_VMCPUID.
990 * @param enmReg The register that's being queried.
991 * @param pu8 Where to store the register value.
992 */
993VMMR3DECL(int) DBGFR3RegCpuQueryU8(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint8_t *pu8)
994{
995 DBGFREGVAL Value;
996 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U8, &Value);
997 if (RT_SUCCESS(rc))
998 *pu8 = Value.u8;
999 else
1000 *pu8 = 0;
1001 return rc;
1002}
1003
1004
1005/**
1006 * Queries a 16-bit CPU register value.
1007 *
1008 * @retval VINF_SUCCESS
1009 * @retval VERR_INVALID_VM_HANDLE
1010 * @retval VERR_INVALID_CPU_ID
1011 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1012 * @retval VERR_DBGF_UNSUPPORTED_CAST
1013 * @retval VINF_DBGF_TRUNCATED_REGISTER
1014 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1015 *
1016 * @param pUVM The user mode VM handle.
1017 * @param idCpu The target CPU ID. Can be OR'ed with
1018 * DBGFREG_HYPER_VMCPUID.
1019 * @param enmReg The register that's being queried.
1020 * @param pu16 Where to store the register value.
1021 */
1022VMMR3DECL(int) DBGFR3RegCpuQueryU16(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint16_t *pu16)
1023{
1024 DBGFREGVAL Value;
1025 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U16, &Value);
1026 if (RT_SUCCESS(rc))
1027 *pu16 = Value.u16;
1028 else
1029 *pu16 = 0;
1030 return rc;
1031}
1032
1033
1034/**
1035 * Queries a 32-bit CPU register value.
1036 *
1037 * @retval VINF_SUCCESS
1038 * @retval VERR_INVALID_VM_HANDLE
1039 * @retval VERR_INVALID_CPU_ID
1040 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1041 * @retval VERR_DBGF_UNSUPPORTED_CAST
1042 * @retval VINF_DBGF_TRUNCATED_REGISTER
1043 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1044 *
1045 * @param pUVM The user mode VM handle.
1046 * @param idCpu The target CPU ID. Can be OR'ed with
1047 * DBGFREG_HYPER_VMCPUID.
1048 * @param enmReg The register that's being queried.
1049 * @param pu32 Where to store the register value.
1050 */
1051VMMR3DECL(int) DBGFR3RegCpuQueryU32(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint32_t *pu32)
1052{
1053 DBGFREGVAL Value;
1054 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U32, &Value);
1055 if (RT_SUCCESS(rc))
1056 *pu32 = Value.u32;
1057 else
1058 *pu32 = 0;
1059 return rc;
1060}
1061
1062
1063/**
1064 * Queries a 64-bit CPU register value.
1065 *
1066 * @retval VINF_SUCCESS
1067 * @retval VERR_INVALID_VM_HANDLE
1068 * @retval VERR_INVALID_CPU_ID
1069 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1070 * @retval VERR_DBGF_UNSUPPORTED_CAST
1071 * @retval VINF_DBGF_TRUNCATED_REGISTER
1072 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1073 *
1074 * @param pUVM The user mode VM handle.
1075 * @param idCpu The target CPU ID. Can be OR'ed with
1076 * DBGFREG_HYPER_VMCPUID.
1077 * @param enmReg The register that's being queried.
1078 * @param pu64 Where to store the register value.
1079 */
1080VMMR3DECL(int) DBGFR3RegCpuQueryU64(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64)
1081{
1082 DBGFREGVAL Value;
1083 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_U64, &Value);
1084 if (RT_SUCCESS(rc))
1085 *pu64 = Value.u64;
1086 else
1087 *pu64 = 0;
1088 return rc;
1089}
1090
1091
1092/**
1093 * Queries a descriptor table register value.
1094 *
1095 * @retval VINF_SUCCESS
1096 * @retval VERR_INVALID_VM_HANDLE
1097 * @retval VERR_INVALID_CPU_ID
1098 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1099 * @retval VERR_DBGF_UNSUPPORTED_CAST
1100 * @retval VINF_DBGF_TRUNCATED_REGISTER
1101 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1102 *
1103 * @param pUVM The user mode VM handle.
1104 * @param idCpu The target CPU ID. Can be OR'ed with
1105 * DBGFREG_HYPER_VMCPUID.
1106 * @param enmReg The register that's being queried.
1107 * @param pu64Base Where to store the register base value.
1108 * @param pu16Limit Where to store the register limit value.
1109 */
1110VMMR3DECL(int) DBGFR3RegCpuQueryXdtr(PUVM pUVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1111{
1112 DBGFREGVAL Value;
1113 int rc = dbgfR3RegCpuQueryWorker(pUVM, idCpu, enmReg, DBGFREGVALTYPE_DTR, &Value);
1114 if (RT_SUCCESS(rc))
1115 {
1116 *pu64Base = Value.dtr.u64Base;
1117 *pu16Limit = Value.dtr.u32Limit;
1118 }
1119 else
1120 {
1121 *pu64Base = 0;
1122 *pu16Limit = 0;
1123 }
1124 return rc;
1125}
1126
1127
1128#if 0 /* rewrite / remove */
1129
1130/**
1131 * Wrapper around CPUMQueryGuestMsr for dbgfR3RegCpuQueryBatchWorker.
1132 *
1133 * @retval VINF_SUCCESS
1134 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1135 *
1136 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1137 * @param pReg The where to store the register value and
1138 * size.
1139 * @param idMsr The MSR to get.
1140 */
1141static void dbgfR3RegGetMsrBatch(PVMCPU pVCpu, PDBGFREGENTRY pReg, uint32_t idMsr)
1142{
1143 pReg->enmType = DBGFREGVALTYPE_U64;
1144 int rc = CPUMQueryGuestMsr(pVCpu, idMsr, &pReg->Val.u64);
1145 if (RT_FAILURE(rc))
1146 {
1147 AssertMsg(rc == VERR_CPUM_RAISE_GP_0, ("%Rrc\n", rc));
1148 pReg->Val.u64 = 0;
1149 }
1150}
1151
1152
1153static DECLCALLBACK(int) dbgfR3RegCpuQueryBatchWorker(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1154{
1155#if 0
1156 PVMCPU pVCpu = &pUVM->pVM->aCpus[idCpu];
1157 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1158
1159 PDBGFREGENTRY pReg = paRegs - 1;
1160 while (cRegs-- > 0)
1161 {
1162 pReg++;
1163 pReg->Val.au64[0] = 0;
1164 pReg->Val.au64[1] = 0;
1165
1166 DBGFREG const enmReg = pReg->enmReg;
1167 AssertMsgReturn(enmReg >= 0 && enmReg <= DBGFREG_END, ("%d (%#x)\n", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1168 if (enmReg != DBGFREG_END)
1169 {
1170 PCDBGFREGDESC pDesc = &g_aDbgfRegDescs[enmReg];
1171 if (!pDesc->pfnGet)
1172 {
1173 PCRTUINT128U pu = (PCRTUINT128U)((uintptr_t)pCtx + pDesc->offCtx);
1174 pReg->enmType = pDesc->enmType;
1175 switch (pDesc->enmType)
1176 {
1177 case DBGFREGVALTYPE_U8: pReg->Val.u8 = pu->au8[0]; break;
1178 case DBGFREGVALTYPE_U16: pReg->Val.u16 = pu->au16[0]; break;
1179 case DBGFREGVALTYPE_U32: pReg->Val.u32 = pu->au32[0]; break;
1180 case DBGFREGVALTYPE_U64: pReg->Val.u64 = pu->au64[0]; break;
1181 case DBGFREGVALTYPE_U128:
1182 pReg->Val.au64[0] = pu->au64[0];
1183 pReg->Val.au64[1] = pu->au64[1];
1184 break;
1185 case DBGFREGVALTYPE_R80:
1186 pReg->Val.au64[0] = pu->au64[0];
1187 pReg->Val.au16[5] = pu->au16[5];
1188 break;
1189 default:
1190 AssertMsgFailedReturn(("%s %d\n", pDesc->pszName, pDesc->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1191 }
1192 }
1193 else
1194 {
1195 int rc = pDesc->pfnGet(pVCpu, pDesc, pCtx, &pReg->Val.u);
1196 if (RT_FAILURE(rc))
1197 return rc;
1198 }
1199 }
1200 }
1201 return VINF_SUCCESS;
1202#else
1203 return VERR_NOT_IMPLEMENTED;
1204#endif
1205}
1206
1207
1208/**
1209 * Query a batch of registers.
1210 *
1211 * @retval VINF_SUCCESS
1212 * @retval VERR_INVALID_VM_HANDLE
1213 * @retval VERR_INVALID_CPU_ID
1214 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1215 *
1216 * @param pUVM The user mode VM handle.
1217 * @param idCpu The target CPU ID. Can be OR'ed with
1218 * DBGFREG_HYPER_VMCPUID.
1219 * @param paRegs Pointer to an array of @a cRegs elements. On
1220 * input the enmReg members indicates which
1221 * registers to query. On successful return the
1222 * other members are set. DBGFREG_END can be used
1223 * as a filler.
1224 * @param cRegs The number of entries in @a paRegs.
1225 */
1226VMMR3DECL(int) DBGFR3RegCpuQueryBatch(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1227{
1228 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1229 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1230 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1231 if (!cRegs)
1232 return VINF_SUCCESS;
1233 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1234 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1235 size_t iReg = cRegs;
1236 while (iReg-- > 0)
1237 {
1238 DBGFREG enmReg = paRegs[iReg].enmReg;
1239 AssertMsgReturn(enmReg < DBGFREG_END && enmReg >= DBGFREG_AL, ("%d (%#x)", enmReg, enmReg), VERR_DBGF_REGISTER_NOT_FOUND);
1240 }
1241
1242 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1243}
1244
1245
1246/**
1247 * Query all registers for a Virtual CPU.
1248 *
1249 * @retval VINF_SUCCESS
1250 * @retval VERR_INVALID_VM_HANDLE
1251 * @retval VERR_INVALID_CPU_ID
1252 *
1253 * @param pUVM The user mode VM handle.
1254 * @param idCpu The target CPU ID. Can be OR'ed with
1255 * DBGFREG_HYPER_VMCPUID.
1256 * @param paRegs Pointer to an array of @a cRegs elements.
1257 * These will be filled with the CPU register
1258 * values. Overflowing entries will be set to
1259 * DBGFREG_END. The returned registers can be
1260 * accessed by using the DBGFREG values as index.
1261 * @param cRegs The number of entries in @a paRegs. The
1262 * recommended value is DBGFREG_ALL_COUNT.
1263 */
1264VMMR3DECL(int) DBGFR3RegCpuQueryAll(PUVM pUVM, VMCPUID idCpu, PDBGFREGENTRY paRegs, size_t cRegs)
1265{
1266 /*
1267 * Validate input.
1268 */
1269 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1270 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1271 AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
1272 if (!cRegs)
1273 return VINF_SUCCESS;
1274 AssertReturn(cRegs < _1M, VERR_OUT_OF_RANGE);
1275 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
1276
1277 /*
1278 * Convert it into a batch query (lazy bird).
1279 */
1280 unsigned iReg = 0;
1281 while (iReg < cRegs && iReg < DBGFREG_ALL_COUNT)
1282 {
1283 paRegs[iReg].enmReg = (DBGFREG)iReg;
1284 iReg++;
1285 }
1286 while (iReg < cRegs)
1287 paRegs[iReg++].enmReg = DBGFREG_END;
1288
1289 return VMR3ReqCallWaitU(pUVM, idCpu, (PFNRT)dbgfR3RegCpuQueryBatchWorker, 4, pUVM, idCpu, paRegs, cRegs);
1290}
1291
1292#endif /* rewrite or remove? */
1293
1294/**
1295 * Gets the name of a register.
1296 *
1297 * @returns Pointer to read-only register name (lower case). NULL if the
1298 * parameters are invalid.
1299 *
1300 * @param pUVM The user mode VM handle.
1301 * @param enmReg The register identifier.
1302 * @param enmType The register type. This is for sort out
1303 * aliases. Pass DBGFREGVALTYPE_INVALID to get
1304 * the standard name.
1305 */
1306VMMR3DECL(const char *) DBGFR3RegCpuName(PUVM pUVM, DBGFREG enmReg, DBGFREGVALTYPE enmType)
1307{
1308 AssertReturn(enmReg >= DBGFREG_AL && enmReg < DBGFREG_END, NULL);
1309 AssertReturn(enmType >= DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, NULL);
1310 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1311 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1312
1313 PCDBGFREGSET pSet = pUVM->aCpus[0].dbgf.s.pGuestRegSet;
1314 if (RT_UNLIKELY(!pSet))
1315 return NULL;
1316
1317 PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
1318 PCDBGFREGALIAS pAlias = pDesc->paAliases;
1319 if ( pAlias
1320 && pDesc->enmType != enmType
1321 && enmType != DBGFREGVALTYPE_INVALID)
1322 {
1323 while (pAlias->pszName)
1324 {
1325 if (pAlias->enmType == enmType)
1326 return pAlias->pszName;
1327 pAlias++;
1328 }
1329 }
1330
1331 return pDesc->pszName;
1332}
1333
1334
1335/**
1336 * Fold the string to lower case and copy it into the destination buffer.
1337 *
1338 * @returns Number of folder characters, -1 on overflow.
1339 * @param pszSrc The source string.
1340 * @param cchSrc How much to fold and copy.
1341 * @param pszDst The output buffer.
1342 * @param cbDst The size of the output buffer.
1343 */
1344static ssize_t dbgfR3RegCopyToLower(const char *pszSrc, size_t cchSrc, char *pszDst, size_t cbDst)
1345{
1346 ssize_t cchFolded = 0;
1347 char ch;
1348 while (cchSrc-- > 0 && (ch = *pszSrc++))
1349 {
1350 if (RT_UNLIKELY(cbDst <= 1))
1351 return -1;
1352 cbDst--;
1353
1354 char chLower = RT_C_TO_LOWER(ch);
1355 cchFolded += chLower != ch;
1356 *pszDst++ = chLower;
1357 }
1358 if (RT_UNLIKELY(!cbDst))
1359 return -1;
1360 *pszDst = '\0';
1361 return cchFolded;
1362}
1363
1364
1365/**
1366 * Resolves the register name.
1367 *
1368 * @returns Lookup record.
1369 * @param pUVM The user mode VM handle.
1370 * @param idDefCpu The default CPU ID set.
1371 * @param pszReg The register name.
1372 * @param fGuestRegs Default to guest CPU registers if set, the
1373 * hypervisor CPU registers if clear.
1374 */
1375static PCDBGFREGLOOKUP dbgfR3RegResolve(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, bool fGuestRegs)
1376{
1377 DBGF_REG_DB_LOCK_READ(pUVM);
1378
1379 /* Try looking up the name without any case folding or cpu prefixing. */
1380 PRTSTRSPACE pRegSpace = &pUVM->dbgf.s.RegSpace;
1381 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, pszReg);
1382 if (!pLookupRec)
1383 {
1384 char szName[DBGF_REG_MAX_NAME * 4 + 16];
1385
1386 /* Lower case it and try again. */
1387 ssize_t cchFolded = dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
1388 if (cchFolded > 0)
1389 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1390 if ( !pLookupRec
1391 && cchFolded >= 0
1392 && idDefCpu != VMCPUID_ANY)
1393 {
1394 /* Prefix it with the specified CPU set. */
1395 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), fGuestRegs ? "cpu%u." : "hypercpu%u.", idDefCpu);
1396 dbgfR3RegCopyToLower(pszReg, RTSTR_MAX, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
1397 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
1398 }
1399 }
1400
1401 DBGF_REG_DB_UNLOCK_READ(pUVM);
1402 return pLookupRec;
1403}
1404
1405
1406/**
1407 * Validates the register name.
1408 *
1409 * @returns VBox status code.
1410 * @retval VINF_SUCCESS if the register was found.
1411 * @retval VERR_DBGF_REGISTER_NOT_FOUND if not found.
1412 *
1413 * @param pUVM The user mode VM handle.
1414 * @param idDefCpu The default CPU.
1415 * @param pszReg The registe name.
1416 */
1417VMMR3DECL(int) DBGFR3RegNmValidate(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg)
1418{
1419 /*
1420 * Validate input.
1421 */
1422 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1423 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1424 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1425 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1426
1427 /*
1428 * Resolve the register.
1429 */
1430 bool fGuestRegs = true;
1431 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1432 {
1433 fGuestRegs = false;
1434 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1435 }
1436
1437 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1438 if (!pLookupRec)
1439 return VERR_DBGF_REGISTER_NOT_FOUND;
1440 return VINF_SUCCESS;
1441}
1442
1443
1444/**
1445 * On CPU worker for the register queries, used by dbgfR3RegNmQueryWorker and
1446 * dbgfR3RegPrintfCbFormatNormal.
1447 *
1448 * @returns VBox status code.
1449 *
1450 * @param pUVM The user mode VM handle.
1451 * @param pLookupRec The register lookup record.
1452 * @param enmType The desired return type.
1453 * @param pValue Where to return the register value.
1454 * @param penmType Where to store the register value type.
1455 * Optional.
1456 */
1457static DECLCALLBACK(int) dbgfR3RegNmQueryWorkerOnCpu(PUVM pUVM, PCDBGFREGLOOKUP pLookupRec, DBGFREGVALTYPE enmType,
1458 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1459{
1460 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
1461 PCDBGFREGSET pSet = pLookupRec->pSet;
1462 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
1463 DBGFREGVALTYPE enmValueType = pDesc->enmType;
1464 int rc;
1465
1466 NOREF(pUVM);
1467
1468 /*
1469 * Get the register or sub-field value.
1470 */
1471 dbgfR3RegValClear(pValue);
1472 if (!pSubField)
1473 {
1474 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1475 if ( pLookupRec->pAlias
1476 && pLookupRec->pAlias->enmType != enmValueType
1477 && RT_SUCCESS(rc))
1478 {
1479 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1480 enmValueType = pLookupRec->pAlias->enmType;
1481 }
1482 }
1483 else
1484 {
1485 if (pSubField->pfnGet)
1486 {
1487 rc = pSubField->pfnGet(pSet->uUserArg.pv, pSubField, &pValue->u128);
1488 enmValueType = DBGFREGVALTYPE_U128;
1489 }
1490 else
1491 {
1492 rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, pValue);
1493 if ( pLookupRec->pAlias
1494 && pLookupRec->pAlias->enmType != enmValueType
1495 && RT_SUCCESS(rc))
1496 {
1497 rc = dbgfR3RegValCast(pValue, enmValueType, pLookupRec->pAlias->enmType);
1498 enmValueType = pLookupRec->pAlias->enmType;
1499 }
1500 if (RT_SUCCESS(rc))
1501 {
1502 rc = dbgfR3RegValCast(pValue, enmValueType, DBGFREGVALTYPE_U128);
1503 if (RT_SUCCESS(rc))
1504 {
1505 RTUInt128AssignShiftLeft(&pValue->u128, -pSubField->iFirstBit);
1506 RTUInt128AssignAndNFirstBits(&pValue->u128, pSubField->cBits);
1507 if (pSubField->cShift)
1508 RTUInt128AssignShiftLeft(&pValue->u128, pSubField->cShift);
1509 }
1510 }
1511 }
1512 if (RT_SUCCESS(rc))
1513 {
1514 unsigned const cBits = pSubField->cBits + pSubField->cShift;
1515 if (cBits <= 8)
1516 enmValueType = DBGFREGVALTYPE_U8;
1517 else if (cBits <= 16)
1518 enmValueType = DBGFREGVALTYPE_U16;
1519 else if (cBits <= 32)
1520 enmValueType = DBGFREGVALTYPE_U32;
1521 else if (cBits <= 64)
1522 enmValueType = DBGFREGVALTYPE_U64;
1523 else
1524 enmValueType = DBGFREGVALTYPE_U128;
1525 rc = dbgfR3RegValCast(pValue, DBGFREGVALTYPE_U128, enmValueType);
1526 }
1527 }
1528 if (RT_SUCCESS(rc))
1529 {
1530 /*
1531 * Do the cast if the desired return type doesn't match what
1532 * the getter returned.
1533 */
1534 if ( enmValueType == enmType
1535 || enmType == DBGFREGVALTYPE_END)
1536 {
1537 rc = VINF_SUCCESS;
1538 if (penmType)
1539 *penmType = enmValueType;
1540 }
1541 else
1542 {
1543 rc = dbgfR3RegValCast(pValue, enmValueType, enmType);
1544 if (penmType)
1545 *penmType = RT_SUCCESS(rc) ? enmType : enmValueType;
1546 }
1547 }
1548
1549 return rc;
1550}
1551
1552
1553/**
1554 * Worker for the register queries.
1555 *
1556 * @returns VBox status code.
1557 * @retval VINF_SUCCESS
1558 * @retval VERR_INVALID_VM_HANDLE
1559 * @retval VERR_INVALID_CPU_ID
1560 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1561 * @retval VERR_DBGF_UNSUPPORTED_CAST
1562 * @retval VINF_DBGF_TRUNCATED_REGISTER
1563 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1564 *
1565 * @param pUVM The user mode VM handle.
1566 * @param idDefCpu The virtual CPU ID for the default CPU register
1567 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
1568 * @param pszReg The register to query.
1569 * @param enmType The desired return type.
1570 * @param pValue Where to return the register value.
1571 * @param penmType Where to store the register value type.
1572 * Optional.
1573 */
1574static int dbgfR3RegNmQueryWorker(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, DBGFREGVALTYPE enmType,
1575 PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1576{
1577 /*
1578 * Validate input.
1579 */
1580 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1581 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1582 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
1583 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
1584
1585 Assert(enmType > DBGFREGVALTYPE_INVALID && enmType <= DBGFREGVALTYPE_END);
1586 AssertPtr(pValue);
1587
1588 /*
1589 * Resolve the register and call the getter on the relevant CPU.
1590 */
1591 bool fGuestRegs = true;
1592 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
1593 {
1594 fGuestRegs = false;
1595 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1596 }
1597 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
1598 if (pLookupRec)
1599 {
1600 if (pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU)
1601 idDefCpu = pLookupRec->pSet->uUserArg.pVCpu->idCpu;
1602 else if (idDefCpu != VMCPUID_ANY)
1603 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
1604 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryWorkerOnCpu, 5,
1605 pUVM, pLookupRec, enmType, pValue, penmType);
1606 }
1607 return VERR_DBGF_REGISTER_NOT_FOUND;
1608}
1609
1610
1611/**
1612 * Queries a descriptor table register value.
1613 *
1614 * @retval VINF_SUCCESS
1615 * @retval VERR_INVALID_VM_HANDLE
1616 * @retval VERR_INVALID_CPU_ID
1617 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1618 *
1619 * @param pUVM The user mode VM handle.
1620 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1621 * applicable. Can be OR'ed with
1622 * DBGFREG_HYPER_VMCPUID.
1623 * @param pszReg The register that's being queried. Except for
1624 * CPU registers, this must be on the form
1625 * "set.reg[.sub]".
1626 * @param pValue Where to store the register value.
1627 * @param penmType Where to store the register value type.
1628 */
1629VMMR3DECL(int) DBGFR3RegNmQuery(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PDBGFREGVAL pValue, PDBGFREGVALTYPE penmType)
1630{
1631 return dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_END, pValue, penmType);
1632}
1633
1634
1635/**
1636 * Queries a 8-bit register value.
1637 *
1638 * @retval VINF_SUCCESS
1639 * @retval VERR_INVALID_VM_HANDLE
1640 * @retval VERR_INVALID_CPU_ID
1641 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1642 * @retval VERR_DBGF_UNSUPPORTED_CAST
1643 * @retval VINF_DBGF_TRUNCATED_REGISTER
1644 *
1645 * @param pUVM The user mode VM handle.
1646 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1647 * applicable. Can be OR'ed with
1648 * DBGFREG_HYPER_VMCPUID.
1649 * @param pszReg The register that's being queried. Except for
1650 * CPU registers, this must be on the form
1651 * "set.reg[.sub]".
1652 * @param pu8 Where to store the register value.
1653 */
1654VMMR3DECL(int) DBGFR3RegNmQueryU8(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint8_t *pu8)
1655{
1656 DBGFREGVAL Value;
1657 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U8, &Value, NULL);
1658 if (RT_SUCCESS(rc))
1659 *pu8 = Value.u8;
1660 else
1661 *pu8 = 0;
1662 return rc;
1663}
1664
1665
1666/**
1667 * Queries a 16-bit register value.
1668 *
1669 * @retval VINF_SUCCESS
1670 * @retval VERR_INVALID_VM_HANDLE
1671 * @retval VERR_INVALID_CPU_ID
1672 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1673 * @retval VERR_DBGF_UNSUPPORTED_CAST
1674 * @retval VINF_DBGF_TRUNCATED_REGISTER
1675 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1676 *
1677 * @param pUVM The user mode VM handle.
1678 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1679 * applicable. Can be OR'ed with
1680 * DBGFREG_HYPER_VMCPUID.
1681 * @param pszReg The register that's being queried. Except for
1682 * CPU registers, this must be on the form
1683 * "set.reg[.sub]".
1684 * @param pu16 Where to store the register value.
1685 */
1686VMMR3DECL(int) DBGFR3RegNmQueryU16(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint16_t *pu16)
1687{
1688 DBGFREGVAL Value;
1689 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U16, &Value, NULL);
1690 if (RT_SUCCESS(rc))
1691 *pu16 = Value.u16;
1692 else
1693 *pu16 = 0;
1694 return rc;
1695}
1696
1697
1698/**
1699 * Queries a 32-bit register value.
1700 *
1701 * @retval VINF_SUCCESS
1702 * @retval VERR_INVALID_VM_HANDLE
1703 * @retval VERR_INVALID_CPU_ID
1704 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1705 * @retval VERR_DBGF_UNSUPPORTED_CAST
1706 * @retval VINF_DBGF_TRUNCATED_REGISTER
1707 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1708 *
1709 * @param pUVM The user mode VM handle.
1710 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1711 * applicable. Can be OR'ed with
1712 * DBGFREG_HYPER_VMCPUID.
1713 * @param pszReg The register that's being queried. Except for
1714 * CPU registers, this must be on the form
1715 * "set.reg[.sub]".
1716 * @param pu32 Where to store the register value.
1717 */
1718VMMR3DECL(int) DBGFR3RegNmQueryU32(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint32_t *pu32)
1719{
1720 DBGFREGVAL Value;
1721 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U32, &Value, NULL);
1722 if (RT_SUCCESS(rc))
1723 *pu32 = Value.u32;
1724 else
1725 *pu32 = 0;
1726 return rc;
1727}
1728
1729
1730/**
1731 * Queries a 64-bit register value.
1732 *
1733 * @retval VINF_SUCCESS
1734 * @retval VERR_INVALID_VM_HANDLE
1735 * @retval VERR_INVALID_CPU_ID
1736 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1737 * @retval VERR_DBGF_UNSUPPORTED_CAST
1738 * @retval VINF_DBGF_TRUNCATED_REGISTER
1739 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1740 *
1741 * @param pUVM The user mode VM handle.
1742 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1743 * applicable. Can be OR'ed with
1744 * DBGFREG_HYPER_VMCPUID.
1745 * @param pszReg The register that's being queried. Except for
1746 * CPU registers, this must be on the form
1747 * "set.reg[.sub]".
1748 * @param pu64 Where to store the register value.
1749 */
1750VMMR3DECL(int) DBGFR3RegNmQueryU64(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64)
1751{
1752 DBGFREGVAL Value;
1753 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U64, &Value, NULL);
1754 if (RT_SUCCESS(rc))
1755 *pu64 = Value.u64;
1756 else
1757 *pu64 = 0;
1758 return rc;
1759}
1760
1761
1762/**
1763 * Queries a 128-bit register value.
1764 *
1765 * @retval VINF_SUCCESS
1766 * @retval VERR_INVALID_VM_HANDLE
1767 * @retval VERR_INVALID_CPU_ID
1768 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1769 * @retval VERR_DBGF_UNSUPPORTED_CAST
1770 * @retval VINF_DBGF_TRUNCATED_REGISTER
1771 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1772 *
1773 * @param pUVM The user mode VM handle.
1774 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1775 * applicable. Can be OR'ed with
1776 * DBGFREG_HYPER_VMCPUID.
1777 * @param pszReg The register that's being queried. Except for
1778 * CPU registers, this must be on the form
1779 * "set.reg[.sub]".
1780 * @param pu128 Where to store the register value.
1781 */
1782VMMR3DECL(int) DBGFR3RegNmQueryU128(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PRTUINT128U pu128)
1783{
1784 DBGFREGVAL Value;
1785 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_U128, &Value, NULL);
1786 if (RT_SUCCESS(rc))
1787 *pu128 = Value.u128;
1788 else
1789 pu128->s.Hi = pu128->s.Lo = 0;
1790 return rc;
1791}
1792
1793
1794#if 0
1795/**
1796 * Queries a long double register value.
1797 *
1798 * @retval VINF_SUCCESS
1799 * @retval VERR_INVALID_VM_HANDLE
1800 * @retval VERR_INVALID_CPU_ID
1801 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1802 * @retval VERR_DBGF_UNSUPPORTED_CAST
1803 * @retval VINF_DBGF_TRUNCATED_REGISTER
1804 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1805 *
1806 * @param pUVM The user mode VM handle.
1807 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1808 * applicable. Can be OR'ed with
1809 * DBGFREG_HYPER_VMCPUID.
1810 * @param pszReg The register that's being queried. Except for
1811 * CPU registers, this must be on the form
1812 * "set.reg[.sub]".
1813 * @param plrd Where to store the register value.
1814 */
1815VMMR3DECL(int) DBGFR3RegNmQueryLrd(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, long double *plrd)
1816{
1817 DBGFREGVAL Value;
1818 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_R80, &Value, NULL);
1819 if (RT_SUCCESS(rc))
1820 *plrd = Value.lrd;
1821 else
1822 *plrd = 0;
1823 return rc;
1824}
1825#endif
1826
1827
1828/**
1829 * Queries a descriptor table register value.
1830 *
1831 * @retval VINF_SUCCESS
1832 * @retval VERR_INVALID_VM_HANDLE
1833 * @retval VERR_INVALID_CPU_ID
1834 * @retval VERR_DBGF_REGISTER_NOT_FOUND
1835 * @retval VERR_DBGF_UNSUPPORTED_CAST
1836 * @retval VINF_DBGF_TRUNCATED_REGISTER
1837 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
1838 *
1839 * @param pUVM The user mode VM handle.
1840 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
1841 * applicable. Can be OR'ed with
1842 * DBGFREG_HYPER_VMCPUID.
1843 * @param pszReg The register that's being queried. Except for
1844 * CPU registers, this must be on the form
1845 * "set.reg[.sub]".
1846 * @param pu64Base Where to store the register base value.
1847 * @param pu16Limit Where to store the register limit value.
1848 */
1849VMMR3DECL(int) DBGFR3RegNmQueryXdtr(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint64_t *pu64Base, uint16_t *pu16Limit)
1850{
1851 DBGFREGVAL Value;
1852 int rc = dbgfR3RegNmQueryWorker(pUVM, idDefCpu, pszReg, DBGFREGVALTYPE_DTR, &Value, NULL);
1853 if (RT_SUCCESS(rc))
1854 {
1855 *pu64Base = Value.dtr.u64Base;
1856 *pu16Limit = Value.dtr.u32Limit;
1857 }
1858 else
1859 {
1860 *pu64Base = 0;
1861 *pu16Limit = 0;
1862 }
1863 return rc;
1864}
1865
1866
1867/**
1868 * Gets the number of bits in value of type @a enmValType.
1869 */
1870static unsigned dbgfR3RegGetBitsForValType(DBGFREGVALTYPE enmValType)
1871{
1872 switch (enmValType)
1873 {
1874 case DBGFREGVALTYPE_U8: return 8;
1875 case DBGFREGVALTYPE_U16: return 16;
1876 case DBGFREGVALTYPE_U32: return 32;
1877 case DBGFREGVALTYPE_U64: return 64;
1878 case DBGFREGVALTYPE_U128: return 128;
1879 case DBGFREGVALTYPE_U256: return 256;
1880 case DBGFREGVALTYPE_U512: return 512;
1881 case DBGFREGVALTYPE_R80: return 80;
1882 case DBGFREGVALTYPE_DTR: return 80;
1883 /* no default, want gcc warnings */
1884 case DBGFREGVALTYPE_32BIT_HACK:
1885 case DBGFREGVALTYPE_END:
1886 case DBGFREGVALTYPE_INVALID:
1887 break;
1888 }
1889 return 512;
1890}
1891
1892
1893/**
1894 * On CPU worker for the extended register queries, used by DBGFR3RegNmQueryEx.
1895 *
1896 * @returns VBox status code.
1897 *
1898 * @param pUVM The user mode VM handle.
1899 * @param pLookupRec The register lookup record.
1900 * @param fFlags DBGFR3REG_QUERY_EX_F_XXX
1901 * @param paRegs Where to return the register values.
1902 * @param cRegs The number of register values to return.
1903 * The caller has checked that this is sufficient
1904 * to store the entire result.
1905 */
1906static DECLCALLBACK(int) dbgfR3RegNmQueryExWorkerOnCpu(PUVM pUVM, PCDBGFREGLOOKUP pLookupRec, uint32_t fFlags,
1907 PDBGFREGENTRYNM paRegs, size_t cRegs)
1908{
1909 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
1910 PCDBGFREGSET pSet = pLookupRec->pSet;
1911 Assert(!pLookupRec->pSubField);
1912 NOREF(pUVM);
1913
1914 /*
1915 * The register first.
1916 */
1917 AssertReturn(cRegs > 0, VERR_BUFFER_OVERFLOW);
1918 dbgfR3RegValClear(&paRegs[0].Val);
1919 paRegs[0].pszName = pLookupRec->Core.pszString;
1920 paRegs[0].enmType = pDesc->enmType;
1921 paRegs[0].u.uInfo = 0;
1922 paRegs[0].u.s.fMain = true;
1923 int rc = pDesc->pfnGet(pSet->uUserArg.pv, pDesc, &paRegs[0].Val);
1924 AssertRCReturn(rc, rc);
1925 DBGFREGVAL const MainValue = paRegs[0].Val;
1926 uint32_t iReg = 1;
1927
1928 /* If it's a alias we looked up we may have to do some casting and
1929 restricting the number of bits included in the sub-fields. */
1930 unsigned cMaxBits = sizeof(paRegs[0].Val) * 8;
1931 if (pLookupRec->pAlias)
1932 {
1933 paRegs[0].enmType = pLookupRec->pAlias->enmType;
1934 paRegs[0].u.uInfo = 0;
1935 paRegs[0].u.s.fAlias = true;
1936 if (paRegs[0].enmType != pDesc->enmType)
1937 {
1938 dbgfR3RegValCast(&paRegs[0].Val, pDesc->enmType, paRegs[0].enmType);
1939 cMaxBits = dbgfR3RegGetBitsForValType(paRegs[0].enmType);
1940 }
1941
1942 /* Add the main value as the 2nd entry. */
1943 paRegs[iReg].pszName = pDesc->pszName;
1944 paRegs[iReg].enmType = pDesc->enmType;
1945 paRegs[iReg].Val = MainValue;
1946 paRegs[iReg].u.uInfo = 0;
1947 paRegs[iReg].u.s.fMain = true;
1948 iReg++;
1949 }
1950
1951 /*
1952 * (Other) Aliases.
1953 */
1954 if ( (fFlags & DBGFR3REG_QUERY_EX_F_ALIASES)
1955 && pDesc->paAliases)
1956 {
1957 PCDBGFREGALIAS const paAliases = pDesc->paAliases;
1958 for (uint32_t i = 0; paAliases[i].pszName != NULL; i++)
1959 if (&paAliases[i] != pLookupRec->pAlias )
1960 {
1961 AssertReturn(iReg < cRegs, VERR_BUFFER_OVERFLOW);
1962 paRegs[iReg].pszName = paAliases[i].pszName;
1963 paRegs[iReg].enmType = paAliases[i].enmType;
1964 paRegs[iReg].u.uInfo = 0;
1965 paRegs[iReg].u.s.fAlias = true;
1966 paRegs[iReg].Val = MainValue;
1967 dbgfR3RegValCast(&paRegs[iReg].Val, pDesc->enmType, paAliases[i].enmType);
1968 iReg++;
1969 }
1970 }
1971
1972 /*
1973 * Subfields.
1974 */
1975 if ( (fFlags & DBGFR3REG_QUERY_EX_F_SUBFIELDS)
1976 && pDesc->paSubFields)
1977 {
1978 PCDBGFREGSUBFIELD const paSubFields = pDesc->paSubFields;
1979 for (uint32_t i = 0; paSubFields[i].pszName != NULL; i++)
1980 if (paSubFields[i].iFirstBit < cMaxBits || paSubFields[i].pfnGet)
1981 {
1982 AssertReturn(iReg < cRegs, VERR_BUFFER_OVERFLOW);
1983 int rc2;
1984 paRegs[iReg].pszName = paSubFields[i].pszName;
1985 paRegs[iReg].u.uInfo = 0;
1986 paRegs[iReg].u.s.fSubField = true;
1987 paRegs[iReg].u.s.cBits = paSubFields[i].cBits + paSubFields[i].cShift;
1988 if (paSubFields[i].pfnGet)
1989 {
1990 dbgfR3RegValClear(&paRegs[iReg].Val);
1991 rc2 = paSubFields[i].pfnGet(pSet->uUserArg.pv, &paSubFields[i], &paRegs[iReg].Val.u128);
1992 }
1993 else
1994 {
1995 paRegs[iReg].Val = MainValue;
1996 rc2 = dbgfR3RegValCast(&paRegs[iReg].Val, pDesc->enmType, DBGFREGVALTYPE_U128);
1997 if (RT_SUCCESS(rc2))
1998 {
1999 RTUInt128AssignShiftLeft(&paRegs[iReg].Val.u128, -paSubFields[i].iFirstBit);
2000 RTUInt128AssignAndNFirstBits(&paRegs[iReg].Val.u128, paSubFields[i].cBits);
2001 if (paSubFields[i].cShift)
2002 RTUInt128AssignShiftLeft(&paRegs[iReg].Val.u128, paSubFields[i].cShift);
2003 }
2004 }
2005 if (RT_SUCCESS(rc2))
2006 {
2007 unsigned const cBits = paSubFields[i].cBits + paSubFields[i].cShift;
2008 if (cBits <= 8)
2009 paRegs[iReg].enmType = DBGFREGVALTYPE_U8;
2010 else if (cBits <= 16)
2011 paRegs[iReg].enmType = DBGFREGVALTYPE_U16;
2012 else if (cBits <= 32)
2013 paRegs[iReg].enmType = DBGFREGVALTYPE_U32;
2014 else if (cBits <= 64)
2015 paRegs[iReg].enmType = DBGFREGVALTYPE_U64;
2016 else
2017 paRegs[iReg].enmType = DBGFREGVALTYPE_U128;
2018 rc2 = dbgfR3RegValCast(&paRegs[iReg].Val, DBGFREGVALTYPE_U128, paRegs[iReg].enmType);
2019 }
2020 if (RT_SUCCESS(rc2))
2021 iReg++;
2022 else
2023 rc = rc2;
2024 }
2025 }
2026 return rc;
2027}
2028
2029
2030/**
2031 * Queries a register with aliases and/or sub-fields.
2032 *
2033 * @retval VINF_SUCCESS
2034 * @retval VERR_INVALID_VM_HANDLE
2035 * @retval VERR_INVALID_CPU_ID
2036 * @retval VERR_BUFFER_OVERFLOW w/ *pcRegs set to the required size.
2037 * No other data returned.
2038 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2039 * @retval VERR_DBGF_UNSUPPORTED_CAST
2040 * @retval VINF_DBGF_TRUNCATED_REGISTER
2041 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2042 *
2043 * @param pUVM The user mode VM handle.
2044 * @param idDefCpu The default target CPU ID, VMCPUID_ANY if not
2045 * applicable. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2046 * @param pszReg The register that's being queried. Except for CPU
2047 * registers, this must be on the form "set.reg[.sub]".
2048 * @param fFlags DBGFR3REG_QUERY_EX_F_XXX
2049 * @param paRegs
2050 * @param pcRegs On input this is the size of the paRegs buffer.
2051 * On successful return this is set to the number of
2052 * registers returned. This is set to the required number
2053 * of register entries when VERR_BUFFER_OVERFLOW is
2054 * returned.
2055 */
2056VMMR3DECL(int) DBGFR3RegNmQueryEx(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, uint32_t fFlags,
2057 PDBGFREGENTRYNM paRegs, size_t *pcRegs)
2058{
2059 /*
2060 * Validate input.
2061 */
2062 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2063 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2064 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2065 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
2066 AssertReturn(!(fFlags & ~DBGFR3REG_QUERY_EX_F_VALID_MASK), VERR_INVALID_FLAGS);
2067 AssertPtrReturn(pcRegs, VERR_INVALID_POINTER);
2068 AssertPtrNullReturn(paRegs, VERR_INVALID_POINTER);
2069
2070 /*
2071 * Resolve the register and call the getter on the relevant CPU.
2072 */
2073 bool fGuestRegs = true;
2074 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
2075 {
2076 fGuestRegs = false;
2077 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2078 }
2079 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
2080 if (pLookupRec)
2081 {
2082 /*
2083 * Determine how many register values we'd be returning.
2084 */
2085 size_t cRegs = 1; /* we always return the direct hit. */
2086
2087 if ( (fFlags & DBGFR3REG_QUERY_EX_F_ALIASES)
2088 && !pLookupRec->pSubField
2089 && pLookupRec->pDesc->paAliases)
2090 {
2091 PCDBGFREGALIAS const paAliases = pLookupRec->pDesc->paAliases;
2092 for (uint32_t i = 0; paAliases[i].pszName != NULL; i++)
2093 cRegs++;
2094 }
2095 else if (pLookupRec->pAlias)
2096 cRegs++;
2097
2098 if ( (fFlags & DBGFR3REG_QUERY_EX_F_SUBFIELDS)
2099 && !pLookupRec->pSubField
2100 && pLookupRec->pDesc->paSubFields)
2101 {
2102 unsigned const cMaxBits = !pLookupRec->pAlias ? sizeof(paRegs[0].Val) * 8
2103 : dbgfR3RegGetBitsForValType(pLookupRec->pAlias->enmType);
2104 PCDBGFREGSUBFIELD const paSubFields = pLookupRec->pDesc->paSubFields;
2105 for (uint32_t i = 0; paSubFields[i].pszName != NULL; i++)
2106 if (paSubFields[i].iFirstBit < cMaxBits || paSubFields[i].pfnGet)
2107 cRegs++;
2108 }
2109
2110 /*
2111 * Did the caller provide sufficient room for the register values, then
2112 * retrieve the register on the specified CPU.
2113 */
2114 if (paRegs && *pcRegs >= cRegs)
2115 {
2116 *pcRegs = cRegs;
2117
2118 if (pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU)
2119 idDefCpu = pLookupRec->pSet->uUserArg.pVCpu->idCpu;
2120 else if (idDefCpu != VMCPUID_ANY)
2121 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2122
2123 /* If we hit a sub-field we'll just use the regular worker to get it. */
2124 if (!pLookupRec->pSubField)
2125 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryExWorkerOnCpu, 5,
2126 pUVM, pLookupRec, fFlags, paRegs, cRegs);
2127 Assert(cRegs == 1);
2128 paRegs[0].pszName = pLookupRec->Core.pszString;
2129 paRegs[0].enmType = DBGFREGVALTYPE_END;
2130 paRegs[0].u.uInfo = 0;
2131 paRegs[0].u.s.cBits = pLookupRec->pSubField->cBits + pLookupRec->pSubField->cShift;
2132 paRegs[0].u.s.fSubField = true;
2133 dbgfR3RegValClear(&paRegs[0].Val);
2134 return VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmQueryWorkerOnCpu, 5,
2135 pUVM, pLookupRec, DBGFREGVALTYPE_END, &paRegs[0].Val, &paRegs[0].enmType);
2136 }
2137 *pcRegs = cRegs;
2138 return VERR_BUFFER_OVERFLOW;
2139 }
2140 return VERR_DBGF_REGISTER_NOT_FOUND;
2141
2142}
2143
2144
2145/// @todo VMMR3DECL(int) DBGFR3RegNmQueryBatch(PUVM pUVM,VMCPUID idDefCpu, DBGFREGENTRYNM paRegs, size_t cRegs);
2146
2147
2148/**
2149 * Gets the number of registers returned by DBGFR3RegNmQueryAll.
2150 *
2151 * @returns VBox status code.
2152 * @param pUVM The user mode VM handle.
2153 * @param pcRegs Where to return the register count.
2154 */
2155VMMR3DECL(int) DBGFR3RegNmQueryAllCount(PUVM pUVM, size_t *pcRegs)
2156{
2157 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2158 *pcRegs = pUVM->dbgf.s.cRegs;
2159 return VINF_SUCCESS;
2160}
2161
2162
2163/**
2164 * Pad register entries.
2165 *
2166 * @param paRegs The output array.
2167 * @param cRegs The size of the output array.
2168 * @param iReg The first register to pad.
2169 * @param cRegsToPad The number of registers to pad.
2170 */
2171static void dbgfR3RegNmQueryAllPadEntries(PDBGFREGENTRYNM paRegs, size_t cRegs, size_t iReg, size_t cRegsToPad)
2172{
2173 if (iReg < cRegs)
2174 {
2175 size_t iEndReg = iReg + cRegsToPad;
2176 if (iEndReg > cRegs)
2177 iEndReg = cRegs;
2178 while (iReg < iEndReg)
2179 {
2180 paRegs[iReg].pszName = NULL;
2181 paRegs[iReg].enmType = DBGFREGVALTYPE_END;
2182 paRegs[iReg].u.uInfo = 0;
2183 dbgfR3RegValClear(&paRegs[iReg].Val);
2184 iReg++;
2185 }
2186 }
2187}
2188
2189
2190/**
2191 * Query all registers in a set.
2192 *
2193 * @param pSet The set.
2194 * @param cRegsToQuery The number of registers to query.
2195 * @param paRegs The output array.
2196 * @param cRegs The size of the output array.
2197 */
2198static void dbgfR3RegNmQueryAllInSet(PCDBGFREGSET pSet, size_t cRegsToQuery, PDBGFREGENTRYNM paRegs, size_t cRegs)
2199{
2200 if (cRegsToQuery > pSet->cDescs)
2201 cRegsToQuery = pSet->cDescs;
2202 if (cRegsToQuery > cRegs)
2203 cRegsToQuery = cRegs;
2204
2205 for (size_t iReg = 0; iReg < cRegsToQuery; iReg++)
2206 {
2207 paRegs[iReg].enmType = pSet->paDescs[iReg].enmType;
2208 paRegs[iReg].pszName = pSet->paLookupRecs[iReg].Core.pszString;
2209 paRegs[iReg].u.uInfo = 0;
2210 paRegs[iReg].u.s.fMain = true;
2211 dbgfR3RegValClear(&paRegs[iReg].Val);
2212 int rc2 = pSet->paDescs[iReg].pfnGet(pSet->uUserArg.pv, &pSet->paDescs[iReg], &paRegs[iReg].Val);
2213 AssertRCSuccess(rc2);
2214 if (RT_FAILURE(rc2))
2215 dbgfR3RegValClear(&paRegs[iReg].Val);
2216 }
2217}
2218
2219
2220/**
2221 * @callback_method_impl{FNRTSTRSPACECALLBACK, Worker used by
2222 * dbgfR3RegNmQueryAllWorker}
2223 */
2224static DECLCALLBACK(int) dbgfR3RegNmQueryAllEnum(PRTSTRSPACECORE pStr, void *pvUser)
2225{
2226 PCDBGFREGSET pSet = (PCDBGFREGSET)pStr;
2227 if (pSet->enmType != DBGFREGSETTYPE_CPU)
2228 {
2229 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
2230 if (pArgs->iReg < pArgs->cRegs)
2231 dbgfR3RegNmQueryAllInSet(pSet, pSet->cDescs, &pArgs->paRegs[pArgs->iReg], pArgs->cRegs - pArgs->iReg);
2232 pArgs->iReg += pSet->cDescs;
2233 }
2234
2235 return 0;
2236}
2237
2238
2239/**
2240 * @callback_method_impl{FNVMMEMTRENDEZVOUS, Worker used by DBGFR3RegNmQueryAll}
2241 */
2242static DECLCALLBACK(VBOXSTRICTRC) dbgfR3RegNmQueryAllWorker(PVM pVM, PVMCPU pVCpu, void *pvUser)
2243{
2244 PDBGFR3REGNMQUERYALLARGS pArgs = (PDBGFR3REGNMQUERYALLARGS)pvUser;
2245 PDBGFREGENTRYNM paRegs = pArgs->paRegs;
2246 size_t const cRegs = pArgs->cRegs;
2247 PUVM pUVM = pVM->pUVM;
2248 PUVMCPU pUVCpu = pVCpu->pUVCpu;
2249
2250 DBGF_REG_DB_LOCK_READ(pUVM);
2251
2252 /*
2253 * My guest CPU registers.
2254 */
2255 size_t iCpuReg = pVCpu->idCpu * pUVM->dbgf.s.cPerCpuRegs;
2256 if (pUVCpu->dbgf.s.pGuestRegSet)
2257 {
2258 if (iCpuReg < cRegs)
2259 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pGuestRegSet, pUVM->dbgf.s.cPerCpuRegs, &paRegs[iCpuReg], cRegs - iCpuReg);
2260 }
2261 else
2262 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, pUVM->dbgf.s.cPerCpuRegs);
2263
2264 /*
2265 * My hypervisor CPU registers.
2266 */
2267 iCpuReg = pUVM->cCpus * pUVM->dbgf.s.cPerCpuRegs + pUVCpu->idCpu * pUVM->dbgf.s.cPerCpuHyperRegs;
2268 if (pUVCpu->dbgf.s.pHyperRegSet)
2269 {
2270 if (iCpuReg < cRegs)
2271 dbgfR3RegNmQueryAllInSet(pUVCpu->dbgf.s.pHyperRegSet, pUVM->dbgf.s.cPerCpuHyperRegs, &paRegs[iCpuReg], cRegs - iCpuReg);
2272 }
2273 else
2274 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, iCpuReg, pUVM->dbgf.s.cPerCpuHyperRegs);
2275
2276 /*
2277 * The primary CPU does all the other registers.
2278 */
2279 if (pUVCpu->idCpu == 0)
2280 {
2281 pArgs->iReg = pUVM->cCpus * (pUVM->dbgf.s.cPerCpuRegs + pUVM->dbgf.s.cPerCpuHyperRegs);
2282 RTStrSpaceEnumerate(&pUVM->dbgf.s.RegSetSpace, dbgfR3RegNmQueryAllEnum, pArgs);
2283 dbgfR3RegNmQueryAllPadEntries(paRegs, cRegs, pArgs->iReg, cRegs);
2284 }
2285
2286 DBGF_REG_DB_UNLOCK_READ(pUVM);
2287 return VINF_SUCCESS; /* Ignore errors. */
2288}
2289
2290
2291/**
2292 * Queries all register.
2293 *
2294 * @returns VBox status code.
2295 * @param pUVM The user mode VM handle.
2296 * @param paRegs The output register value array. The register
2297 * name string is read only and shall not be freed
2298 * or modified.
2299 * @param cRegs The number of entries in @a paRegs. The
2300 * correct size can be obtained by calling
2301 * DBGFR3RegNmQueryAllCount.
2302 */
2303VMMR3DECL(int) DBGFR3RegNmQueryAll(PUVM pUVM, PDBGFREGENTRYNM paRegs, size_t cRegs)
2304{
2305 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2306 PVM pVM = pUVM->pVM;
2307 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
2308 AssertPtrReturn(paRegs, VERR_INVALID_POINTER);
2309 AssertReturn(cRegs > 0, VERR_OUT_OF_RANGE);
2310
2311 DBGFR3REGNMQUERYALLARGS Args;
2312 Args.paRegs = paRegs;
2313 Args.cRegs = cRegs;
2314
2315 return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3RegNmQueryAllWorker, &Args);
2316}
2317
2318
2319/**
2320 * On CPU worker for the register modifications, used by DBGFR3RegNmSet.
2321 *
2322 * @returns VBox status code.
2323 *
2324 * @param pUVM The user mode VM handle.
2325 * @param pLookupRec The register lookup record. Maybe be modified,
2326 * so please pass a copy of the user's one.
2327 * @param pValue The new register value.
2328 * @param pMask Indicate which bits to modify.
2329 */
2330static DECLCALLBACK(int) dbgfR3RegNmSetWorkerOnCpu(PUVM pUVM, PDBGFREGLOOKUP pLookupRec,
2331 PCDBGFREGVAL pValue, PCDBGFREGVAL pMask)
2332{
2333 RT_NOREF_PV(pUVM);
2334 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2335 if (pSubField && pSubField->pfnSet)
2336 return pSubField->pfnSet(pLookupRec->pSet->uUserArg.pv, pSubField, pValue->u128, pMask->u128);
2337 return pLookupRec->pDesc->pfnSet(pLookupRec->pSet->uUserArg.pv, pLookupRec->pDesc, pValue, pMask);
2338}
2339
2340
2341/**
2342 * Worker for the register setting.
2343 *
2344 * @returns VBox status code.
2345 * @retval VINF_SUCCESS
2346 * @retval VERR_INVALID_VM_HANDLE
2347 * @retval VERR_INVALID_CPU_ID
2348 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2349 * @retval VERR_DBGF_UNSUPPORTED_CAST
2350 * @retval VINF_DBGF_TRUNCATED_REGISTER
2351 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2352 *
2353 * @param pUVM The user mode VM handle.
2354 * @param idDefCpu The virtual CPU ID for the default CPU register
2355 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2356 * @param pszReg The register to query.
2357 * @param pValue The value to set
2358 * @param enmType How to interpret the value in @a pValue.
2359 */
2360VMMR3DECL(int) DBGFR3RegNmSet(PUVM pUVM, VMCPUID idDefCpu, const char *pszReg, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType)
2361{
2362 /*
2363 * Validate input.
2364 */
2365 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2366 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2367 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2368 AssertPtrReturn(pszReg, VERR_INVALID_POINTER);
2369 AssertReturn(enmType > DBGFREGVALTYPE_INVALID && enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER);
2370 AssertPtrReturn(pValue, VERR_INVALID_PARAMETER);
2371
2372 /*
2373 * Resolve the register and check that it is writable.
2374 */
2375 bool fGuestRegs = true;
2376 if ((idDefCpu & DBGFREG_HYPER_VMCPUID) && idDefCpu != VMCPUID_ANY)
2377 {
2378 fGuestRegs = false;
2379 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2380 }
2381 PCDBGFREGLOOKUP pLookupRec = dbgfR3RegResolve(pUVM, idDefCpu, pszReg, fGuestRegs);
2382 if (pLookupRec)
2383 {
2384 PCDBGFREGDESC pDesc = pLookupRec->pDesc;
2385 PCDBGFREGSET pSet = pLookupRec->pSet;
2386 PCDBGFREGSUBFIELD pSubField = pLookupRec->pSubField;
2387
2388 if ( !(pDesc->fFlags & DBGFREG_FLAGS_READ_ONLY)
2389 && (pSubField
2390 ? !(pSubField->fFlags & DBGFREGSUBFIELD_FLAGS_READ_ONLY)
2391 && (pSubField->pfnSet != NULL || pDesc->pfnSet != NULL)
2392 : pDesc->pfnSet != NULL) )
2393 {
2394 /*
2395 * Calculate the modification mask and cast the input value to the
2396 * type of the target register.
2397 */
2398 DBGFREGVAL Mask = DBGFREGVAL_INITIALIZE_ZERO;
2399 DBGFREGVAL Value = DBGFREGVAL_INITIALIZE_ZERO;
2400 switch (enmType)
2401 {
2402 case DBGFREGVALTYPE_U8:
2403 Value.u8 = pValue->u8;
2404 Mask.u8 = UINT8_MAX;
2405 break;
2406 case DBGFREGVALTYPE_U16:
2407 Value.u16 = pValue->u16;
2408 Mask.u16 = UINT16_MAX;
2409 break;
2410 case DBGFREGVALTYPE_U32:
2411 Value.u32 = pValue->u32;
2412 Mask.u32 = UINT32_MAX;
2413 break;
2414 case DBGFREGVALTYPE_U64:
2415 Value.u64 = pValue->u64;
2416 Mask.u64 = UINT64_MAX;
2417 break;
2418 case DBGFREGVALTYPE_U128:
2419 Value.u128 = pValue->u128;
2420 Mask.u128.s.Lo = UINT64_MAX;
2421 Mask.u128.s.Hi = UINT64_MAX;
2422 break;
2423 case DBGFREGVALTYPE_U256:
2424 Value.u256 = pValue->u256;
2425 Mask.u256.QWords.qw0 = UINT64_MAX;
2426 Mask.u256.QWords.qw1 = UINT64_MAX;
2427 Mask.u256.QWords.qw2 = UINT64_MAX;
2428 Mask.u256.QWords.qw3 = UINT64_MAX;
2429 break;
2430 case DBGFREGVALTYPE_U512:
2431 Value.u512 = pValue->u512;
2432 Mask.u512.QWords.qw0 = UINT64_MAX;
2433 Mask.u512.QWords.qw1 = UINT64_MAX;
2434 Mask.u512.QWords.qw2 = UINT64_MAX;
2435 Mask.u512.QWords.qw3 = UINT64_MAX;
2436 Mask.u512.QWords.qw4 = UINT64_MAX;
2437 Mask.u512.QWords.qw5 = UINT64_MAX;
2438 Mask.u512.QWords.qw6 = UINT64_MAX;
2439 Mask.u512.QWords.qw7 = UINT64_MAX;
2440 break;
2441 case DBGFREGVALTYPE_R80:
2442#ifdef RT_COMPILER_WITH_80BIT_LONG_DOUBLE
2443 Value.r80Ex.lrd = pValue->r80Ex.lrd;
2444#else
2445 Value.r80Ex.au64[0] = pValue->r80Ex.au64[0];
2446 Value.r80Ex.au16[4] = pValue->r80Ex.au16[4];
2447#endif
2448 Value.r80Ex.au64[0] = UINT64_MAX;
2449 Value.r80Ex.au16[4] = UINT16_MAX;
2450 break;
2451 case DBGFREGVALTYPE_DTR:
2452 Value.dtr.u32Limit = pValue->dtr.u32Limit;
2453 Value.dtr.u64Base = pValue->dtr.u64Base;
2454 Mask.dtr.u32Limit = UINT32_MAX;
2455 Mask.dtr.u64Base = UINT64_MAX;
2456 break;
2457 case DBGFREGVALTYPE_32BIT_HACK:
2458 case DBGFREGVALTYPE_END:
2459 case DBGFREGVALTYPE_INVALID:
2460 AssertFailedReturn(VERR_INTERNAL_ERROR_3);
2461 }
2462
2463 int rc = VINF_SUCCESS;
2464 DBGFREGVALTYPE enmRegType = pDesc->enmType;
2465 if (pSubField)
2466 {
2467 unsigned const cBits = pSubField->cBits + pSubField->cShift;
2468 if (cBits <= 8)
2469 enmRegType = DBGFREGVALTYPE_U8;
2470 else if (cBits <= 16)
2471 enmRegType = DBGFREGVALTYPE_U16;
2472 else if (cBits <= 32)
2473 enmRegType = DBGFREGVALTYPE_U32;
2474 else if (cBits <= 64)
2475 enmRegType = DBGFREGVALTYPE_U64;
2476 else if (cBits <= 128)
2477 enmRegType = DBGFREGVALTYPE_U128;
2478 else if (cBits <= 256)
2479 enmRegType = DBGFREGVALTYPE_U256;
2480 else
2481 enmRegType = DBGFREGVALTYPE_U512;
2482 }
2483 else if (pLookupRec->pAlias)
2484 {
2485 /* Restrict the input to the size of the alias register. */
2486 DBGFREGVALTYPE enmAliasType = pLookupRec->pAlias->enmType;
2487 if (enmAliasType != enmType)
2488 {
2489 rc = dbgfR3RegValCast(&Value, enmType, enmAliasType);
2490 if (RT_FAILURE(rc))
2491 return rc;
2492 dbgfR3RegValCast(&Mask, enmType, enmAliasType);
2493 enmType = enmAliasType;
2494 }
2495 }
2496
2497 if (enmType != enmRegType)
2498 {
2499 int rc2 = dbgfR3RegValCast(&Value, enmType, enmRegType);
2500 if (RT_FAILURE(rc2))
2501 return rc2;
2502 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
2503 rc2 = VINF_SUCCESS;
2504 dbgfR3RegValCast(&Mask, enmType, enmRegType);
2505 }
2506
2507 /*
2508 * Subfields needs some extra processing if there is no subfield
2509 * setter, since we'll be feeding it to the normal register setter
2510 * instead. The mask and value must be shifted and truncated to the
2511 * subfield position.
2512 */
2513 if (pSubField && !pSubField->pfnSet)
2514 {
2515 /* The shift factor is for displaying a subfield value
2516 2**cShift times larger than the stored value. We have
2517 to undo this before adjusting value and mask. */
2518 if (pSubField->cShift)
2519 {
2520 /* Warn about trunction of the lower bits that get
2521 shifted out below. */
2522 if (rc == VINF_SUCCESS)
2523 {
2524 DBGFREGVAL Value2 = Value;
2525 RTUInt128AssignAndNFirstBits(&Value2.u128, -pSubField->cShift);
2526 if (!RTUInt128BitAreAllClear(&Value2.u128))
2527 rc = VINF_DBGF_TRUNCATED_REGISTER;
2528 }
2529 RTUInt128AssignShiftRight(&Value.u128, pSubField->cShift);
2530 }
2531
2532 RTUInt128AssignAndNFirstBits(&Value.u128, pSubField->cBits);
2533 if (rc == VINF_SUCCESS && RTUInt128IsNotEqual(&Value.u128, &Value.u128))
2534 rc = VINF_DBGF_TRUNCATED_REGISTER;
2535 RTUInt128AssignAndNFirstBits(&Mask.u128, pSubField->cBits);
2536
2537 RTUInt128AssignShiftLeft(&Value.u128, pSubField->iFirstBit);
2538 RTUInt128AssignShiftLeft(&Mask.u128, pSubField->iFirstBit);
2539 }
2540
2541 /*
2542 * Do the actual work on an EMT.
2543 */
2544 if (pSet->enmType == DBGFREGSETTYPE_CPU)
2545 idDefCpu = pSet->uUserArg.pVCpu->idCpu;
2546 else if (idDefCpu != VMCPUID_ANY)
2547 idDefCpu &= ~DBGFREG_HYPER_VMCPUID;
2548
2549 int rc2 = VMR3ReqPriorityCallWaitU(pUVM, idDefCpu, (PFNRT)dbgfR3RegNmSetWorkerOnCpu, 4,
2550 pUVM, pLookupRec, &Value, &Mask);
2551
2552 if (rc == VINF_SUCCESS || RT_FAILURE(rc2))
2553 rc = rc2;
2554 return rc;
2555 }
2556 return VERR_DBGF_READ_ONLY_REGISTER;
2557 }
2558 return VERR_DBGF_REGISTER_NOT_FOUND;
2559}
2560
2561
2562/**
2563 * Set a given set of registers.
2564 *
2565 * @returns VBox status code.
2566 * @retval VINF_SUCCESS
2567 * @retval VERR_INVALID_VM_HANDLE
2568 * @retval VERR_INVALID_CPU_ID
2569 * @retval VERR_DBGF_REGISTER_NOT_FOUND
2570 * @retval VERR_DBGF_UNSUPPORTED_CAST
2571 * @retval VINF_DBGF_TRUNCATED_REGISTER
2572 * @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
2573 *
2574 * @param pUVM The user mode VM handle.
2575 * @param idDefCpu The virtual CPU ID for the default CPU register
2576 * set. Can be OR'ed with DBGFREG_HYPER_VMCPUID.
2577 * @param paRegs The array of registers to set.
2578 * @param cRegs Number of registers in the array.
2579 *
2580 * @todo This is a _very_ lazy implementation by a lazy developer, some semantics
2581 * need to be figured out before the real implementation especially how and
2582 * when errors and informational status codes like VINF_DBGF_TRUNCATED_REGISTER
2583 * should be returned (think of an error right in the middle of the batch, should we
2584 * save the state and roll back?).
2585 */
2586VMMR3DECL(int) DBGFR3RegNmSetBatch(PUVM pUVM, VMCPUID idDefCpu, PCDBGFREGENTRYNM paRegs, size_t cRegs)
2587{
2588 /*
2589 * Validate input.
2590 */
2591 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
2592 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
2593 AssertReturn((idDefCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idDefCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
2594 AssertPtrReturn(paRegs, VERR_INVALID_PARAMETER);
2595 AssertReturn(cRegs > 0, VERR_INVALID_PARAMETER);
2596
2597 for (uint32_t i = 0; i < cRegs; i++)
2598 {
2599 int rc = DBGFR3RegNmSet(pUVM, idDefCpu, paRegs[i].pszName, &paRegs[i].Val, paRegs[i].enmType);
2600 if (RT_FAILURE(rc))
2601 return rc;
2602 }
2603
2604 return VINF_SUCCESS;
2605}
2606
2607
2608/**
2609 * Internal worker for DBGFR3RegFormatValue, cbBuf is sufficent.
2610 *
2611 * @copydoc DBGFR3RegFormatValueEx
2612 */
2613DECLINLINE(ssize_t) dbgfR3RegFormatValueInt(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2614 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2615{
2616 switch (enmType)
2617 {
2618 case DBGFREGVALTYPE_U8:
2619 return RTStrFormatU8(pszBuf, cbBuf, pValue->u8, uBase, cchWidth, cchPrecision, fFlags);
2620 case DBGFREGVALTYPE_U16:
2621 return RTStrFormatU16(pszBuf, cbBuf, pValue->u16, uBase, cchWidth, cchPrecision, fFlags);
2622 case DBGFREGVALTYPE_U32:
2623 return RTStrFormatU32(pszBuf, cbBuf, pValue->u32, uBase, cchWidth, cchPrecision, fFlags);
2624 case DBGFREGVALTYPE_U64:
2625 return RTStrFormatU64(pszBuf, cbBuf, pValue->u64, uBase, cchWidth, cchPrecision, fFlags);
2626 case DBGFREGVALTYPE_U128:
2627 return RTStrFormatU128(pszBuf, cbBuf, &pValue->u128, uBase, cchWidth, cchPrecision, fFlags);
2628 case DBGFREGVALTYPE_U256:
2629 return RTStrFormatU256(pszBuf, cbBuf, &pValue->u256, uBase, cchWidth, cchPrecision, fFlags);
2630 case DBGFREGVALTYPE_U512:
2631 return RTStrFormatU512(pszBuf, cbBuf, &pValue->u512, uBase, cchWidth, cchPrecision, fFlags);
2632 case DBGFREGVALTYPE_R80:
2633 return RTStrFormatR80u2(pszBuf, cbBuf, &pValue->r80Ex, cchWidth, cchPrecision, fFlags);
2634 case DBGFREGVALTYPE_DTR:
2635 {
2636 ssize_t cch = RTStrFormatU64(pszBuf, cbBuf, pValue->dtr.u64Base,
2637 16, 2+16, 0, RTSTR_F_SPECIAL | RTSTR_F_ZEROPAD);
2638 AssertReturn(cch > 0, VERR_DBGF_REG_IPE_1);
2639 pszBuf[cch++] = ':';
2640 cch += RTStrFormatU64(&pszBuf[cch], cbBuf - cch, pValue->dtr.u32Limit,
2641 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_32BIT);
2642 return cch;
2643 }
2644
2645 case DBGFREGVALTYPE_32BIT_HACK:
2646 case DBGFREGVALTYPE_END:
2647 case DBGFREGVALTYPE_INVALID:
2648 break;
2649 /* no default, want gcc warnings */
2650 }
2651
2652 RTStrPrintf(pszBuf, cbBuf, "!enmType=%d!", enmType);
2653 return VERR_DBGF_REG_IPE_2;
2654}
2655
2656
2657/**
2658 * Format a register value, extended version.
2659 *
2660 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2661 * @param pszBuf The output buffer.
2662 * @param cbBuf The size of the output buffer.
2663 * @param pValue The value to format.
2664 * @param enmType The value type.
2665 * @param uBase The base (ignored if not applicable).
2666 * @param cchWidth The width if RTSTR_F_WIDTH is set, otherwise
2667 * ignored.
2668 * @param cchPrecision The width if RTSTR_F_PRECISION is set, otherwise
2669 * ignored.
2670 * @param fFlags String formatting flags, RTSTR_F_XXX.
2671 */
2672VMMR3DECL(ssize_t) DBGFR3RegFormatValueEx(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType,
2673 unsigned uBase, signed int cchWidth, signed int cchPrecision, uint32_t fFlags)
2674{
2675 /*
2676 * Format to temporary buffer using worker shared with dbgfR3RegPrintfCbFormatNormal.
2677 */
2678 char szTmp[160];
2679 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), pValue, enmType, uBase, cchWidth, cchPrecision, fFlags);
2680 if (cchOutput > 0)
2681 {
2682 if ((size_t)cchOutput < cbBuf)
2683 memcpy(pszBuf, szTmp, cchOutput + 1);
2684 else
2685 {
2686 if (cbBuf)
2687 {
2688 memcpy(pszBuf, szTmp, cbBuf - 1); /* (parfait is wrong about out of bound read here) */
2689 pszBuf[cbBuf - 1] = '\0';
2690 }
2691 cchOutput = VERR_BUFFER_OVERFLOW;
2692 }
2693 }
2694 return cchOutput;
2695}
2696
2697
2698/**
2699 * Format a register value as hexadecimal and with default width according to
2700 * the type.
2701 *
2702 * @returns The number of bytes returned, VERR_BUFFER_OVERFLOW on failure.
2703 * @param pszBuf The output buffer.
2704 * @param cbBuf The size of the output buffer.
2705 * @param pValue The value to format.
2706 * @param enmType The value type.
2707 * @param fSpecial Same as RTSTR_F_SPECIAL.
2708 */
2709VMMR3DECL(ssize_t) DBGFR3RegFormatValue(char *pszBuf, size_t cbBuf, PCDBGFREGVAL pValue, DBGFREGVALTYPE enmType, bool fSpecial)
2710{
2711 int cchWidth = 0;
2712 switch (enmType)
2713 {
2714 case DBGFREGVALTYPE_U8: cchWidth = 2 + fSpecial*2; break;
2715 case DBGFREGVALTYPE_U16: cchWidth = 4 + fSpecial*2; break;
2716 case DBGFREGVALTYPE_U32: cchWidth = 8 + fSpecial*2; break;
2717 case DBGFREGVALTYPE_U64: cchWidth = 16 + fSpecial*2; break;
2718 case DBGFREGVALTYPE_U128: cchWidth = 32 + fSpecial*2; break;
2719 case DBGFREGVALTYPE_U256: cchWidth = 64 + fSpecial*2; break;
2720 case DBGFREGVALTYPE_U512: cchWidth = 128 + fSpecial*2; break;
2721 case DBGFREGVALTYPE_R80: cchWidth = 0; break;
2722 case DBGFREGVALTYPE_DTR: cchWidth = 16+1+4 + fSpecial*2; break;
2723
2724 case DBGFREGVALTYPE_32BIT_HACK:
2725 case DBGFREGVALTYPE_END:
2726 case DBGFREGVALTYPE_INVALID:
2727 break;
2728 /* no default, want gcc warnings */
2729 }
2730 uint32_t fFlags = RTSTR_F_ZEROPAD;
2731 if (fSpecial)
2732 fFlags |= RTSTR_F_SPECIAL;
2733 if (cchWidth != 0)
2734 fFlags |= RTSTR_F_WIDTH;
2735 return DBGFR3RegFormatValueEx(pszBuf, cbBuf, pValue, enmType, 16, cchWidth, 0, fFlags);
2736}
2737
2738
2739/**
2740 * Format a register using special hacks as well as sub-field specifications
2741 * (the latter isn't implemented yet).
2742 */
2743static size_t
2744dbgfR3RegPrintfCbFormatField(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2745 PCDBGFREGLOOKUP pLookupRec, int cchWidth, int cchPrecision, unsigned fFlags)
2746{
2747 char szTmp[160];
2748
2749 NOREF(cchWidth); NOREF(cchPrecision); NOREF(fFlags);
2750
2751 /*
2752 * Retrieve the register value.
2753 */
2754 DBGFREGVAL Value;
2755 DBGFREGVALTYPE enmType;
2756 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2757 if (RT_FAILURE(rc))
2758 {
2759 ssize_t cchDefine = RTErrQueryDefine(rc, szTmp, sizeof(szTmp), true /*fFailIfUnknown*/);
2760 if (cchDefine <= 0)
2761 cchDefine = RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc);
2762 return pfnOutput(pvArgOutput, szTmp, cchDefine);
2763 }
2764
2765 char *psz = szTmp;
2766
2767 /*
2768 * Special case: Format eflags.
2769 */
2770 if ( pLookupRec->pSet->enmType == DBGFREGSETTYPE_CPU
2771 && pLookupRec->pDesc->enmReg == DBGFREG_RFLAGS
2772 && pLookupRec->pSubField == NULL)
2773 {
2774 rc = dbgfR3RegValCast(&Value, enmType, DBGFREGVALTYPE_U32);
2775 AssertRC(rc);
2776 uint32_t const efl = Value.u32;
2777
2778 /* the iopl */
2779 psz += RTStrPrintf(psz, sizeof(szTmp) / 2, "iopl=%u ", X86_EFL_GET_IOPL(efl));
2780
2781 /* add flags */
2782 static const struct
2783 {
2784 const char *pszSet;
2785 const char *pszClear;
2786 uint32_t fFlag;
2787 } aFlags[] =
2788 {
2789 { "vip",NULL, X86_EFL_VIP },
2790 { "vif",NULL, X86_EFL_VIF },
2791 { "ac", NULL, X86_EFL_AC },
2792 { "vm", NULL, X86_EFL_VM },
2793 { "rf", NULL, X86_EFL_RF },
2794 { "nt", NULL, X86_EFL_NT },
2795 { "ov", "nv", X86_EFL_OF },
2796 { "dn", "up", X86_EFL_DF },
2797 { "ei", "di", X86_EFL_IF },
2798 { "tf", NULL, X86_EFL_TF },
2799 { "ng", "pl", X86_EFL_SF },
2800 { "zr", "nz", X86_EFL_ZF },
2801 { "ac", "na", X86_EFL_AF },
2802 { "po", "pe", X86_EFL_PF },
2803 { "cy", "nc", X86_EFL_CF },
2804 };
2805 for (unsigned i = 0; i < RT_ELEMENTS(aFlags); i++)
2806 {
2807 const char *pszAdd = aFlags[i].fFlag & efl ? aFlags[i].pszSet : aFlags[i].pszClear;
2808 if (pszAdd)
2809 {
2810 *psz++ = *pszAdd++;
2811 *psz++ = *pszAdd++;
2812 if (*pszAdd)
2813 *psz++ = *pszAdd++;
2814 *psz++ = ' ';
2815 }
2816 }
2817
2818 /* drop trailing space */
2819 psz--;
2820 }
2821 else
2822 {
2823 /*
2824 * General case.
2825 */
2826 AssertMsgFailed(("Not implemented: %s\n", pLookupRec->Core.pszString));
2827 return pfnOutput(pvArgOutput, pLookupRec->Core.pszString, pLookupRec->Core.cchString);
2828 }
2829
2830 /* Output the string. */
2831 return pfnOutput(pvArgOutput, szTmp, psz - &szTmp[0]);
2832}
2833
2834
2835/**
2836 * Formats a register having parsed up to the register name.
2837 */
2838static size_t
2839dbgfR3RegPrintfCbFormatNormal(PDBGFR3REGPRINTFARGS pThis, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2840 PCDBGFREGLOOKUP pLookupRec, unsigned uBase, int cchWidth, int cchPrecision, unsigned fFlags)
2841{
2842 char szTmp[160];
2843
2844 /*
2845 * Get the register value.
2846 */
2847 DBGFREGVAL Value;
2848 DBGFREGVALTYPE enmType;
2849 int rc = dbgfR3RegNmQueryWorkerOnCpu(pThis->pUVM, pLookupRec, DBGFREGVALTYPE_END, &Value, &enmType);
2850 if (RT_FAILURE(rc))
2851 {
2852 ssize_t cchDefine = RTErrQueryDefine(rc, szTmp, sizeof(szTmp), true /*fFailIfUnknown*/);
2853 if (cchDefine <= 0)
2854 cchDefine = RTStrPrintf(szTmp, sizeof(szTmp), "rc=%d", rc);
2855 return pfnOutput(pvArgOutput, szTmp, cchDefine);
2856 }
2857
2858 /*
2859 * Format the value.
2860 */
2861 ssize_t cchOutput = dbgfR3RegFormatValueInt(szTmp, sizeof(szTmp), &Value, enmType, uBase, cchWidth, cchPrecision, fFlags);
2862 if (RT_UNLIKELY(cchOutput <= 0))
2863 {
2864 AssertFailed();
2865 return pfnOutput(pvArgOutput, "internal-error", sizeof("internal-error") - 1);
2866 }
2867 return pfnOutput(pvArgOutput, szTmp, cchOutput);
2868}
2869
2870
2871/**
2872 * @callback_method_impl{FNSTRFORMAT}
2873 */
2874static DECLCALLBACK(size_t)
2875dbgfR3RegPrintfCbFormat(void *pvArg, PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
2876 const char **ppszFormat, va_list *pArgs, int cchWidth,
2877 int cchPrecision, unsigned fFlags, char chArgSize)
2878{
2879 NOREF(pArgs); NOREF(chArgSize);
2880
2881 /*
2882 * Parse the format type and hand the job to the appropriate worker.
2883 */
2884 PDBGFR3REGPRINTFARGS pThis = (PDBGFR3REGPRINTFARGS)pvArg;
2885 const char *pszFormat = *ppszFormat;
2886 if ( pszFormat[0] != 'V'
2887 || pszFormat[1] != 'R')
2888 {
2889 AssertMsgFailed(("'%s'\n", pszFormat));
2890 return 0;
2891 }
2892 unsigned offCurly = 2;
2893 if (pszFormat[offCurly] != '{')
2894 {
2895 AssertMsgReturn(pszFormat[offCurly], ("'%s'\n", pszFormat), 0);
2896 offCurly++;
2897 AssertMsgReturn(pszFormat[offCurly] == '{', ("'%s'\n", pszFormat), 0);
2898 }
2899 const char *pachReg = &pszFormat[offCurly + 1];
2900
2901 /*
2902 * The end and length of the register.
2903 */
2904 const char *pszEnd = strchr(pachReg, '}');
2905 AssertMsgReturn(pszEnd, ("Missing closing curly bracket: '%s'\n", pszFormat), 0);
2906 size_t const cchReg = pszEnd - pachReg;
2907
2908 /*
2909 * Look up the register - same as dbgfR3RegResolve, except for locking and
2910 * input string termination.
2911 */
2912 PRTSTRSPACE pRegSpace = &pThis->pUVM->dbgf.s.RegSpace;
2913 /* Try looking up the name without any case folding or cpu prefixing. */
2914 PCDBGFREGLOOKUP pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGetN(pRegSpace, pachReg, cchReg);
2915 if (!pLookupRec)
2916 {
2917 /* Lower case it and try again. */
2918 char szName[DBGF_REG_MAX_NAME * 4 + 16];
2919 ssize_t cchFolded = dbgfR3RegCopyToLower(pachReg, cchReg, szName, sizeof(szName) - DBGF_REG_MAX_NAME);
2920 if (cchFolded > 0)
2921 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2922 if ( !pLookupRec
2923 && cchFolded >= 0
2924 && pThis->idCpu != VMCPUID_ANY)
2925 {
2926 /* Prefix it with the specified CPU set. */
2927 size_t cchCpuSet = RTStrPrintf(szName, sizeof(szName), pThis->fGuestRegs ? "cpu%u." : "hypercpu%u.", pThis->idCpu);
2928 dbgfR3RegCopyToLower(pachReg, cchReg, &szName[cchCpuSet], sizeof(szName) - cchCpuSet);
2929 pLookupRec = (PCDBGFREGLOOKUP)RTStrSpaceGet(pRegSpace, szName);
2930 }
2931 }
2932 AssertMsgReturn(pLookupRec, ("'%s'\n", pszFormat), 0);
2933 AssertMsgReturn( pLookupRec->pSet->enmType != DBGFREGSETTYPE_CPU
2934 || pLookupRec->pSet->uUserArg.pVCpu->idCpu == pThis->idCpu,
2935 ("'%s' idCpu=%u, pSet/cpu=%u\n", pszFormat, pThis->idCpu, pLookupRec->pSet->uUserArg.pVCpu->idCpu),
2936 0);
2937
2938 /*
2939 * Commit the parsed format string. Up to this point it is nice to know
2940 * what register lookup failed and such, so we've delayed comitting.
2941 */
2942 *ppszFormat = pszEnd + 1;
2943
2944 /*
2945 * Call the responsible worker.
2946 */
2947 switch (pszFormat[offCurly - 1])
2948 {
2949 case 'R': /* %VR{} */
2950 case 'X': /* %VRX{} */
2951 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2952 16, cchWidth, cchPrecision, fFlags);
2953 case 'U':
2954 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2955 10, cchWidth, cchPrecision, fFlags);
2956 case 'O':
2957 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2958 8, cchWidth, cchPrecision, fFlags);
2959 case 'B':
2960 return dbgfR3RegPrintfCbFormatNormal(pThis, pfnOutput, pvArgOutput, pLookupRec,
2961 2, cchWidth, cchPrecision, fFlags);
2962 case 'F':
2963 return dbgfR3RegPrintfCbFormatField(pThis, pfnOutput, pvArgOutput, pLookupRec, cchWidth, cchPrecision, fFlags);
2964 default:
2965 AssertFailed();
2966 return 0;
2967 }
2968}
2969
2970
2971
2972/**
2973 * @callback_method_impl{FNRTSTROUTPUT}
2974 */
2975static DECLCALLBACK(size_t)
2976dbgfR3RegPrintfCbOutput(void *pvArg, const char *pachChars, size_t cbChars)
2977{
2978 PDBGFR3REGPRINTFARGS pArgs = (PDBGFR3REGPRINTFARGS)pvArg;
2979 size_t cbToCopy = cbChars;
2980 if (cbToCopy >= pArgs->cchLeftBuf)
2981 {
2982 if (RT_SUCCESS(pArgs->rc))
2983 pArgs->rc = VERR_BUFFER_OVERFLOW;
2984 cbToCopy = pArgs->cchLeftBuf;
2985 }
2986 if (cbToCopy > 0)
2987 {
2988 memcpy(&pArgs->pszBuf[pArgs->offBuf], pachChars, cbToCopy);
2989 pArgs->offBuf += cbToCopy;
2990 pArgs->cchLeftBuf -= cbToCopy;
2991 pArgs->pszBuf[pArgs->offBuf] = '\0';
2992 }
2993 return cbToCopy;
2994}
2995
2996
2997/**
2998 * On CPU worker for the register formatting, used by DBGFR3RegPrintfV.
2999 *
3000 * @returns VBox status code.
3001 *
3002 * @param pArgs The argument package and state.
3003 */
3004static DECLCALLBACK(int) dbgfR3RegPrintfWorkerOnCpu(PDBGFR3REGPRINTFARGS pArgs)
3005{
3006 DBGF_REG_DB_LOCK_READ(pArgs->pUVM);
3007 RTStrFormatV(dbgfR3RegPrintfCbOutput, pArgs, dbgfR3RegPrintfCbFormat, pArgs, pArgs->pszFormat, pArgs->va);
3008 DBGF_REG_DB_UNLOCK_READ(pArgs->pUVM);
3009 return pArgs->rc;
3010}
3011
3012
3013/**
3014 * Format a registers.
3015 *
3016 * This is restricted to registers from one CPU, that specified by @a idCpu.
3017 *
3018 * @returns VBox status code.
3019 * @param pUVM The user mode VM handle.
3020 * @param idCpu The CPU ID of any CPU registers that may be
3021 * printed, pass VMCPUID_ANY if not applicable.
3022 * @param pszBuf The output buffer.
3023 * @param cbBuf The size of the output buffer.
3024 * @param pszFormat The format string. Register names are given by
3025 * %VR{name}, they take no arguments.
3026 * @param va Other format arguments.
3027 */
3028VMMR3DECL(int) DBGFR3RegPrintfV(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, va_list va)
3029{
3030 AssertPtrReturn(pszBuf, VERR_INVALID_POINTER);
3031 AssertReturn(cbBuf > 0, VERR_BUFFER_OVERFLOW);
3032 *pszBuf = '\0';
3033
3034 UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
3035 AssertReturn((idCpu & ~DBGFREG_HYPER_VMCPUID) < pUVM->cCpus || idCpu == VMCPUID_ANY, VERR_INVALID_CPU_ID);
3036 AssertPtrReturn(pszFormat, VERR_INVALID_POINTER);
3037
3038 /*
3039 * Set up an argument package and execute the formatting on the
3040 * specified CPU.
3041 */
3042 DBGFR3REGPRINTFARGS Args;
3043 Args.pUVM = pUVM;
3044 Args.idCpu = idCpu != VMCPUID_ANY ? idCpu & ~DBGFREG_HYPER_VMCPUID : idCpu;
3045 Args.fGuestRegs = idCpu != VMCPUID_ANY && !(idCpu & DBGFREG_HYPER_VMCPUID);
3046 Args.pszBuf = pszBuf;
3047 Args.pszFormat = pszFormat;
3048 va_copy(Args.va, va);
3049 Args.offBuf = 0;
3050 Args.cchLeftBuf = cbBuf - 1;
3051 Args.rc = VINF_SUCCESS;
3052 int rc = VMR3ReqPriorityCallWaitU(pUVM, Args.idCpu, (PFNRT)dbgfR3RegPrintfWorkerOnCpu, 1, &Args);
3053 va_end(Args.va);
3054 return rc;
3055}
3056
3057
3058/**
3059 * Format a registers.
3060 *
3061 * This is restricted to registers from one CPU, that specified by @a idCpu.
3062 *
3063 * @returns VBox status code.
3064 * @param pUVM The user mode VM handle.
3065 * @param idCpu The CPU ID of any CPU registers that may be
3066 * printed, pass VMCPUID_ANY if not applicable.
3067 * @param pszBuf The output buffer.
3068 * @param cbBuf The size of the output buffer.
3069 * @param pszFormat The format string. Register names are given by
3070 * %VR{name}, %VRU{name}, %VRO{name} and
3071 * %VRB{name}, which are hexadecimal, (unsigned)
3072 * decimal, octal and binary representation. None
3073 * of these types takes any arguments.
3074 * @param ... Other format arguments.
3075 */
3076VMMR3DECL(int) DBGFR3RegPrintf(PUVM pUVM, VMCPUID idCpu, char *pszBuf, size_t cbBuf, const char *pszFormat, ...)
3077{
3078 va_list va;
3079 va_start(va, pszFormat);
3080 int rc = DBGFR3RegPrintfV(pUVM, idCpu, pszBuf, cbBuf, pszFormat, va);
3081 va_end(va);
3082 return rc;
3083}
3084
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