VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/TRPMR0A.asm@ 4672

Last change on this file since 4672 was 4071, checked in by vboxsync, 17 years ago

Biggest check-in ever. New source code headers for all (C) innotek files.

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1; $Id: TRPMR0A.asm 4071 2007-08-07 17:07:59Z vboxsync $
2;; @file
3; TRPM - Host Context Ring-0
4;
5
6;
7; Copyright (C) 2006-2007 innotek GmbH
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License as published by the Free Software Foundation,
13; in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14; distribution. VirtualBox OSE is distributed in the hope that it will
15; be useful, but WITHOUT ANY WARRANTY of any kind.
16
17;*******************************************************************************
18;* Header Files *
19;*******************************************************************************
20%include "VBox/asmdefs.mac"
21%include "VBox/x86.mac"
22
23
24BEGINCODE
25 align 16
26
27;;
28; Calls the interrupt gate as if we received an interrupt while in Ring-0.
29;
30; @param uIP x86:[ebp+8] msc:rcx gcc:rdi The interrupt gate IP.
31; @param SelCS x86:[ebp+12] msc:dx gcc:si The interrupt gate CS.
32; @param RSP msc:r8 gcc:rdx The interrupt gate RSP. ~0 if no stack switch should take place. (only AMD64)
33;DECLASM(void) trpmR0DispatchHostInterrupt(RTR0UINTPTR uIP, RTSEL SelCS, RTR0UINTPTR RSP);
34BEGINPROC trpmR0DispatchHostInterrupt
35 push xBP
36 mov xBP, xSP
37
38%ifdef RT_ARCH_AMD64
39 mov r11, rsp ; save the RSP for the iret frame.
40 and rsp, 0fffffffffffffff0h ; align the stack. (do it unconditionally saves some jump mess)
41
42 ; switch stack?
43 %ifdef ASM_CALL64_MSC
44 cmp r8, 0ffffffffffffffffh
45 je .no_stack_switch
46 mov rsp, r8
47 %else
48 cmp rdx, 0ffffffffffffffffh
49 je .no_stack_switch
50 mov rsp, rdx
51 %endif
52.no_stack_switch:
53
54 ; create the iret frame
55 push 0 ; SS
56 push r11 ; RSP
57 pushfq ; RFLAGS
58 and dword [rsp], ~X86_EFL_IF
59 mov ax, cs
60 push rax ; CS
61 lea r10, [.return wrt rip] ; RIP
62 push r10
63
64 ; create the retf frame
65 %ifdef ASM_CALL64_MSC
66 movzx rdx, dx
67 cmp rdx, r11
68 je .dir_jump
69 push rdx
70 push rcx
71 %else
72 movzx rsi, si
73 cmp rsi, r11
74 je .dir_jump
75 push rsi
76 push rdi
77 %endif
78
79 ; dispatch it
80 db 048h
81 retf
82
83 ; dispatch it by a jmp (don't mess up the IST stack)
84.dir_jump:
85 %ifdef ASM_CALL64_MSC
86 jmp rcx
87 %else
88 jmp rdi
89 %endif
90
91%else ; 32-bit:
92 mov ecx, [ebp + 8] ; uIP
93 movzx edx, word [ebp + 12] ; SelCS
94
95 ; create the iret frame
96 pushfd ; EFLAGS
97 and dword [esp], ~X86_EFL_IF
98 push cs ; CS
99 push .return ; EIP
100
101 ; create the retf frame
102 push edx
103 push ecx
104
105 ; dispatch it!
106 retf
107%endif
108.return:
109 cli
110
111 leave
112 ret
113ENDPROC trpmR0DispatchHostInterrupt
114
115
116%ifndef VBOX_WITHOUT_IDT_PATCHING
117
118 align 16
119;;
120; This is the alternative return from VMMR0Entry() used when
121; we need to dispatch an interrupt to the Host (we received it in GC).
122;
123; As seen in TRPMR0SetupInterruptDispatcherFrame() the stack is different
124; than for the normal VMMR0Entry() return.
125;
126; 32-bit:
127; 18 iret frame
128; 14 retf selector (interrupt handler)
129; 10 retf offset (interrupt handler)
130; c es
131; 8 fs
132; 4 ds
133; 0 pVM (esp here)
134;
135; 64-bit:
136; 24 iret frame
137; 18 retf selector (interrupt handler)
138; 10 retf offset (interrupt handler)
139; 8 uOperation
140; 0 pVM (rsp here)
141;
142BEGINPROC trpmR0InterruptDispatcher
143%ifdef RT_ARCH_AMD64
144 lea rsp, [rsp + 10h] ; skip pVM and uOperation
145 swapgs
146 db 48h
147 retf
148%else ; !RT_ARCH_AMD64
149 add esp, byte 4 ; skip pVM
150 pop ds
151 pop fs
152 pop es
153 retf
154%endif ; !RT_ARCH_AMD64
155ENDPROC trpmR0InterruptDispatcher
156
157%endif ; !VBOX_WITHOUT_IDT_PATCHING
158
159
160;;
161; Issues a software interrupt to the specified interrupt vector.
162;
163; @param uActiveVector x86:[esp+4] msc:rcx gcc:rdi The vector number.
164;
165;DECLASM(void) trpmR0DispatchHostInterruptSimple(RTUINT uActiveVector);
166BEGINPROC trpmR0DispatchHostInterruptSimple
167%ifdef RT_ARCH_X86
168 mov eax, [esp + 4]
169 jmp dword [.jmp_table + eax * 4]
170%else
171 lea r9, [.jmp_table wrt rip]
172 %ifdef ASM_CALL64_MSC
173 jmp qword [r9 + rcx * 8]
174 %else
175 jmp qword [r9 + rdi * 8]
176 %endif
177%endif
178
179.jmp_table:
180%assign i 0
181%rep 256
182RTCCPTR_DEF .int_ %+ i
183%assign i i+1
184%endrep
185
186%assign i 0
187%rep 256
188 ALIGNCODE(4)
189.int_ %+ i:
190 int i
191 ret
192%assign i i+1
193%endrep
194
195ENDPROC trpmR0DispatchHostInterruptSimple
196
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