1 | ; $Id: TRPMR0A.asm 4071 2007-08-07 17:07:59Z vboxsync $
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2 | ;; @file
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3 | ; TRPM - Host Context Ring-0
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2007 innotek GmbH
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License as published by the Free Software Foundation,
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13 | ; in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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14 | ; distribution. VirtualBox OSE is distributed in the hope that it will
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15 | ; be useful, but WITHOUT ANY WARRANTY of any kind.
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16 |
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17 | ;*******************************************************************************
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18 | ;* Header Files *
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19 | ;*******************************************************************************
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20 | %include "VBox/asmdefs.mac"
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21 | %include "VBox/x86.mac"
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22 |
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23 |
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24 | BEGINCODE
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25 | align 16
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26 |
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27 | ;;
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28 | ; Calls the interrupt gate as if we received an interrupt while in Ring-0.
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29 | ;
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30 | ; @param uIP x86:[ebp+8] msc:rcx gcc:rdi The interrupt gate IP.
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31 | ; @param SelCS x86:[ebp+12] msc:dx gcc:si The interrupt gate CS.
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32 | ; @param RSP msc:r8 gcc:rdx The interrupt gate RSP. ~0 if no stack switch should take place. (only AMD64)
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33 | ;DECLASM(void) trpmR0DispatchHostInterrupt(RTR0UINTPTR uIP, RTSEL SelCS, RTR0UINTPTR RSP);
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34 | BEGINPROC trpmR0DispatchHostInterrupt
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35 | push xBP
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36 | mov xBP, xSP
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37 |
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38 | %ifdef RT_ARCH_AMD64
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39 | mov r11, rsp ; save the RSP for the iret frame.
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40 | and rsp, 0fffffffffffffff0h ; align the stack. (do it unconditionally saves some jump mess)
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41 |
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42 | ; switch stack?
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43 | %ifdef ASM_CALL64_MSC
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44 | cmp r8, 0ffffffffffffffffh
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45 | je .no_stack_switch
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46 | mov rsp, r8
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47 | %else
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48 | cmp rdx, 0ffffffffffffffffh
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49 | je .no_stack_switch
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50 | mov rsp, rdx
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51 | %endif
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52 | .no_stack_switch:
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53 |
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54 | ; create the iret frame
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55 | push 0 ; SS
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56 | push r11 ; RSP
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57 | pushfq ; RFLAGS
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58 | and dword [rsp], ~X86_EFL_IF
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59 | mov ax, cs
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60 | push rax ; CS
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61 | lea r10, [.return wrt rip] ; RIP
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62 | push r10
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63 |
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64 | ; create the retf frame
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65 | %ifdef ASM_CALL64_MSC
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66 | movzx rdx, dx
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67 | cmp rdx, r11
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68 | je .dir_jump
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69 | push rdx
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70 | push rcx
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71 | %else
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72 | movzx rsi, si
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73 | cmp rsi, r11
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74 | je .dir_jump
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75 | push rsi
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76 | push rdi
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77 | %endif
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78 |
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79 | ; dispatch it
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80 | db 048h
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81 | retf
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82 |
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83 | ; dispatch it by a jmp (don't mess up the IST stack)
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84 | .dir_jump:
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85 | %ifdef ASM_CALL64_MSC
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86 | jmp rcx
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87 | %else
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88 | jmp rdi
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89 | %endif
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90 |
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91 | %else ; 32-bit:
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92 | mov ecx, [ebp + 8] ; uIP
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93 | movzx edx, word [ebp + 12] ; SelCS
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94 |
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95 | ; create the iret frame
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96 | pushfd ; EFLAGS
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97 | and dword [esp], ~X86_EFL_IF
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98 | push cs ; CS
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99 | push .return ; EIP
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100 |
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101 | ; create the retf frame
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102 | push edx
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103 | push ecx
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104 |
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105 | ; dispatch it!
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106 | retf
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107 | %endif
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108 | .return:
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109 | cli
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110 |
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111 | leave
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112 | ret
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113 | ENDPROC trpmR0DispatchHostInterrupt
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114 |
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115 |
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116 | %ifndef VBOX_WITHOUT_IDT_PATCHING
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117 |
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118 | align 16
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119 | ;;
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120 | ; This is the alternative return from VMMR0Entry() used when
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121 | ; we need to dispatch an interrupt to the Host (we received it in GC).
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122 | ;
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123 | ; As seen in TRPMR0SetupInterruptDispatcherFrame() the stack is different
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124 | ; than for the normal VMMR0Entry() return.
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125 | ;
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126 | ; 32-bit:
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127 | ; 18 iret frame
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128 | ; 14 retf selector (interrupt handler)
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129 | ; 10 retf offset (interrupt handler)
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130 | ; c es
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131 | ; 8 fs
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132 | ; 4 ds
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133 | ; 0 pVM (esp here)
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134 | ;
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135 | ; 64-bit:
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136 | ; 24 iret frame
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137 | ; 18 retf selector (interrupt handler)
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138 | ; 10 retf offset (interrupt handler)
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139 | ; 8 uOperation
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140 | ; 0 pVM (rsp here)
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141 | ;
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142 | BEGINPROC trpmR0InterruptDispatcher
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143 | %ifdef RT_ARCH_AMD64
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144 | lea rsp, [rsp + 10h] ; skip pVM and uOperation
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145 | swapgs
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146 | db 48h
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147 | retf
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148 | %else ; !RT_ARCH_AMD64
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149 | add esp, byte 4 ; skip pVM
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150 | pop ds
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151 | pop fs
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152 | pop es
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153 | retf
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154 | %endif ; !RT_ARCH_AMD64
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155 | ENDPROC trpmR0InterruptDispatcher
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156 |
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157 | %endif ; !VBOX_WITHOUT_IDT_PATCHING
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158 |
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159 |
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160 | ;;
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161 | ; Issues a software interrupt to the specified interrupt vector.
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162 | ;
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163 | ; @param uActiveVector x86:[esp+4] msc:rcx gcc:rdi The vector number.
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164 | ;
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165 | ;DECLASM(void) trpmR0DispatchHostInterruptSimple(RTUINT uActiveVector);
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166 | BEGINPROC trpmR0DispatchHostInterruptSimple
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167 | %ifdef RT_ARCH_X86
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168 | mov eax, [esp + 4]
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169 | jmp dword [.jmp_table + eax * 4]
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170 | %else
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171 | lea r9, [.jmp_table wrt rip]
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172 | %ifdef ASM_CALL64_MSC
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173 | jmp qword [r9 + rcx * 8]
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174 | %else
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175 | jmp qword [r9 + rdi * 8]
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176 | %endif
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177 | %endif
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178 |
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179 | .jmp_table:
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180 | %assign i 0
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181 | %rep 256
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182 | RTCCPTR_DEF .int_ %+ i
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183 | %assign i i+1
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184 | %endrep
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185 |
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186 | %assign i 0
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187 | %rep 256
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188 | ALIGNCODE(4)
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189 | .int_ %+ i:
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190 | int i
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191 | ret
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192 | %assign i i+1
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193 | %endrep
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194 |
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195 | ENDPROC trpmR0DispatchHostInterruptSimple
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196 |
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