VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/TRPMR0.cpp@ 2981

Last change on this file since 2981 was 2981, checked in by vboxsync, 17 years ago

InnoTek -> innotek: all the headers and comments.

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File size: 7.4 KB
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1/* $Id: TRPMR0.cpp 2981 2007-06-01 16:01:28Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor - HC Ring 0
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_TRPM
27#include <VBox/trpm.h>
28#include "TRPMInternal.h"
29#include <VBox/vm.h>
30#include <VBox/err.h>
31#include <VBox/log.h>
32#include <iprt/assert.h>
33#include <iprt/asm.h>
34
35
36/**
37 * Dispatches an interrupt that arrived while we were in the guest context.
38 *
39 * @param pVM The VM handle.
40 * @remark Must be called with interrupts disabled.
41 */
42TRPMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM)
43{
44 RTUINT uActiveVector = pVM->trpm.s.uActiveVector;
45 pVM->trpm.s.uActiveVector = ~0;
46 AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector));
47
48#ifdef VBOX_WITH_HYBIRD_32BIT_KERNEL
49 /*
50 * Check if we're in long mode or not.
51 */
52 if ( (ASMCpuId_EDX(0x80000001) & X86_CPUID_AMD_FEATURE_EDX_LONG_MODE)
53 && (ASMRdMsr(MSR_K6_EFER) & MSR_K6_EFER_LMA))
54 {
55 trpmR0DispatchHostInterruptSimple(uActiveVector);
56 return;
57 }
58#endif
59
60 /*
61 * Get the handler pointer (16:32 ptr) / (16:48 ptr).
62 */
63 RTIDTR Idtr;
64 ASMGetIDTR(&Idtr);
65#if HC_ARCH_BITS == 32
66 PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector];
67#else
68 PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector * 2];
69#endif
70 AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
71 AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
72 || pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32,
73 ("The IDT entry (%d) is not 32-bit int gate! type1=%#x type2=%#x\n",
74 uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
75#if HC_ARCH_BITS == 32
76 RTFAR32 pfnHandler;
77 pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
78 pfnHandler.sel = pIdte->Gen.u16SegSel;
79
80 const RTR0UINTREG uRSP = ~(RTR0UINTREG)0;
81
82#else /* 64-bit: */
83 RTFAR64 pfnHandler;
84 pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
85 pfnHandler.off |= (uint64_t)(*(uint32_t *)(pIdte + 1)) << 32; //cleanup!
86 pfnHandler.sel = pIdte->Gen.u16SegSel;
87
88 RTR0UINTREG uRSP = ~(RTR0UINTREG)0;
89 if (pIdte->au32[1] & 0x7 /*IST*/)
90 {
91 trpmR0DispatchHostInterruptSimple(uActiveVector);
92 return;
93 }
94
95#endif
96
97 /*
98 * Dispatch it.
99 */
100 trpmR0DispatchHostInterrupt(pfnHandler.off, pfnHandler.sel, uRSP);
101}
102
103
104#ifndef VBOX_WITHOUT_IDT_PATCHING
105# ifdef VBOX_WITH_HYBIRD_32BIT_KERNEL
106# error "VBOX_WITH_HYBIRD_32BIT_KERNEL without VBOX_WITHOUT_IDT_PATCHING isn't supported"
107# endif
108
109/**
110 * Changes the VMMR0Entry() call frame and stack used by the IDT patch code
111 * so that we'll dispatch an interrupt rather than returning directly to Ring-3
112 * when VMMR0Entry() returns.
113 *
114 * @param pVM Pointer to the VM.
115 * @param pvRet Pointer to the return address of VMMR0Entry() on the stack.
116 */
117TRPMR0DECL(void) TRPMR0SetupInterruptDispatcherFrame(PVM pVM, void *pvRet)
118{
119 RTUINT uActiveVector = pVM->trpm.s.uActiveVector;
120 pVM->trpm.s.uActiveVector = ~0;
121 AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector));
122
123#if HC_ARCH_BITS == 32
124 /*
125 * Get the handler pointer (16:32 ptr).
126 */
127 RTIDTR Idtr;
128 ASMGetIDTR(&Idtr);
129 PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector];
130 AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
131 AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
132 && pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32,
133 ("The IDT entry (%d) is not 32-bit int gate! type1=%#x type2=%#x\n",
134 uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
135
136 RTFAR32 pfnHandler;
137 pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
138 pfnHandler.sel = pIdte->Gen.u16SegSel;
139
140 /*
141 * The stack frame is as follows:
142 *
143 * 1c iret frame
144 * 18 fs
145 * 14 ds
146 * 10 es
147 * c uArg
148 * 8 uOperation
149 * 4 pVM
150 * 0 return address (pvRet points here)
151 *
152 * We'll change the stackframe so that we will not return
153 * to the caller but to a interrupt dispatcher. We'll also
154 * setup the frame so that ds and es are moved to give room
155 * to a far return (to the handler).
156 */
157 unsigned *pau = (unsigned *)pvRet;
158 pau[0] = (unsigned)trpmR0InterruptDispatcher; /* new return address */
159 pau[3] = pau[6]; /* uArg = fs */
160 pau[2] = pau[5]; /* uOperation = ds */
161 pau[5] = pfnHandler.off; /* ds = retf off */
162 pau[6] = pfnHandler.sel; /* fs = retf sel */
163
164#else /* 64-bit: */
165
166 /*
167 * Get the handler pointer (16:48 ptr).
168 */
169 RTIDTR Idtr;
170 ASMGetIDTR(&Idtr);
171 PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector * 2];
172
173 AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
174 AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
175 && pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32, /* == 64 */
176 ("The IDT entry (%d) is not 64-bit int gate! type1=%#x type2=%#x\n",
177 uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
178
179 RTFAR64 pfnHandler;
180 pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
181 pfnHandler.off |= (uint64_t)(*(uint32_t *)(pIdte + 1)) << 32; //cleanup!
182 pfnHandler.sel = pIdte->Gen.u16SegSel;
183
184 if (pIdte->au32[1] & 0x7 /*IST*/)
185 {
186 /** @todo implement IST */
187 }
188
189 /*
190 * The stack frame is as follows:
191 *
192 * 28 iret frame
193 * 20 dummy
194 * 14 uArg
195 * 10 uOperation
196 * 8 pVM
197 * 0 return address (pvRet points here)
198 *
199 * We'll change the stackframe so that we will not return
200 * to the caller but to a interrupt dispatcher. And we'll create
201 * a 64-bit far return frame where dummy and uArg is.
202 */
203 uint64_t *pau = (uint64_t *)pvRet;
204 Assert(pau[1] == (uint64_t)pVM);
205 pau[0] = (uint64_t)trpmR0InterruptDispatcher; /* new return address */
206 pau[3] = pfnHandler.off; /* retf off */
207 pau[4] = pfnHandler.sel; /* retf sel */
208#endif
209}
210
211#endif /* !VBOX_WITHOUT_IDT_PATCHING */
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