1 | /* $Id: TRPMR0.cpp 8155 2008-04-18 15:16:47Z vboxsync $ */
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2 | /** @file
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3 | * TRPM - The Trap Monitor - HC Ring 0
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 |
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23 | /*******************************************************************************
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24 | * Header Files *
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25 | *******************************************************************************/
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26 | #define LOG_GROUP LOG_GROUP_TRPM
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27 | #include <VBox/trpm.h>
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28 | #include "TRPMInternal.h"
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29 | #include <VBox/vm.h>
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30 | #include <VBox/err.h>
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31 | #include <VBox/log.h>
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32 | #include <iprt/assert.h>
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33 | #include <iprt/asm.h>
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34 |
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35 |
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36 | /**
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37 | * Dispatches an interrupt that arrived while we were in the guest context.
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38 | *
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39 | * @param pVM The VM handle.
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40 | * @remark Must be called with interrupts disabled.
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41 | */
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42 | TRPMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM)
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43 | {
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44 | RTUINT uActiveVector = pVM->trpm.s.uActiveVector;
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45 | pVM->trpm.s.uActiveVector = ~0;
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46 | AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector));
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47 |
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48 | #ifdef VBOX_WITH_HYBIRD_32BIT_KERNEL
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49 | /*
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50 | * Check if we're in long mode or not.
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51 | */
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52 | if ( (ASMCpuId_EDX(0x80000001) & X86_CPUID_AMD_FEATURE_EDX_LONG_MODE)
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53 | && (ASMRdMsr(MSR_K6_EFER) & MSR_K6_EFER_LMA))
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54 | {
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55 | trpmR0DispatchHostInterruptSimple(uActiveVector);
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56 | return;
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57 | }
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58 | #endif
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59 |
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60 | /*
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61 | * Get the handler pointer (16:32 ptr) / (16:48 ptr).
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62 | */
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63 | RTIDTR Idtr;
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64 | ASMGetIDTR(&Idtr);
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65 | #if HC_ARCH_BITS == 32
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66 | PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector];
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67 | #else
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68 | PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector * 2];
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69 | #endif
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70 | AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
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71 | AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
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72 | || pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32,
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73 | ("The IDT entry (%d) is not 32-bit int gate! type1=%#x type2=%#x\n",
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74 | uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
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75 | #if HC_ARCH_BITS == 32
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76 | RTFAR32 pfnHandler;
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77 | pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
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78 | pfnHandler.sel = pIdte->Gen.u16SegSel;
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79 |
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80 | const RTR0UINTREG uRSP = ~(RTR0UINTREG)0;
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81 |
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82 | #else /* 64-bit: */
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83 | RTFAR64 pfnHandler;
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84 | pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
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85 | pfnHandler.off |= (uint64_t)(*(uint32_t *)(pIdte + 1)) << 32; //cleanup!
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86 | pfnHandler.sel = pIdte->Gen.u16SegSel;
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87 |
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88 | RTR0UINTREG uRSP = ~(RTR0UINTREG)0;
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89 | if (pIdte->au32[1] & 0x7 /*IST*/)
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90 | {
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91 | trpmR0DispatchHostInterruptSimple(uActiveVector);
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92 | return;
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93 | }
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94 |
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95 | #endif
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96 |
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97 | /*
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98 | * Dispatch it.
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99 | */
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100 | trpmR0DispatchHostInterrupt(pfnHandler.off, pfnHandler.sel, uRSP);
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101 | }
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102 |
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103 |
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104 | #ifdef VBOX_WITH_IDT_PATCHING
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105 | # ifdef VBOX_WITH_HYBIRD_32BIT_KERNEL
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106 | # error "VBOX_WITH_HYBIRD_32BIT_KERNEL with VBOX_WITH_IDT_PATCHING isn't supported"
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107 | # endif
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108 |
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109 | /**
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110 | * Changes the VMMR0Entry() call frame and stack used by the IDT patch code
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111 | * so that we'll dispatch an interrupt rather than returning directly to Ring-3
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112 | * when VMMR0Entry() returns.
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113 | *
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114 | * @param pVM Pointer to the VM.
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115 | * @param pvRet Pointer to the return address of VMMR0Entry() on the stack.
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116 | */
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117 | TRPMR0DECL(void) TRPMR0SetupInterruptDispatcherFrame(PVM pVM, void *pvRet)
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118 | {
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119 | RTUINT uActiveVector = pVM->trpm.s.uActiveVector;
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120 | pVM->trpm.s.uActiveVector = ~0;
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121 | AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector));
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122 |
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123 | #if HC_ARCH_BITS == 32
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124 | /*
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125 | * Get the handler pointer (16:32 ptr).
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126 | */
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127 | RTIDTR Idtr;
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128 | ASMGetIDTR(&Idtr);
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129 | PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector];
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130 | AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
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131 | AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
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132 | && pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32,
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133 | ("The IDT entry (%d) is not 32-bit int gate! type1=%#x type2=%#x\n",
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134 | uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
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135 |
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136 | RTFAR32 pfnHandler;
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137 | pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
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138 | pfnHandler.sel = pIdte->Gen.u16SegSel;
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139 |
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140 | /*
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141 | * The stack frame is as follows:
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142 | *
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143 | * 1c iret frame
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144 | * 18 fs
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145 | * 14 ds
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146 | * 10 es
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147 | * c uArg
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148 | * 8 uOperation
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149 | * 4 pVM
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150 | * 0 return address (pvRet points here)
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151 | *
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152 | * We'll change the stackframe so that we will not return
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153 | * to the caller but to a interrupt dispatcher. We'll also
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154 | * setup the frame so that ds and es are moved to give room
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155 | * to a far return (to the handler).
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156 | */
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157 | unsigned *pau = (unsigned *)pvRet;
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158 | pau[0] = (unsigned)trpmR0InterruptDispatcher; /* new return address */
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159 | pau[3] = pau[6]; /* uArg = fs */
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160 | pau[2] = pau[5]; /* uOperation = ds */
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161 | pau[5] = pfnHandler.off; /* ds = retf off */
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162 | pau[6] = pfnHandler.sel; /* fs = retf sel */
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163 |
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164 | #else /* 64-bit: */
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165 |
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166 | /*
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167 | * Get the handler pointer (16:48 ptr).
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168 | */
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169 | RTIDTR Idtr;
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170 | ASMGetIDTR(&Idtr);
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171 | PVBOXIDTE pIdte = &((PVBOXIDTE)Idtr.pIdt)[uActiveVector * 2];
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172 |
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173 | AssertMsgReturnVoid(pIdte->Gen.u1Present, ("The IDT entry (%d) is not present!\n", uActiveVector));
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174 | AssertMsgReturnVoid( pIdte->Gen.u3Type1 == VBOX_IDTE_TYPE1
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175 | && pIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32, /* == 64 */
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176 | ("The IDT entry (%d) is not 64-bit int gate! type1=%#x type2=%#x\n",
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177 | uActiveVector, pIdte->Gen.u3Type1, pIdte->Gen.u5Type2));
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178 |
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179 | RTFAR64 pfnHandler;
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180 | pfnHandler.off = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
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181 | pfnHandler.off |= (uint64_t)(*(uint32_t *)(pIdte + 1)) << 32; //cleanup!
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182 | pfnHandler.sel = pIdte->Gen.u16SegSel;
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183 |
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184 | if (pIdte->au32[1] & 0x7 /*IST*/)
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185 | {
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186 | /** @todo implement IST */
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187 | }
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188 |
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189 | /*
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190 | * The stack frame is as follows:
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191 | *
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192 | * 28 iret frame
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193 | * 20 dummy
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194 | * 14 uArg
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195 | * 10 uOperation
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196 | * 8 pVM
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197 | * 0 return address (pvRet points here)
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198 | *
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199 | * We'll change the stackframe so that we will not return
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200 | * to the caller but to a interrupt dispatcher. And we'll create
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201 | * a 64-bit far return frame where dummy and uArg is.
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202 | */
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203 | uint64_t *pau = (uint64_t *)pvRet;
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204 | Assert(pau[1] == (uint64_t)pVM);
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205 | pau[0] = (uint64_t)trpmR0InterruptDispatcher; /* new return address */
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206 | pau[3] = pfnHandler.off; /* retf off */
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207 | pau[4] = pfnHandler.sel; /* retf sel */
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208 | #endif
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209 | }
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210 |
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211 | #endif /* VBOX_WITH_IDT_PATCHING */
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