VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/PDMR0DevHlp.cpp@ 87758

Last change on this file since 87758 was 87691, checked in by vboxsync, 4 years ago

AMD IOMMU: bugref:9654 Replace IOMMU device lock with the PDM lock and use a separate lock for the IOTLB/DTE cache.
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File size: 67.7 KB
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1/* $Id: PDMR0DevHlp.cpp 87691 2021-02-10 16:20:11Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, R0 Device Helper parts.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#define PDMPCIDEV_INCLUDE_PRIVATE /* Hack to get pdmpcidevint.h included at the right point. */
24#include "PDMInternal.h"
25#include <VBox/vmm/pdm.h>
26#include <VBox/vmm/apic.h>
27#include <VBox/vmm/mm.h>
28#include <VBox/vmm/pgm.h>
29#include <VBox/vmm/gvm.h>
30#include <VBox/vmm/vmm.h>
31#include <VBox/vmm/vmcc.h>
32#include <VBox/vmm/gvmm.h>
33
34#include <VBox/log.h>
35#include <VBox/err.h>
36#include <VBox/sup.h>
37#include <iprt/asm.h>
38#include <iprt/assert.h>
39#include <iprt/ctype.h>
40#include <iprt/string.h>
41
42#include "dtrace/VBoxVMM.h"
43#include "PDMInline.h"
44
45
46/*********************************************************************************************************************************
47* Global Variables *
48*********************************************************************************************************************************/
49RT_C_DECLS_BEGIN
50extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp;
51extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlpTracing;
52extern DECLEXPORT(const PDMPICHLP) g_pdmR0PicHlp;
53extern DECLEXPORT(const PDMIOAPICHLP) g_pdmR0IoApicHlp;
54extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp;
55extern DECLEXPORT(const PDMIOMMUHLPR0) g_pdmR0IommuHlp;
56extern DECLEXPORT(const PDMHPETHLPR0) g_pdmR0HpetHlp;
57extern DECLEXPORT(const PDMPCIRAWHLPR0) g_pdmR0PciRawHlp;
58RT_C_DECLS_END
59
60
61/*********************************************************************************************************************************
62* Internal Functions *
63*********************************************************************************************************************************/
64
65
66/** @name Ring-0 Device Helpers
67 * @{
68 */
69
70/** @interface_method_impl{PDMDEVHLPR0,pfnIoPortSetUpContextEx} */
71static DECLCALLBACK(int) pdmR0DevHlp_IoPortSetUpContextEx(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts,
72 PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
73 PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr,
74 void *pvUser)
75{
76 PDMDEV_ASSERT_DEVINS(pDevIns);
77 LogFlow(("pdmR0DevHlp_IoPortSetUpContextEx: caller='%s'/%d: hIoPorts=%#x pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p pvUser=%p\n",
78 pDevIns->pReg->szName, pDevIns->iInstance, hIoPorts, pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser));
79 PGVM pGVM = pDevIns->Internal.s.pGVM;
80 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
81 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
82
83 int rc = IOMR0IoPortSetUpContext(pGVM, pDevIns, hIoPorts, pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser);
84
85 LogFlow(("pdmR0DevHlp_IoPortSetUpContextEx: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
86 return rc;
87}
88
89
90/** @interface_method_impl{PDMDEVHLPR0,pfnMmioSetUpContextEx} */
91static DECLCALLBACK(int) pdmR0DevHlp_MmioSetUpContextEx(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIONEWWRITE pfnWrite,
92 PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill, void *pvUser)
93{
94 PDMDEV_ASSERT_DEVINS(pDevIns);
95 LogFlow(("pdmR0DevHlp_MmioSetUpContextEx: caller='%s'/%d: hRegion=%#x pfnWrite=%p pfnRead=%p pfnFill=%p pvUser=%p\n",
96 pDevIns->pReg->szName, pDevIns->iInstance, hRegion, pfnWrite, pfnRead, pfnFill, pvUser));
97 PGVM pGVM = pDevIns->Internal.s.pGVM;
98 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
99 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
100
101 int rc = IOMR0MmioSetUpContext(pGVM, pDevIns, hRegion, pfnWrite, pfnRead, pfnFill, pvUser);
102
103 LogFlow(("pdmR0DevHlp_MmioSetUpContextEx: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
104 return rc;
105}
106
107
108/** @interface_method_impl{PDMDEVHLPR0,pfnMmio2SetUpContext} */
109static DECLCALLBACK(int) pdmR0DevHlp_Mmio2SetUpContext(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion,
110 size_t offSub, size_t cbSub, void **ppvMapping)
111{
112 PDMDEV_ASSERT_DEVINS(pDevIns);
113 LogFlow(("pdmR0DevHlp_Mmio2SetUpContext: caller='%s'/%d: hRegion=%#x offSub=%#zx cbSub=%#zx ppvMapping=%p\n",
114 pDevIns->pReg->szName, pDevIns->iInstance, hRegion, offSub, cbSub, ppvMapping));
115 *ppvMapping = NULL;
116
117 PGVM pGVM = pDevIns->Internal.s.pGVM;
118 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
119 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
120
121 int rc = PGMR0PhysMMIO2MapKernel(pGVM, pDevIns, hRegion, offSub, cbSub, ppvMapping);
122
123 LogFlow(("pdmR0DevHlp_Mmio2SetUpContext: caller='%s'/%d: returns %Rrc (%p)\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppvMapping));
124 return rc;
125}
126
127
128/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysRead} */
129static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
130 void *pvBuf, size_t cbRead, uint32_t fFlags)
131{
132 PDMDEV_ASSERT_DEVINS(pDevIns);
133 if (!pPciDev) /* NULL is an alias for the default PCI device. */
134 pPciDev = pDevIns->apPciDevs[0];
135 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
136 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
137
138#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
139 /*
140 * Just check the busmaster setting here and forward the request to the generic read helper.
141 */
142 if (PCIDevIsBusmaster(pPciDev))
143 { /* likely */ }
144 else
145 {
146 LogFunc(("caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n", pDevIns, pDevIns->iInstance,
147 VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
148 memset(pvBuf, 0xff, cbRead);
149 return VERR_PDM_NOT_PCI_BUS_MASTER;
150 }
151#endif
152
153#ifdef VBOX_WITH_IOMMU_AMD
154 int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
155 if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
156 return rc;
157#endif
158
159 return pDevIns->pHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead, fFlags);
160}
161
162
163/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysWrite} */
164static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
165 const void *pvBuf, size_t cbWrite, uint32_t fFlags)
166{
167 PDMDEV_ASSERT_DEVINS(pDevIns);
168 if (!pPciDev) /* NULL is an alias for the default PCI device. */
169 pPciDev = pDevIns->apPciDevs[0];
170 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
171 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
172
173#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
174 /*
175 * Just check the busmaster setting here and forward the request to the generic read helper.
176 */
177 if (PCIDevIsBusmaster(pPciDev))
178 { /* likely */ }
179 else
180 {
181 LogFunc(("caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n", pDevIns, pDevIns->iInstance,
182 VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
183 return VERR_PDM_NOT_PCI_BUS_MASTER;
184 }
185#endif
186
187#ifdef VBOX_WITH_IOMMU_AMD
188 int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
189 if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
190 return rc;
191#endif
192
193 return pDevIns->pHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite, fFlags);
194}
195
196
197/** @interface_method_impl{PDMDEVHLPR0,pfnPCISetIrq} */
198static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
199{
200 PDMDEV_ASSERT_DEVINS(pDevIns);
201 if (!pPciDev) /* NULL is an alias for the default PCI device. */
202 pPciDev = pDevIns->apPciDevs[0];
203 AssertReturnVoid(pPciDev);
204 LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
205 pDevIns, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
206 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
207
208 PGVM pGVM = pDevIns->Internal.s.pGVM;
209 size_t const idxBus = pPciDev->Int.s.idxPdmBus;
210 AssertReturnVoid(idxBus < RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses));
211 PPDMPCIBUSR0 pPciBusR0 = &pGVM->pdmr0.s.aPciBuses[idxBus];
212
213 pdmLock(pGVM);
214
215 uint32_t uTagSrc;
216 if (iLevel & PDM_IRQ_LEVEL_HIGH)
217 {
218 pDevIns->Internal.s.pIntR3R0->uLastIrqTag = uTagSrc = pdmCalcIrqTag(pGVM, pDevIns->Internal.s.pInsR3R0->idTracing);
219 if (iLevel == PDM_IRQ_LEVEL_HIGH)
220 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
221 else
222 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
223 }
224 else
225 uTagSrc = pDevIns->Internal.s.pIntR3R0->uLastIrqTag;
226
227 if (pPciBusR0->pDevInsR0)
228 {
229 pPciBusR0->pfnSetIrqR0(pPciBusR0->pDevInsR0, pPciDev, iIrq, iLevel, uTagSrc);
230
231 pdmUnlock(pGVM);
232
233 if (iLevel == PDM_IRQ_LEVEL_LOW)
234 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
235 }
236 else
237 {
238 pdmUnlock(pGVM);
239
240 /* queue for ring-3 execution. */
241 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
242 AssertReturnVoid(pTask);
243
244 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
245 pTask->pDevInsR3 = PDMDEVINS_2_R3PTR(pDevIns);
246 pTask->u.PciSetIRQ.iIrq = iIrq;
247 pTask->u.PciSetIRQ.iLevel = iLevel;
248 pTask->u.PciSetIRQ.uTagSrc = uTagSrc;
249 pTask->u.PciSetIRQ.pPciDevR3 = MMHyperR0ToR3(pGVM, pPciDev);
250
251 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
252 }
253
254 LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
255}
256
257
258/** @interface_method_impl{PDMDEVHLPR0,pfnISASetIrq} */
259static DECLCALLBACK(void) pdmR0DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
260{
261 PDMDEV_ASSERT_DEVINS(pDevIns);
262 LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
263 PGVM pGVM = pDevIns->Internal.s.pGVM;
264
265 pdmLock(pGVM);
266 uint32_t uTagSrc;
267 if (iLevel & PDM_IRQ_LEVEL_HIGH)
268 {
269 pDevIns->Internal.s.pIntR3R0->uLastIrqTag = uTagSrc = pdmCalcIrqTag(pGVM, pDevIns->Internal.s.pInsR3R0->idTracing);
270 if (iLevel == PDM_IRQ_LEVEL_HIGH)
271 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
272 else
273 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
274 }
275 else
276 uTagSrc = pDevIns->Internal.s.pIntR3R0->uLastIrqTag;
277
278 bool fRc = pdmR0IsaSetIrq(pGVM, iIrq, iLevel, uTagSrc);
279
280 if (iLevel == PDM_IRQ_LEVEL_LOW && fRc)
281 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
282 pdmUnlock(pGVM);
283 LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
284}
285
286
287/** @interface_method_impl{PDMDEVHLPR0,pfnPhysRead} */
288static DECLCALLBACK(int) pdmR0DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags)
289{
290 RT_NOREF(fFlags);
291
292 PDMDEV_ASSERT_DEVINS(pDevIns);
293 LogFlow(("pdmR0DevHlp_PhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
294 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
295
296 VBOXSTRICTRC rcStrict = PGMPhysRead(pDevIns->Internal.s.pGVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
297 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
298
299 Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
300 return VBOXSTRICTRC_VAL(rcStrict);
301}
302
303
304/** @interface_method_impl{PDMDEVHLPR0,pfnPhysWrite} */
305static DECLCALLBACK(int) pdmR0DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags)
306{
307 RT_NOREF(fFlags);
308
309 PDMDEV_ASSERT_DEVINS(pDevIns);
310 LogFlow(("pdmR0DevHlp_PhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
311 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
312
313 VBOXSTRICTRC rcStrict = PGMPhysWrite(pDevIns->Internal.s.pGVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
314 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
315
316 Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
317 return VBOXSTRICTRC_VAL(rcStrict);
318}
319
320
321/** @interface_method_impl{PDMDEVHLPR0,pfnA20IsEnabled} */
322static DECLCALLBACK(bool) pdmR0DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
323{
324 PDMDEV_ASSERT_DEVINS(pDevIns);
325 LogFlow(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
326
327 bool fEnabled = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pGVM));
328
329 Log(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
330 return fEnabled;
331}
332
333
334/** @interface_method_impl{PDMDEVHLPR0,pfnVMState} */
335static DECLCALLBACK(VMSTATE) pdmR0DevHlp_VMState(PPDMDEVINS pDevIns)
336{
337 PDMDEV_ASSERT_DEVINS(pDevIns);
338
339 VMSTATE enmVMState = pDevIns->Internal.s.pGVM->enmVMState;
340
341 LogFlow(("pdmR0DevHlp_VMState: caller=%p/%d: returns %d\n", pDevIns, pDevIns->iInstance, enmVMState));
342 return enmVMState;
343}
344
345
346/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetError} */
347static DECLCALLBACK(int) pdmR0DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
348{
349 PDMDEV_ASSERT_DEVINS(pDevIns);
350 va_list args;
351 va_start(args, pszFormat);
352 int rc2 = VMSetErrorV(pDevIns->Internal.s.pGVM, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
353 va_end(args);
354 return rc;
355}
356
357
358/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetErrorV} */
359static DECLCALLBACK(int) pdmR0DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
360{
361 PDMDEV_ASSERT_DEVINS(pDevIns);
362 int rc2 = VMSetErrorV(pDevIns->Internal.s.pGVM, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
363 return rc;
364}
365
366
367/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetRuntimeError} */
368static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
369{
370 PDMDEV_ASSERT_DEVINS(pDevIns);
371 va_list va;
372 va_start(va, pszFormat);
373 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pGVM, fFlags, pszErrorId, pszFormat, va);
374 va_end(va);
375 return rc;
376}
377
378
379/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetRuntimeErrorV} */
380static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
381{
382 PDMDEV_ASSERT_DEVINS(pDevIns);
383 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pGVM, fFlags, pszErrorId, pszFormat, va);
384 return rc;
385}
386
387
388
389/** @interface_method_impl{PDMDEVHLPR0,pfnGetVM} */
390static DECLCALLBACK(PVMCC) pdmR0DevHlp_GetVM(PPDMDEVINS pDevIns)
391{
392 PDMDEV_ASSERT_DEVINS(pDevIns);
393 LogFlow(("pdmR0DevHlp_GetVM: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
394 return pDevIns->Internal.s.pGVM;
395}
396
397
398/** @interface_method_impl{PDMDEVHLPR0,pfnGetVMCPU} */
399static DECLCALLBACK(PVMCPUCC) pdmR0DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
400{
401 PDMDEV_ASSERT_DEVINS(pDevIns);
402 LogFlow(("pdmR0DevHlp_GetVMCPU: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
403 return VMMGetCpu(pDevIns->Internal.s.pGVM);
404}
405
406
407/** @interface_method_impl{PDMDEVHLPRC,pfnGetCurrentCpuId} */
408static DECLCALLBACK(VMCPUID) pdmR0DevHlp_GetCurrentCpuId(PPDMDEVINS pDevIns)
409{
410 PDMDEV_ASSERT_DEVINS(pDevIns);
411 VMCPUID idCpu = VMMGetCpuId(pDevIns->Internal.s.pGVM);
412 LogFlow(("pdmR0DevHlp_GetCurrentCpuId: caller='%p'/%d for CPU %u\n", pDevIns, pDevIns->iInstance, idCpu));
413 return idCpu;
414}
415
416
417/** @interface_method_impl{PDMDEVHLPR0,pfnTimerToPtr} */
418static DECLCALLBACK(PTMTIMERR0) pdmR0DevHlp_TimerToPtr(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
419{
420 PDMDEV_ASSERT_DEVINS(pDevIns);
421 RT_NOREF(pDevIns);
422 return (PTMTIMERR0)MMHyperR3ToCC(pDevIns->Internal.s.pGVM, hTimer);
423}
424
425
426/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromMicro} */
427static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicroSecs)
428{
429 return TMTimerFromMicro(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMicroSecs);
430}
431
432
433/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromMilli} */
434static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromMilli(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliSecs)
435{
436 return TMTimerFromMilli(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMilliSecs);
437}
438
439
440/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromNano} */
441static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanoSecs)
442{
443 return TMTimerFromNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cNanoSecs);
444}
445
446/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGet} */
447static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
448{
449 return TMTimerGet(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
450}
451
452
453/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGetFreq} */
454static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGetFreq(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
455{
456 return TMTimerGetFreq(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
457}
458
459
460/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGetNano} */
461static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
462{
463 return TMTimerGetNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
464}
465
466
467/** @interface_method_impl{PDMDEVHLPR0,pfnTimerIsActive} */
468static DECLCALLBACK(bool) pdmR0DevHlp_TimerIsActive(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
469{
470 return TMTimerIsActive(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
471}
472
473
474/** @interface_method_impl{PDMDEVHLPR0,pfnTimerIsLockOwner} */
475static DECLCALLBACK(bool) pdmR0DevHlp_TimerIsLockOwner(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
476{
477 return TMTimerIsLockOwner(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
478}
479
480
481/** @interface_method_impl{PDMDEVHLPR0,pfnTimerLockClock} */
482static DECLCALLBACK(VBOXSTRICTRC) pdmR0DevHlp_TimerLockClock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, int rcBusy)
483{
484 return TMTimerLock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), rcBusy);
485}
486
487
488/** @interface_method_impl{PDMDEVHLPR0,pfnTimerLockClock2} */
489static DECLCALLBACK(VBOXSTRICTRC) pdmR0DevHlp_TimerLockClock2(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer,
490 PPDMCRITSECT pCritSect, int rcBusy)
491{
492 VBOXSTRICTRC rc = TMTimerLock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), rcBusy);
493 if (rc == VINF_SUCCESS)
494 {
495 rc = PDMCritSectEnter(pCritSect, rcBusy);
496 if (rc == VINF_SUCCESS)
497 return rc;
498 AssertRC(VBOXSTRICTRC_VAL(rc));
499 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
500 }
501 else
502 AssertRC(VBOXSTRICTRC_VAL(rc));
503 return rc;
504}
505
506
507/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSet} */
508static DECLCALLBACK(int) pdmR0DevHlp_TimerSet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t uExpire)
509{
510 return TMTimerSet(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), uExpire);
511}
512
513
514/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetFrequencyHint} */
515static DECLCALLBACK(int) pdmR0DevHlp_TimerSetFrequencyHint(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint32_t uHz)
516{
517 return TMTimerSetFrequencyHint(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), uHz);
518}
519
520
521/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetMicro} */
522static DECLCALLBACK(int) pdmR0DevHlp_TimerSetMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicrosToNext)
523{
524 return TMTimerSetMicro(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMicrosToNext);
525}
526
527
528/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetMillies} */
529static DECLCALLBACK(int) pdmR0DevHlp_TimerSetMillies(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliesToNext)
530{
531 return TMTimerSetMillies(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMilliesToNext);
532}
533
534
535/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetNano} */
536static DECLCALLBACK(int) pdmR0DevHlp_TimerSetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanosToNext)
537{
538 return TMTimerSetNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cNanosToNext);
539}
540
541
542/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetRelative} */
543static DECLCALLBACK(int) pdmR0DevHlp_TimerSetRelative(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cTicksToNext, uint64_t *pu64Now)
544{
545 return TMTimerSetRelative(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cTicksToNext, pu64Now);
546}
547
548
549/** @interface_method_impl{PDMDEVHLPR0,pfnTimerStop} */
550static DECLCALLBACK(int) pdmR0DevHlp_TimerStop(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
551{
552 return TMTimerStop(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
553}
554
555
556/** @interface_method_impl{PDMDEVHLPR0,pfnTimerUnlockClock} */
557static DECLCALLBACK(void) pdmR0DevHlp_TimerUnlockClock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
558{
559 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
560}
561
562
563/** @interface_method_impl{PDMDEVHLPR0,pfnTimerUnlockClock2} */
564static DECLCALLBACK(void) pdmR0DevHlp_TimerUnlockClock2(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PPDMCRITSECT pCritSect)
565{
566 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
567 int rc = PDMCritSectLeave(pCritSect);
568 AssertRC(rc);
569}
570
571
572/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGet} */
573static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
574{
575 PDMDEV_ASSERT_DEVINS(pDevIns);
576 LogFlow(("pdmR0DevHlp_TMTimeVirtGet: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
577 return TMVirtualGet(pDevIns->Internal.s.pGVM);
578}
579
580
581/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGetFreq} */
582static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
583{
584 PDMDEV_ASSERT_DEVINS(pDevIns);
585 LogFlow(("pdmR0DevHlp_TMTimeVirtGetFreq: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
586 return TMVirtualGetFreq(pDevIns->Internal.s.pGVM);
587}
588
589
590/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGetNano} */
591static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
592{
593 PDMDEV_ASSERT_DEVINS(pDevIns);
594 LogFlow(("pdmR0DevHlp_TMTimeVirtGetNano: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
595 return TMVirtualToNano(pDevIns->Internal.s.pGVM, TMVirtualGet(pDevIns->Internal.s.pGVM));
596}
597
598
599/** @interface_method_impl{PDMDEVHLPR0,pfnQueueToPtr} */
600static DECLCALLBACK(PPDMQUEUE) pdmR0DevHlp_QueueToPtr(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
601{
602 PDMDEV_ASSERT_DEVINS(pDevIns);
603 RT_NOREF(pDevIns);
604 return (PPDMQUEUE)MMHyperR3ToCC(pDevIns->Internal.s.pGVM, hQueue);
605}
606
607
608/** @interface_method_impl{PDMDEVHLPR0,pfnQueueAlloc} */
609static DECLCALLBACK(PPDMQUEUEITEMCORE) pdmR0DevHlp_QueueAlloc(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
610{
611 return PDMQueueAlloc(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue));
612}
613
614
615/** @interface_method_impl{PDMDEVHLPR0,pfnQueueInsert} */
616static DECLCALLBACK(void) pdmR0DevHlp_QueueInsert(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue, PPDMQUEUEITEMCORE pItem)
617{
618 return PDMQueueInsert(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue), pItem);
619}
620
621
622/** @interface_method_impl{PDMDEVHLPR0,pfnQueueInsertEx} */
623static DECLCALLBACK(void) pdmR0DevHlp_QueueInsertEx(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue, PPDMQUEUEITEMCORE pItem,
624 uint64_t cNanoMaxDelay)
625{
626 return PDMQueueInsertEx(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue), pItem, cNanoMaxDelay);
627}
628
629
630/** @interface_method_impl{PDMDEVHLPR0,pfnQueueFlushIfNecessary} */
631static DECLCALLBACK(bool) pdmR0DevHlp_QueueFlushIfNecessary(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
632{
633 return PDMQueueFlushIfNecessary(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue));
634}
635
636
637/** @interface_method_impl{PDMDEVHLPR0,pfnTaskTrigger} */
638static DECLCALLBACK(int) pdmR0DevHlp_TaskTrigger(PPDMDEVINS pDevIns, PDMTASKHANDLE hTask)
639{
640 PDMDEV_ASSERT_DEVINS(pDevIns);
641 LogFlow(("pdmR0DevHlp_TaskTrigger: caller='%s'/%d: hTask=%RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, hTask));
642
643 int rc = PDMTaskTrigger(pDevIns->Internal.s.pGVM, PDMTASKTYPE_DEV, pDevIns->pDevInsForR3, hTask);
644
645 LogFlow(("pdmR0DevHlp_TaskTrigger: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
646 return rc;
647}
648
649
650/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventSignal} */
651static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventSignal(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent)
652{
653 PDMDEV_ASSERT_DEVINS(pDevIns);
654 LogFlow(("pdmR0DevHlp_SUPSemEventSignal: caller='%s'/%d: hEvent=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEvent));
655
656 int rc = SUPSemEventSignal(pDevIns->Internal.s.pGVM->pSession, hEvent);
657
658 LogFlow(("pdmR0DevHlp_SUPSemEventSignal: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
659 return rc;
660}
661
662
663/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNoResume} */
664static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNoResume(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint32_t cMillies)
665{
666 PDMDEV_ASSERT_DEVINS(pDevIns);
667 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNoResume: caller='%s'/%d: hEvent=%p cNsTimeout=%RU32\n",
668 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, cMillies));
669
670 int rc = SUPSemEventWaitNoResume(pDevIns->Internal.s.pGVM->pSession, hEvent, cMillies);
671
672 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNoResume: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
673 return rc;
674}
675
676
677/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNsAbsIntr} */
678static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNsAbsIntr(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint64_t uNsTimeout)
679{
680 PDMDEV_ASSERT_DEVINS(pDevIns);
681 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsAbsIntr: caller='%s'/%d: hEvent=%p uNsTimeout=%RU64\n",
682 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, uNsTimeout));
683
684 int rc = SUPSemEventWaitNsAbsIntr(pDevIns->Internal.s.pGVM->pSession, hEvent, uNsTimeout);
685
686 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsAbsIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
687 return rc;
688}
689
690
691/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNsRelIntr} */
692static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNsRelIntr(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint64_t cNsTimeout)
693{
694 PDMDEV_ASSERT_DEVINS(pDevIns);
695 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsRelIntr: caller='%s'/%d: hEvent=%p cNsTimeout=%RU64\n",
696 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, cNsTimeout));
697
698 int rc = SUPSemEventWaitNsRelIntr(pDevIns->Internal.s.pGVM->pSession, hEvent, cNsTimeout);
699
700 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsRelIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
701 return rc;
702}
703
704
705/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventGetResolution} */
706static DECLCALLBACK(uint32_t) pdmR0DevHlp_SUPSemEventGetResolution(PPDMDEVINS pDevIns)
707{
708 PDMDEV_ASSERT_DEVINS(pDevIns);
709 LogFlow(("pdmR0DevHlp_SUPSemEventGetResolution: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
710
711 uint32_t cNsResolution = SUPSemEventGetResolution(pDevIns->Internal.s.pGVM->pSession);
712
713 LogFlow(("pdmR0DevHlp_SUPSemEventGetResolution: caller='%s'/%d: returns %u\n", pDevIns->pReg->szName, pDevIns->iInstance, cNsResolution));
714 return cNsResolution;
715}
716
717
718/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiSignal} */
719static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiSignal(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti)
720{
721 PDMDEV_ASSERT_DEVINS(pDevIns);
722 LogFlow(("pdmR0DevHlp_SUPSemEventMultiSignal: caller='%s'/%d: hEventMulti=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti));
723
724 int rc = SUPSemEventMultiSignal(pDevIns->Internal.s.pGVM->pSession, hEventMulti);
725
726 LogFlow(("pdmR0DevHlp_SUPSemEventMultiSignal: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
727 return rc;
728}
729
730
731/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiReset} */
732static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiReset(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti)
733{
734 PDMDEV_ASSERT_DEVINS(pDevIns);
735 LogFlow(("pdmR0DevHlp_SUPSemEventMultiReset: caller='%s'/%d: hEventMulti=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti));
736
737 int rc = SUPSemEventMultiReset(pDevIns->Internal.s.pGVM->pSession, hEventMulti);
738
739 LogFlow(("pdmR0DevHlp_SUPSemEventMultiReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
740 return rc;
741}
742
743
744/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNoResume} */
745static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNoResume(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
746 uint32_t cMillies)
747{
748 PDMDEV_ASSERT_DEVINS(pDevIns);
749 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNoResume: caller='%s'/%d: hEventMulti=%p cMillies=%RU32\n",
750 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, cMillies));
751
752 int rc = SUPSemEventMultiWaitNoResume(pDevIns->Internal.s.pGVM->pSession, hEventMulti, cMillies);
753
754 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNoResume: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
755 return rc;
756}
757
758
759/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNsAbsIntr} */
760static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
761 uint64_t uNsTimeout)
762{
763 PDMDEV_ASSERT_DEVINS(pDevIns);
764 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr: caller='%s'/%d: hEventMulti=%p uNsTimeout=%RU64\n",
765 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, uNsTimeout));
766
767 int rc = SUPSemEventMultiWaitNsAbsIntr(pDevIns->Internal.s.pGVM->pSession, hEventMulti, uNsTimeout);
768
769 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
770 return rc;
771}
772
773
774/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNsRelIntr} */
775static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
776 uint64_t cNsTimeout)
777{
778 PDMDEV_ASSERT_DEVINS(pDevIns);
779 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr: caller='%s'/%d: hEventMulti=%p cNsTimeout=%RU64\n",
780 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, cNsTimeout));
781
782 int rc = SUPSemEventMultiWaitNsRelIntr(pDevIns->Internal.s.pGVM->pSession, hEventMulti, cNsTimeout);
783
784 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
785 return rc;
786}
787
788
789/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiGetResolution} */
790static DECLCALLBACK(uint32_t) pdmR0DevHlp_SUPSemEventMultiGetResolution(PPDMDEVINS pDevIns)
791{
792 PDMDEV_ASSERT_DEVINS(pDevIns);
793 LogFlow(("pdmR0DevHlp_SUPSemEventMultiGetResolution: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
794
795 uint32_t cNsResolution = SUPSemEventMultiGetResolution(pDevIns->Internal.s.pGVM->pSession);
796
797 LogFlow(("pdmR0DevHlp_SUPSemEventMultiGetResolution: caller='%s'/%d: returns %u\n", pDevIns->pReg->szName, pDevIns->iInstance, cNsResolution));
798 return cNsResolution;
799}
800
801
802/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectGetNop} */
803static DECLCALLBACK(PPDMCRITSECT) pdmR0DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
804{
805 PDMDEV_ASSERT_DEVINS(pDevIns);
806 PGVM pGVM = pDevIns->Internal.s.pGVM;
807
808 PPDMCRITSECT pCritSect = &pGVM->pdm.s.NopCritSect;
809 LogFlow(("pdmR0DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
810 return pCritSect;
811}
812
813
814/** @interface_method_impl{PDMDEVHLPR0,pfnSetDeviceCritSect} */
815static DECLCALLBACK(int) pdmR0DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
816{
817 /*
818 * Validate input.
819 *
820 * Note! We only allow the automatically created default critical section
821 * to be replaced by this API.
822 */
823 PDMDEV_ASSERT_DEVINS(pDevIns);
824 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
825 LogFlow(("pdmR0DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
826 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
827 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
828 PGVM pGVM = pDevIns->Internal.s.pGVM;
829 AssertReturn(pCritSect->s.pVMR0 == pGVM, VERR_INVALID_PARAMETER);
830
831 VM_ASSERT_EMT(pGVM);
832 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
833
834 /*
835 * Check that ring-3 has already done this, then effect the change.
836 */
837 AssertReturn(pDevIns->pDevInsForR3R0->Internal.s.fIntFlags & PDMDEVINSINT_FLAGS_CHANGED_CRITSECT, VERR_WRONG_ORDER);
838 pDevIns->pCritSectRoR0 = pCritSect;
839
840 LogFlow(("pdmR0DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
841 return VINF_SUCCESS;
842}
843
844
845/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectEnter} */
846static DECLCALLBACK(int) pdmR0DevHlp_CritSectEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy)
847{
848 PDMDEV_ASSERT_DEVINS(pDevIns);
849 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
850 return PDMCritSectEnter(pCritSect, rcBusy);
851}
852
853
854/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectEnterDebug} */
855static DECLCALLBACK(int) pdmR0DevHlp_CritSectEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL)
856{
857 PDMDEV_ASSERT_DEVINS(pDevIns);
858 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
859 return PDMCritSectEnterDebug(pCritSect, rcBusy, uId, RT_SRC_POS_ARGS);
860}
861
862
863/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectTryEnter} */
864static DECLCALLBACK(int) pdmR0DevHlp_CritSectTryEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
865{
866 PDMDEV_ASSERT_DEVINS(pDevIns);
867 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
868 return PDMCritSectTryEnter(pCritSect);
869}
870
871
872/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectTryEnterDebug} */
873static DECLCALLBACK(int) pdmR0DevHlp_CritSectTryEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL)
874{
875 PDMDEV_ASSERT_DEVINS(pDevIns);
876 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
877 return PDMCritSectTryEnterDebug(pCritSect, uId, RT_SRC_POS_ARGS);
878}
879
880
881/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectLeave} */
882static DECLCALLBACK(int) pdmR0DevHlp_CritSectLeave(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
883{
884 PDMDEV_ASSERT_DEVINS(pDevIns);
885 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
886 return PDMCritSectLeave(pCritSect);
887}
888
889
890/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectIsOwner} */
891static DECLCALLBACK(bool) pdmR0DevHlp_CritSectIsOwner(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
892{
893 PDMDEV_ASSERT_DEVINS(pDevIns);
894 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
895 return PDMCritSectIsOwner(pCritSect);
896}
897
898
899/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectIsInitialized} */
900static DECLCALLBACK(bool) pdmR0DevHlp_CritSectIsInitialized(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
901{
902 PDMDEV_ASSERT_DEVINS(pDevIns);
903 RT_NOREF(pDevIns);
904 return PDMCritSectIsInitialized(pCritSect);
905}
906
907
908/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectHasWaiters} */
909static DECLCALLBACK(bool) pdmR0DevHlp_CritSectHasWaiters(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
910{
911 PDMDEV_ASSERT_DEVINS(pDevIns);
912 RT_NOREF(pDevIns);
913 return PDMCritSectHasWaiters(pCritSect);
914}
915
916
917/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectGetRecursion} */
918static DECLCALLBACK(uint32_t) pdmR0DevHlp_CritSectGetRecursion(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
919{
920 PDMDEV_ASSERT_DEVINS(pDevIns);
921 RT_NOREF(pDevIns);
922 return PDMCritSectGetRecursion(pCritSect);
923}
924
925
926/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectScheduleExitEvent} */
927static DECLCALLBACK(int) pdmR0DevHlp_CritSectScheduleExitEvent(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect,
928 SUPSEMEVENT hEventToSignal)
929{
930 PDMDEV_ASSERT_DEVINS(pDevIns);
931 RT_NOREF(pDevIns);
932 return PDMHCCritSectScheduleExitEvent(pCritSect, hEventToSignal);
933}
934
935
936/** @interface_method_impl{PDMDEVHLPR0,pfnDBGFTraceBuf} */
937static DECLCALLBACK(RTTRACEBUF) pdmR0DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
938{
939 PDMDEV_ASSERT_DEVINS(pDevIns);
940 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pGVM->hTraceBufR0;
941 LogFlow(("pdmR0DevHlp_DBGFTraceBuf: caller='%p'/%d: returns %p\n", pDevIns, pDevIns->iInstance, hTraceBuf));
942 return hTraceBuf;
943}
944
945
946/** @interface_method_impl{PDMDEVHLPR0,pfnPCIBusSetUpContext} */
947static DECLCALLBACK(int) pdmR0DevHlp_PCIBusSetUpContext(PPDMDEVINS pDevIns, PPDMPCIBUSREGR0 pPciBusReg, PCPDMPCIHLPR0 *ppPciHlp)
948{
949 PDMDEV_ASSERT_DEVINS(pDevIns);
950 LogFlow(("pdmR0DevHlp_PCIBusSetUpContext: caller='%p'/%d: pPciBusReg=%p{.u32Version=%#x, .iBus=%#u, .pfnSetIrq=%p, u32EnvVersion=%#x} ppPciHlp=%p\n",
951 pDevIns, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->iBus, pPciBusReg->pfnSetIrq,
952 pPciBusReg->u32EndVersion, ppPciHlp));
953 PGVM pGVM = pDevIns->Internal.s.pGVM;
954
955 /*
956 * Validate input.
957 */
958 AssertPtrReturn(pPciBusReg, VERR_INVALID_POINTER);
959 AssertLogRelMsgReturn(pPciBusReg->u32Version == PDM_PCIBUSREGCC_VERSION,
960 ("%#x vs %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREGCC_VERSION), VERR_VERSION_MISMATCH);
961 AssertPtrReturn(pPciBusReg->pfnSetIrq, VERR_INVALID_POINTER);
962 AssertLogRelMsgReturn(pPciBusReg->u32EndVersion == PDM_PCIBUSREGCC_VERSION,
963 ("%#x vs %#x\n", pPciBusReg->u32EndVersion, PDM_PCIBUSREGCC_VERSION), VERR_VERSION_MISMATCH);
964
965 AssertPtrReturn(ppPciHlp, VERR_INVALID_POINTER);
966
967 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
968 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
969
970 /* Check the shared bus data (registered earlier from ring-3): */
971 uint32_t iBus = pPciBusReg->iBus;
972 ASMCompilerBarrier();
973 AssertLogRelMsgReturn(iBus < RT_ELEMENTS(pGVM->pdm.s.aPciBuses), ("iBus=%#x\n", iBus), VERR_OUT_OF_RANGE);
974 PPDMPCIBUS pPciBusShared = &pGVM->pdm.s.aPciBuses[iBus];
975 AssertLogRelMsgReturn(pPciBusShared->iBus == iBus, ("%u vs %u\n", pPciBusShared->iBus, iBus), VERR_INVALID_PARAMETER);
976 AssertLogRelMsgReturn(pPciBusShared->pDevInsR3 == pDevIns->pDevInsForR3,
977 ("%p vs %p (iBus=%u)\n", pPciBusShared->pDevInsR3, pDevIns->pDevInsForR3, iBus), VERR_NOT_OWNER);
978
979 /* Check that the bus isn't already registered in ring-0: */
980 AssertCompile(RT_ELEMENTS(pGVM->pdm.s.aPciBuses) == RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses));
981 PPDMPCIBUSR0 pPciBusR0 = &pGVM->pdmr0.s.aPciBuses[iBus];
982 AssertLogRelMsgReturn(pPciBusR0->pDevInsR0 == NULL,
983 ("%p (caller pDevIns=%p, iBus=%u)\n", pPciBusR0->pDevInsR0, pDevIns, iBus),
984 VERR_ALREADY_EXISTS);
985
986 /*
987 * Do the registering.
988 */
989 pPciBusR0->iBus = iBus;
990 pPciBusR0->uPadding0 = 0xbeefbeef;
991 pPciBusR0->pfnSetIrqR0 = pPciBusReg->pfnSetIrq;
992 pPciBusR0->pDevInsR0 = pDevIns;
993
994 *ppPciHlp = &g_pdmR0PciHlp;
995
996 LogFlow(("pdmR0DevHlp_PCIBusSetUpContext: caller='%p'/%d: returns VINF_SUCCESS\n", pDevIns, pDevIns->iInstance));
997 return VINF_SUCCESS;
998}
999
1000
1001/** @interface_method_impl{PDMDEVHLPR0,pfnIommuSetUpContext} */
1002static DECLCALLBACK(int) pdmR0DevHlp_IommuSetUpContext(PPDMDEVINS pDevIns, PPDMIOMMUREGR0 pIommuReg, PCPDMIOMMUHLPR0 *ppIommuHlp)
1003{
1004 PDMDEV_ASSERT_DEVINS(pDevIns);
1005 LogFlow(("pdmR0DevHlp_IommuSetUpContext: caller='%p'/%d: pIommuReg=%p{.u32Version=%#x, u32TheEnd=%#x} ppIommuHlp=%p\n",
1006 pDevIns, pDevIns->iInstance, pIommuReg, pIommuReg->u32Version, pIommuReg->u32TheEnd, ppIommuHlp));
1007 PGVM pGVM = pDevIns->Internal.s.pGVM;
1008
1009 /*
1010 * Validate input.
1011 */
1012 AssertPtrReturn(pIommuReg, VERR_INVALID_POINTER);
1013 AssertLogRelMsgReturn(pIommuReg->u32Version == PDM_IOMMUREGCC_VERSION,
1014 ("%#x vs %#x\n", pIommuReg->u32Version, PDM_IOMMUREGCC_VERSION), VERR_VERSION_MISMATCH);
1015 AssertPtrReturn(pIommuReg->pfnMemAccess, VERR_INVALID_POINTER);
1016 AssertPtrReturn(pIommuReg->pfnMemBulkAccess, VERR_INVALID_POINTER);
1017 AssertPtrReturn(pIommuReg->pfnMsiRemap, VERR_INVALID_POINTER);
1018 AssertLogRelMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREGCC_VERSION,
1019 ("%#x vs %#x\n", pIommuReg->u32TheEnd, PDM_IOMMUREGCC_VERSION), VERR_VERSION_MISMATCH);
1020
1021 AssertPtrReturn(ppIommuHlp, VERR_INVALID_POINTER);
1022
1023 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1024 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1025
1026 /* Check the IOMMU shared data (registered earlier from ring-3). */
1027 uint32_t const idxIommu = pIommuReg->idxIommu;
1028 ASMCompilerBarrier();
1029 AssertLogRelMsgReturn(idxIommu < RT_ELEMENTS(pGVM->pdm.s.aIommus), ("idxIommu=%#x\n", idxIommu), VERR_OUT_OF_RANGE);
1030 PPDMIOMMUR3 pIommuShared = &pGVM->pdm.s.aIommus[idxIommu];
1031 AssertLogRelMsgReturn(pIommuShared->idxIommu == idxIommu, ("%u vs %u\n", pIommuShared->idxIommu, idxIommu), VERR_INVALID_PARAMETER);
1032 AssertLogRelMsgReturn(pIommuShared->pDevInsR3 == pDevIns->pDevInsForR3,
1033 ("%p vs %p (idxIommu=%u)\n", pIommuShared->pDevInsR3, pDevIns->pDevInsForR3, idxIommu), VERR_NOT_OWNER);
1034
1035 /* Check that the IOMMU isn't already registered in ring-0. */
1036 AssertCompile(RT_ELEMENTS(pGVM->pdm.s.aIommus) == RT_ELEMENTS(pGVM->pdmr0.s.aIommus));
1037 PPDMIOMMUR0 pIommuR0 = &pGVM->pdmr0.s.aIommus[idxIommu];
1038 AssertLogRelMsgReturn(pIommuR0->pDevInsR0 == NULL,
1039 ("%p (caller pDevIns=%p, idxIommu=%u)\n", pIommuR0->pDevInsR0, pDevIns, idxIommu),
1040 VERR_ALREADY_EXISTS);
1041
1042 /*
1043 * Register.
1044 */
1045 pIommuR0->idxIommu = idxIommu;
1046 pIommuR0->uPadding0 = 0xdeaddead;
1047 pIommuR0->pDevInsR0 = pDevIns;
1048 pIommuR0->pfnMemAccess = pIommuReg->pfnMemAccess;
1049 pIommuR0->pfnMemBulkAccess = pIommuReg->pfnMemBulkAccess;
1050 pIommuR0->pfnMsiRemap = pIommuReg->pfnMsiRemap;
1051
1052 *ppIommuHlp = &g_pdmR0IommuHlp;
1053
1054 LogFlow(("pdmR0DevHlp_IommuSetUpContext: caller='%p'/%d: returns VINF_SUCCESS\n", pDevIns, pDevIns->iInstance));
1055 return VINF_SUCCESS;
1056}
1057
1058
1059/** @interface_method_impl{PDMDEVHLPR0,pfnPICSetUpContext} */
1060static DECLCALLBACK(int) pdmR0DevHlp_PICSetUpContext(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLP *ppPicHlp)
1061{
1062 PDMDEV_ASSERT_DEVINS(pDevIns);
1063 LogFlow(("pdmR0DevHlp_PICSetUpContext: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrq=%p, .pfnGetInterrupt=%p, .u32TheEnd=%#x } ppPicHlp=%p\n",
1064 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrq, pPicReg->pfnGetInterrupt, pPicReg->u32TheEnd, ppPicHlp));
1065 PGVM pGVM = pDevIns->Internal.s.pGVM;
1066
1067 /*
1068 * Validate input.
1069 */
1070 AssertMsgReturn(pPicReg->u32Version == PDM_PICREG_VERSION,
1071 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pPicReg->u32Version, PDM_PICREG_VERSION),
1072 VERR_VERSION_MISMATCH);
1073 AssertPtrReturn(pPicReg->pfnSetIrq, VERR_INVALID_POINTER);
1074 AssertPtrReturn(pPicReg->pfnGetInterrupt, VERR_INVALID_POINTER);
1075 AssertMsgReturn(pPicReg->u32TheEnd == PDM_PICREG_VERSION,
1076 ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pPicReg->u32TheEnd, PDM_PICREG_VERSION),
1077 VERR_VERSION_MISMATCH);
1078 AssertPtrReturn(ppPicHlp, VERR_INVALID_POINTER);
1079
1080 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1081 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1082
1083 /* Check that it's the same device as made the ring-3 registrations: */
1084 AssertLogRelMsgReturn(pGVM->pdm.s.Pic.pDevInsR3 == pDevIns->pDevInsForR3,
1085 ("%p vs %p\n", pGVM->pdm.s.Pic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1086
1087 /* Check that it isn't already registered in ring-0: */
1088 AssertLogRelMsgReturn(pGVM->pdm.s.Pic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Pic.pDevInsR0, pDevIns),
1089 VERR_ALREADY_EXISTS);
1090
1091 /*
1092 * Take down the callbacks and instance.
1093 */
1094 pGVM->pdm.s.Pic.pDevInsR0 = pDevIns;
1095 pGVM->pdm.s.Pic.pfnSetIrqR0 = pPicReg->pfnSetIrq;
1096 pGVM->pdm.s.Pic.pfnGetInterruptR0 = pPicReg->pfnGetInterrupt;
1097 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1098
1099 /* set the helper pointer and return. */
1100 *ppPicHlp = &g_pdmR0PicHlp;
1101 LogFlow(("pdmR0DevHlp_PICSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1102 return VINF_SUCCESS;
1103}
1104
1105
1106/** @interface_method_impl{PDMDEVHLPR0,pfnApicSetUpContext} */
1107static DECLCALLBACK(int) pdmR0DevHlp_ApicSetUpContext(PPDMDEVINS pDevIns)
1108{
1109 PDMDEV_ASSERT_DEVINS(pDevIns);
1110 LogFlow(("pdmR0DevHlp_ApicSetUpContext: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1111 PGVM pGVM = pDevIns->Internal.s.pGVM;
1112
1113 /*
1114 * Validate input.
1115 */
1116 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1117 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1118
1119 /* Check that it's the same device as made the ring-3 registrations: */
1120 AssertLogRelMsgReturn(pGVM->pdm.s.Apic.pDevInsR3 == pDevIns->pDevInsForR3,
1121 ("%p vs %p\n", pGVM->pdm.s.Apic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1122
1123 /* Check that it isn't already registered in ring-0: */
1124 AssertLogRelMsgReturn(pGVM->pdm.s.Apic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Apic.pDevInsR0, pDevIns),
1125 VERR_ALREADY_EXISTS);
1126
1127 /*
1128 * Take down the instance.
1129 */
1130 pGVM->pdm.s.Apic.pDevInsR0 = pDevIns;
1131 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1132
1133 /* set the helper pointer and return. */
1134 LogFlow(("pdmR0DevHlp_ApicSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1135 return VINF_SUCCESS;
1136}
1137
1138
1139/** @interface_method_impl{PDMDEVHLPR0,pfnIoApicSetUpContext} */
1140static DECLCALLBACK(int) pdmR0DevHlp_IoApicSetUpContext(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLP *ppIoApicHlp)
1141{
1142 PDMDEV_ASSERT_DEVINS(pDevIns);
1143 LogFlow(("pdmR0DevHlp_IoApicSetUpContext: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrq=%p, .pfnSendMsi=%p, .pfnSetEoi=%p, .u32TheEnd=%#x } ppIoApicHlp=%p\n",
1144 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrq, pIoApicReg->pfnSendMsi, pIoApicReg->pfnSetEoi, pIoApicReg->u32TheEnd, ppIoApicHlp));
1145 PGVM pGVM = pDevIns->Internal.s.pGVM;
1146
1147 /*
1148 * Validate input.
1149 */
1150 AssertMsgReturn(pIoApicReg->u32Version == PDM_IOAPICREG_VERSION,
1151 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg->u32Version, PDM_IOAPICREG_VERSION),
1152 VERR_VERSION_MISMATCH);
1153 AssertPtrReturn(pIoApicReg->pfnSetIrq, VERR_INVALID_POINTER);
1154 AssertPtrReturn(pIoApicReg->pfnSendMsi, VERR_INVALID_POINTER);
1155 AssertPtrReturn(pIoApicReg->pfnSetEoi, VERR_INVALID_POINTER);
1156 AssertMsgReturn(pIoApicReg->u32TheEnd == PDM_IOAPICREG_VERSION,
1157 ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg->u32TheEnd, PDM_IOAPICREG_VERSION),
1158 VERR_VERSION_MISMATCH);
1159 AssertPtrReturn(ppIoApicHlp, VERR_INVALID_POINTER);
1160
1161 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1162 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1163
1164 /* Check that it's the same device as made the ring-3 registrations: */
1165 AssertLogRelMsgReturn(pGVM->pdm.s.IoApic.pDevInsR3 == pDevIns->pDevInsForR3,
1166 ("%p vs %p\n", pGVM->pdm.s.IoApic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1167
1168 /* Check that it isn't already registered in ring-0: */
1169 AssertLogRelMsgReturn(pGVM->pdm.s.IoApic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.IoApic.pDevInsR0, pDevIns),
1170 VERR_ALREADY_EXISTS);
1171
1172 /*
1173 * Take down the callbacks and instance.
1174 */
1175 pGVM->pdm.s.IoApic.pDevInsR0 = pDevIns;
1176 pGVM->pdm.s.IoApic.pfnSetIrqR0 = pIoApicReg->pfnSetIrq;
1177 pGVM->pdm.s.IoApic.pfnSendMsiR0 = pIoApicReg->pfnSendMsi;
1178 pGVM->pdm.s.IoApic.pfnSetEoiR0 = pIoApicReg->pfnSetEoi;
1179 Log(("PDM: Registered IOAPIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1180
1181 /* set the helper pointer and return. */
1182 *ppIoApicHlp = &g_pdmR0IoApicHlp;
1183 LogFlow(("pdmR0DevHlp_IoApicSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1184 return VINF_SUCCESS;
1185}
1186
1187
1188/** @interface_method_impl{PDMDEVHLPR0,pfnHpetSetUpContext} */
1189static DECLCALLBACK(int) pdmR0DevHlp_HpetSetUpContext(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR0 *ppHpetHlp)
1190{
1191 PDMDEV_ASSERT_DEVINS(pDevIns);
1192 LogFlow(("pdmR0DevHlp_HpetSetUpContext: caller='%s'/%d: pHpetReg=%p:{.u32Version=%#x, } ppHpetHlp=%p\n",
1193 pDevIns->pReg->szName, pDevIns->iInstance, pHpetReg, pHpetReg->u32Version, ppHpetHlp));
1194 PGVM pGVM = pDevIns->Internal.s.pGVM;
1195
1196 /*
1197 * Validate input.
1198 */
1199 AssertMsgReturn(pHpetReg->u32Version == PDM_HPETREG_VERSION,
1200 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pHpetReg->u32Version, PDM_HPETREG_VERSION),
1201 VERR_VERSION_MISMATCH);
1202 AssertPtrReturn(ppHpetHlp, VERR_INVALID_POINTER);
1203
1204 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1205 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1206
1207 /* Check that it's the same device as made the ring-3 registrations: */
1208 AssertLogRelMsgReturn(pGVM->pdm.s.pHpet == pDevIns->pDevInsForR3, ("%p vs %p\n", pGVM->pdm.s.pHpet, pDevIns->pDevInsForR3),
1209 VERR_NOT_OWNER);
1210
1211 ///* Check that it isn't already registered in ring-0: */
1212 //AssertLogRelMsgReturn(pGVM->pdm.s.Hpet.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Hpet.pDevInsR0, pDevIns),
1213 // VERR_ALREADY_EXISTS);
1214
1215 /*
1216 * Nothing to take down here at present.
1217 */
1218 Log(("PDM: Registered HPET device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1219
1220 /* set the helper pointer and return. */
1221 *ppHpetHlp = &g_pdmR0HpetHlp;
1222 LogFlow(("pdmR0DevHlp_HpetSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1223 return VINF_SUCCESS;
1224}
1225
1226
1227/**
1228 * The Ring-0 Device Helper Callbacks.
1229 */
1230extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp =
1231{
1232 PDM_DEVHLPR0_VERSION,
1233 pdmR0DevHlp_IoPortSetUpContextEx,
1234 pdmR0DevHlp_MmioSetUpContextEx,
1235 pdmR0DevHlp_Mmio2SetUpContext,
1236 pdmR0DevHlp_PCIPhysRead,
1237 pdmR0DevHlp_PCIPhysWrite,
1238 pdmR0DevHlp_PCISetIrq,
1239 pdmR0DevHlp_ISASetIrq,
1240 pdmR0DevHlp_PhysRead,
1241 pdmR0DevHlp_PhysWrite,
1242 pdmR0DevHlp_A20IsEnabled,
1243 pdmR0DevHlp_VMState,
1244 pdmR0DevHlp_VMSetError,
1245 pdmR0DevHlp_VMSetErrorV,
1246 pdmR0DevHlp_VMSetRuntimeError,
1247 pdmR0DevHlp_VMSetRuntimeErrorV,
1248 pdmR0DevHlp_GetVM,
1249 pdmR0DevHlp_GetVMCPU,
1250 pdmR0DevHlp_GetCurrentCpuId,
1251 pdmR0DevHlp_TimerToPtr,
1252 pdmR0DevHlp_TimerFromMicro,
1253 pdmR0DevHlp_TimerFromMilli,
1254 pdmR0DevHlp_TimerFromNano,
1255 pdmR0DevHlp_TimerGet,
1256 pdmR0DevHlp_TimerGetFreq,
1257 pdmR0DevHlp_TimerGetNano,
1258 pdmR0DevHlp_TimerIsActive,
1259 pdmR0DevHlp_TimerIsLockOwner,
1260 pdmR0DevHlp_TimerLockClock,
1261 pdmR0DevHlp_TimerLockClock2,
1262 pdmR0DevHlp_TimerSet,
1263 pdmR0DevHlp_TimerSetFrequencyHint,
1264 pdmR0DevHlp_TimerSetMicro,
1265 pdmR0DevHlp_TimerSetMillies,
1266 pdmR0DevHlp_TimerSetNano,
1267 pdmR0DevHlp_TimerSetRelative,
1268 pdmR0DevHlp_TimerStop,
1269 pdmR0DevHlp_TimerUnlockClock,
1270 pdmR0DevHlp_TimerUnlockClock2,
1271 pdmR0DevHlp_TMTimeVirtGet,
1272 pdmR0DevHlp_TMTimeVirtGetFreq,
1273 pdmR0DevHlp_TMTimeVirtGetNano,
1274 pdmR0DevHlp_QueueToPtr,
1275 pdmR0DevHlp_QueueAlloc,
1276 pdmR0DevHlp_QueueInsert,
1277 pdmR0DevHlp_QueueInsertEx,
1278 pdmR0DevHlp_QueueFlushIfNecessary,
1279 pdmR0DevHlp_TaskTrigger,
1280 pdmR0DevHlp_SUPSemEventSignal,
1281 pdmR0DevHlp_SUPSemEventWaitNoResume,
1282 pdmR0DevHlp_SUPSemEventWaitNsAbsIntr,
1283 pdmR0DevHlp_SUPSemEventWaitNsRelIntr,
1284 pdmR0DevHlp_SUPSemEventGetResolution,
1285 pdmR0DevHlp_SUPSemEventMultiSignal,
1286 pdmR0DevHlp_SUPSemEventMultiReset,
1287 pdmR0DevHlp_SUPSemEventMultiWaitNoResume,
1288 pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr,
1289 pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr,
1290 pdmR0DevHlp_SUPSemEventMultiGetResolution,
1291 pdmR0DevHlp_CritSectGetNop,
1292 pdmR0DevHlp_SetDeviceCritSect,
1293 pdmR0DevHlp_CritSectEnter,
1294 pdmR0DevHlp_CritSectEnterDebug,
1295 pdmR0DevHlp_CritSectTryEnter,
1296 pdmR0DevHlp_CritSectTryEnterDebug,
1297 pdmR0DevHlp_CritSectLeave,
1298 pdmR0DevHlp_CritSectIsOwner,
1299 pdmR0DevHlp_CritSectIsInitialized,
1300 pdmR0DevHlp_CritSectHasWaiters,
1301 pdmR0DevHlp_CritSectGetRecursion,
1302 pdmR0DevHlp_CritSectScheduleExitEvent,
1303 pdmR0DevHlp_DBGFTraceBuf,
1304 pdmR0DevHlp_PCIBusSetUpContext,
1305 pdmR0DevHlp_IommuSetUpContext,
1306 pdmR0DevHlp_PICSetUpContext,
1307 pdmR0DevHlp_ApicSetUpContext,
1308 pdmR0DevHlp_IoApicSetUpContext,
1309 pdmR0DevHlp_HpetSetUpContext,
1310 NULL /*pfnReserved1*/,
1311 NULL /*pfnReserved2*/,
1312 NULL /*pfnReserved3*/,
1313 NULL /*pfnReserved4*/,
1314 NULL /*pfnReserved5*/,
1315 NULL /*pfnReserved6*/,
1316 NULL /*pfnReserved7*/,
1317 NULL /*pfnReserved8*/,
1318 NULL /*pfnReserved9*/,
1319 NULL /*pfnReserved10*/,
1320 PDM_DEVHLPR0_VERSION
1321};
1322
1323
1324#ifdef VBOX_WITH_DBGF_TRACING
1325/**
1326 * The Ring-0 Device Helper Callbacks - tracing variant.
1327 */
1328extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlpTracing =
1329{
1330 PDM_DEVHLPR0_VERSION,
1331 pdmR0DevHlpTracing_IoPortSetUpContextEx,
1332 pdmR0DevHlpTracing_MmioSetUpContextEx,
1333 pdmR0DevHlp_Mmio2SetUpContext,
1334 pdmR0DevHlpTracing_PCIPhysRead,
1335 pdmR0DevHlpTracing_PCIPhysWrite,
1336 pdmR0DevHlpTracing_PCISetIrq,
1337 pdmR0DevHlpTracing_ISASetIrq,
1338 pdmR0DevHlp_PhysRead,
1339 pdmR0DevHlp_PhysWrite,
1340 pdmR0DevHlp_A20IsEnabled,
1341 pdmR0DevHlp_VMState,
1342 pdmR0DevHlp_VMSetError,
1343 pdmR0DevHlp_VMSetErrorV,
1344 pdmR0DevHlp_VMSetRuntimeError,
1345 pdmR0DevHlp_VMSetRuntimeErrorV,
1346 pdmR0DevHlp_GetVM,
1347 pdmR0DevHlp_GetVMCPU,
1348 pdmR0DevHlp_GetCurrentCpuId,
1349 pdmR0DevHlp_TimerToPtr,
1350 pdmR0DevHlp_TimerFromMicro,
1351 pdmR0DevHlp_TimerFromMilli,
1352 pdmR0DevHlp_TimerFromNano,
1353 pdmR0DevHlp_TimerGet,
1354 pdmR0DevHlp_TimerGetFreq,
1355 pdmR0DevHlp_TimerGetNano,
1356 pdmR0DevHlp_TimerIsActive,
1357 pdmR0DevHlp_TimerIsLockOwner,
1358 pdmR0DevHlp_TimerLockClock,
1359 pdmR0DevHlp_TimerLockClock2,
1360 pdmR0DevHlp_TimerSet,
1361 pdmR0DevHlp_TimerSetFrequencyHint,
1362 pdmR0DevHlp_TimerSetMicro,
1363 pdmR0DevHlp_TimerSetMillies,
1364 pdmR0DevHlp_TimerSetNano,
1365 pdmR0DevHlp_TimerSetRelative,
1366 pdmR0DevHlp_TimerStop,
1367 pdmR0DevHlp_TimerUnlockClock,
1368 pdmR0DevHlp_TimerUnlockClock2,
1369 pdmR0DevHlp_TMTimeVirtGet,
1370 pdmR0DevHlp_TMTimeVirtGetFreq,
1371 pdmR0DevHlp_TMTimeVirtGetNano,
1372 pdmR0DevHlp_QueueToPtr,
1373 pdmR0DevHlp_QueueAlloc,
1374 pdmR0DevHlp_QueueInsert,
1375 pdmR0DevHlp_QueueInsertEx,
1376 pdmR0DevHlp_QueueFlushIfNecessary,
1377 pdmR0DevHlp_TaskTrigger,
1378 pdmR0DevHlp_SUPSemEventSignal,
1379 pdmR0DevHlp_SUPSemEventWaitNoResume,
1380 pdmR0DevHlp_SUPSemEventWaitNsAbsIntr,
1381 pdmR0DevHlp_SUPSemEventWaitNsRelIntr,
1382 pdmR0DevHlp_SUPSemEventGetResolution,
1383 pdmR0DevHlp_SUPSemEventMultiSignal,
1384 pdmR0DevHlp_SUPSemEventMultiReset,
1385 pdmR0DevHlp_SUPSemEventMultiWaitNoResume,
1386 pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr,
1387 pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr,
1388 pdmR0DevHlp_SUPSemEventMultiGetResolution,
1389 pdmR0DevHlp_CritSectGetNop,
1390 pdmR0DevHlp_SetDeviceCritSect,
1391 pdmR0DevHlp_CritSectEnter,
1392 pdmR0DevHlp_CritSectEnterDebug,
1393 pdmR0DevHlp_CritSectTryEnter,
1394 pdmR0DevHlp_CritSectTryEnterDebug,
1395 pdmR0DevHlp_CritSectLeave,
1396 pdmR0DevHlp_CritSectIsOwner,
1397 pdmR0DevHlp_CritSectIsInitialized,
1398 pdmR0DevHlp_CritSectHasWaiters,
1399 pdmR0DevHlp_CritSectGetRecursion,
1400 pdmR0DevHlp_CritSectScheduleExitEvent,
1401 pdmR0DevHlp_DBGFTraceBuf,
1402 pdmR0DevHlp_PCIBusSetUpContext,
1403 pdmR0DevHlp_IommuSetUpContext,
1404 pdmR0DevHlp_PICSetUpContext,
1405 pdmR0DevHlp_ApicSetUpContext,
1406 pdmR0DevHlp_IoApicSetUpContext,
1407 pdmR0DevHlp_HpetSetUpContext,
1408 NULL /*pfnReserved1*/,
1409 NULL /*pfnReserved2*/,
1410 NULL /*pfnReserved3*/,
1411 NULL /*pfnReserved4*/,
1412 NULL /*pfnReserved5*/,
1413 NULL /*pfnReserved6*/,
1414 NULL /*pfnReserved7*/,
1415 NULL /*pfnReserved8*/,
1416 NULL /*pfnReserved9*/,
1417 NULL /*pfnReserved10*/,
1418 PDM_DEVHLPR0_VERSION
1419};
1420#endif
1421
1422
1423/** @} */
1424
1425
1426/** @name PIC Ring-0 Helpers
1427 * @{
1428 */
1429
1430/** @interface_method_impl{PDMPICHLP,pfnSetInterruptFF} */
1431static DECLCALLBACK(void) pdmR0PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
1432{
1433 PDMDEV_ASSERT_DEVINS(pDevIns);
1434 PGVM pGVM = (PGVM)pDevIns->Internal.s.pGVM;
1435 PVMCPUCC pVCpu = &pGVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
1436 /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
1437 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 1 /* u8Level */, VINF_SUCCESS /* rcRZ */);
1438}
1439
1440
1441/** @interface_method_impl{PDMPICHLP,pfnClearInterruptFF} */
1442static DECLCALLBACK(void) pdmR0PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
1443{
1444 PDMDEV_ASSERT_DEVINS(pDevIns);
1445 PGVM pGVM = (PGVM)pDevIns->Internal.s.pGVM;
1446 PVMCPUCC pVCpu = &pGVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
1447 /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
1448 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 0 /* u8Level */, VINF_SUCCESS /* rcRZ */);
1449}
1450
1451
1452/** @interface_method_impl{PDMPICHLP,pfnLock} */
1453static DECLCALLBACK(int) pdmR0PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
1454{
1455 PDMDEV_ASSERT_DEVINS(pDevIns);
1456 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1457}
1458
1459
1460/** @interface_method_impl{PDMPICHLP,pfnUnlock} */
1461static DECLCALLBACK(void) pdmR0PicHlp_Unlock(PPDMDEVINS pDevIns)
1462{
1463 PDMDEV_ASSERT_DEVINS(pDevIns);
1464 pdmUnlock(pDevIns->Internal.s.pGVM);
1465}
1466
1467
1468/**
1469 * The Ring-0 PIC Helper Callbacks.
1470 */
1471extern DECLEXPORT(const PDMPICHLP) g_pdmR0PicHlp =
1472{
1473 PDM_PICHLP_VERSION,
1474 pdmR0PicHlp_SetInterruptFF,
1475 pdmR0PicHlp_ClearInterruptFF,
1476 pdmR0PicHlp_Lock,
1477 pdmR0PicHlp_Unlock,
1478 PDM_PICHLP_VERSION
1479};
1480
1481/** @} */
1482
1483
1484/** @name I/O APIC Ring-0 Helpers
1485 * @{
1486 */
1487
1488/** @interface_method_impl{PDMIOAPICHLP,pfnApicBusDeliver} */
1489static DECLCALLBACK(int) pdmR0IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
1490 uint8_t u8DeliveryMode, uint8_t uVector, uint8_t u8Polarity,
1491 uint8_t u8TriggerMode, uint32_t uTagSrc)
1492{
1493 PDMDEV_ASSERT_DEVINS(pDevIns);
1494 PGVM pGVM = pDevIns->Internal.s.pGVM;
1495 LogFlow(("pdmR0IoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 uVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
1496 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc));
1497 return APICBusDeliver(pGVM, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc);
1498}
1499
1500
1501/** @interface_method_impl{PDMIOAPICHLP,pfnLock} */
1502static DECLCALLBACK(int) pdmR0IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
1503{
1504 PDMDEV_ASSERT_DEVINS(pDevIns);
1505 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1506}
1507
1508
1509/** @interface_method_impl{PDMIOAPICHLP,pfnUnlock} */
1510static DECLCALLBACK(void) pdmR0IoApicHlp_Unlock(PPDMDEVINS pDevIns)
1511{
1512 PDMDEV_ASSERT_DEVINS(pDevIns);
1513 pdmUnlock(pDevIns->Internal.s.pGVM);
1514}
1515
1516
1517/** @interface_method_impl{PDMIOAPICHLP,pfnIommuMsiRemap} */
1518static DECLCALLBACK(int) pdmR0IoApicHlp_IommuMsiRemap(PPDMDEVINS pDevIns, uint16_t uDeviceId, PCMSIMSG pMsiIn, PMSIMSG pMsiOut)
1519{
1520 PDMDEV_ASSERT_DEVINS(pDevIns);
1521 LogFlow(("pdmR0IoApicHlp_IommuMsiRemap: caller='%s'/%d: pMsiIn=(%#RX64, %#RU32)\n", pDevIns->pReg->szName,
1522 pDevIns->iInstance, pMsiIn->Addr.u64, pMsiIn->Data.u32));
1523
1524#ifdef VBOX_WITH_IOMMU_AMD
1525 int rc = pdmIommuMsiRemap(pDevIns, uDeviceId, pMsiIn, pMsiOut);
1526 if (RT_SUCCESS(rc) || rc != VERR_IOMMU_NOT_PRESENT)
1527 return rc;
1528#else
1529 RT_NOREF(pDevIns, uDeviceId);
1530#endif
1531
1532 *pMsiOut = *pMsiIn;
1533 return VINF_SUCCESS;
1534}
1535
1536
1537/**
1538 * The Ring-0 I/O APIC Helper Callbacks.
1539 */
1540extern DECLEXPORT(const PDMIOAPICHLP) g_pdmR0IoApicHlp =
1541{
1542 PDM_IOAPICHLP_VERSION,
1543 pdmR0IoApicHlp_ApicBusDeliver,
1544 pdmR0IoApicHlp_Lock,
1545 pdmR0IoApicHlp_Unlock,
1546 pdmR0IoApicHlp_IommuMsiRemap,
1547 PDM_IOAPICHLP_VERSION
1548};
1549
1550/** @} */
1551
1552
1553
1554
1555/** @name PCI Bus Ring-0 Helpers
1556 * @{
1557 */
1558
1559/** @interface_method_impl{PDMPCIHLPR0,pfnIsaSetIrq} */
1560static DECLCALLBACK(void) pdmR0PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
1561{
1562 PDMDEV_ASSERT_DEVINS(pDevIns);
1563 Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
1564 PGVM pGVM = pDevIns->Internal.s.pGVM;
1565
1566 pdmLock(pGVM);
1567 pdmR0IsaSetIrq(pGVM, iIrq, iLevel, uTagSrc);
1568 pdmUnlock(pGVM);
1569}
1570
1571
1572/** @interface_method_impl{PDMPCIHLPR0,pfnIoApicSetIrq} */
1573static DECLCALLBACK(void) pdmR0PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, int iIrq, int iLevel, uint32_t uTagSrc)
1574{
1575 PDMDEV_ASSERT_DEVINS(pDevIns);
1576 Log4(("pdmR0PciHlp_IoApicSetIrq: uBusDevFn=%#x iIrq=%d iLevel=%d uTagSrc=%#x\n", uBusDevFn, iIrq, iLevel, uTagSrc));
1577 PGVM pGVM = pDevIns->Internal.s.pGVM;
1578
1579 if (pGVM->pdm.s.IoApic.pDevInsR0)
1580 pGVM->pdm.s.IoApic.pfnSetIrqR0(pGVM->pdm.s.IoApic.pDevInsR0, uBusDevFn, iIrq, iLevel, uTagSrc);
1581 else if (pGVM->pdm.s.IoApic.pDevInsR3)
1582 {
1583 /* queue for ring-3 execution. */
1584 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
1585 if (pTask)
1586 {
1587 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
1588 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
1589 pTask->u.IoApicSetIRQ.uBusDevFn = uBusDevFn;
1590 pTask->u.IoApicSetIRQ.iIrq = iIrq;
1591 pTask->u.IoApicSetIRQ.iLevel = iLevel;
1592 pTask->u.IoApicSetIRQ.uTagSrc = uTagSrc;
1593
1594 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
1595 }
1596 else
1597 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
1598 }
1599}
1600
1601
1602/** @interface_method_impl{PDMPCIHLPR0,pfnIoApicSendMsi} */
1603static DECLCALLBACK(void) pdmR0PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc)
1604{
1605 PDMDEV_ASSERT_DEVINS(pDevIns);
1606 Assert(PCIBDF_IS_VALID(uBusDevFn));
1607 Log4(("pdmR0PciHlp_IoApicSendMsi: uBusDevFn=%#x Msi=(Addr:%#RX64 Data:%#RX32) uTagSrc=%#x\n", uBusDevFn, pMsi->Addr.u64,
1608 pMsi->Data.u32, uTagSrc));
1609 PGVM pGVM = pDevIns->Internal.s.pGVM;
1610 if (pGVM->pdm.s.IoApic.pDevInsR0)
1611 pGVM->pdm.s.IoApic.pfnSendMsiR0(pGVM->pdm.s.IoApic.pDevInsR0, uBusDevFn, pMsi, uTagSrc);
1612 else
1613 AssertFatalMsgFailed(("Lazy bastards!"));
1614}
1615
1616
1617/** @interface_method_impl{PDMPCIHLPR0,pfnLock} */
1618static DECLCALLBACK(int) pdmR0PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
1619{
1620 PDMDEV_ASSERT_DEVINS(pDevIns);
1621 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1622}
1623
1624
1625/** @interface_method_impl{PDMPCIHLPR0,pfnUnlock} */
1626static DECLCALLBACK(void) pdmR0PciHlp_Unlock(PPDMDEVINS pDevIns)
1627{
1628 PDMDEV_ASSERT_DEVINS(pDevIns);
1629 pdmUnlock(pDevIns->Internal.s.pGVM);
1630}
1631
1632
1633/** @interface_method_impl{PDMPCIHLPR0,pfnGetBusByNo} */
1634static DECLCALLBACK(PPDMDEVINS) pdmR0PciHlp_GetBusByNo(PPDMDEVINS pDevIns, uint32_t idxPdmBus)
1635{
1636 PDMDEV_ASSERT_DEVINS(pDevIns);
1637 PGVM pGVM = pDevIns->Internal.s.pGVM;
1638 AssertReturn(idxPdmBus < RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses), NULL);
1639 PPDMDEVINS pRetDevIns = pGVM->pdmr0.s.aPciBuses[idxPdmBus].pDevInsR0;
1640 LogFlow(("pdmR3PciHlp_GetBusByNo: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pRetDevIns));
1641 return pRetDevIns;
1642}
1643
1644
1645/**
1646 * The Ring-0 PCI Bus Helper Callbacks.
1647 */
1648extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp =
1649{
1650 PDM_PCIHLPR0_VERSION,
1651 pdmR0PciHlp_IsaSetIrq,
1652 pdmR0PciHlp_IoApicSetIrq,
1653 pdmR0PciHlp_IoApicSendMsi,
1654 pdmR0PciHlp_Lock,
1655 pdmR0PciHlp_Unlock,
1656 pdmR0PciHlp_GetBusByNo,
1657 PDM_PCIHLPR0_VERSION, /* the end */
1658};
1659
1660/** @} */
1661
1662
1663/** @name IOMMU Ring-0 Helpers
1664 * @{
1665 */
1666
1667/** @interface_method_impl{PDMIOMMUHLPR0,pfnLock} */
1668static DECLCALLBACK(int) pdmR0IommuHlp_Lock(PPDMDEVINS pDevIns, int rc)
1669{
1670 PDMDEV_ASSERT_DEVINS(pDevIns);
1671 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1672}
1673
1674
1675/** @interface_method_impl{PDMIOMMUHLPR0,pfnUnlock} */
1676static DECLCALLBACK(void) pdmR0IommuHlp_Unlock(PPDMDEVINS pDevIns)
1677{
1678 PDMDEV_ASSERT_DEVINS(pDevIns);
1679 pdmUnlock(pDevIns->Internal.s.pGVM);
1680}
1681
1682
1683/**
1684 * The Ring-0 IOMMU Helper Callbacks.
1685 */
1686extern DECLEXPORT(const PDMIOMMUHLPR0) g_pdmR0IommuHlp =
1687{
1688 PDM_IOMMUHLPR0_VERSION,
1689 pdmR0IommuHlp_Lock,
1690 pdmR0IommuHlp_Unlock,
1691 PDM_IOMMUHLPR0_VERSION, /* the end */
1692};
1693
1694/** @} */
1695
1696
1697/** @name HPET Ring-0 Helpers
1698 * @{
1699 */
1700/* none */
1701
1702/**
1703 * The Ring-0 HPET Helper Callbacks.
1704 */
1705extern DECLEXPORT(const PDMHPETHLPR0) g_pdmR0HpetHlp =
1706{
1707 PDM_HPETHLPR0_VERSION,
1708 PDM_HPETHLPR0_VERSION, /* the end */
1709};
1710
1711/** @} */
1712
1713
1714/** @name Raw PCI Ring-0 Helpers
1715 * @{
1716 */
1717/* none */
1718
1719/**
1720 * The Ring-0 PCI raw Helper Callbacks.
1721 */
1722extern DECLEXPORT(const PDMPCIRAWHLPR0) g_pdmR0PciRawHlp =
1723{
1724 PDM_PCIRAWHLPR0_VERSION,
1725 PDM_PCIRAWHLPR0_VERSION, /* the end */
1726};
1727
1728/** @} */
1729
1730
1731
1732
1733/**
1734 * Sets an irq on the PIC and I/O APIC.
1735 *
1736 * @returns true if delivered, false if postponed.
1737 * @param pGVM The global (ring-0) VM structure.
1738 * @param iIrq The irq.
1739 * @param iLevel The new level.
1740 * @param uTagSrc The IRQ tag and source.
1741 *
1742 * @remarks The caller holds the PDM lock.
1743 */
1744DECLHIDDEN(bool) pdmR0IsaSetIrq(PGVM pGVM, int iIrq, int iLevel, uint32_t uTagSrc)
1745{
1746 if (RT_LIKELY( ( pGVM->pdm.s.IoApic.pDevInsR0
1747 || !pGVM->pdm.s.IoApic.pDevInsR3)
1748 && ( pGVM->pdm.s.Pic.pDevInsR0
1749 || !pGVM->pdm.s.Pic.pDevInsR3)))
1750 {
1751 if (pGVM->pdm.s.Pic.pDevInsR0)
1752 pGVM->pdm.s.Pic.pfnSetIrqR0(pGVM->pdm.s.Pic.pDevInsR0, iIrq, iLevel, uTagSrc);
1753 if (pGVM->pdm.s.IoApic.pDevInsR0)
1754 pGVM->pdm.s.IoApic.pfnSetIrqR0(pGVM->pdm.s.IoApic.pDevInsR0, NIL_PCIBDF, iIrq, iLevel, uTagSrc);
1755 return true;
1756 }
1757
1758 /* queue for ring-3 execution. */
1759 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
1760 AssertReturn(pTask, false);
1761
1762 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
1763 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
1764 pTask->u.IsaSetIRQ.uBusDevFn = NIL_PCIBDF;
1765 pTask->u.IsaSetIRQ.iIrq = iIrq;
1766 pTask->u.IsaSetIRQ.iLevel = iLevel;
1767 pTask->u.IsaSetIRQ.uTagSrc = uTagSrc;
1768
1769 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
1770 return false;
1771}
1772
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