VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/HWSVMR0.h@ 44821

Last change on this file since 44821 was 43455, checked in by vboxsync, 12 years ago

VMM/VMMR0: Hungarian notation fixes.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 5.8 KB
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1/* $Id: HWSVMR0.h 43455 2012-09-27 14:00:03Z vboxsync $ */
2/** @file
3 * HM SVM (AMD-V) - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2012 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___VMMR0_HWSVMR0_h
19#define ___VMMR0_HWSVMR0_h
20
21#include <VBox/cdefs.h>
22#include <VBox/types.h>
23#include <VBox/vmm/em.h>
24#include <VBox/vmm/stam.h>
25#include <VBox/dis.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/hm_svm.h>
29
30RT_C_DECLS_BEGIN
31
32/** @defgroup grp_svm_int Internal
33 * @ingroup grp_svm
34 * @internal
35 * @{
36 */
37
38#ifdef IN_RING0
39
40/**
41 * Enters the AMD-V session
42 *
43 * @returns VBox status code.
44 * @param pVM Pointer to the VM.
45 * @param pVCpu Pointer to the VMCPU.
46 * @param pCpu Pointer to the CPU info struct.
47 */
48VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu);
49
50/**
51 * Leaves the AMD-V session
52 *
53 * @returns VBox status code.
54 * @param pVM Pointer to the VM.
55 * @param pVCpu Pointer to the VMCPU.
56 * @param pCtx Pointer to the guest CPU context.
57 */
58VMMR0DECL(int) SVMR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
59
60VMMR0DECL(int) SVMR0EnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage, bool fEnabledBySystem);
61
62/**
63 * Deactivates AMD-V on the current CPU
64 *
65 * @returns VBox status code.
66 * @param pCpu Pointer to the CPU info struct.
67 * @param pvPageCpu Pointer to the global CPU page.
68 * @param pPageCpuPhys Physical address of the global CPU page.
69 */
70VMMR0DECL(int) SVMR0DisableCpu(PHMGLOBLCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
71
72/**
73 * Does Ring-0 per VM AMD-V init.
74 *
75 * @returns VBox status code.
76 * @param pVM Pointer to the VM.
77 */
78VMMR0DECL(int) SVMR0InitVM(PVM pVM);
79
80/**
81 * Does Ring-0 per VM AMD-V termination.
82 *
83 * @returns VBox status code.
84 * @param pVM Pointer to the VM.
85 */
86VMMR0DECL(int) SVMR0TermVM(PVM pVM);
87
88/**
89 * Sets up AMD-V for the specified VM
90 *
91 * @returns VBox status code.
92 * @param pVM Pointer to the VM.
93 */
94VMMR0DECL(int) SVMR0SetupVM(PVM pVM);
95
96
97/**
98 * Runs guest code in an AMD-V VM.
99 *
100 * @returns VBox status code.
101 * @param pVM Pointer to the VM.
102 * @param pVCpu Pointer to the VMCPU.
103 * @param pCtx Pointer to the guest CPU context.
104 */
105VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
106
107
108/**
109 * Save the host state.
110 *
111 * @returns VBox status code.
112 * @param pVM Pointer to the VM.
113 * @param pVCpu Pointer to the VMCPU.
114 */
115VMMR0DECL(int) SVMR0SaveHostState(PVM pVM, PVMCPU pVCpu);
116
117/**
118 * Loads the guest state.
119 *
120 * @returns VBox status code.
121 * @param pVM Pointer to the VM.
122 * @param pVCpu Pointer to the VMCPU.
123 * @param pCtx Pointer to the guest CPU context.
124 */
125VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
126
127
128#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
129/**
130 * Prepares for and executes VMRUN (64-bit guests from a 32-bit host).
131 *
132 * @returns VBox status code.
133 * @param pVMCBHostPhys Physical address of host VMCB.
134 * @param pVMCBPhys Physical address of the VMCB.
135 * @param pCtx Pointer to the guest CPU context.
136 * @param pVM Pointer to the VM.
137 * @param pVCpu Pointer to the VMCPU. (not used)
138 */
139DECLASM(int) SVMR0VMSwitcherRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
140
141/**
142 * Executes the specified handler in 64-bit mode.
143 *
144 * @returns VBox status code.
145 * @param pVM Pointer to the VM.
146 * @param pVCpu Pointer to the VMCPU.
147 * @param pCtx Pointer to the guest CPU context.
148 * @param pfnHandler Pointer to the RC handler function.
149 * @param cbParam Number of parameters.
150 * @param paParam Array of 32-bit parameters.
151 */
152VMMR0DECL(int) SVMR0Execute64BitsHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTRCPTR pfnHandler, uint32_t cbParam,
153 uint32_t *paParam);
154#endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */
155
156/**
157 * Prepares for and executes VMRUN (32-bit guests).
158 *
159 * @returns VBox status code.
160 * @param pVMCBHostPhys Physical address of host VMCB.
161 * @param pVMCBPhys Physical address of the VMCB.
162 * @param pCtx Pointer to the guest CPU context.
163 * @param pVM Pointer to the VM. (not used)
164 * @param pVCpu Pointer to the VMCPU. (not used)
165 */
166DECLASM(int) SVMR0VMRun(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
167
168
169/**
170 * Prepares for and executes VMRUN (64-bit guests).
171 *
172 * @returns VBox status code.
173 * @param pVMCBHostPhys Physical address of host VMCB.
174 * @param pVMCBPhys Physical address of the VMCB.
175 * @param pCtx Pointer to the guest CPU context.
176 * @param pVM Pointer to the VM. (not used)
177 * @param pVCpu Pointer to the VMCPU. (not used)
178 */
179DECLASM(int) SVMR0VMRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
180
181/**
182 * Executes INVLPGA.
183 *
184 * @param pPageGC Virtual page to invalidate.
185 * @param u32ASID Tagged TLB id.
186 */
187DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);
188
189#endif /* IN_RING0 */
190
191/** @} */
192
193RT_C_DECLS_END
194
195#endif /* !___VMMR0_HWSVMR0_h */
196
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