VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/HWSVMR0.h@ 20374

Last change on this file since 20374 was 20374, checked in by vboxsync, 15 years ago

*: s/RT_\(BEGIN|END\)_DECLS/RT_C_DECLS_\1/g
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 7.2 KB
Line 
1/* $Id: HWSVMR0.h 20374 2009-06-08 00:43:21Z vboxsync $ */
2/** @file
3 * HWACCM AMD-V - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___VMMR0_HWSVMR0_h
23#define ___VMMR0_HWSVMR0_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/dis.h>
30#include <VBox/hwaccm.h>
31#include <VBox/pgm.h>
32#include <VBox/hwacc_svm.h>
33
34RT_C_DECLS_BEGIN
35
36/** @defgroup grp_svm_int Internal
37 * @ingroup grp_svm
38 * @internal
39 * @{
40 */
41
42#ifdef IN_RING0
43
44/**
45 * Enters the AMD-V session
46 *
47 * @returns VBox status code.
48 * @param pVM The VM to operate on.
49 * @param pVCpu The VMCPU to operate on.
50 * @param pCpu CPU info struct
51 */
52VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHWACCM_CPUINFO pCpu);
53
54/**
55 * Leaves the AMD-V session
56 *
57 * @returns VBox status code.
58 * @param pVM The VM to operate on.
59 * @param pVCpu The VMCPU to operate on.
60 * @param pCtx CPU context
61 */
62VMMR0DECL(int) SVMR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
63
64/**
65 * Sets up and activates AMD-V on the current CPU
66 *
67 * @returns VBox status code.
68 * @param pCpu CPU info struct
69 * @param pVM The VM to operate on. (can be NULL after a resume)
70 * @param pvPageCpu Pointer to the global cpu page
71 * @param pPageCpuPhys Physical address of the global cpu page
72 */
73VMMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
74
75/**
76 * Deactivates AMD-V on the current CPU
77 *
78 * @returns VBox status code.
79 * @param pCpu CPU info struct
80 * @param pvPageCpu Pointer to the global cpu page
81 * @param pPageCpuPhys Physical address of the global cpu page
82 */
83VMMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
84
85/**
86 * Does Ring-0 per VM AMD-V init.
87 *
88 * @returns VBox status code.
89 * @param pVM The VM to operate on.
90 */
91VMMR0DECL(int) SVMR0InitVM(PVM pVM);
92
93/**
94 * Does Ring-0 per VM AMD-V termination.
95 *
96 * @returns VBox status code.
97 * @param pVM The VM to operate on.
98 */
99VMMR0DECL(int) SVMR0TermVM(PVM pVM);
100
101/**
102 * Sets up AMD-V for the specified VM
103 *
104 * @returns VBox status code.
105 * @param pVM The VM to operate on.
106 */
107VMMR0DECL(int) SVMR0SetupVM(PVM pVM);
108
109
110/**
111 * Runs guest code in an AMD-V VM.
112 *
113 * @returns VBox status code.
114 * @param pVM The VM to operate on.
115 * @param pVCpu The VMCPU to operate on.
116 * @param pCtx Guest context
117 */
118VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
119
120
121/**
122 * Save the host state
123 *
124 * @returns VBox status code.
125 * @param pVM The VM to operate on.
126 * @param pVCpu The VMCPU to operate on.
127 */
128VMMR0DECL(int) SVMR0SaveHostState(PVM pVM, PVMCPU pVCpu);
129
130/**
131 * Loads the guest state
132 *
133 * @returns VBox status code.
134 * @param pVM The VM to operate on.
135 * @param pVCpu The VMCPU to operate on.
136 * @param pCtx Guest context
137 */
138VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
139
140#if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
141
142/**
143 * Prepares for and executes VMRUN (64 bits guests from a 32 bits hosts).
144 *
145 * @returns VBox status code.
146 * @param pVMCBHostPhys Physical address of host VMCB.
147 * @param pVMCBPhys Physical address of the VMCB.
148 * @param pCtx Guest context.
149 * @param pVM The VM to operate on.
150 * @param pVCpu The VMCPU to operate on. (not used)
151 */
152DECLASM(int) SVMR0VMSwitcherRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
153
154/**
155 * Executes the specified handler in 64 mode
156 *
157 * @returns VBox status code.
158 * @param pVM The VM to operate on.
159 * @param pVCpu The VMCPU to operate on.
160 * @param pCtx Guest context
161 * @param pfnHandler RC handler
162 * @param cbParam Number of parameters
163 * @param paParam Array of 32 bits parameters
164 */
165VMMR0DECL(int) SVMR0Execute64BitsHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTRCPTR pfnHandler, uint32_t cbParam, uint32_t *paParam);
166
167#endif /* HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */
168
169/**
170 * Prepares for and executes VMRUN (32 bits guests).
171 *
172 * @returns VBox status code.
173 * @param pVMCBHostPhys Physical address of host VMCB.
174 * @param pVMCBPhys Physical address of the VMCB.
175 * @param pCtx Guest context.
176 * @param pVM The VM to operate on. (not used)
177 * @param pVCpu The VMCPU to operate on. (not used)
178 */
179DECLASM(int) SVMR0VMRun(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
180
181
182/**
183 * Prepares for and executes VMRUN (64 bits guests).
184 *
185 * @returns VBox status code.
186 * @param pVMCBHostPhys Physical address of host VMCB.
187 * @param pVMCBPhys Physical address of the VMCB.
188 * @param pCtx Guest context.
189 * @param pVM The VM to operate on. (not used)
190 * @param pVCpu The VMCPU to operate on. (not used)
191 */
192DECLASM(int) SVMR0VMRun64(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
193
194/**
195 * Executes INVLPGA.
196 *
197 * @param pPageGC Virtual page to invalidate.
198 * @param u32ASID Tagged TLB id.
199 */
200DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);
201
202/** Convert hidden selector attribute word between VMX and SVM formats. */
203#define SVM_HIDSEGATTR_VMX2SVM(a) (a & 0xFF) | ((a & 0xF000) >> 4)
204#define SVM_HIDSEGATTR_SVM2VMX(a) (a & 0xFF) | ((a & 0x0F00) << 4)
205
206#define SVM_WRITE_SELREG(REG, reg) \
207{ \
208 pVMCB->guest.REG.u16Sel = pCtx->reg; \
209 pVMCB->guest.REG.u32Limit = pCtx->reg##Hid.u32Limit; \
210 pVMCB->guest.REG.u64Base = pCtx->reg##Hid.u64Base; \
211 pVMCB->guest.REG.u16Attr = SVM_HIDSEGATTR_VMX2SVM(pCtx->reg##Hid.Attr.u); \
212}
213
214#define SVM_READ_SELREG(REG, reg) \
215{ \
216 pCtx->reg = pVMCB->guest.REG.u16Sel; \
217 pCtx->reg##Hid.u32Limit = pVMCB->guest.REG.u32Limit; \
218 pCtx->reg##Hid.u64Base = pVMCB->guest.REG.u64Base; \
219 pCtx->reg##Hid.Attr.u = SVM_HIDSEGATTR_SVM2VMX(pVMCB->guest.REG.u16Attr); \
220}
221
222#endif /* IN_RING0 */
223
224/** @} */
225
226RT_C_DECLS_END
227
228#endif
229
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette