VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/HWSVMR0.h@ 11424

Last change on this file since 11424 was 10502, checked in by vboxsync, 16 years ago

Take precautions for being rescheduled to a different cpu due to long jumps to ring 3. (affects AMD-V only)

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File size: 4.5 KB
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1/* $Id: HWSVMR0.h 10502 2008-07-11 09:31:15Z vboxsync $ */
2/** @file
3 * HWACCM AMD-V - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___HWSVMR0_h
23#define ___HWSVMR0_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/dis.h>
30#include <VBox/hwaccm.h>
31#include <VBox/pgm.h>
32#include <VBox/hwacc_svm.h>
33
34__BEGIN_DECLS
35
36/** @defgroup grp_svm Internal
37 * @ingroup grp_svm
38 * @internal
39 * @{
40 */
41
42#ifdef IN_RING0
43
44/**
45 * Enters the AMD-V session
46 *
47 * @returns VBox status code.
48 * @param pVM The VM to operate on.
49 * @param pCpu CPU info struct
50 */
51HWACCMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu);
52
53/**
54 * Leaves the AMD-V session
55 *
56 * @returns VBox status code.
57 * @param pVM The VM to operate on.
58 */
59HWACCMR0DECL(int) SVMR0Leave(PVM pVM);
60
61/**
62 * Sets up and activates AMD-V on the current CPU
63 *
64 * @returns VBox status code.
65 * @param pCpu CPU info struct
66 * @param pVM The VM to operate on.
67 * @param pvPageCpu Pointer to the global cpu page
68 * @param pPageCpuPhys Physical address of the global cpu page
69 */
70HWACCMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
71
72/**
73 * Deactivates AMD-V on the current CPU
74 *
75 * @returns VBox status code.
76 * @param pCpu CPU info struct
77 * @param pvPageCpu Pointer to the global cpu page
78 * @param pPageCpuPhys Physical address of the global cpu page
79 */
80HWACCMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
81
82/**
83 * Does Ring-0 per VM AMD-V init.
84 *
85 * @returns VBox status code.
86 * @param pVM The VM to operate on.
87 */
88HWACCMR0DECL(int) SVMR0InitVM(PVM pVM);
89
90/**
91 * Does Ring-0 per VM AMD-V termination.
92 *
93 * @returns VBox status code.
94 * @param pVM The VM to operate on.
95 */
96HWACCMR0DECL(int) SVMR0TermVM(PVM pVM);
97
98/**
99 * Sets up AMD-V for the specified VM
100 *
101 * @returns VBox status code.
102 * @param pVM The VM to operate on.
103 */
104HWACCMR0DECL(int) SVMR0SetupVM(PVM pVM);
105
106
107/**
108 * Runs guest code in an AMD-V VM.
109 *
110 * @note NEVER EVER turn on interrupts here. Due to our illegal entry into the kernel, it might mess things up. (XP kernel traps have been frequently observed)
111 *
112 * @returns VBox status code.
113 * @param pVM The VM to operate on.
114 * @param pCtx Guest context
115 */
116HWACCMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx);
117
118
119/**
120 * Save the host state
121 *
122 * @returns VBox status code.
123 * @param pVM The VM to operate on.
124 */
125HWACCMR0DECL(int) SVMR0SaveHostState(PVM pVM);
126
127/**
128 * Loads the guest state
129 *
130 * @returns VBox status code.
131 * @param pVM The VM to operate on.
132 * @param pCtx Guest context
133 */
134HWACCMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx);
135
136
137/* Convert hidden selector attribute word between VMX and SVM formats. */
138#define SVM_HIDSEGATTR_VMX2SVM(a) (a & 0xFF) | ((a & 0xF000) >> 4)
139#define SVM_HIDSEGATTR_SVM2VMX(a) (a & 0xFF) | ((a & 0x0F00) << 4)
140
141#define SVM_WRITE_SELREG(REG, reg) \
142 pVMCB->guest.REG.u16Sel = pCtx->reg; \
143 pVMCB->guest.REG.u32Limit = pCtx->reg##Hid.u32Limit; \
144 pVMCB->guest.REG.u64Base = pCtx->reg##Hid.u64Base; \
145 pVMCB->guest.REG.u16Attr = SVM_HIDSEGATTR_VMX2SVM(pCtx->reg##Hid.Attr.u);
146
147#define SVM_READ_SELREG(REG, reg) \
148 pCtx->reg = pVMCB->guest.REG.u16Sel; \
149 pCtx->reg##Hid.u32Limit = pVMCB->guest.REG.u32Limit; \
150 pCtx->reg##Hid.u64Base = pVMCB->guest.REG.u64Base; \
151 pCtx->reg##Hid.Attr.u = SVM_HIDSEGATTR_SVM2VMX(pVMCB->guest.REG.u16Attr);
152
153#endif /* IN_RING0 */
154
155/** @} */
156
157__END_DECLS
158
159#endif
160
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