VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/HMSVMR0.h@ 87359

Last change on this file since 87359 was 87359, checked in by vboxsync, 4 years ago

VMM/HMSVM: Straighten out the svm vmrun assembly code by having different version for each of the 3 branch conditions. The C code changes which one it calls when the conditions changes (only one which does so at runtime). Should be better for spectre fighting and general mojo.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 3.8 KB
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1/* $Id: HMSVMR0.h 87359 2021-01-21 19:56:26Z vboxsync $ */
2/** @file
3 * HM SVM (AMD-V) - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h
19#define VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <VBox/cdefs.h>
25#include <VBox/types.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/hm_svm.h>
28
29RT_C_DECLS_BEGIN
30
31/** @defgroup grp_svm_int Internal
32 * @ingroup grp_svm
33 * @internal
34 * @{
35 */
36
37#ifdef IN_RING0
38
39VMMR0DECL(int) SVMR0GlobalInit(void);
40VMMR0DECL(void) SVMR0GlobalTerm(void);
41VMMR0DECL(int) SVMR0Enter(PVMCPUCC pVCpu);
42VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPUCC pVCpu, bool fGlobalInit);
43VMMR0DECL(int) SVMR0CallRing3Callback(PVMCPUCC pVCpu, VMMCALLRING3 enmOperation);
44VMMR0DECL(int) SVMR0EnableCpu(PHMPHYSCPU pHostCpu, PVMCC pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage,
45 bool fEnabledBySystem, PCSUPHWVIRTMSRS pHwvirtMsrs);
46VMMR0DECL(int) SVMR0DisableCpu(PHMPHYSCPU pHostCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
47VMMR0DECL(int) SVMR0InitVM(PVMCC pVM);
48VMMR0DECL(int) SVMR0TermVM(PVMCC pVM);
49VMMR0DECL(int) SVMR0SetupVM(PVMCC pVM);
50VMMR0DECL(VBOXSTRICTRC) SVMR0RunGuestCode(PVMCPUCC pVCpu);
51VMMR0DECL(int) SVMR0ExportHostState(PVMCPUCC pVCpu);
52VMMR0DECL(int) SVMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
53VMMR0DECL(int) SVMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
54
55/**
56 * Prepares for and executes VMRUN (64-bit register context).
57 *
58 * @returns VBox status code.
59 * @param pVM The cross context VM structure. (Not used.)
60 * @param pVCpu The cross context virtual CPU structure.
61 * @param HCPhyspVMCB Physical address of the VMCB.
62 *
63 * @remarks With spectre mitigations and the usual need for speed (/ micro
64 * optimizations), we have a bunch of variations of this code depending
65 * on a few precoditions. In release builds, the code is entirely
66 * without conditionals. Debug builds have a couple of assertions that
67 * shouldn't ever be triggered.
68 *
69 * @{
70 */
71DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
72DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
73DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
74DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
75DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
76DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
77DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
78DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
79/** @} */
80
81
82/**
83 * Executes INVLPGA.
84 *
85 * @param pPageGC Virtual page to invalidate.
86 * @param u32ASID Tagged TLB id.
87 */
88DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);
89
90#endif /* IN_RING0 */
91
92/** @} */
93
94RT_C_DECLS_END
95
96#endif /* !VMM_INCLUDED_SRC_VMMR0_HMSVMR0_h */
97
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