VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/CPUMR0UnusedA.asm@ 20961

Last change on this file since 20961 was 20539, checked in by vboxsync, 15 years ago

CPUMR0A.asm: Split out the currently unused code into CPUMR0UnusedA..asm (easier to handle now).
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 11.0 KB
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1; $Id: CPUMR0UnusedA.asm 20539 2009-06-13 21:22:54Z vboxsync $
2;; @file
3; CPUM - Guest Context Assembly Routines.
4;
5
6;
7; Copyright (C) 2006-2007 Sun Microsystems, Inc.
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18; Clara, CA 95054 USA or visit http://www.sun.com if you need
19; additional information or have any questions.
20;
21
22;*******************************************************************************
23;* Header Files *
24;*******************************************************************************
25%include "VBox/asmdefs.mac"
26%include "VBox/vm.mac"
27%include "VBox/err.mac"
28%include "VBox/stam.mac"
29%include "CPUMInternal.mac"
30%include "VBox/x86.mac"
31%include "VBox/cpum.mac"
32
33%ifdef IN_RING3
34 %error "The jump table doesn't link on leopard."
35%endif
36
37
38;*******************************************************************************
39;* External Symbols *
40;*******************************************************************************
41%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
42extern NAME(SUPR0AbsIs64bit)
43extern NAME(SUPR0Abs64bitKernelCS)
44extern NAME(SUPR0Abs64bitKernelSS)
45extern NAME(SUPR0Abs64bitKernelDS)
46extern NAME(SUPR0AbsKernelCS)
47extern NAME(g_fCPUMIs64bitHost)
48%endif
49
50
51;;
52; Restores the guest's FPU/XMM state
53;
54; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
55;
56; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
57;
58align 16
59BEGINPROC cpumR0LoadFPU
60%ifdef RT_ARCH_AMD64
61 %ifdef RT_OS_WINDOWS
62 mov xDX, rcx
63 %else
64 mov xDX, rdi
65 %endif
66%else
67 mov xDX, dword [esp + 4]
68%endif
69%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
70 cmp byte [NAME(g_fCPUMIs64bitHost)], 0
71 jz .legacy_mode
72 db 0xea ; jmp far .sixtyfourbit_mode
73 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
74.legacy_mode:
75%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
76
77 fxrstor [xDX + CPUMCTX.fpu]
78.done:
79 ret
80
81%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
82ALIGNCODE(16)
83BITS 64
84.sixtyfourbit_mode:
85 and edx, 0ffffffffh
86 fxrstor [rdx + CPUMCTX.fpu]
87 jmp far [.fpret wrt rip]
88.fpret: ; 16:32 Pointer to .the_end.
89 dd .done, NAME(SUPR0AbsKernelCS)
90BITS 32
91%endif
92ENDPROC cpumR0LoadFPU
93
94
95;;
96; Restores the guest's FPU/XMM state
97;
98; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
99;
100; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
101;
102align 16
103BEGINPROC cpumR0SaveFPU
104%ifdef RT_ARCH_AMD64
105 %ifdef RT_OS_WINDOWS
106 mov xDX, rcx
107 %else
108 mov xDX, rdi
109 %endif
110%else
111 mov xDX, dword [esp + 4]
112%endif
113%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
114 cmp byte [NAME(g_fCPUMIs64bitHost)], 0
115 jz .legacy_mode
116 db 0xea ; jmp far .sixtyfourbit_mode
117 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
118.legacy_mode:
119%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
120 fxsave [xDX + CPUMCTX.fpu]
121.done:
122 ret
123
124%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
125ALIGNCODE(16)
126BITS 64
127.sixtyfourbit_mode:
128 and edx, 0ffffffffh
129 fxsave [rdx + CPUMCTX.fpu]
130 jmp far [.fpret wrt rip]
131.fpret: ; 16:32 Pointer to .the_end.
132 dd .done, NAME(SUPR0AbsKernelCS)
133BITS 32
134%endif
135ENDPROC cpumR0SaveFPU
136
137
138;;
139; Restores the guest's XMM state
140;
141; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
142;
143; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
144;
145align 16
146BEGINPROC cpumR0LoadXMM
147%ifdef RT_ARCH_AMD64
148 %ifdef RT_OS_WINDOWS
149 mov xDX, rcx
150 %else
151 mov xDX, rdi
152 %endif
153%else
154 mov xDX, dword [esp + 4]
155%endif
156%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
157 cmp byte [NAME(g_fCPUMIs64bitHost)], 0
158 jz .legacy_mode
159 db 0xea ; jmp far .sixtyfourbit_mode
160 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
161.legacy_mode:
162%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
163
164 movdqa xmm0, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
165 movdqa xmm1, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
166 movdqa xmm2, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
167 movdqa xmm3, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
168 movdqa xmm4, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
169 movdqa xmm5, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
170 movdqa xmm6, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
171 movdqa xmm7, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
172
173%ifdef RT_ARCH_AMD64
174 test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
175 jz .done
176
177 movdqa xmm8, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
178 movdqa xmm9, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
179 movdqa xmm10, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
180 movdqa xmm11, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
181 movdqa xmm12, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
182 movdqa xmm13, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
183 movdqa xmm14, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
184 movdqa xmm15, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
185%endif
186.done:
187 ret
188
189%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
190ALIGNCODE(16)
191BITS 64
192.sixtyfourbit_mode:
193 and edx, 0ffffffffh
194
195 movdqa xmm0, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
196 movdqa xmm1, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
197 movdqa xmm2, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
198 movdqa xmm3, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
199 movdqa xmm4, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
200 movdqa xmm5, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
201 movdqa xmm6, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
202 movdqa xmm7, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
203
204 test qword [rdx + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
205 jz .sixtyfourbit_done
206
207 movdqa xmm8, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
208 movdqa xmm9, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
209 movdqa xmm10, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
210 movdqa xmm11, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
211 movdqa xmm12, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
212 movdqa xmm13, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
213 movdqa xmm14, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
214 movdqa xmm15, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
215.sixtyfourbit_done:
216 jmp far [.fpret wrt rip]
217.fpret: ; 16:32 Pointer to .the_end.
218 dd .done, NAME(SUPR0AbsKernelCS)
219BITS 32
220%endif
221ENDPROC cpumR0LoadXMM
222
223
224;;
225; Restores the guest's XMM state
226;
227; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
228;
229; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
230;
231align 16
232BEGINPROC cpumR0SaveXMM
233%ifdef RT_ARCH_AMD64
234 %ifdef RT_OS_WINDOWS
235 mov xDX, rcx
236 %else
237 mov xDX, rdi
238 %endif
239%else
240 mov xDX, dword [esp + 4]
241%endif
242%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
243 cmp byte [NAME(g_fCPUMIs64bitHost)], 0
244 jz .legacy_mode
245 db 0xea ; jmp far .sixtyfourbit_mode
246 dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
247.legacy_mode:
248%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
249
250 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
251 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
252 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
253 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
254 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
255 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
256 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
257 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
258
259%ifdef RT_ARCH_AMD64
260 test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
261 jz .done
262
263 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
264 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
265 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
266 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
267 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
268 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
269 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
270 movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
271
272%endif
273.done:
274 ret
275
276%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
277ALIGNCODE(16)
278BITS 64
279.sixtyfourbit_mode:
280 and edx, 0ffffffffh
281
282 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
283 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
284 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
285 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
286 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
287 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
288 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
289 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
290
291 test qword [rdx + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
292 jz .sixtyfourbit_done
293
294 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
295 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
296 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
297 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
298 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
299 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
300 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
301 movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
302
303.sixtyfourbit_done:
304 jmp far [.fpret wrt rip]
305.fpret: ; 16:32 Pointer to .the_end.
306 dd .done, NAME(SUPR0AbsKernelCS)
307BITS 32
308%endif
309ENDPROC cpumR0SaveXMM
310
311
312;;
313; Set the FPU control word; clearing exceptions first
314;
315; @param u16FCW x86:[esp+4] GCC:rdi MSC:rcx New FPU control word
316align 16
317BEGINPROC cpumR0SetFCW
318%ifdef RT_ARCH_AMD64
319 %ifdef RT_OS_WINDOWS
320 mov xAX, rcx
321 %else
322 mov xAX, rdi
323 %endif
324%else
325 mov xAX, dword [esp + 4]
326%endif
327 fnclex
328 push xAX
329 fldcw [xSP]
330 pop xAX
331 ret
332ENDPROC cpumR0SetFCW
333
334
335;;
336; Get the FPU control word
337;
338align 16
339BEGINPROC cpumR0GetFCW
340 fnstcw [xSP - 8]
341 mov ax, word [xSP - 8]
342 ret
343ENDPROC cpumR0GetFCW
344
345
346;;
347; Set the MXCSR;
348;
349; @param u32MXCSR x86:[esp+4] GCC:rdi MSC:rcx New MXCSR
350align 16
351BEGINPROC cpumR0SetMXCSR
352%ifdef RT_ARCH_AMD64
353 %ifdef RT_OS_WINDOWS
354 mov xAX, rcx
355 %else
356 mov xAX, rdi
357 %endif
358%else
359 mov xAX, dword [esp + 4]
360%endif
361 push xAX
362 ldmxcsr [xSP]
363 pop xAX
364 ret
365ENDPROC cpumR0SetMXCSR
366
367
368;;
369; Get the MXCSR
370;
371align 16
372BEGINPROC cpumR0GetMXCSR
373 stmxcsr [xSP - 8]
374 mov eax, dword [xSP - 8]
375 ret
376ENDPROC cpumR0GetMXCSR
377
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