TRPMGCHandlersA.asm@ 5999

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1	; $Id: TRPMGCHandlersA.asm 5999 2007-12-07 15:05:06Z vboxsync $
2	;; @file
3	; TRPM - Guest Context Trap Handlers
4	;
5
6	; Copyright (C) 2006-2007 innotek GmbH
7	;
8	; This file is part of VirtualBox Open Source Edition (OSE), as
9	; available from http://www.virtualbox.org. This file is free software;
10	; you can redistribute it and/or modify it under the terms of the GNU
11	; General Public License (GPL) as published by the Free Software
12	; Foundation, in version 2 as it comes in the "COPYING" file of the
13	; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	;
16
17	;*******************************************************************************
18	;* Header Files *
19	;*******************************************************************************
20	%include "VMMGC.mac"
21	%include "VBox/x86.mac"
22	%include "VBox/cpum.mac"
23	%include "VBox/stam.mac"
24	%include "VBox/vm.mac"
25	%include "TRPMInternal.mac"
26	%include "VBox/err.mac"
27	%include "VBox/trpm.mac"
28
29
30	;*******************************************************************************
31	;* External Symbols *
32	;*******************************************************************************
33	extern IMPNAME(g_CPUM) ; These IMPNAME(g_*) symbols resolve to the import table
34	extern IMPNAME(g_TRPM) ; where there is a pointer to the real symbol. PE imports
35	extern IMPNAME(g_VM) ; are a bit confusing at first... :-)
36	extern NAME(CPUMGCRestoreInt)
37	extern NAME(CPUMHandleLazyFPUAsm)
38	extern NAME(CPUMHyperSetCtxCore)
39	extern NAME(trpmGCTrapInGeneric)
40	extern NAME(TRPMGCHyperTrap0bHandler)
41	extern NAME(TRPMGCHyperTrap0dHandler)
42	extern NAME(TRPMGCHyperTrap0eHandler)
43	extern NAME(TRPMGCTrap01Handler)
44	%ifdef VBOX_WITH_NMI
45	extern NAME(TRPMGCTrap02Handler)
46	%endif
47	extern NAME(TRPMGCTrap03Handler)
48	extern NAME(TRPMGCTrap06Handler)
49	extern NAME(TRPMGCTrap0bHandler)
50	extern NAME(TRPMGCTrap0dHandler)
51	extern NAME(TRPMGCTrap0eHandler)
52	extern NAME(TRPMGCTrap07Handler)
53
54	;; IMPORTANT all COM_ functions trashes esi, some edi and the LOOP_SHORT_WHILE kills ecx.
55	;%define DEBUG_STUFF 1
56	;%define DEBUG_STUFF_TRPG 1
57	;%define DEBUG_STUFF_INT 1
58
59	BEGINCODE
60
61	;;
62	; Jump table for trap handlers for hypervisor traps.
63	;
64	g_apfnStaticTrapHandlersHyper:
65	; N - M M - T - C - D i
66	; o - n o - y - o - e p
67	; - e n - p - d - s t
68	; - i - e - e - c .
69	; - c - - - r
70	; =============================================================
71	dd 0 ; 0 - #DE - F - N - Divide error
72	dd NAME(TRPMGCTrap01Handler) ; 1 - #DB - F/T - N - Single step, INT 1 instruction
73	%ifdef VBOX_WITH_NMI
74	dd NAME(TRPMGCTrap02Handler) ; 2 - - I - N - Non-Maskable Interrupt (NMI)
75	%else
76	dd 0 ; 2 - - I - N - Non-Maskable Interrupt (NMI)
77	%endif
78	dd NAME(TRPMGCTrap03Handler) ; 3 - #BP - T - N - Breakpoint, INT 3 instruction.
79	dd 0 ; 4 - #OF - T - N - Overflow, INTO instruction.
80	dd 0 ; 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction.
81	dd 0 ; 6 - #UD - F - N - Undefined(/Invalid) Opcode.
82	dd 0 ; 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction.
83	dd 0 ; 8 - #DF - A - 0 - Double fault.
84	dd 0 ; 9 - - F - N - Coprocessor Segment Overrun (obsolete).
85	dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
86	dd NAME(TRPMGCHyperTrap0bHandler) ; b - #NP - F - Y - Segment not present.
87	dd 0 ; c - #SS - F - Y - Stack-Segment fault.
88	dd NAME(TRPMGCHyperTrap0dHandler) ; d - #GP - F - Y - General protection fault.
89	dd NAME(TRPMGCHyperTrap0eHandler) ; e - #PF - F - Y - Page fault.
90	dd 0 ; f - - - - Intel Reserved. Do not use.
91	dd 0 ; 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction.
92	dd 0 ; 11 - #AC - F - 0 - Alignment Check.
93	dd 0 ; 12 - #MC - A - N - Machine Check.
94	dd 0 ; 13 - #XF - F - N - SIMD Floating-Point Exception.
95	dd 0 ; 14 - - - - Intel Reserved. Do not use.
96	dd 0 ; 15 - - - - Intel Reserved. Do not use.
97	dd 0 ; 16 - - - - Intel Reserved. Do not use.
98	dd 0 ; 17 - - - - Intel Reserved. Do not use.
99	dd 0 ; 18 - - - - Intel Reserved. Do not use.
100
101
102	;;
103	; Jump table for trap handlers for guest traps
104	;
105	g_apfnStaticTrapHandlersGuest:
106	; N - M M - T - C - D i
107	; o - n o - y - o - e p
108	; - e n - p - d - s t
109	; - i - e - e - c .
110	; - c - - - r
111	; =============================================================
112	dd 0 ; 0 - #DE - F - N - Divide error
113	dd NAME(TRPMGCTrap01Handler) ; 1 - #DB - F/T - N - Single step, INT 1 instruction
114	%ifdef VBOX_WITH_NMI
115	dd NAME(TRPMGCTrap02Handler) ; 2 - - I - N - Non-Maskable Interrupt (NMI)
116	%else
117	dd 0 ; 2 - - I - N - Non-Maskable Interrupt (NMI)
118	%endif
119	dd NAME(TRPMGCTrap03Handler) ; 3 - #BP - T - N - Breakpoint, INT 3 instruction.
120	dd 0 ; 4 - #OF - T - N - Overflow, INTO instruction.
121	dd 0 ; 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction.
122	dd NAME(TRPMGCTrap06Handler) ; 6 - #UD - F - N - Undefined(/Invalid) Opcode.
123	dd NAME(TRPMGCTrap07Handler) ; 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction.
124	dd 0 ; 8 - #DF - A - 0 - Double fault.
125	dd 0 ; 9 - - F - N - Coprocessor Segment Overrun (obsolete).
126	dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
127	dd NAME(TRPMGCTrap0bHandler) ; b - #NP - F - Y - Segment not present.
128	dd 0 ; c - #SS - F - Y - Stack-Segment fault.
129	dd NAME(TRPMGCTrap0dHandler) ; d - #GP - F - Y - General protection fault.
130	dd NAME(TRPMGCTrap0eHandler) ; e - #PF - F - Y - Page fault.
131	dd 0 ; f - - - - Intel Reserved. Do not use.
132	dd 0 ; 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction.
133	dd 0 ; 11 - #AC - F - 0 - Alignment Check.
134	dd 0 ; 12 - #MC - A - N - Machine Check.
135	dd 0 ; 13 - #XF - F - N - SIMD Floating-Point Exception.
136	dd 0 ; 14 - - - - Intel Reserved. Do not use.
137	dd 0 ; 15 - - - - Intel Reserved. Do not use.
138	dd 0 ; 16 - - - - Intel Reserved. Do not use.
139	dd 0 ; 17 - - - - Intel Reserved. Do not use.
140	dd 0 ; 18 - - - - Intel Reserved. Do not use.
141
142
143
144	;;
145	; We start by 24 push <vector no.> + jmp <generic entry point>
146	;
147	ALIGNCODE(16)
148	BEGINPROC_EXPORTED TRPMGCHandlerGeneric
149	%macro TRPMGenericEntry 1
150	db 06ah, i ; push imm8 - note that this is a signextended value.
151	jmp %1
152	ALIGNCODE(8)
153	%assign i i+1
154	%endmacro
155
156	%assign i 0 ; start counter.
157	TRPMGenericEntry GenericTrap ; 0
158	TRPMGenericEntry GenericTrap ; 1
159	TRPMGenericEntry GenericTrap ; 2
160	TRPMGenericEntry GenericTrap ; 3
161	TRPMGenericEntry GenericTrap ; 4
162	TRPMGenericEntry GenericTrap ; 5
163	TRPMGenericEntry GenericTrap ; 6
164	TRPMGenericEntry GenericTrap ; 7
165	TRPMGenericEntry GenericTrapErrCode ; 8
166	TRPMGenericEntry GenericTrap ; 9
167	TRPMGenericEntry GenericTrapErrCode ; a
168	TRPMGenericEntry GenericTrapErrCode ; b
169	TRPMGenericEntry GenericTrapErrCode ; c
170	TRPMGenericEntry GenericTrapErrCode ; d
171	TRPMGenericEntry GenericTrapErrCode ; e
172	TRPMGenericEntry GenericTrap ; f (reserved)
173	TRPMGenericEntry GenericTrap ; 10
174	TRPMGenericEntry GenericTrapErrCode ; 11
175	TRPMGenericEntry GenericTrap ; 12
176	TRPMGenericEntry GenericTrap ; 13
177	TRPMGenericEntry GenericTrap ; 14 (reserved)
178	TRPMGenericEntry GenericTrap ; 15 (reserved)
179	TRPMGenericEntry GenericTrap ; 16 (reserved)
180	TRPMGenericEntry GenericTrap ; 17 (reserved)
181	%undef i
182	%undef TRPMGenericEntry
183
184	;;
185	; Main exception handler for the guest context
186	;
187	; Stack:
188	; 14 SS
189	; 10 ESP
190	; c EFLAGS
191	; 8 CS
192	; 4 EIP
193	; 0 vector number
194	;
195	; @uses none
196	;
197	ALIGNCODE(8)
198	GenericTrap:
199	;
200	; for the present we fake an error code ~0
201	;
202	push eax
203	mov eax, 0ffffffffh
204	xchg [esp + 4], eax ; get vector number, set error code
205	xchg [esp], eax ; get saved eax, set vector number
206	jmp short GenericTrapErrCode
207
208
209	;;
210	; Main exception handler for the guest context with error code
211	;
212	; Stack:
213	; 28 GS (V86 only)
214	; 24 FS (V86 only)
215	; 20 DS (V86 only)
216	; 1C ES (V86 only)
217	; 18 SS (only if ring transition.)
218	; 14 ESP (only if ring transition.)
219	; 10 EFLAGS
220	; c CS
221	; 8 EIP
222	; 4 Error code. (~0 for vectors which don't take an error code.)
223	; 0 vector number
224	;
225	; Error code:
226	;
227	; 31 16 15 3 2 1 0
228	;
229	; reserved segment TI IDT EXT
230	; selector GDT/LDT (1) IDT External interrupt
231	; index (IDT=0) index
232	;
233	; NOTE: Page faults (trap 14) have a different error code
234	;
235	; @uses none
236	;
237	ALIGNCODE(8)
238	GenericTrapErrCode:
239	cld
240
241	;
242	; Setup CPUMCTXCORE frame
243	;
244	; ASSUMPTION: If trap in hypervisor, we assume that we can read two dword
245	; under the bottom of the stack. This is atm safe.
246	; ASSUMPTION: There is sufficient stack space.
247	; ASSUMPTION: The stack is not write protected.
248	;
249	%define ESPOFF CPUMCTXCORE_size
250
251	sub esp, CPUMCTXCORE_size
252	mov [esp + CPUMCTXCORE.eax], eax
253	mov [esp + CPUMCTXCORE.ecx], ecx
254	mov [esp + CPUMCTXCORE.edx], edx
255	mov [esp + CPUMCTXCORE.ebx], ebx
256	mov [esp + CPUMCTXCORE.esi], esi
257	mov [esp + CPUMCTXCORE.edi], edi
258	mov [esp + CPUMCTXCORE.ebp], ebp
259
260	mov eax, [esp + 14h + ESPOFF] ; esp
261	mov [esp + CPUMCTXCORE.esp], eax
262	mov eax, [esp + 18h + ESPOFF] ; ss
263	mov dword [esp + CPUMCTXCORE.ss], eax
264
265	mov eax, [esp + 0ch + ESPOFF] ; cs
266	mov dword [esp + CPUMCTXCORE.cs], eax
267	mov eax, [esp + 08h + ESPOFF] ; eip
268	mov [esp + CPUMCTXCORE.eip], eax
269	mov eax, [esp + 10h + ESPOFF] ; eflags
270	mov [esp + CPUMCTXCORE.eflags], eax
271
272	mov eax, es
273	mov dword [esp + CPUMCTXCORE.es], eax
274	mov eax, ds
275	mov dword [esp + CPUMCTXCORE.ds], eax
276	mov eax, fs
277	mov dword [esp + CPUMCTXCORE.fs], eax
278	mov eax, gs
279	mov dword [esp + CPUMCTXCORE.gs], eax
280
281	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
282	jz short gt_SkipV86Entry
283
284	;
285	; The DS, ES, FS and GS registers are zeroed in V86 mode and their real values are on the stack
286	;
287	mov eax, dword [esp + ESPOFF + 1Ch]
288	mov dword [esp + CPUMCTXCORE.es], eax
289
290	mov eax, dword [esp + ESPOFF + 20h]
291	mov dword [esp + CPUMCTXCORE.ds], eax
292
293	mov eax, dword [esp + ESPOFF + 24h]
294	mov dword [esp + CPUMCTXCORE.fs], eax
295
296	mov eax, dword [esp + ESPOFF + 28h]
297	mov dword [esp + CPUMCTXCORE.gs], eax
298
299	gt_SkipV86Entry:
300	;
301	; Disable Ring-0 WP
302	;
303	mov eax, cr0 ;; @todo elimitate this read?
304	and eax, ~X86_CR0_WRITE_PROTECT
305	mov cr0, eax
306
307	;
308	; Load Hypervisor DS and ES (get it from the SS)
309	;
310	mov eax, ss
311	mov ds, eax
312	mov es, eax
313
314	%ifdef VBOX_WITH_STATISTICS
315	;
316	; Start profiling.
317	;
318	mov edx, [esp + 0h + ESPOFF] ; vector number
319	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128.
320	add edx, TRPM.aStatGCTraps
321	add edx, IMP(g_TRPM)
322	STAM_PROFILE_ADV_START edx
323	%endif
324
325	;
326	; Store the information about the active trap/interrupt.
327	;
328	mov eax, IMP(g_TRPM)
329	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
330	mov [eax + TRPM.uActiveVector], edx
331	mov edx, [esp + 4h + ESPOFF] ; error code
332	mov [eax + TRPM.uActiveErrorCode], edx
333	mov dword [eax + TRPM.enmActiveType], TRPM_TRAP
334	mov edx, cr2 ;; @todo Check how expensive cr2 reads are!
335	mov dword [eax + TRPM.uActiveCR2], edx
336
337	;
338	; Check if we're in Hypervisor when this happend.
339	;
340	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
341	jnz short gt_NotHyperVisor
342
343	test byte [esp + 0ch + ESPOFF], 3h ; check CPL of the cs selector
344	jz near gt_InHypervisor
345
346	;
347	; Trap in guest code.
348	;
349	gt_NotHyperVisor:
350	%ifdef DEBUG_STUFF_TRPG
351	mov ebx, [esp + 4h + ESPOFF] ; error code
352	mov ecx, 'trpG' ; indicate trap.
353	mov edx, [esp + 0h + ESPOFF] ; vector number
354	lea eax, [esp]
355	call trpmDbgDumpRegisterFrame
356	%endif
357
358	;
359	; Do we have a GC handler for these traps?
360	;
361	mov edx, [esp + 0h + ESPOFF] ; vector number
362	mov eax, [g_apfnStaticTrapHandlersGuest + edx * 4]
363	or eax, eax
364	jnz short gt_HaveHandler
365	mov eax, VINF_EM_RAW_GUEST_TRAP
366	jmp short gt_GuestTrap
367
368	;
369	; Call static handler.
370	;
371	gt_HaveHandler:
372	push esp ; Param 2 - CPUMCTXCORE pointer.
373	push dword IMP(g_TRPM) ; Param 1 - Pointer to TRPM
374	call eax
375	add esp, byte 8 ; cleanup stack (cdecl)
376	or eax, eax
377	je near gt_continue_guest
378
379	;
380	; Switch back to the host and process it there.
381	;
382	gt_GuestTrap:
383	%ifdef VBOX_WITH_STATISTICS
384	mov edx, [esp + 0h + ESPOFF] ; vector number
385	imul edx, edx, byte STAMPROFILEADV_size ; assume < 128
386	add edx, IMP(g_TRPM)
387	add edx, TRPM.aStatGCTraps
388	STAM_PROFILE_ADV_STOP edx
389	%endif
390	mov edx, IMP(g_VM)
391	call [edx + VM.pfnVMMGCGuestToHostAsmGuestCtx]
392
393	;; @todo r=bird: is this path actually every taken? if not we should replace this code with a panic.
394	;
395	; We've returned!
396	; N.B. The stack has been changed now! No CPUMCTXCORE any longer. esp = vector number.
397	; N.B. Current scheduling design causes this code path to be unused.
398	; N.B. Better not use it when in V86 mode!
399	;
400
401	; Enable WP
402	mov eax, cr0 ;; @todo try elimiate this read.
403	or eax, X86_CR0_WRITE_PROTECT
404	mov cr0, eax
405	; Restore guest context and continue execution.
406	mov edx, IMP(g_CPUM)
407	lea eax, [esp + 8]
408	push eax
409	call NAME(CPUMGCRestoreInt)
410	lea esp, [esp + 0ch] ; cleanup call and skip vector & error code.
411
412	iret
413
414
415	;
416	; Continue(/Resume/Restart/Whatever) guest execution.
417	;
418	ALIGNCODE(16)
419	gt_continue_guest:
420	%ifdef VBOX_WITH_STATISTICS
421	mov edx, [esp + 0h + ESPOFF] ; vector number
422	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128
423	add edx, TRPM.aStatGCTraps
424	add edx, IMP(g_TRPM)
425	STAM_PROFILE_ADV_STOP edx
426	%endif
427
428	; enable WP
429	mov eax, cr0 ;; @todo try elimiate this read.
430	or eax, X86_CR0_WRITE_PROTECT
431	mov cr0, eax
432
433	; restore guest state and start executing again.
434	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
435	jnz gt_V86Return
436
437	mov ecx, [esp + CPUMCTXCORE.ecx]
438	mov edx, [esp + CPUMCTXCORE.edx]
439	mov ebx, [esp + CPUMCTXCORE.ebx]
440	mov ebp, [esp + CPUMCTXCORE.ebp]
441	mov esi, [esp + CPUMCTXCORE.esi]
442	mov edi, [esp + CPUMCTXCORE.edi]
443
444	mov eax, [esp + CPUMCTXCORE.esp]
445	mov [esp + 14h + ESPOFF], eax ; esp
446	mov eax, dword [esp + CPUMCTXCORE.ss]
447	mov [esp + 18h + ESPOFF], eax ; ss
448
449	mov eax, dword [esp + CPUMCTXCORE.gs]
450	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS
451	mov gs, eax
452
453	mov eax, dword [esp + CPUMCTXCORE.fs]
454	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS
455	mov fs, eax
456
457	mov eax, dword [esp + CPUMCTXCORE.es]
458	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_ES
459	mov es, eax
460
461	mov eax, dword [esp + CPUMCTXCORE.ds]
462	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_DS
463	mov ds, eax
464
465	mov eax, dword [esp + CPUMCTXCORE.cs]
466	mov [esp + 0ch + ESPOFF], eax ; cs
467	mov eax, [esp + CPUMCTXCORE.eflags]
468	mov [esp + 10h + ESPOFF], eax ; eflags
469	mov eax, [esp + CPUMCTXCORE.eip]
470	mov [esp + 08h + ESPOFF], eax ; eip
471
472	; finally restore our scratch register eax
473	mov eax, [esp + CPUMCTXCORE.eax]
474
475	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
476
477	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_IRET
478	iret
479
480	ALIGNCODE(16)
481	gt_V86Return:
482	mov ecx, [esp + CPUMCTXCORE.ecx]
483	mov edx, [esp + CPUMCTXCORE.edx]
484	mov ebx, [esp + CPUMCTXCORE.ebx]
485	mov ebp, [esp + CPUMCTXCORE.ebp]
486	mov esi, [esp + CPUMCTXCORE.esi]
487	mov edi, [esp + CPUMCTXCORE.edi]
488
489	mov eax, [esp + CPUMCTXCORE.esp]
490	mov [esp + 14h + ESPOFF], eax ; esp
491	mov eax, dword [esp + CPUMCTXCORE.ss]
492	mov [esp + 18h + ESPOFF], eax ; ss
493
494	mov eax, dword [esp + CPUMCTXCORE.es]
495	mov [esp + 1ch + ESPOFF], eax ; es
496	mov eax, dword [esp + CPUMCTXCORE.ds]
497	mov [esp + 20h + ESPOFF], eax ; ds
498	mov eax, dword [esp + CPUMCTXCORE.fs]
499	mov [esp + 24h + ESPOFF], eax ; fs
500	mov eax, dword [esp + CPUMCTXCORE.gs]
501	mov [esp + 28h + ESPOFF], eax ; gs
502
503	mov eax, [esp + CPUMCTXCORE.eip]
504	mov [esp + 08h + ESPOFF], eax ; eip
505	mov eax, dword [esp + CPUMCTXCORE.cs]
506	mov [esp + 0ch + ESPOFF], eax ; cs
507	mov eax, [esp + CPUMCTXCORE.eflags]
508	mov [esp + 10h + ESPOFF], eax ; eflags
509
510	; finally restore our scratch register eax
511	mov eax, [esp + CPUMCTXCORE.eax]
512
513	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
514
515	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86
516	iret
517
518	;
519	; Trap in Hypervisor, try to handle it.
520	;
521	; (eax = pTRPM)
522	;
523	ALIGNCODE(16)
524	gt_InHypervisor:
525	; fix ss:esp.
526	lea ebx, [esp + 14h + ESPOFF] ; calc esp at trap
527	mov [esp + CPUMCTXCORE.esp], ebx; update esp in register frame
528	mov [esp + CPUMCTXCORE.ss], ss ; update ss in register frame
529
530	; tell cpum about the context core.
531	xchg esi, eax ; save pTRPM - @todo reallocate this variable to esi, edi, or ebx
532	push esp ; Param 2 - The new CPUMCTXCORE pointer.
533	push IMP(g_VM) ; Param 1 - Pointer to the VM.
534	call NAME(CPUMHyperSetCtxCore)
535	add esp, byte 8 ; stack cleanup (cdecl)
536	xchg eax, esi ; restore pTRPM
537
538	; check for temporary handler.
539	movzx ebx, byte [eax + TRPM.uActiveVector]
540	xor ecx, ecx
541	xchg ecx, [eax + TRPM.aTmpTrapHandlers + ebx * 4] ; ecx = Temp handler pointer or 0
542	or ecx, ecx
543	jnz short gt_Hyper_HaveTemporaryHandler
544
545	; check for static trap handler.
546	mov ecx, [g_apfnStaticTrapHandlersHyper + ebx * 4] ; ecx = Static handler pointer or 0
547	or ecx, ecx
548	jnz short gt_Hyper_HaveStaticHandler
549	jmp gt_Hyper_AbandonShip
550
551
552	;
553	; Temporary trap handler present, call it (CDECL).
554	;
555	gt_Hyper_HaveTemporaryHandler:
556	push esp ; Param 2 - Pointer to CPUMCTXCORE.
557	push IMP(g_VM) ; Param 1 - Pointer to VM.
558	call ecx
559	add esp, byte 8 ; cleanup stack (cdecl)
560
561	cmp eax, byte VINF_SUCCESS ; If completely handled Then resume execution.
562	je near gt_Hyper_Continue
563	;; @todo Handle ALL returns types from temporary handlers!
564	jmp gt_Hyper_AbandonShip
565
566
567	;
568	; Static trap handler present, call it (CDECL).
569	;
570	gt_Hyper_HaveStaticHandler:
571	push esp ; Param 2 - Pointer to CPUMCTXCORE.
572	push eax ; Param 1 - Pointer to TRPM
573	call ecx
574	add esp, byte 8 ; cleanup stack (cdecl)
575
576	cmp eax, byte VINF_SUCCESS ; If completely handled Then resume execution.
577	je short gt_Hyper_Continue
578	cmp eax, VINF_EM_DBG_HYPER_STEPPED
579	je short gt_Hyper_ToHost
580	cmp eax, VINF_EM_DBG_HYPER_BREAKPOINT
581	je short gt_Hyper_ToHost
582	cmp eax, VINF_EM_DBG_HYPER_ASSERTION
583	je short gt_Hyper_ToHost
584	jmp gt_Hyper_AbandonShip
585
586	;
587	; Pop back to the host to service the error.
588	;
589	gt_Hyper_ToHost:
590	mov ecx, esp
591	mov edx, IMP(g_VM)
592	call [edx + VM.pfnVMMGCGuestToHostAsm]
593	jmp short gt_Hyper_Continue
594
595	;
596	; Continue(/Resume/Restart/Whatever) hypervisor execution.
597	; Don't reset the TRPM state. Caller takes care of that.
598	;
599	ALIGNCODE(16)
600	gt_Hyper_Continue:
601	%ifdef DEBUG_STUFF
602	mov ebx, [esp + 4h + ESPOFF] ; error code
603	mov ecx, 'resH' ; indicate trap.
604	mov edx, [esp + 0h + ESPOFF] ; vector number
605	lea eax, [esp]
606	call trpmDbgDumpRegisterFrame
607	%endif
608	; tell CPUM to use the default CPUMCTXCORE.
609	push byte 0 ; Param 2 - NULL indicating use default context core.
610	push IMP(g_VM) ; Param 1 - The VM pointer.
611	call NAME(CPUMHyperSetCtxCore)
612	add esp, byte 8 ; stack cleanup (cdecl)
613
614	%ifdef VBOX_WITH_STATISTICS
615	mov edx, [esp + 0h + ESPOFF] ; vector number
616	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128
617	add edx, TRPM.aStatGCTraps
618	add edx, IMP(g_TRPM)
619	STAM_PROFILE_ADV_STOP edx
620	%endif
621
622	; restore
623	mov ecx, [esp + CPUMCTXCORE.ecx]
624	mov edx, [esp + CPUMCTXCORE.edx]
625	mov ebx, [esp + CPUMCTXCORE.ebx]
626	mov ebp, [esp + CPUMCTXCORE.ebp]
627	mov esi, [esp + CPUMCTXCORE.esi]
628	mov edi, [esp + CPUMCTXCORE.edi]
629
630	mov eax, dword [esp + CPUMCTXCORE.gs]
631	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS \| TRPM_TRAP_IN_HYPER
632	mov gs, eax
633
634	mov eax, dword [esp + CPUMCTXCORE.fs]
635	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS \| TRPM_TRAP_IN_HYPER
636	mov fs, eax
637
638	mov eax, dword [esp + CPUMCTXCORE.es]
639	mov es, eax
640	mov eax, dword [esp + CPUMCTXCORE.ds]
641	mov ds, eax
642
643	; skip esp & ss
644
645	mov eax, [esp + CPUMCTXCORE.eip]
646	mov [esp + 08h + ESPOFF], eax ; eip
647	mov eax, dword [esp + CPUMCTXCORE.cs]
648	mov [esp + 0ch + ESPOFF], eax ; cs
649	mov eax, [esp + CPUMCTXCORE.eflags]
650	mov [esp + 10h + ESPOFF], eax ; eflags
651
652	; finally restore our scratch register eax
653	mov eax, [esp + CPUMCTXCORE.eax]
654
655	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
656
657	iret
658
659
660	;
661	; ABANDON SHIP! DON'T PANIC!
662	;
663	gt_Hyper_AbandonShip:
664	%ifdef DEBUG_STUFF
665	mov ebx, [esp + 4h + ESPOFF] ; error code
666	mov ecx, 'trpH' ; indicate trap.
667	mov edx, [esp + 0h + ESPOFF] ; vector number
668	lea eax, [esp]
669	call trpmDbgDumpRegisterFrame
670	%endif
671
672	gt_Hyper_DontPanic:
673	mov ecx, esp
674	mov edx, IMP(g_VM)
675	mov eax, VERR_TRPM_DONT_PANIC
676	call [edx + VM.pfnVMMGCGuestToHostAsmHyperCtx]
677	%ifdef DEBUG_STUFF
678	COM_S_PRINT 'bad!!!'
679	%endif
680	jmp gt_Hyper_DontPanic ; this shall never ever happen!
681	%undef ESPOFF
682	ENDPROC TRPMGCHandlerGeneric
683
684
685
686
687
688	;;
689	; We start by 256 push <vector no.> + jmp interruptworker
690	;
691	ALIGNCODE(16)
692	BEGINPROC_EXPORTED TRPMGCHandlerInterupt
693	; NASM has some nice features, here an example of a loop.
694	%assign i 0
695	%rep 256
696	db 06ah, i ; push imm8 - note that this is a signextended value.
697	jmp ti_GenericInterrupt
698	ALIGNCODE(8)
699	%assign i i+1
700	%endrep
701
702	;;
703	; Main interrupt handler for the guest context
704	;
705	; Stack:
706	; 24 GS (V86 only)
707	; 20 FS (V86 only)
708	; 1C DS (V86 only)
709	; 18 ES (V86 only)
710	; 14 SS
711	; 10 ESP
712	; c EFLAGS
713	; 8 CS
714	; 4 EIP
715	; ESP -> 0 Vector number (only use low byte!).
716	;
717	; @uses none
718	ti_GenericInterrupt:
719	cld
720
721	;
722	; Setup CPUMCTXCORE frame
723	;
724	; ASSUMPTION: If trap in hypervisor, we assume that we can read two dword
725	; under the bottom of the stack. This is atm safe.
726	; ASSUMPTION: There is sufficient stack space.
727	; ASSUMPTION: The stack is not write protected.
728	;
729	%define ESPOFF CPUMCTXCORE_size
730
731	sub esp, CPUMCTXCORE_size
732	mov [esp + CPUMCTXCORE.eax], eax
733	mov [esp + CPUMCTXCORE.ecx], ecx
734	mov [esp + CPUMCTXCORE.edx], edx
735	mov [esp + CPUMCTXCORE.ebx], ebx
736	mov [esp + CPUMCTXCORE.esi], esi
737	mov [esp + CPUMCTXCORE.edi], edi
738	mov [esp + CPUMCTXCORE.ebp], ebp
739
740	mov eax, [esp + 04h + ESPOFF] ; eip
741	mov [esp + CPUMCTXCORE.eip], eax
742	mov eax, dword [esp + 08h + ESPOFF] ; cs
743	mov [esp + CPUMCTXCORE.cs], eax
744	mov eax, [esp + 0ch + ESPOFF] ; eflags
745	mov [esp + CPUMCTXCORE.eflags], eax
746
747	mov eax, [esp + 10h + ESPOFF] ; esp
748	mov [esp + CPUMCTXCORE.esp], eax
749	mov eax, dword [esp + 14h + ESPOFF] ; ss
750	mov [esp + CPUMCTXCORE.ss], eax
751
752	mov eax, es
753	mov dword [esp + CPUMCTXCORE.es], eax
754	mov eax, ds
755	mov dword [esp + CPUMCTXCORE.ds], eax
756	mov eax, fs
757	mov dword [esp + CPUMCTXCORE.fs], eax
758	mov eax, gs
759	mov dword [esp + CPUMCTXCORE.gs], eax
760
761	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
762	jz short ti_SkipV86Entry
763
764	;
765	; The DS, ES, FS and GS registers are zeroed in V86 mode and their real values are on the stack
766	;
767	mov eax, dword [esp + ESPOFF + 18h]
768	mov dword [esp + CPUMCTXCORE.es], eax
769
770	mov eax, dword [esp + ESPOFF + 1Ch]
771	mov dword [esp + CPUMCTXCORE.ds], eax
772
773	mov eax, dword [esp + ESPOFF + 20h]
774	mov dword [esp + CPUMCTXCORE.fs], eax
775
776	mov eax, dword [esp + ESPOFF + 24h]
777	mov dword [esp + CPUMCTXCORE.gs], eax
778
779	ti_SkipV86Entry:
780
781	;
782	; Disable Ring-0 WP
783	;
784	mov eax, cr0 ;; @todo try elimiate this read.
785	and eax, ~X86_CR0_WRITE_PROTECT
786	mov cr0, eax
787
788	;
789	; Load Hypervisor DS and ES (get it from the SS)
790	;
791	mov eax, ss
792	mov ds, eax
793	mov es, eax
794
795	;
796	; Store the information about the active trap/interrupt.
797	;
798	mov eax, IMP(g_TRPM)
799	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
800	mov [eax + TRPM.uActiveVector], edx
801	xor edx, edx
802	mov dword [eax + TRPM.enmActiveType], TRPM_HARDWARE_INT
803	dec edx
804	mov [eax + TRPM.uActiveErrorCode], edx
805	mov [eax + TRPM.uActiveCR2], edx
806
807	;
808	; Check if we're in Hypervisor when this happend.
809	;
810	test byte [esp + 08h + ESPOFF], 3h ; check CPL of the cs selector
811	jnz short gi_NotHyperVisor
812	jmp gi_HyperVisor
813
814	;
815	; Trap in guest code.
816	;
817	gi_NotHyperVisor:
818	and dword [esp + CPUMCTXCORE.eflags], ~010000h ; Clear RF (Resume Flag). @todo make %defines for eflags.
819	; The guest shall not see this in it's state.
820	%ifdef DEBUG_STUFF_INT
821	mov ecx, 'intG' ; indicate trap.
822	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
823	lea eax, [esp]
824	call trpmDbgDumpRegisterFrame
825	%endif
826
827	;
828	; Switch back to the host and process it there.
829	;
830	mov edx, IMP(g_VM)
831	mov eax, VINF_EM_RAW_INTERRUPT
832	call [edx + VM.pfnVMMGCGuestToHostAsmGuestCtx]
833
834	;
835	; We've returned!
836	; NOTE that the stack has been changed now!
837	; there is no longer any CPUMCTXCORE around and esp points to vector number!
838	;
839	; Reset TRPM state
840	mov eax, IMP(g_TRPM)
841	xor edx, edx
842	dec edx ; edx = 0ffffffffh
843	xchg [eax + TRPM.uActiveVector], edx
844	mov [eax + TRPM.uPrevVector], edx
845
846	; Enable WP
847	mov eax, cr0 ;; @todo try elimiate this read.
848	or eax, X86_CR0_WRITE_PROTECT
849	mov cr0, eax
850	; restore guest context and continue execution.
851	lea eax, [esp + 8]
852	push eax
853	call NAME(CPUMGCRestoreInt)
854	lea esp, [esp + 0ch] ; cleanup call and skip vector & error code.
855
856	iret
857
858	; -+- Entry point -+-
859	;
860	; We're in hypervisor mode which means no guest context
861	; and special care to be taken to restore the hypervisor
862	; context correctely.
863	;
864	; ATM the only place this can happen is when entering a trap handler.
865	; We make ASSUMPTIONS about this in respects to the WP CR0 bit
866	;
867	gi_HyperVisor:
868	lea eax, [esp + 14h + ESPOFF] ; calc esp at trap
869	mov [esp + CPUMCTXCORE.esp], eax ; update esp in register frame
870	mov [esp + CPUMCTXCORE.ss], ss ; update ss in register frame
871
872	%ifdef DEBUG_STUFF_INT
873	mov ebx, [esp + 4h + ESPOFF] ; error code
874	mov ecx, 'intH' ; indicate hypervisor interrupt.
875	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
876	lea eax, [esp]
877	call trpmDbgDumpRegisterFrame
878	%endif
879
880	mov ecx, esp
881	mov edx, IMP(g_VM)
882	mov eax, VINF_EM_RAW_INTERRUPT_HYPER
883	call [edx + VM.pfnVMMGCGuestToHostAsm]
884	%ifdef DEBUG_STUFF_INT
885	COM_CHAR '!'
886	%endif
887
888	;
889	; We've returned!
890	;
891	; Reset TRPM state - don't record this.
892	mov eax, IMP(g_TRPM)
893	mov dword [eax + TRPM.uActiveVector], 0ffffffffh
894
895	;
896	; Restore the hypervisor context and return.
897	;
898	mov ecx, [esp + CPUMCTXCORE.ecx]
899	mov edx, [esp + CPUMCTXCORE.edx]
900	mov ebx, [esp + CPUMCTXCORE.ebx]
901	mov ebp, [esp + CPUMCTXCORE.ebp]
902	mov esi, [esp + CPUMCTXCORE.esi]
903	mov edi, [esp + CPUMCTXCORE.edi]
904
905	; In V86 mode DS, ES, FS & GS are restored by the iret
906	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
907	jnz short ti_SkipSelRegs
908
909	mov eax, [esp + CPUMCTXCORE.gs]
910	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS \| TRPM_TRAP_IN_HYPER
911	mov gs, eax
912
913	mov eax, [esp + CPUMCTXCORE.fs]
914	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS \| TRPM_TRAP_IN_HYPER
915	mov fs, eax
916
917	mov eax, [esp + CPUMCTXCORE.es]
918	mov es, eax
919	mov eax, [esp + CPUMCTXCORE.ds]
920	mov ds, eax
921
922	ti_SkipSelRegs:
923	; finally restore our scratch register eax
924	mov eax, [esp + CPUMCTXCORE.eax]
925
926	; skip esp, ss, cs, eip & eflags. Done by iret
927
928	add esp, ESPOFF + 4h ; skip CPUMCTXCORE structure & vector number.
929
930	iret
931	%undef ESPOFF
932	ENDPROC TRPMGCHandlerInterupt
933
934
935
936	;;
937	; Trap handler for #MC
938	;
939	; This handler will forward the #MC to the host OS. Since this
940	; is generalized in the generic interrupt handler, we just disable
941	; interrupts and push vector number and jump to the generic code.
942	;
943	; Stack:
944	; 10 SS (only if ring transition.)
945	; c ESP (only if ring transition.)
946	; 8 EFLAGS
947	; 4 CS
948	; 0 EIP
949	;
950	; @uses none
951	;
952	ALIGNCODE(16)
953	BEGINPROC_EXPORTED TRPMGCHandlerTrap12
954	push byte 12h
955	jmp ti_GenericInterrupt
956	ENDPROC TRPMGCHandlerTrap12
957
958
959
960
961	;;
962	; Trap handler for double fault (#DF).
963	;
964	; This is a special trap handler executes in separate task with own TSS, with
965	; one of the intermediate memory contexts instead of the shadow context.
966	; The handler will unconditionally print an report to the comport configured
967	; for the COM_S_* macros before attempting to return to the host. If it it ends
968	; up double faulting more than 10 times, it will simply cause an tripple fault
969	; to get us out of the mess.
970	;
971	; @param esp Half way down the hypvervisor stack + the trap frame.
972	; @param ebp Half way down the hypvervisor stack.
973	; @param eflags Interrupts disabled, nested flag is probably set (we don't care).
974	; @param ecx The address of the hypervisor TSS.
975	; @param edi Same as ecx.
976	; @param eax Same as ecx.
977	; @param edx Address of the VM structure.
978	; @param esi Same as edx.
979	; @param ebx Same as edx.
980	; @param ss Hypervisor DS.
981	; @param ds Hypervisor DS.
982	; @param es Hypervisor DS.
983	; @param fs 0
984	; @param gs 0
985	;
986	;
987	; @remark To be able to catch errors with WP turned off, it is required that the
988	; TSS GDT descriptor and the TSSes are writable (X86_PTE_RW). See SELM.cpp
989	; for how to enable this.
990	;
991	; @remark It is not safe to resume the VMM after a double fault. (At least not
992	; without clearing the busy flag of the TssTrap8 and fixing whatever cause it.)
993	;
994	ALIGNCODE(16)
995	BEGINPROC_EXPORTED TRPMGCHandlerTrap08
996	; be careful.
997	cli
998	cld
999
1000	;
1001	; Load Hypervisor DS and ES (get it from the SS) - paranoia, but the TSS could be overwritten.. :)
1002	;
1003	mov eax, ss
1004	mov ds, eax
1005	mov es, eax
1006
1007	COM_S_PRINT 10,13,'* Guru Mediation 00000008 - Double Fault! *',10,13
1008
1009	;
1010	; Disable write protection.
1011	;
1012	mov eax, cr0
1013	and eax, ~X86_CR0_WRITE_PROTECT
1014	mov cr0, eax
1015
1016
1017	COM_S_PRINT 'VM='
1018	COM_S_DWORD_REG edx
1019	COM_S_PRINT ' prevTSS='
1020	COM_S_DWORD_REG ecx
1021	COM_S_PRINT ' prevCR3='
1022	mov eax, [ecx + VBOXTSS.cr3]
1023	COM_S_DWORD_REG eax
1024	COM_S_PRINT ' prevLdtr='
1025	movzx eax, word [ecx + VBOXTSS.selLdt]
1026	COM_S_DWORD_REG eax
1027	COM_S_NEWLINE
1028
1029	;
1030	; Create CPUMCTXCORE structure.
1031	;
1032	sub esp, CPUMCTXCORE_size
1033
1034	mov eax, [ecx + VBOXTSS.eip]
1035	mov [esp + CPUMCTXCORE.eip], eax
1036	mov eax, [ecx + VBOXTSS.eflags]
1037	mov [esp + CPUMCTXCORE.eflags], eax
1038
1039	movzx eax, word [ecx + VBOXTSS.cs]
1040	mov dword [esp + CPUMCTXCORE.cs], eax
1041	movzx eax, word [ecx + VBOXTSS.ds]
1042	mov dword [esp + CPUMCTXCORE.ds], eax
1043	movzx eax, word [ecx + VBOXTSS.es]
1044	mov dword [esp + CPUMCTXCORE.es], eax
1045	movzx eax, word [ecx + VBOXTSS.fs]
1046	mov dword [esp + CPUMCTXCORE.fs], eax
1047	movzx eax, word [ecx + VBOXTSS.gs]
1048	mov dword [esp + CPUMCTXCORE.gs], eax
1049	movzx eax, word [ecx + VBOXTSS.ss]
1050	mov [esp + CPUMCTXCORE.ss], eax
1051	mov eax, [ecx + VBOXTSS.esp]
1052	mov [esp + CPUMCTXCORE.esp], eax
1053	mov eax, [ecx + VBOXTSS.ecx]
1054	mov [esp + CPUMCTXCORE.ecx], eax
1055	mov eax, [ecx + VBOXTSS.edx]
1056	mov [esp + CPUMCTXCORE.edx], eax
1057	mov eax, [ecx + VBOXTSS.ebx]
1058	mov [esp + CPUMCTXCORE.ebx], eax
1059	mov eax, [ecx + VBOXTSS.eax]
1060	mov [esp + CPUMCTXCORE.eax], eax
1061	mov eax, [ecx + VBOXTSS.ebp]
1062	mov [esp + CPUMCTXCORE.ebp], eax
1063	mov eax, [ecx + VBOXTSS.esi]
1064	mov [esp + CPUMCTXCORE.esi], eax
1065	mov eax, [ecx + VBOXTSS.edi]
1066	mov [esp + CPUMCTXCORE.edi], eax
1067
1068	;
1069	; Show regs
1070	;
1071	mov ebx, 0ffffffffh
1072	mov ecx, 'trpH' ; indicate trap.
1073	mov edx, 08h ; vector number
1074	lea eax, [esp]
1075	call trpmDbgDumpRegisterFrame
1076
1077	;
1078	; Should we try go back?
1079	;
1080	inc dword [df_Count]
1081	cmp dword [df_Count], byte 10
1082	jb df_to_host
1083	jmp df_tripple_fault
1084	df_Count: dd 0
1085
1086	;
1087	; Try return to the host.
1088	;
1089	df_to_host:
1090	COM_S_PRINT 'Trying to return to host...',10,13
1091	mov ecx, esp
1092	mov edx, IMP(g_VM)
1093	mov eax, VERR_TRPM_PANIC
1094	call [edx + VM.pfnVMMGCGuestToHostAsmHyperCtx]
1095	jmp short df_to_host
1096
1097	;
1098	; Perform a tripple fault.
1099	;
1100	df_tripple_fault:
1101	COM_S_PRINT 'Giving up - tripple faulting the machine...',10,13
1102	push byte 0
1103	push byte 0
1104	sidt [esp]
1105	mov word [esp], 0
1106	lidt [esp]
1107	xor eax, eax
1108	mov dword [eax], 0
1109	jmp df_tripple_fault
1110
1111	ENDPROC TRPMGCHandlerTrap08
1112
1113
1114
1115
1116	;;
1117	; Internal procedure used to dump registers.
1118	;
1119	; @param eax Pointer to CPUMCTXCORE.
1120	; @param edx Vector number
1121	; @param ecx 'trap' if trap, 'int' if interrupt.
1122	; @param ebx Error code if trap.
1123	;
1124	trpmDbgDumpRegisterFrame:
1125	sub esp, byte 8 ; working space for sidt/sgdt/etc
1126
1127	; Init _must_ be done on host before crashing!
1128	; push edx
1129	; push eax
1130	; COM_INIT
1131	; pop eax
1132	; pop edx
1133
1134	cmp ecx, 'trpH'
1135	je near tddrf_trpH
1136	cmp ecx, 'trpG'
1137	je near tddrf_trpG
1138	cmp ecx, 'intH'
1139	je near tddrf_intH
1140	cmp ecx, 'intG'
1141	je near tddrf_intG
1142	cmp ecx, 'resH'
1143	je near tddrf_resH
1144	COM_S_PRINT 10,13,'*** Bogus Dump Code '
1145	jmp tddrf_regs
1146
1147	%if 1 ; the verbose version
1148
1149	tddrf_intG:
1150	COM_S_PRINT 10,13,'*** Interrupt (Guest) '
1151	COM_S_DWORD_REG edx
1152	jmp tddrf_regs
1153
1154	tddrf_intH:
1155	COM_S_PRINT 10,13,'*** Interrupt (Hypervisor) '
1156	COM_S_DWORD_REG edx
1157	jmp tddrf_regs
1158
1159	tddrf_trpG:
1160	COM_S_PRINT 10,13,'*** Trap '
1161	jmp tddrf_trap_rest
1162
1163	%else ; the short version
1164
1165	tddrf_intG:
1166	COM_S_CHAR 'I'
1167	jmp tddrf_ret
1168
1169	tddrf_intH:
1170	COM_S_CHAR 'i'
1171	jmp tddrf_ret
1172
1173	tddrf_trpG:
1174	COM_S_CHAR 'T'
1175	jmp tddrf_ret
1176
1177	%endif ; the short version
1178
1179	tddrf_trpH:
1180	COM_S_PRINT 10,13,'*** Guru Meditation '
1181	jmp tddrf_trap_rest
1182
1183	tddrf_resH:
1184	COM_S_PRINT 10,13,'*** Resuming Hypervisor Trap '
1185	jmp tddrf_trap_rest
1186
1187	tddrf_trap_rest:
1188	COM_S_DWORD_REG edx
1189	COM_S_PRINT ' ErrorCode='
1190	COM_S_DWORD_REG ebx
1191	COM_S_PRINT ' cr2='
1192	mov ecx, cr2
1193	COM_S_DWORD_REG ecx
1194
1195	tddrf_regs:
1196	COM_S_PRINT ' ***',10,13,'cs:eip='
1197	movzx ecx, word [eax + CPUMCTXCORE.cs]
1198	COM_S_DWORD_REG ecx
1199	COM_S_CHAR ':'
1200	mov ecx, [eax + CPUMCTXCORE.eip]
1201	COM_S_DWORD_REG ecx
1202
1203	COM_S_PRINT ' ss:esp='
1204	movzx ecx, word [eax + CPUMCTXCORE.ss]
1205	COM_S_DWORD_REG ecx
1206	COM_S_CHAR ':'
1207	mov ecx, [eax + CPUMCTXCORE.esp]
1208	COM_S_DWORD_REG ecx
1209
1210
1211	sgdt [esp]
1212	COM_S_PRINT 10,13,' gdtr='
1213	movzx ecx, word [esp]
1214	COM_S_DWORD_REG ecx
1215	COM_S_CHAR ':'
1216	mov ecx, [esp + 2]
1217	COM_S_DWORD_REG ecx
1218
1219	sidt [esp]
1220	COM_S_PRINT ' idtr='
1221	movzx ecx, word [esp]
1222	COM_S_DWORD_REG ecx
1223	COM_S_CHAR ':'
1224	mov ecx, [esp + 2]
1225	COM_S_DWORD_REG ecx
1226
1227
1228	str [esp] ; yasm BUG! it generates sldt [esp] here! YASMCHECK!
1229	COM_S_PRINT 10,13,' tr='
1230	movzx ecx, word [esp]
1231	COM_S_DWORD_REG ecx
1232
1233	sldt [esp]
1234	COM_S_PRINT ' ldtr='
1235	movzx ecx, word [esp]
1236	COM_S_DWORD_REG ecx
1237
1238	COM_S_PRINT ' eflags='
1239	mov ecx, [eax + CPUMCTXCORE.eflags]
1240	COM_S_DWORD_REG ecx
1241
1242
1243	COM_S_PRINT 10,13,'cr0='
1244	mov ecx, cr0
1245	COM_S_DWORD_REG ecx
1246
1247	COM_S_PRINT ' cr2='
1248	mov ecx, cr2
1249	COM_S_DWORD_REG ecx
1250
1251	COM_S_PRINT ' cr3='
1252	mov ecx, cr3
1253	COM_S_DWORD_REG ecx
1254	COM_S_PRINT ' cr4='
1255	mov ecx, cr4
1256	COM_S_DWORD_REG ecx
1257
1258
1259	COM_S_PRINT 10,13,' ds='
1260	movzx ecx, word [eax + CPUMCTXCORE.ds]
1261	COM_S_DWORD_REG ecx
1262
1263	COM_S_PRINT ' es='
1264	movzx ecx, word [eax + CPUMCTXCORE.es]
1265	COM_S_DWORD_REG ecx
1266
1267	COM_S_PRINT ' fs='
1268	movzx ecx, word [eax + CPUMCTXCORE.fs]
1269	COM_S_DWORD_REG ecx
1270
1271	COM_S_PRINT ' gs='
1272	movzx ecx, word [eax + CPUMCTXCORE.gs]
1273	COM_S_DWORD_REG ecx
1274
1275
1276	COM_S_PRINT 10,13,'eax='
1277	mov ecx, [eax + CPUMCTXCORE.eax]
1278	COM_S_DWORD_REG ecx
1279
1280	COM_S_PRINT ' ebx='
1281	mov ecx, [eax + CPUMCTXCORE.ebx]
1282	COM_S_DWORD_REG ecx
1283
1284	COM_S_PRINT ' ecx='
1285	mov ecx, [eax + CPUMCTXCORE.ecx]
1286	COM_S_DWORD_REG ecx
1287
1288	COM_S_PRINT ' edx='
1289	mov ecx, [eax + CPUMCTXCORE.edx]
1290	COM_S_DWORD_REG ecx
1291
1292
1293	COM_S_PRINT 10,13,'esi='
1294	mov ecx, [eax + CPUMCTXCORE.esi]
1295	COM_S_DWORD_REG ecx
1296
1297	COM_S_PRINT ' edi='
1298	mov ecx, [eax + CPUMCTXCORE.edi]
1299	COM_S_DWORD_REG ecx
1300
1301	COM_S_PRINT ' ebp='
1302	mov ecx, [eax + CPUMCTXCORE.ebp]
1303	COM_S_DWORD_REG ecx
1304
1305
1306	COM_S_NEWLINE
1307
1308	tddrf_ret:
1309	add esp, byte 8
1310	ret
1311

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlersA.asm@ 5999

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