TRPMGCHandlersA.asm@ 5605

Last change on this file since 5605 was 4684, checked in by vboxsync, 17 years ago
Removed some CLIs that're no longer needed. Also straighted out a branch and added some todos.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 41.6 KB

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1	; $Id: TRPMGCHandlersA.asm 4684 2007-09-11 05:59:40Z vboxsync $
2	;; @file
3	; TRPM - Guest Context Trap Handlers
4	;
5
6	; Copyright (C) 2006-2007 innotek GmbH
7	;
8	; This file is part of VirtualBox Open Source Edition (OSE), as
9	; available from http://www.virtualbox.org. This file is free software;
10	; you can redistribute it and/or modify it under the terms of the GNU
11	; General Public License as published by the Free Software Foundation,
12	; in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
13	; distribution. VirtualBox OSE is distributed in the hope that it will
14	; be useful, but WITHOUT ANY WARRANTY of any kind.
15
16	;*******************************************************************************
17	;* Header Files *
18	;*******************************************************************************
19	%include "VMMGC.mac"
20	%include "VBox/x86.mac"
21	%include "VBox/cpum.mac"
22	%include "VBox/stam.mac"
23	%include "VBox/vm.mac"
24	%include "TRPMInternal.mac"
25	%include "VBox/err.mac"
26	%include "VBox/trpm.mac"
27
28
29	;*******************************************************************************
30	;* External Symbols *
31	;*******************************************************************************
32	extern IMPNAME(g_CPUM) ; These IMPNAME(g_*) symbols resolve to the import table
33	extern IMPNAME(g_TRPM) ; where there is a pointer to the real symbol. PE imports
34	extern IMPNAME(g_VM) ; are a bit confusing at first... :-)
35	extern NAME(CPUMGCRestoreInt)
36	extern NAME(CPUMHandleLazyFPUAsm)
37	extern NAME(CPUMHyperSetCtxCore)
38	extern NAME(trpmGCTrapInGeneric)
39	extern NAME(TRPMGCHyperTrap0bHandler)
40	extern NAME(TRPMGCHyperTrap0dHandler)
41	extern NAME(TRPMGCHyperTrap0eHandler)
42	extern NAME(TRPMGCTrap01Handler)
43	%ifdef VBOX_WITH_NMI
44	extern NAME(TRPMGCTrap02Handler)
45	%endif
46	extern NAME(TRPMGCTrap03Handler)
47	extern NAME(TRPMGCTrap06Handler)
48	extern NAME(TRPMGCTrap0bHandler)
49	extern NAME(TRPMGCTrap0dHandler)
50	extern NAME(TRPMGCTrap0eHandler)
51	extern NAME(TRPMGCTrap07Handler)
52
53	;; IMPORTANT all COM_ functions trashes esi, some edi and the LOOP_SHORT_WHILE kills ecx.
54	;%define DEBUG_STUFF 1
55	;%define DEBUG_STUFF_TRPG 1
56	;%define DEBUG_STUFF_INT 1
57
58	BEGINCODE
59
60	;;
61	; Jump table for trap handlers for hypervisor traps.
62	;
63	g_apfnStaticTrapHandlersHyper:
64	; N - M M - T - C - D i
65	; o - n o - y - o - e p
66	; - e n - p - d - s t
67	; - i - e - e - c .
68	; - c - - - r
69	; =============================================================
70	dd 0 ; 0 - #DE - F - N - Divide error
71	dd NAME(TRPMGCTrap01Handler) ; 1 - #DB - F/T - N - Single step, INT 1 instruction
72	%ifdef VBOX_WITH_NMI
73	dd NAME(TRPMGCTrap02Handler) ; 2 - - I - N - Non-Maskable Interrupt (NMI)
74	%else
75	dd 0 ; 2 - - I - N - Non-Maskable Interrupt (NMI)
76	%endif
77	dd NAME(TRPMGCTrap03Handler) ; 3 - #BP - T - N - Breakpoint, INT 3 instruction.
78	dd 0 ; 4 - #OF - T - N - Overflow, INTO instruction.
79	dd 0 ; 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction.
80	dd 0 ; 6 - #UD - F - N - Undefined(/Invalid) Opcode.
81	dd 0 ; 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction.
82	dd 0 ; 8 - #DF - A - 0 - Double fault.
83	dd 0 ; 9 - - F - N - Coprocessor Segment Overrun (obsolete).
84	dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
85	dd NAME(TRPMGCHyperTrap0bHandler) ; b - #NP - F - Y - Segment not present.
86	dd 0 ; c - #SS - F - Y - Stack-Segment fault.
87	dd NAME(TRPMGCHyperTrap0dHandler) ; d - #GP - F - Y - General protection fault.
88	dd NAME(TRPMGCHyperTrap0eHandler) ; e - #PF - F - Y - Page fault.
89	dd 0 ; f - - - - Intel Reserved. Do not use.
90	dd 0 ; 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction.
91	dd 0 ; 11 - #AC - F - 0 - Alignment Check.
92	dd 0 ; 12 - #MC - A - N - Machine Check.
93	dd 0 ; 13 - #XF - F - N - SIMD Floating-Point Exception.
94	dd 0 ; 14 - - - - Intel Reserved. Do not use.
95	dd 0 ; 15 - - - - Intel Reserved. Do not use.
96	dd 0 ; 16 - - - - Intel Reserved. Do not use.
97	dd 0 ; 17 - - - - Intel Reserved. Do not use.
98	dd 0 ; 18 - - - - Intel Reserved. Do not use.
99
100
101	;;
102	; Jump table for trap handlers for guest traps
103	;
104	g_apfnStaticTrapHandlersGuest:
105	; N - M M - T - C - D i
106	; o - n o - y - o - e p
107	; - e n - p - d - s t
108	; - i - e - e - c .
109	; - c - - - r
110	; =============================================================
111	dd 0 ; 0 - #DE - F - N - Divide error
112	dd NAME(TRPMGCTrap01Handler) ; 1 - #DB - F/T - N - Single step, INT 1 instruction
113	%ifdef VBOX_WITH_NMI
114	dd NAME(TRPMGCTrap02Handler) ; 2 - - I - N - Non-Maskable Interrupt (NMI)
115	%else
116	dd 0 ; 2 - - I - N - Non-Maskable Interrupt (NMI)
117	%endif
118	dd NAME(TRPMGCTrap03Handler) ; 3 - #BP - T - N - Breakpoint, INT 3 instruction.
119	dd 0 ; 4 - #OF - T - N - Overflow, INTO instruction.
120	dd 0 ; 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction.
121	dd NAME(TRPMGCTrap06Handler) ; 6 - #UD - F - N - Undefined(/Invalid) Opcode.
122	dd NAME(TRPMGCTrap07Handler) ; 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction.
123	dd 0 ; 8 - #DF - A - 0 - Double fault.
124	dd 0 ; 9 - - F - N - Coprocessor Segment Overrun (obsolete).
125	dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
126	dd NAME(TRPMGCTrap0bHandler) ; b - #NP - F - Y - Segment not present.
127	dd 0 ; c - #SS - F - Y - Stack-Segment fault.
128	dd NAME(TRPMGCTrap0dHandler) ; d - #GP - F - Y - General protection fault.
129	dd NAME(TRPMGCTrap0eHandler) ; e - #PF - F - Y - Page fault.
130	dd 0 ; f - - - - Intel Reserved. Do not use.
131	dd 0 ; 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction.
132	dd 0 ; 11 - #AC - F - 0 - Alignment Check.
133	dd 0 ; 12 - #MC - A - N - Machine Check.
134	dd 0 ; 13 - #XF - F - N - SIMD Floating-Point Exception.
135	dd 0 ; 14 - - - - Intel Reserved. Do not use.
136	dd 0 ; 15 - - - - Intel Reserved. Do not use.
137	dd 0 ; 16 - - - - Intel Reserved. Do not use.
138	dd 0 ; 17 - - - - Intel Reserved. Do not use.
139	dd 0 ; 18 - - - - Intel Reserved. Do not use.
140
141
142
143	;;
144	; We start by 24 push <vector no.> + jmp <generic entry point>
145	;
146	ALIGNCODE(16)
147	BEGINPROC_EXPORTED TRPMGCHandlerGeneric
148	%macro TRPMGenericEntry 1
149	db 06ah, i ; push imm8 - note that this is a signextended value.
150	jmp %1
151	ALIGNCODE(8)
152	%assign i i+1
153	%endmacro
154
155	%assign i 0 ; start counter.
156	TRPMGenericEntry GenericTrap ; 0
157	TRPMGenericEntry GenericTrap ; 1
158	TRPMGenericEntry GenericTrap ; 2
159	TRPMGenericEntry GenericTrap ; 3
160	TRPMGenericEntry GenericTrap ; 4
161	TRPMGenericEntry GenericTrap ; 5
162	TRPMGenericEntry GenericTrap ; 6
163	TRPMGenericEntry GenericTrap ; 7
164	TRPMGenericEntry GenericTrapErrCode ; 8
165	TRPMGenericEntry GenericTrap ; 9
166	TRPMGenericEntry GenericTrapErrCode ; a
167	TRPMGenericEntry GenericTrapErrCode ; b
168	TRPMGenericEntry GenericTrapErrCode ; c
169	TRPMGenericEntry GenericTrapErrCode ; d
170	TRPMGenericEntry GenericTrapErrCode ; e
171	TRPMGenericEntry GenericTrap ; f (reserved)
172	TRPMGenericEntry GenericTrap ; 10
173	TRPMGenericEntry GenericTrapErrCode ; 11
174	TRPMGenericEntry GenericTrap ; 12
175	TRPMGenericEntry GenericTrap ; 13
176	TRPMGenericEntry GenericTrap ; 14 (reserved)
177	TRPMGenericEntry GenericTrap ; 15 (reserved)
178	TRPMGenericEntry GenericTrap ; 16 (reserved)
179	TRPMGenericEntry GenericTrap ; 17 (reserved)
180	%undef i
181	%undef TRPMGenericEntry
182
183	;;
184	; Main exception handler for the guest context
185	;
186	; Stack:
187	; 14 SS
188	; 10 ESP
189	; c EFLAGS
190	; 8 CS
191	; 4 EIP
192	; 0 vector number
193	;
194	; @uses none
195	;
196	ALIGNCODE(8)
197	GenericTrap:
198	;
199	; for the present we fake an error code ~0
200	;
201	push eax
202	mov eax, 0ffffffffh
203	xchg [esp + 4], eax ; get vector number, set error code
204	xchg [esp], eax ; get saved eax, set vector number
205	jmp short GenericTrapErrCode
206
207
208	;;
209	; Main exception handler for the guest context with error code
210	;
211	; Stack:
212	; 28 GS (V86 only)
213	; 24 FS (V86 only)
214	; 20 DS (V86 only)
215	; 1C ES (V86 only)
216	; 18 SS (only if ring transition.)
217	; 14 ESP (only if ring transition.)
218	; 10 EFLAGS
219	; c CS
220	; 8 EIP
221	; 4 Error code. (~0 for vectors which don't take an error code.)
222	; 0 vector number
223	;
224	; Error code:
225	;
226	; 31 16 15 3 2 1 0
227	;
228	; reserved segment TI IDT EXT
229	; selector GDT/LDT (1) IDT External interrupt
230	; index (IDT=0) index
231	;
232	; NOTE: Page faults (trap 14) have a different error code
233	;
234	; @uses none
235	;
236	ALIGNCODE(8)
237	GenericTrapErrCode:
238	cld
239
240	;
241	; Setup CPUMCTXCORE frame
242	;
243	; ASSUMPTION: If trap in hypervisor, we assume that we can read two dword
244	; under the bottom of the stack. This is atm safe.
245	; ASSUMPTION: There is sufficient stack space.
246	; ASSUMPTION: The stack is not write protected.
247	;
248	%define ESPOFF CPUMCTXCORE_size
249
250	sub esp, CPUMCTXCORE_size
251	mov [esp + CPUMCTXCORE.eax], eax
252	mov [esp + CPUMCTXCORE.ecx], ecx
253	mov [esp + CPUMCTXCORE.edx], edx
254	mov [esp + CPUMCTXCORE.ebx], ebx
255	mov [esp + CPUMCTXCORE.esi], esi
256	mov [esp + CPUMCTXCORE.edi], edi
257	mov [esp + CPUMCTXCORE.ebp], ebp
258
259	mov eax, [esp + 14h + ESPOFF] ; esp
260	mov [esp + CPUMCTXCORE.esp], eax
261	mov eax, [esp + 18h + ESPOFF] ; ss
262	mov dword [esp + CPUMCTXCORE.ss], eax
263
264	mov eax, [esp + 0ch + ESPOFF] ; cs
265	mov dword [esp + CPUMCTXCORE.cs], eax
266	mov eax, [esp + 08h + ESPOFF] ; eip
267	mov [esp + CPUMCTXCORE.eip], eax
268	mov eax, [esp + 10h + ESPOFF] ; eflags
269	mov [esp + CPUMCTXCORE.eflags], eax
270
271	mov eax, es
272	mov dword [esp + CPUMCTXCORE.es], eax
273	mov eax, ds
274	mov dword [esp + CPUMCTXCORE.ds], eax
275	mov eax, fs
276	mov dword [esp + CPUMCTXCORE.fs], eax
277	mov eax, gs
278	mov dword [esp + CPUMCTXCORE.gs], eax
279
280	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
281	jz short gt_SkipV86Entry
282
283	;
284	; The DS, ES, FS and GS registers are zeroed in V86 mode and their real values are on the stack
285	;
286	mov eax, dword [esp + ESPOFF + 1Ch]
287	mov dword [esp + CPUMCTXCORE.es], eax
288
289	mov eax, dword [esp + ESPOFF + 20h]
290	mov dword [esp + CPUMCTXCORE.ds], eax
291
292	mov eax, dword [esp + ESPOFF + 24h]
293	mov dword [esp + CPUMCTXCORE.fs], eax
294
295	mov eax, dword [esp + ESPOFF + 28h]
296	mov dword [esp + CPUMCTXCORE.gs], eax
297
298	gt_SkipV86Entry:
299	;
300	; Disable Ring-0 WP
301	;
302	mov eax, cr0 ;; @todo elimitate this read?
303	and eax, ~X86_CR0_WRITE_PROTECT
304	mov cr0, eax
305
306	;
307	; Load Hypervisor DS and ES (get it from the SS)
308	;
309	mov eax, ss
310	mov ds, eax
311	mov es, eax
312
313	%ifdef VBOX_WITH_STATISTICS
314	;
315	; Start profiling.
316	;
317	mov edx, [esp + 0h + ESPOFF] ; vector number
318	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128.
319	add edx, TRPM.aStatGCTraps
320	add edx, IMP(g_TRPM)
321	STAM_PROFILE_ADV_START edx
322	%endif
323
324	;
325	; Store the information about the active trap/interrupt.
326	;
327	mov eax, IMP(g_TRPM)
328	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
329	mov [eax + TRPM.uActiveVector], edx
330	mov edx, [esp + 4h + ESPOFF] ; error code
331	mov [eax + TRPM.uActiveErrorCode], edx
332	mov dword [eax + TRPM.enmActiveType], TRPM_TRAP
333	mov edx, cr2 ;; @todo Check how expensive cr2 reads are!
334	mov dword [eax + TRPM.uActiveCR2], edx
335
336	;
337	; Check if we're in Hypervisor when this happend.
338	;
339	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
340	jnz short gt_NotHyperVisor
341
342	test byte [esp + 0ch + ESPOFF], 3h ; check CPL of the cs selector
343	jz near gt_InHypervisor
344
345	;
346	; Trap in guest code.
347	;
348	gt_NotHyperVisor:
349	%ifdef DEBUG_STUFF_TRPG
350	mov ebx, [esp + 4h + ESPOFF] ; error code
351	mov ecx, 'trpG' ; indicate trap.
352	mov edx, [esp + 0h + ESPOFF] ; vector number
353	lea eax, [esp]
354	call trpmDbgDumpRegisterFrame
355	%endif
356
357	;
358	; Do we have a GC handler for these traps?
359	;
360	mov edx, [esp + 0h + ESPOFF] ; vector number
361	mov eax, [g_apfnStaticTrapHandlersGuest + edx * 4]
362	or eax, eax
363	jnz short gt_HaveHandler
364	mov eax, VINF_EM_RAW_GUEST_TRAP
365	jmp short gt_GuestTrap
366
367	;
368	; Call static handler.
369	;
370	gt_HaveHandler:
371	push esp ; Param 2 - CPUMCTXCORE pointer.
372	push dword IMP(g_TRPM) ; Param 1 - Pointer to TRPM
373	call eax
374	add esp, byte 8 ; cleanup stack (cdecl)
375	or eax, eax
376	je near gt_continue_guest
377
378	;
379	; Switch back to the host and process it there.
380	;
381	gt_GuestTrap:
382	%ifdef VBOX_WITH_STATISTICS
383	mov edx, [esp + 0h + ESPOFF] ; vector number
384	imul edx, edx, byte STAMPROFILEADV_size ; assume < 128
385	add edx, IMP(g_TRPM)
386	add edx, TRPM.aStatGCTraps
387	STAM_PROFILE_ADV_STOP edx
388	%endif
389	mov edx, IMP(g_VM)
390	call [edx + VM.pfnVMMGCGuestToHostAsmGuestCtx]
391
392	;; @todo r=bird: is this path actually every taken? if not we should replace this code with a panic.
393	;
394	; We've returned!
395	; N.B. The stack has been changed now! No CPUMCTXCORE any longer. esp = vector number.
396	; N.B. Current scheduling design causes this code path to be unused.
397	; N.B. Better not use it when in V86 mode!
398	;
399
400	; Enable WP
401	mov eax, cr0 ;; @todo try elimiate this read.
402	or eax, X86_CR0_WRITE_PROTECT
403	mov cr0, eax
404	; Restore guest context and continue execution.
405	mov edx, IMP(g_CPUM)
406	lea eax, [esp + 8]
407	push eax
408	call NAME(CPUMGCRestoreInt)
409	lea esp, [esp + 0ch] ; cleanup call and skip vector & error code.
410
411	iret
412
413
414	;
415	; Continue(/Resume/Restart/Whatever) guest execution.
416	;
417	ALIGNCODE(16)
418	gt_continue_guest:
419	%ifdef VBOX_WITH_STATISTICS
420	mov edx, [esp + 0h + ESPOFF] ; vector number
421	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128
422	add edx, TRPM.aStatGCTraps
423	add edx, IMP(g_TRPM)
424	STAM_PROFILE_ADV_STOP edx
425	%endif
426
427	; enable WP
428	mov eax, cr0 ;; @todo try elimiate this read.
429	or eax, X86_CR0_WRITE_PROTECT
430	mov cr0, eax
431
432	; restore guest state and start executing again.
433	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
434	jnz gt_V86Return
435
436	mov ecx, [esp + CPUMCTXCORE.ecx]
437	mov edx, [esp + CPUMCTXCORE.edx]
438	mov ebx, [esp + CPUMCTXCORE.ebx]
439	mov ebp, [esp + CPUMCTXCORE.ebp]
440	mov esi, [esp + CPUMCTXCORE.esi]
441	mov edi, [esp + CPUMCTXCORE.edi]
442
443	mov eax, [esp + CPUMCTXCORE.esp]
444	mov [esp + 14h + ESPOFF], eax ; esp
445	mov eax, dword [esp + CPUMCTXCORE.ss]
446	mov [esp + 18h + ESPOFF], eax ; ss
447
448	mov eax, dword [esp + CPUMCTXCORE.gs]
449	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS
450	mov gs, eax
451
452	mov eax, dword [esp + CPUMCTXCORE.fs]
453	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS
454	mov fs, eax
455
456	mov eax, dword [esp + CPUMCTXCORE.es]
457	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_ES
458	mov es, eax
459
460	mov eax, dword [esp + CPUMCTXCORE.ds]
461	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_DS
462	mov ds, eax
463
464	mov eax, dword [esp + CPUMCTXCORE.cs]
465	mov [esp + 0ch + ESPOFF], eax ; cs
466	mov eax, [esp + CPUMCTXCORE.eflags]
467	mov [esp + 10h + ESPOFF], eax ; eflags
468	mov eax, [esp + CPUMCTXCORE.eip]
469	mov [esp + 08h + ESPOFF], eax ; eip
470
471	; finally restore our scratch register eax
472	mov eax, [esp + CPUMCTXCORE.eax]
473
474	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
475
476	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_IRET
477	iret
478
479	ALIGNCODE(16)
480	gt_V86Return:
481	mov ecx, [esp + CPUMCTXCORE.ecx]
482	mov edx, [esp + CPUMCTXCORE.edx]
483	mov ebx, [esp + CPUMCTXCORE.ebx]
484	mov ebp, [esp + CPUMCTXCORE.ebp]
485	mov esi, [esp + CPUMCTXCORE.esi]
486	mov edi, [esp + CPUMCTXCORE.edi]
487
488	mov eax, [esp + CPUMCTXCORE.esp]
489	mov [esp + 14h + ESPOFF], eax ; esp
490	mov eax, dword [esp + CPUMCTXCORE.ss]
491	mov [esp + 18h + ESPOFF], eax ; ss
492
493	mov eax, dword [esp + CPUMCTXCORE.es]
494	mov [esp + 1ch + ESPOFF], eax ; es
495	mov eax, dword [esp + CPUMCTXCORE.ds]
496	mov [esp + 20h + ESPOFF], eax ; ds
497	mov eax, dword [esp + CPUMCTXCORE.fs]
498	mov [esp + 24h + ESPOFF], eax ; fs
499	mov eax, dword [esp + CPUMCTXCORE.gs]
500	mov [esp + 28h + ESPOFF], eax ; gs
501
502	mov eax, [esp + CPUMCTXCORE.eip]
503	mov [esp + 08h + ESPOFF], eax ; eip
504	mov eax, dword [esp + CPUMCTXCORE.cs]
505	mov [esp + 0ch + ESPOFF], eax ; cs
506	mov eax, [esp + CPUMCTXCORE.eflags]
507	mov [esp + 10h + ESPOFF], eax ; eflags
508
509	; finally restore our scratch register eax
510	mov eax, [esp + CPUMCTXCORE.eax]
511
512	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
513
514	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86
515	iret
516
517	;
518	; Trap in Hypervisor, try to handle it.
519	;
520	; (eax = pTRPM)
521	;
522	ALIGNCODE(16)
523	gt_InHypervisor:
524	; fix ss:esp.
525	lea ebx, [esp + 14h + ESPOFF] ; calc esp at trap
526	mov [esp + CPUMCTXCORE.esp], ebx; update esp in register frame
527	mov [esp + CPUMCTXCORE.ss], ss ; update ss in register frame
528
529	; tell cpum about the context core.
530	xchg esi, eax ; save pTRPM - @todo reallocate this variable to esi, edi, or ebx
531	push esp ; Param 2 - The new CPUMCTXCORE pointer.
532	push IMP(g_VM) ; Param 1 - Pointer to the VM.
533	call NAME(CPUMHyperSetCtxCore)
534	add esp, byte 8 ; stack cleanup (cdecl)
535	xchg eax, esi ; restore pTRPM
536
537	; check for temporary handler.
538	movzx ebx, byte [eax + TRPM.uActiveVector]
539	xor ecx, ecx
540	xchg ecx, [eax + TRPM.aTmpTrapHandlers + ebx * 4] ; ecx = Temp handler pointer or 0
541	or ecx, ecx
542	jnz short gt_Hyper_HaveTemporaryHandler
543
544	; check for static trap handler.
545	mov ecx, [g_apfnStaticTrapHandlersHyper + ebx * 4] ; ecx = Static handler pointer or 0
546	or ecx, ecx
547	jnz short gt_Hyper_HaveStaticHandler
548	jmp gt_Hyper_AbandonShip
549
550
551	;
552	; Temporary trap handler present, call it (CDECL).
553	;
554	gt_Hyper_HaveTemporaryHandler:
555	push esp ; Param 2 - Pointer to CPUMCTXCORE.
556	push IMP(g_VM) ; Param 1 - Pointer to VM.
557	call ecx
558	add esp, byte 8 ; cleanup stack (cdecl)
559
560	cmp eax, byte VINF_SUCCESS ; If completely handled Then resume execution.
561	je near gt_Hyper_Continue
562	;; @todo Handle ALL returns types from temporary handlers!
563	jmp gt_Hyper_AbandonShip
564
565
566	;
567	; Static trap handler present, call it (CDECL).
568	;
569	gt_Hyper_HaveStaticHandler:
570	push esp ; Param 2 - Pointer to CPUMCTXCORE.
571	push eax ; Param 1 - Pointer to TRPM
572	call ecx
573	add esp, byte 8 ; cleanup stack (cdecl)
574
575	cmp eax, byte VINF_SUCCESS ; If completely handled Then resume execution.
576	je short gt_Hyper_Continue
577	cmp eax, VINF_EM_DBG_HYPER_STEPPED
578	je short gt_Hyper_ToHost
579	cmp eax, VINF_EM_DBG_HYPER_BREAKPOINT
580	je short gt_Hyper_ToHost
581	cmp eax, VINF_EM_DBG_HYPER_ASSERTION
582	je short gt_Hyper_ToHost
583	jmp gt_Hyper_AbandonShip
584
585	;
586	; Pop back to the host to service the error.
587	;
588	gt_Hyper_ToHost:
589	mov ecx, esp
590	mov edx, IMP(g_VM)
591	call [edx + VM.pfnVMMGCGuestToHostAsm]
592	jmp short gt_Hyper_Continue
593
594	;
595	; Continue(/Resume/Restart/Whatever) hypervisor execution.
596	; Don't reset the TRPM state. Caller takes care of that.
597	;
598	ALIGNCODE(16)
599	gt_Hyper_Continue:
600	%ifdef DEBUG_STUFF
601	mov ebx, [esp + 4h + ESPOFF] ; error code
602	mov ecx, 'resH' ; indicate trap.
603	mov edx, [esp + 0h + ESPOFF] ; vector number
604	lea eax, [esp]
605	call trpmDbgDumpRegisterFrame
606	%endif
607	; tell CPUM to use the default CPUMCTXCORE.
608	push byte 0 ; Param 2 - NULL indicating use default context core.
609	push IMP(g_VM) ; Param 1 - The VM pointer.
610	call NAME(CPUMHyperSetCtxCore)
611	add esp, byte 8 ; stack cleanup (cdecl)
612
613	%ifdef VBOX_WITH_STATISTICS
614	mov edx, [esp + 0h + ESPOFF] ; vector number
615	imul edx, edx, byte STAMPROFILEADV_size ; assumes < 128
616	add edx, TRPM.aStatGCTraps
617	add edx, IMP(g_TRPM)
618	STAM_PROFILE_ADV_STOP edx
619	%endif
620
621	; restore
622	mov ecx, [esp + CPUMCTXCORE.ecx]
623	mov edx, [esp + CPUMCTXCORE.edx]
624	mov ebx, [esp + CPUMCTXCORE.ebx]
625	mov ebp, [esp + CPUMCTXCORE.ebp]
626	mov esi, [esp + CPUMCTXCORE.esi]
627	mov edi, [esp + CPUMCTXCORE.edi]
628
629	mov eax, dword [esp + CPUMCTXCORE.gs]
630	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS \| TRPM_TRAP_IN_HYPER
631	mov gs, eax
632
633	mov eax, dword [esp + CPUMCTXCORE.fs]
634	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS \| TRPM_TRAP_IN_HYPER
635	mov fs, eax
636
637	mov eax, dword [esp + CPUMCTXCORE.es]
638	mov es, eax
639	mov eax, dword [esp + CPUMCTXCORE.ds]
640	mov ds, eax
641
642	; skip esp & ss
643
644	mov eax, [esp + CPUMCTXCORE.eip]
645	mov [esp + 08h + ESPOFF], eax ; eip
646	mov eax, dword [esp + CPUMCTXCORE.cs]
647	mov [esp + 0ch + ESPOFF], eax ; cs
648	mov eax, [esp + CPUMCTXCORE.eflags]
649	mov [esp + 10h + ESPOFF], eax ; eflags
650
651	; finally restore our scratch register eax
652	mov eax, [esp + CPUMCTXCORE.eax]
653
654	add esp, ESPOFF + 8 ; skip CPUMCTXCORE structure, error code and vector number
655
656	iret
657
658
659	;
660	; ABANDON SHIP! DON'T PANIC!
661	;
662	gt_Hyper_AbandonShip:
663	%ifdef DEBUG_STUFF
664	mov ebx, [esp + 4h + ESPOFF] ; error code
665	mov ecx, 'trpH' ; indicate trap.
666	mov edx, [esp + 0h + ESPOFF] ; vector number
667	lea eax, [esp]
668	call trpmDbgDumpRegisterFrame
669	%endif
670
671	gt_Hyper_DontPanic:
672	mov ecx, esp
673	mov edx, IMP(g_VM)
674	mov eax, VERR_TRPM_DONT_PANIC
675	call [edx + VM.pfnVMMGCGuestToHostAsmHyperCtx]
676	%ifdef DEBUG_STUFF
677	COM_S_PRINT 'bad!!!'
678	%endif
679	jmp gt_Hyper_DontPanic ; this shall never ever happen!
680	%undef ESPOFF
681	ENDPROC TRPMGCHandlerGeneric
682
683
684
685
686
687	;;
688	; We start by 256 push <vector no.> + jmp interruptworker
689	;
690	ALIGNCODE(16)
691	BEGINPROC_EXPORTED TRPMGCHandlerInterupt
692	; NASM has some nice features, here an example of a loop.
693	%assign i 0
694	%rep 256
695	db 06ah, i ; push imm8 - note that this is a signextended value.
696	jmp ti_GenericInterrupt
697	ALIGNCODE(8)
698	%assign i i+1
699	%endrep
700
701	;;
702	; Main interrupt handler for the guest context
703	;
704	; Stack:
705	; 24 GS (V86 only)
706	; 20 FS (V86 only)
707	; 1C DS (V86 only)
708	; 18 ES (V86 only)
709	; 14 SS
710	; 10 ESP
711	; c EFLAGS
712	; 8 CS
713	; 4 EIP
714	; ESP -> 0 Vector number (only use low byte!).
715	;
716	; @uses none
717	ti_GenericInterrupt:
718	cld
719
720	;
721	; Setup CPUMCTXCORE frame
722	;
723	; ASSUMPTION: If trap in hypervisor, we assume that we can read two dword
724	; under the bottom of the stack. This is atm safe.
725	; ASSUMPTION: There is sufficient stack space.
726	; ASSUMPTION: The stack is not write protected.
727	;
728	%define ESPOFF CPUMCTXCORE_size
729
730	sub esp, CPUMCTXCORE_size
731	mov [esp + CPUMCTXCORE.eax], eax
732	mov [esp + CPUMCTXCORE.ecx], ecx
733	mov [esp + CPUMCTXCORE.edx], edx
734	mov [esp + CPUMCTXCORE.ebx], ebx
735	mov [esp + CPUMCTXCORE.esi], esi
736	mov [esp + CPUMCTXCORE.edi], edi
737	mov [esp + CPUMCTXCORE.ebp], ebp
738
739	mov eax, [esp + 04h + ESPOFF] ; eip
740	mov [esp + CPUMCTXCORE.eip], eax
741	mov eax, dword [esp + 08h + ESPOFF] ; cs
742	mov [esp + CPUMCTXCORE.cs], eax
743	mov eax, [esp + 0ch + ESPOFF] ; eflags
744	mov [esp + CPUMCTXCORE.eflags], eax
745
746	mov eax, [esp + 10h + ESPOFF] ; esp
747	mov [esp + CPUMCTXCORE.esp], eax
748	mov eax, dword [esp + 14h + ESPOFF] ; ss
749	mov [esp + CPUMCTXCORE.ss], eax
750
751	mov eax, es
752	mov dword [esp + CPUMCTXCORE.es], eax
753	mov eax, ds
754	mov dword [esp + CPUMCTXCORE.ds], eax
755	mov eax, fs
756	mov dword [esp + CPUMCTXCORE.fs], eax
757	mov eax, gs
758	mov dword [esp + CPUMCTXCORE.gs], eax
759
760	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
761	jz short ti_SkipV86Entry
762
763	;
764	; The DS, ES, FS and GS registers are zeroed in V86 mode and their real values are on the stack
765	;
766	mov eax, dword [esp + ESPOFF + 18h]
767	mov dword [esp + CPUMCTXCORE.es], eax
768
769	mov eax, dword [esp + ESPOFF + 1Ch]
770	mov dword [esp + CPUMCTXCORE.ds], eax
771
772	mov eax, dword [esp + ESPOFF + 20h]
773	mov dword [esp + CPUMCTXCORE.fs], eax
774
775	mov eax, dword [esp + ESPOFF + 24h]
776	mov dword [esp + CPUMCTXCORE.gs], eax
777
778	ti_SkipV86Entry:
779
780	;
781	; Disable Ring-0 WP
782	;
783	mov eax, cr0 ;; @todo try elimiate this read.
784	and eax, ~X86_CR0_WRITE_PROTECT
785	mov cr0, eax
786
787	;
788	; Load Hypervisor DS and ES (get it from the SS)
789	;
790	mov eax, ss
791	mov ds, eax
792	mov es, eax
793
794	;
795	; Store the information about the active trap/interrupt.
796	;
797	mov eax, IMP(g_TRPM)
798	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
799	mov [eax + TRPM.uActiveVector], edx
800	xor edx, edx
801	mov dword [eax + TRPM.enmActiveType], TRPM_HARDWARE_INT
802	dec edx
803	mov [eax + TRPM.uActiveErrorCode], edx
804	mov [eax + TRPM.uActiveCR2], edx
805
806	;
807	; Check if we're in Hypervisor when this happend.
808	;
809	test byte [esp + 08h + ESPOFF], 3h ; check CPL of the cs selector
810	jnz short gi_NotHyperVisor
811	jmp gi_HyperVisor
812
813	;
814	; Trap in guest code.
815	;
816	gi_NotHyperVisor:
817	and dword [esp + CPUMCTXCORE.eflags], ~010000h ; Clear RF (Resume Flag). @todo make %defines for eflags.
818	; The guest shall not see this in it's state.
819	%ifdef DEBUG_STUFF_INT
820	mov ecx, 'intG' ; indicate trap.
821	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
822	lea eax, [esp]
823	call trpmDbgDumpRegisterFrame
824	%endif
825
826	;
827	; Switch back to the host and process it there.
828	;
829	mov edx, IMP(g_VM)
830	mov eax, VINF_EM_RAW_INTERRUPT
831	call [edx + VM.pfnVMMGCGuestToHostAsmGuestCtx]
832
833	;
834	; We've returned!
835	; NOTE that the stack has been changed now!
836	; there is no longer any CPUMCTXCORE around and esp points to vector number!
837	;
838	; Reset TRPM state
839	mov eax, IMP(g_TRPM)
840	xor edx, edx
841	dec edx ; edx = 0ffffffffh
842	xchg [eax + TRPM.uActiveVector], edx
843	mov [eax + TRPM.uPrevVector], edx
844
845	; Enable WP
846	mov eax, cr0 ;; @todo try elimiate this read.
847	or eax, X86_CR0_WRITE_PROTECT
848	mov cr0, eax
849	; restore guest context and continue execution.
850	lea eax, [esp + 8]
851	push eax
852	call NAME(CPUMGCRestoreInt)
853	lea esp, [esp + 0ch] ; cleanup call and skip vector & error code.
854
855	iret
856
857	; -+- Entry point -+-
858	;
859	; We're in hypervisor mode which means no guest context
860	; and special care to be taken to restore the hypervisor
861	; context correctely.
862	;
863	; ATM the only place this can happen is when entering a trap handler.
864	; We make ASSUMPTIONS about this in respects to the WP CR0 bit
865	;
866	gi_HyperVisor:
867	lea eax, [esp + 14h + ESPOFF] ; calc esp at trap
868	mov [esp + CPUMCTXCORE.esp], eax ; update esp in register frame
869	mov [esp + CPUMCTXCORE.ss], ss ; update ss in register frame
870
871	%ifdef DEBUG_STUFF_INT
872	mov ebx, [esp + 4h + ESPOFF] ; error code
873	mov ecx, 'intH' ; indicate hypervisor interrupt.
874	movzx edx, byte [esp + 0h + ESPOFF] ; vector number
875	lea eax, [esp]
876	call trpmDbgDumpRegisterFrame
877	%endif
878
879	mov ecx, esp
880	mov edx, IMP(g_VM)
881	mov eax, VINF_EM_RAW_INTERRUPT_HYPER
882	call [edx + VM.pfnVMMGCGuestToHostAsm]
883	%ifdef DEBUG_STUFF_INT
884	COM_CHAR '!'
885	%endif
886
887	;
888	; We've returned!
889	;
890	; Reset TRPM state - don't record this.
891	mov eax, IMP(g_TRPM)
892	mov dword [eax + TRPM.uActiveVector], 0ffffffffh
893
894	;
895	; Restore the hypervisor context and return.
896	;
897	mov ecx, [esp + CPUMCTXCORE.ecx]
898	mov edx, [esp + CPUMCTXCORE.edx]
899	mov ebx, [esp + CPUMCTXCORE.ebx]
900	mov ebp, [esp + CPUMCTXCORE.ebp]
901	mov esi, [esp + CPUMCTXCORE.esi]
902	mov edi, [esp + CPUMCTXCORE.edi]
903
904	; In V86 mode DS, ES, FS & GS are restored by the iret
905	test dword [esp + CPUMCTXCORE.eflags], X86_EFL_VM
906	jnz short ti_SkipSelRegs
907
908	mov eax, [esp + CPUMCTXCORE.gs]
909	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_GS \| TRPM_TRAP_IN_HYPER
910	mov gs, eax
911
912	mov eax, [esp + CPUMCTXCORE.fs]
913	TRPM_NP_GP_HANDLER NAME(trpmGCTrapInGeneric), TRPM_TRAP_IN_MOV_FS \| TRPM_TRAP_IN_HYPER
914	mov fs, eax
915
916	mov eax, [esp + CPUMCTXCORE.es]
917	mov es, eax
918	mov eax, [esp + CPUMCTXCORE.ds]
919	mov ds, eax
920
921	ti_SkipSelRegs:
922	; finally restore our scratch register eax
923	mov eax, [esp + CPUMCTXCORE.eax]
924
925	; skip esp, ss, cs, eip & eflags. Done by iret
926
927	add esp, ESPOFF + 4h ; skip CPUMCTXCORE structure & vector number.
928
929	iret
930	%undef ESPOFF
931	ENDPROC TRPMGCHandlerInterupt
932
933
934
935	;;
936	; Trap handler for #MC
937	;
938	; This handler will forward the #MC to the host OS. Since this
939	; is generalized in the generic interrupt handler, we just disable
940	; interrupts and push vector number and jump to the generic code.
941	;
942	; Stack:
943	; 10 SS (only if ring transition.)
944	; c ESP (only if ring transition.)
945	; 8 EFLAGS
946	; 4 CS
947	; 0 EIP
948	;
949	; @uses none
950	;
951	ALIGNCODE(16)
952	BEGINPROC_EXPORTED TRPMGCHandlerTrap12
953	push byte 12h
954	jmp ti_GenericInterrupt
955	ENDPROC TRPMGCHandlerTrap12
956
957
958
959
960	;;
961	; Trap handler for double fault (#DF).
962	;
963	; This is a special trap handler executes in separate task with own TSS, with
964	; one of the intermediate memory contexts instead of the shadow context.
965	; The handler will unconditionally print an report to the comport configured
966	; for the COM_S_* macros before attempting to return to the host. If it it ends
967	; up double faulting more than 10 times, it will simply cause an tripple fault
968	; to get us out of the mess.
969	;
970	; @param esp Half way down the hypvervisor stack + the trap frame.
971	; @param ebp Half way down the hypvervisor stack.
972	; @param eflags Interrupts disabled, nested flag is probably set (we don't care).
973	; @param ecx The address of the hypervisor TSS.
974	; @param edi Same as ecx.
975	; @param eax Same as ecx.
976	; @param edx Address of the VM structure.
977	; @param esi Same as edx.
978	; @param ebx Same as edx.
979	; @param ss Hypervisor DS.
980	; @param ds Hypervisor DS.
981	; @param es Hypervisor DS.
982	; @param fs 0
983	; @param gs 0
984	;
985	;
986	; @remark To be able to catch errors with WP turned off, it is required that the
987	; TSS GDT descriptor and the TSSes are writable (X86_PTE_RW). See SELM.cpp
988	; for how to enable this.
989	;
990	; @remark It is not safe to resume the VMM after a double fault. (At least not
991	; without clearing the busy flag of the TssTrap8 and fixing whatever cause it.)
992	;
993	ALIGNCODE(16)
994	BEGINPROC_EXPORTED TRPMGCHandlerTrap08
995	; be careful.
996	cli
997	cld
998
999	;
1000	; Load Hypervisor DS and ES (get it from the SS) - paranoia, but the TSS could be overwritten.. :)
1001	;
1002	mov eax, ss
1003	mov ds, eax
1004	mov es, eax
1005
1006	COM_S_PRINT 10,13,'* Guru Mediation 00000008 - Double Fault! *',10,13
1007
1008	;
1009	; Disable write protection.
1010	;
1011	mov eax, cr0
1012	and eax, ~X86_CR0_WRITE_PROTECT
1013	mov cr0, eax
1014
1015
1016	COM_S_PRINT 'VM='
1017	COM_S_DWORD_REG edx
1018	COM_S_PRINT ' prevTSS='
1019	COM_S_DWORD_REG ecx
1020	COM_S_PRINT ' prevCR3='
1021	mov eax, [ecx + VBOXTSS.cr3]
1022	COM_S_DWORD_REG eax
1023	COM_S_PRINT ' prevLdtr='
1024	movzx eax, word [ecx + VBOXTSS.selLdt]
1025	COM_S_DWORD_REG eax
1026	COM_S_NEWLINE
1027
1028	;
1029	; Create CPUMCTXCORE structure.
1030	;
1031	sub esp, CPUMCTXCORE_size
1032
1033	mov eax, [ecx + VBOXTSS.eip]
1034	mov [esp + CPUMCTXCORE.eip], eax
1035	mov eax, [ecx + VBOXTSS.eflags]
1036	mov [esp + CPUMCTXCORE.eflags], eax
1037
1038	movzx eax, word [ecx + VBOXTSS.cs]
1039	mov dword [esp + CPUMCTXCORE.cs], eax
1040	movzx eax, word [ecx + VBOXTSS.ds]
1041	mov dword [esp + CPUMCTXCORE.ds], eax
1042	movzx eax, word [ecx + VBOXTSS.es]
1043	mov dword [esp + CPUMCTXCORE.es], eax
1044	movzx eax, word [ecx + VBOXTSS.fs]
1045	mov dword [esp + CPUMCTXCORE.fs], eax
1046	movzx eax, word [ecx + VBOXTSS.gs]
1047	mov dword [esp + CPUMCTXCORE.gs], eax
1048	movzx eax, word [ecx + VBOXTSS.ss]
1049	mov [esp + CPUMCTXCORE.ss], eax
1050	mov eax, [ecx + VBOXTSS.esp]
1051	mov [esp + CPUMCTXCORE.esp], eax
1052	mov eax, [ecx + VBOXTSS.ecx]
1053	mov [esp + CPUMCTXCORE.ecx], eax
1054	mov eax, [ecx + VBOXTSS.edx]
1055	mov [esp + CPUMCTXCORE.edx], eax
1056	mov eax, [ecx + VBOXTSS.ebx]
1057	mov [esp + CPUMCTXCORE.ebx], eax
1058	mov eax, [ecx + VBOXTSS.eax]
1059	mov [esp + CPUMCTXCORE.eax], eax
1060	mov eax, [ecx + VBOXTSS.ebp]
1061	mov [esp + CPUMCTXCORE.ebp], eax
1062	mov eax, [ecx + VBOXTSS.esi]
1063	mov [esp + CPUMCTXCORE.esi], eax
1064	mov eax, [ecx + VBOXTSS.edi]
1065	mov [esp + CPUMCTXCORE.edi], eax
1066
1067	;
1068	; Show regs
1069	;
1070	mov ebx, 0ffffffffh
1071	mov ecx, 'trpH' ; indicate trap.
1072	mov edx, 08h ; vector number
1073	lea eax, [esp]
1074	call trpmDbgDumpRegisterFrame
1075
1076	;
1077	; Should we try go back?
1078	;
1079	inc dword [df_Count]
1080	cmp dword [df_Count], byte 10
1081	jb df_to_host
1082	jmp df_tripple_fault
1083	df_Count: dd 0
1084
1085	;
1086	; Try return to the host.
1087	;
1088	df_to_host:
1089	COM_S_PRINT 'Trying to return to host...',10,13
1090	mov ecx, esp
1091	mov edx, IMP(g_VM)
1092	mov eax, VERR_TRPM_PANIC
1093	call [edx + VM.pfnVMMGCGuestToHostAsmHyperCtx]
1094	jmp short df_to_host
1095
1096	;
1097	; Perform a tripple fault.
1098	;
1099	df_tripple_fault:
1100	COM_S_PRINT 'Giving up - tripple faulting the machine...',10,13
1101	push byte 0
1102	push byte 0
1103	sidt [esp]
1104	mov word [esp], 0
1105	lidt [esp]
1106	xor eax, eax
1107	mov dword [eax], 0
1108	jmp df_tripple_fault
1109
1110	ENDPROC TRPMGCHandlerTrap08
1111
1112
1113
1114
1115	;;
1116	; Internal procedure used to dump registers.
1117	;
1118	; @param eax Pointer to CPUMCTXCORE.
1119	; @param edx Vector number
1120	; @param ecx 'trap' if trap, 'int' if interrupt.
1121	; @param ebx Error code if trap.
1122	;
1123	trpmDbgDumpRegisterFrame:
1124	sub esp, byte 8 ; working space for sidt/sgdt/etc
1125
1126	; Init _must_ be done on host before crashing!
1127	; push edx
1128	; push eax
1129	; COM_INIT
1130	; pop eax
1131	; pop edx
1132
1133	cmp ecx, 'trpH'
1134	je near tddrf_trpH
1135	cmp ecx, 'trpG'
1136	je near tddrf_trpG
1137	cmp ecx, 'intH'
1138	je near tddrf_intH
1139	cmp ecx, 'intG'
1140	je near tddrf_intG
1141	cmp ecx, 'resH'
1142	je near tddrf_resH
1143	COM_S_PRINT 10,13,'*** Bogus Dump Code '
1144	jmp tddrf_regs
1145
1146	%if 1 ; the verbose version
1147
1148	tddrf_intG:
1149	COM_S_PRINT 10,13,'*** Interrupt (Guest) '
1150	COM_S_DWORD_REG edx
1151	jmp tddrf_regs
1152
1153	tddrf_intH:
1154	COM_S_PRINT 10,13,'*** Interrupt (Hypervisor) '
1155	COM_S_DWORD_REG edx
1156	jmp tddrf_regs
1157
1158	tddrf_trpG:
1159	COM_S_PRINT 10,13,'*** Trap '
1160	jmp tddrf_trap_rest
1161
1162	%else ; the short version
1163
1164	tddrf_intG:
1165	COM_S_CHAR 'I'
1166	jmp tddrf_ret
1167
1168	tddrf_intH:
1169	COM_S_CHAR 'i'
1170	jmp tddrf_ret
1171
1172	tddrf_trpG:
1173	COM_S_CHAR 'T'
1174	jmp tddrf_ret
1175
1176	%endif ; the short version
1177
1178	tddrf_trpH:
1179	COM_S_PRINT 10,13,'*** Guru Meditation '
1180	jmp tddrf_trap_rest
1181
1182	tddrf_resH:
1183	COM_S_PRINT 10,13,'*** Resuming Hypervisor Trap '
1184	jmp tddrf_trap_rest
1185
1186	tddrf_trap_rest:
1187	COM_S_DWORD_REG edx
1188	COM_S_PRINT ' ErrorCode='
1189	COM_S_DWORD_REG ebx
1190	COM_S_PRINT ' cr2='
1191	mov ecx, cr2
1192	COM_S_DWORD_REG ecx
1193
1194	tddrf_regs:
1195	COM_S_PRINT ' ***',10,13,'cs:eip='
1196	movzx ecx, word [eax + CPUMCTXCORE.cs]
1197	COM_S_DWORD_REG ecx
1198	COM_S_CHAR ':'
1199	mov ecx, [eax + CPUMCTXCORE.eip]
1200	COM_S_DWORD_REG ecx
1201
1202	COM_S_PRINT ' ss:esp='
1203	movzx ecx, word [eax + CPUMCTXCORE.ss]
1204	COM_S_DWORD_REG ecx
1205	COM_S_CHAR ':'
1206	mov ecx, [eax + CPUMCTXCORE.esp]
1207	COM_S_DWORD_REG ecx
1208
1209
1210	sgdt [esp]
1211	COM_S_PRINT 10,13,' gdtr='
1212	movzx ecx, word [esp]
1213	COM_S_DWORD_REG ecx
1214	COM_S_CHAR ':'
1215	mov ecx, [esp + 2]
1216	COM_S_DWORD_REG ecx
1217
1218	sidt [esp]
1219	COM_S_PRINT ' idtr='
1220	movzx ecx, word [esp]
1221	COM_S_DWORD_REG ecx
1222	COM_S_CHAR ':'
1223	mov ecx, [esp + 2]
1224	COM_S_DWORD_REG ecx
1225
1226
1227	str [esp] ; yasm BUG! it generates sldt [esp] here! YASMCHECK!
1228	COM_S_PRINT 10,13,' tr='
1229	movzx ecx, word [esp]
1230	COM_S_DWORD_REG ecx
1231
1232	sldt [esp]
1233	COM_S_PRINT ' ldtr='
1234	movzx ecx, word [esp]
1235	COM_S_DWORD_REG ecx
1236
1237	COM_S_PRINT ' eflags='
1238	mov ecx, [eax + CPUMCTXCORE.eflags]
1239	COM_S_DWORD_REG ecx
1240
1241
1242	COM_S_PRINT 10,13,'cr0='
1243	mov ecx, cr0
1244	COM_S_DWORD_REG ecx
1245
1246	COM_S_PRINT ' cr2='
1247	mov ecx, cr2
1248	COM_S_DWORD_REG ecx
1249
1250	COM_S_PRINT ' cr3='
1251	mov ecx, cr3
1252	COM_S_DWORD_REG ecx
1253	COM_S_PRINT ' cr4='
1254	mov ecx, cr4
1255	COM_S_DWORD_REG ecx
1256
1257
1258	COM_S_PRINT 10,13,' ds='
1259	movzx ecx, word [eax + CPUMCTXCORE.ds]
1260	COM_S_DWORD_REG ecx
1261
1262	COM_S_PRINT ' es='
1263	movzx ecx, word [eax + CPUMCTXCORE.es]
1264	COM_S_DWORD_REG ecx
1265
1266	COM_S_PRINT ' fs='
1267	movzx ecx, word [eax + CPUMCTXCORE.fs]
1268	COM_S_DWORD_REG ecx
1269
1270	COM_S_PRINT ' gs='
1271	movzx ecx, word [eax + CPUMCTXCORE.gs]
1272	COM_S_DWORD_REG ecx
1273
1274
1275	COM_S_PRINT 10,13,'eax='
1276	mov ecx, [eax + CPUMCTXCORE.eax]
1277	COM_S_DWORD_REG ecx
1278
1279	COM_S_PRINT ' ebx='
1280	mov ecx, [eax + CPUMCTXCORE.ebx]
1281	COM_S_DWORD_REG ecx
1282
1283	COM_S_PRINT ' ecx='
1284	mov ecx, [eax + CPUMCTXCORE.ecx]
1285	COM_S_DWORD_REG ecx
1286
1287	COM_S_PRINT ' edx='
1288	mov ecx, [eax + CPUMCTXCORE.edx]
1289	COM_S_DWORD_REG ecx
1290
1291
1292	COM_S_PRINT 10,13,'esi='
1293	mov ecx, [eax + CPUMCTXCORE.esi]
1294	COM_S_DWORD_REG ecx
1295
1296	COM_S_PRINT ' edi='
1297	mov ecx, [eax + CPUMCTXCORE.edi]
1298	COM_S_DWORD_REG ecx
1299
1300	COM_S_PRINT ' ebp='
1301	mov ecx, [eax + CPUMCTXCORE.ebp]
1302	COM_S_DWORD_REG ecx
1303
1304
1305	COM_S_NEWLINE
1306
1307	tddrf_ret:
1308	add esp, byte 8
1309	ret
1310

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlersA.asm@ 5605

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