TRPMGCHandlers.cpp@ 11424

Last change on this file since 11424 was 11221, checked in by vboxsync, 16 years ago
DECLGCCALLBACKMEMBER -> DECLRCCALLBACKMEMBER
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1	/* $Id: TRPMGCHandlers.cpp 11221 2008-08-07 18:07:49Z vboxsync $ */
2	/** @file
3	* TRPM - Guest Context Trap Handlers, CPP part
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_TRPM
27	#include <VBox/selm.h>
28	#include <VBox/iom.h>
29	#include <VBox/pgm.h>
30	#include <VBox/pdm.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/em.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/mm.h>
36	#include <VBox/cpum.h>
37	#include "TRPMInternal.h"
38	#include <VBox/vm.h>
39	#include <VBox/param.h>
40
41	#include <VBox/err.h>
42	#include <VBox/dis.h>
43	#include <VBox/disopcode.h>
44	#include <VBox/x86.h>
45	#include <VBox/log.h>
46	#include <VBox/tm.h>
47	#include <iprt/asm.h>
48	#include <iprt/assert.h>
49
50	/*******************************************************************************
51	* Defined Constants And Macros *
52	*******************************************************************************/
53	/* still here. MODR/M byte parsing */
54	#define X86_OPCODE_MODRM_MOD_MASK 0xc0
55	#define X86_OPCODE_MODRM_REG_MASK 0x38
56	#define X86_OPCODE_MODRM_RM_MASK 0x07
57
58	/** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
59	#define DTRACE_EXPERIMENT
60
61
62	/*******************************************************************************
63	* Structures and Typedefs *
64	*******************************************************************************/
65	/** Pointer to a readonly hypervisor trap record. */
66	typedef const struct TRPMGCHYPER *PCTRPMGCHYPER;
67
68	/**
69	* A hypervisor trap record.
70	* This contains information about a handler for a instruction range.
71	*
72	* @remark This must match what TRPM_HANDLER outputs.
73	*/
74	typedef struct TRPMGCHYPER
75	{
76	/** The start address. */
77	uintptr_t uStartEIP;
78	/** The end address. (exclusive)
79	* If NULL the it's only for the instruction at pvStartEIP. */
80	uintptr_t uEndEIP;
81	/**
82	* The handler.
83	*
84	* @returns VBox status code
85	* VINF_SUCCESS means we've handled the trap.
86	* Any other error code means returning to the host context.
87	* @param pVM The VM handle.
88	* @param pRegFrame The register frame.
89	* @param uUser The user argument.
90	*/
91	DECLRCCALLBACKMEMBER(int, pfnHandler, (PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser));
92	/** Whatever the handler desires to put here. */
93	uintptr_t uUser;
94	} TRPMGCHYPER;
95
96
97	/*******************************************************************************
98	* Global Variables *
99	*******************************************************************************/
100	__BEGIN_DECLS
101	/** Defined in VMMGC0.asm or VMMGC99.asm.
102	* @{ */
103	extern const TRPMGCHYPER g_aTrap0bHandlers[1];
104	extern const TRPMGCHYPER g_aTrap0bHandlersEnd[1];
105	extern const TRPMGCHYPER g_aTrap0dHandlers[1];
106	extern const TRPMGCHYPER g_aTrap0dHandlersEnd[1];
107	extern const TRPMGCHYPER g_aTrap0eHandlers[1];
108	extern const TRPMGCHYPER g_aTrap0eHandlersEnd[1];
109	/** @} */
110	__END_DECLS
111
112
113	/*******************************************************************************
114	* Internal Functions *
115	*******************************************************************************/
116	__BEGIN_DECLS /* addressed from asm (not called so no DECLASM). */
117	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser);
118	__END_DECLS
119
120
121
122	/**
123	* Exits the trap, called when exiting a trap handler.
124	*
125	* Will reset the trap if it's not a guest trap or the trap
126	* is already handled. Will process resume guest FFs.
127	*
128	* @returns rc.
129	* @param pVM VM handle.
130	* @param rc The VBox status code to return.
131	* @param pRegFrame Pointer to the register frame for the trap.
132	*/
133	static int trpmGCExitTrap(PVM pVM, int rc, PCPUMCTXCORE pRegFrame)
134	{
135	uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
136	NOREF(uOldActiveVector);
137
138	/* Reset trap? */
139	if ( rc != VINF_EM_RAW_GUEST_TRAP
140	&& rc != VINF_EM_RAW_RING_SWITCH_INT)
141	pVM->trpm.s.uActiveVector = ~0;
142
143	#ifdef VBOX_HIGH_RES_TIMERS_HACK
144	/*
145	* Occationally we should poll timers.
146	* We must NOT do this too frequently as it adds a significant overhead
147	* and it'll kill us if the trap load is high. (See #1354.)
148	* (The heuristic is not very intelligent, we should really check trap
149	* frequency etc. here, but alas, we lack any such information atm.)
150	*/
151	static unsigned s_iTimerPoll = 0;
152	if (rc == VINF_SUCCESS)
153	{
154	if (!(++s_iTimerPoll & 0xf))
155	{
156	uint64_t cTicks = TMTimerPoll(pVM); NOREF(cTicks);
157	Log2(("TMTimerPoll at %VRv returned %RX64 (VM_FF_TIMER=%d)\n", pRegFrame->eip, cTicks, VM_FF_ISPENDING(pVM, VM_FF_TIMER)));
158	}
159	}
160	else
161	s_iTimerPoll = 0;
162	#endif
163
164	/* Clear pending inhibit interrupt state if required. (necessary for dispatching interrupts later on) */
165	if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
166	{
167	Log2(("VM_FF_INHIBIT_INTERRUPTS at %VRv successor %VGv\n", pRegFrame->eip, EMGetInhibitInterruptsPC(pVM)));
168	if (pRegFrame->eip != EMGetInhibitInterruptsPC(pVM))
169	{
170	/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
171	* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
172	* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
173	* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
174	*/
175	VM_FF_CLEAR(pVM, VM_FF_INHIBIT_INTERRUPTS);
176	}
177	}
178
179	/*
180	* Pending resume-guest-FF?
181	* Or pending (A)PIC interrupt? Windows XP will crash if we delay APIC interrupts.
182	*/
183	if ( rc == VINF_SUCCESS
184	&& VM_FF_ISPENDING(pVM, VM_FF_TO_R3 \| VM_FF_TIMER \| VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC \| VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL \| VM_FF_REQUEST))
185	{
186	/* Pending Ring-3 action. */
187	if (VM_FF_ISPENDING(pVM, VM_FF_TO_R3))
188	{
189	VM_FF_CLEAR(pVM, VM_FF_TO_R3);
190	rc = VINF_EM_RAW_TO_R3;
191	}
192	/* Pending timer action. */
193	else if (VM_FF_ISPENDING(pVM, VM_FF_TIMER))
194	rc = VINF_EM_RAW_TIMER_PENDING;
195	/* Pending interrupt: dispatch it. */
196	else if ( VM_FF_ISPENDING(pVM, VM_FF_INTERRUPT_APIC \| VM_FF_INTERRUPT_PIC)
197	&& !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS)
198	&& PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
199	)
200	{
201	uint8_t u8Interrupt;
202	rc = PDMGetInterrupt(pVM, &u8Interrupt);
203	Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
204	AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Vrc\n", rc));
205	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
206	/* can't return if successful */
207	Assert(rc != VINF_SUCCESS);
208
209	/* Stop the profile counter that was started in TRPMGCHandlersA.asm */
210	Assert(uOldActiveVector <= 16);
211	STAM_PROFILE_ADV_STOP(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
212
213	/* Assert the trap and go to the recompiler to dispatch it. */
214	TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
215
216	STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
217	rc = VINF_EM_RAW_INTERRUPT_PENDING;
218	}
219	/*
220	* Try sync CR3?
221	* This ASSUMES that the MOV CRx, x emulation doesn't return with VINF_PGM_SYNC_CR3. (a bit hackish)
222	*/
223	else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
224	#if 1
225	rc = PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
226	#else
227	rc = VINF_PGM_SYNC_CR3;
228	#endif
229	/* Pending request packets might contain actions that need immediate attention, such as pending hardware interrupts. */
230	else if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
231	rc = VINF_EM_PENDING_REQUEST;
232	}
233
234	AssertMsg( rc != VINF_SUCCESS
235	\|\| ( pRegFrame->eflags.Bits.u1IF
236	&& ( pRegFrame->eflags.Bits.u2IOPL < (unsigned)(pRegFrame->ss & X86_SEL_RPL) \|\| pRegFrame->eflags.Bits.u1VM))
237	, ("rc = %VRv\neflags=%RX32 ss=%RTsel IOPL=%d\n", rc, pRegFrame->eflags.u32, pRegFrame->ss, pRegFrame->eflags.Bits.u2IOPL));
238	return rc;
239	}
240
241
242	/**
243	* \#DB (Debug event) handler.
244	*
245	* @returns VBox status code.
246	* VINF_SUCCESS means we completely handled this trap,
247	* other codes are passed execution to host context.
248	*
249	* @param pTrpm Pointer to TRPM data (within VM).
250	* @param pRegFrame Pointer to the register frame for the trap.
251	* @internal
252	*/
253	DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
254	{
255	RTGCUINTREG uDr6 = ASMGetAndClearDR6();
256	PVM pVM = TRPM2VM(pTrpm);
257	LogFlow(("TRPMGCTrap01Handler: cs:eip=%04x:%08x uDr6=%RTreg\n", pRegFrame->cs, pRegFrame->eip, uDr6));
258
259	/*
260	* We currently don't make sure of the X86_DR7_GD bit, but
261	* there might come a time when we do.
262	*/
263	if ((uDr6 & X86_DR6_BD) == X86_DR6_BD)
264	{
265	AssertReleaseMsgFailed(("X86_DR6_BD isn't used, but it's set! dr7=%RTreg(%RTreg) dr6=%RTreg\n",
266	ASMGetDR7(), CPUMGetHyperDR7(pVM), uDr6));
267	return VERR_NOT_IMPLEMENTED;
268	}
269
270	AssertReleaseMsg(!(uDr6 & X86_DR6_BT), ("X86_DR6_BT is impossible!\n"));
271
272	/*
273	* Now leave the rest to the DBGF.
274	*/
275	int rc = DBGFGCTrap01Handler(pVM, pRegFrame, uDr6);
276	if (rc == VINF_EM_RAW_GUEST_TRAP)
277	CPUMSetGuestDR6(pVM, uDr6);
278
279	return trpmGCExitTrap(pVM, rc, pRegFrame);
280	}
281
282
283
284	/**
285	* NMI handler, for when we are using NMIs to debug things.
286	*
287	* @returns VBox status code.
288	* VINF_SUCCESS means we completely handled this trap,
289	* other codes are passed execution to host context.
290	*
291	* @param pTrpm Pointer to TRPM data (within VM).
292	* @param pRegFrame Pointer to the register frame for the trap.
293	* @internal
294	* @remark This is not hooked up unless you're building with VBOX_WITH_NMI defined.
295	*/
296	DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
297	{
298	LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
299	RTLogComPrintf("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip);
300	return VERR_TRPM_DONT_PANIC;
301	}
302
303
304	/**
305	* \#BP (Breakpoint) handler.
306	*
307	* @returns VBox status code.
308	* VINF_SUCCESS means we completely handled this trap,
309	* other codes are passed execution to host context.
310	*
311	* @param pTrpm Pointer to TRPM data (within VM).
312	* @param pRegFrame Pointer to the register frame for the trap.
313	* @internal
314	*/
315	DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
316	{
317	LogFlow(("TRPMGCTrap03Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
318	PVM pVM = TRPM2VM(pTrpm);
319	int rc;
320
321	/*
322	* Both PATM are using INT3s, let them have a go first.
323	*/
324	if ( (pRegFrame->ss & X86_SEL_RPL) == 1
325	&& !pRegFrame->eflags.Bits.u1VM)
326	{
327	rc = PATMHandleInt3PatchTrap(pVM, pRegFrame);
328	if (rc == VINF_SUCCESS \|\| rc == VINF_EM_RAW_EMULATE_INSTR \|\| rc == VINF_PATM_PATCH_INT3 \|\| rc == VINF_PATM_DUPLICATE_FUNCTION)
329	return trpmGCExitTrap(pVM, rc, pRegFrame);
330	}
331	rc = DBGFGCTrap03Handler(pVM, pRegFrame);
332	/* anything we should do with this? Schedule it in GC? */
333	return trpmGCExitTrap(pVM, rc, pRegFrame);
334	}
335
336
337	/**
338	* Trap handler for illegal opcode fault (\#UD).
339	*
340	* @returns VBox status code.
341	* VINF_SUCCESS means we completely handled this trap,
342	* other codes are passed execution to host context.
343	*
344	* @param pTrpm Pointer to TRPM data (within VM).
345	* @param pRegFrame Pointer to the register frame for the trap.
346	* @internal
347	*/
348	DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
349	{
350	PVM pVM = TRPM2VM(pTrpm);
351	int rc;
352
353	LogFlow(("TRPMGCTrap06Handler %VRv eflags=%x\n", pRegFrame->eip, pRegFrame->eflags.u32));
354
355	if (CPUMGetGuestCPL(pVM, pRegFrame) == 0)
356	{
357	/*
358	* Decode the instruction.
359	*/
360	RTGCPTR PC;
361	rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);
362	if (VBOX_FAILURE(rc))
363	{
364	Log(("TRPMGCTrap06Handler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Vrc !!\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
365	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
366	}
367
368	DISCPUSTATE Cpu;
369	uint32_t cbOp;
370	rc = EMInterpretDisasOneEx(pVM, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);
371	if (VBOX_FAILURE(rc))
372	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
373
374	/*
375	* UD2 in a patch?
376	*/
377	if ( Cpu.pCurInstr->opcode == OP_ILLUD2
378	&& PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
379	{
380	rc = PATMGCHandleIllegalInstrTrap(pVM, pRegFrame);
381	if ( rc == VINF_SUCCESS
382	\|\| rc == VINF_EM_RAW_EMULATE_INSTR
383	\|\| rc == VINF_PATM_DUPLICATE_FUNCTION
384	\|\| rc == VINF_PATM_PENDING_IRQ_AFTER_IRET
385	\|\| rc == VINF_EM_RESCHEDULE)
386	return trpmGCExitTrap(pVM, rc, pRegFrame);
387	}
388	/*
389	* Speed up dtrace and don't entrust invalid lock sequences to the recompiler.
390	*/
391	else if (Cpu.prefix & PREFIX_LOCK)
392	{
393	Log(("TRPMGCTrap06Handler: pc=%RGv op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
394	#ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
395	Assert(!PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip));
396	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
397	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
398	#else
399	rc = VINF_EM_RAW_EMULATE_INSTR;
400	#endif
401	}
402	/*
403	* Handle MONITOR - it causes an #UD exception instead of #GP when not executed in ring 0.
404	*/
405	else if (Cpu.pCurInstr->opcode == OP_MONITOR)
406	{
407	uint32_t cbIgnored;
408	rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, PC, &cbIgnored);
409	if (RT_LIKELY(VBOX_SUCCESS(rc)))
410	pRegFrame->eip += Cpu.opsize;
411	}
412	/* Never generate a raw trap here; it might be an instruction, that requires emulation. */
413	else
414	rc = VINF_EM_RAW_EMULATE_INSTR;
415	}
416	else
417	{
418	rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
419	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
420	}
421
422	return trpmGCExitTrap(pVM, rc, pRegFrame);
423	}
424
425
426	/**
427	* Trap handler for device not present fault (\#NM).
428	*
429	* Device not available, FP or (F)WAIT instruction.
430	*
431	* @returns VBox status code.
432	* VINF_SUCCESS means we completely handled this trap,
433	* other codes are passed execution to host context.
434	*
435	* @param pTrpm Pointer to TRPM data (within VM).
436	* @param pRegFrame Pointer to the register frame for the trap.
437	* @internal
438	*/
439	DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
440	{
441	PVM pVM = TRPM2VM(pTrpm);
442
443	LogFlow(("TRPMTrap07HandlerGC: eip=%VRv\n", pRegFrame->eip));
444	return CPUMHandleLazyFPU(pVM);
445	}
446
447
448	/**
449	* \#NP ((segment) Not Present) handler.
450	*
451	* @returns VBox status code.
452	* VINF_SUCCESS means we completely handled this trap,
453	* other codes are passed execution to host context.
454	*
455	* @param pTrpm Pointer to TRPM data (within VM).
456	* @param pRegFrame Pointer to the register frame for the trap.
457	* @internal
458	*/
459	DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
460	{
461	LogFlow(("TRPMGCTrap0bHandler: eip=%VRv\n", pRegFrame->eip));
462	PVM pVM = TRPM2VM(pTrpm);
463
464	/*
465	* Try to detect instruction by opcode which caused trap.
466	* XXX note: this code may cause \#PF (trap e) or \#GP (trap d) while
467	* accessing user code. need to handle it somehow in future!
468	*/
469	RTGCPTR GCPtr;
470	if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtr) == VINF_SUCCESS)
471	{
472	uint8_t pu8Code = (uint8_t )(uintptr_t)GCPtr;
473
474	/*
475	* First skip possible instruction prefixes, such as:
476	* OS, AS
477	* CS:, DS:, ES:, SS:, FS:, GS:
478	* REPE, REPNE
479	*
480	* note: Currently we supports only up to 4 prefixes per opcode, more
481	* prefixes (normally not used anyway) will cause trap d in guest.
482	* note: Instruction length in IA-32 may be up to 15 bytes, we dont
483	* check this issue, its too hard.
484	*/
485	for (unsigned i = 0; i < 4; i++)
486	{
487	if ( pu8Code[0] != 0xf2 /* REPNE/REPNZ */
488	&& pu8Code[0] != 0xf3 /* REP/REPE/REPZ */
489	&& pu8Code[0] != 0x2e /* CS: */
490	&& pu8Code[0] != 0x36 /* SS: */
491	&& pu8Code[0] != 0x3e /* DS: */
492	&& pu8Code[0] != 0x26 /* ES: */
493	&& pu8Code[0] != 0x64 /* FS: */
494	&& pu8Code[0] != 0x65 /* GS: */
495	&& pu8Code[0] != 0x66 /* OS */
496	&& pu8Code[0] != 0x67 /* AS */
497	)
498	break;
499	pu8Code++;
500	}
501
502	/*
503	* Detect right switch using a callgate.
504	*
505	* We recognize the following causes for the trap 0b:
506	* CALL FAR, CALL FAR []
507	* JMP FAR, JMP FAR []
508	* IRET (may cause a task switch)
509	*
510	* Note: we can't detect whether the trap was caused by a call to a
511	* callgate descriptor or it is a real trap 0b due to a bad selector.
512	* In both situations we'll pass execution to our recompiler so we don't
513	* have to worry.
514	* If we wanted to do better detection, we have set GDT entries to callgate
515	* descriptors pointing to our own handlers.
516	*/
517	/** @todo not sure about IRET, may generate Trap 0d (\#GP), NEED TO CHECK! */
518	if ( pu8Code[0] == 0x9a /* CALL FAR */
519	\|\| ( pu8Code[0] == 0xff /* CALL FAR [] */
520	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x18)
521	\|\| pu8Code[0] == 0xea /* JMP FAR */
522	\|\| ( pu8Code[0] == 0xff /* JMP FAR [] */
523	&& (pu8Code[1] & X86_OPCODE_MODRM_REG_MASK) == 0x28)
524	\|\| pu8Code[0] == 0xcf /* IRET */
525	)
526	{
527	/*
528	* Got potential call to callgate.
529	* We simply return execution to the recompiler to do emulation
530	* starting from the instruction which caused the trap.
531	*/
532	pTrpm->uActiveVector = ~0;
533	return VINF_EM_RAW_RING_SWITCH;
534	}
535	}
536
537	/*
538	* Pass trap 0b as is to the recompiler in all other cases.
539	*/
540	return VINF_EM_RAW_GUEST_TRAP;
541	}
542
543
544	/**
545	* \#GP (General Protection Fault) handler for Ring-0 privileged instructions.
546	*
547	* @returns VBox status code.
548	* VINF_SUCCESS means we completely handled this trap,
549	* other codes are passed execution to host context.
550	*
551	* @param pVM The VM handle.
552	* @param pRegFrame Pointer to the register frame for the trap.
553	* @param pCpu The opcode info.
554	* @param PC The program counter corresponding to cs:eip in pRegFrame.
555	*/
556	static int trpmGCTrap0dHandlerRing0(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
557	{
558	int rc;
559
560	/*
561	* Try handle it here, if not return to HC and emulate/interpret it there.
562	*/
563	switch (pCpu->pCurInstr->opcode)
564	{
565	case OP_INT3:
566	/*
567	* Little hack to make the code below not fail
568	*/
569	pCpu->param1.flags = USE_IMMEDIATE8;
570	pCpu->param1.parval = 3;
571	/* fallthru */
572	case OP_INT:
573	{
574	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
575	Assert(!(PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)));
576	if (pCpu->param1.parval == 3)
577	{
578	/* Int 3 replacement patch? */
579	if (PATMHandleInt3PatchTrap(pVM, pRegFrame) == VINF_SUCCESS)
580	{
581	AssertFailed();
582	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
583	}
584	}
585	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
586	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
587	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
588
589	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
590	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
591	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
592	}
593
594	#ifdef PATM_EMULATE_SYSENTER
595	case OP_SYSEXIT:
596	case OP_SYSRET:
597	rc = PATMSysCall(pVM, pRegFrame, pCpu);
598	return trpmGCExitTrap(pVM, rc, pRegFrame);
599	#endif
600
601	case OP_HLT:
602	/* If it's in patch code, defer to ring-3. */
603	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)PC))
604	break;
605
606	pRegFrame->eip += pCpu->opsize;
607	return trpmGCExitTrap(pVM, VINF_EM_HALT, pRegFrame);
608
609
610	/*
611	* These instructions are used by PATM and CASM for finding
612	* dangerous non-trapping instructions. Thus, since all
613	* scanning and patching is done in ring-3 we'll have to
614	* return to ring-3 on the first encounter of these instructions.
615	*/
616	case OP_MOV_CR:
617	case OP_MOV_DR:
618	/* We can safely emulate control/debug register move instructions in patched code. */
619	if ( !PATMIsPatchGCAddr(pVM, (RTRCPTR)PC)
620	&& !CSAMIsKnownDangerousInstr(pVM, (RTRCPTR)PC))
621	break;
622	case OP_INVLPG:
623	case OP_LLDT:
624	case OP_STI:
625	case OP_RDTSC: /* just in case */
626	case OP_CLTS:
627	{
628	uint32_t cbIgnored;
629	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
630	if (VBOX_SUCCESS(rc))
631	pRegFrame->eip += pCpu->opsize;
632	else if (rc == VERR_EM_INTERPRETER)
633	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
634	return trpmGCExitTrap(pVM, rc, pRegFrame);
635	}
636	}
637
638	return trpmGCExitTrap(pVM, VINF_EM_RAW_EXCEPTION_PRIVILEGED, pRegFrame);
639	}
640
641
642	/**
643	* \#GP (General Protection Fault) handler for Ring-3.
644	*
645	* @returns VBox status code.
646	* VINF_SUCCESS means we completely handled this trap,
647	* other codes are passed execution to host context.
648	*
649	* @param pVM The VM handle.
650	* @param pRegFrame Pointer to the register frame for the trap.
651	* @param pCpu The opcode info.
652	* @param PC The program counter corresponding to cs:eip in pRegFrame.
653	*/
654	static int trpmGCTrap0dHandlerRing3(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, RTGCPTR PC)
655	{
656	int rc;
657
658	Assert(!pRegFrame->eflags.Bits.u1VM);
659
660	switch (pCpu->pCurInstr->opcode)
661	{
662	/*
663	* INT3 and INT xx are ring-switching.
664	* (The shadow IDT will have set the entries to DPL=0, that's why we're here.)
665	*/
666	case OP_INT3:
667	/*
668	* Little hack to make the code below not fail
669	*/
670	pCpu->param1.flags = USE_IMMEDIATE8;
671	pCpu->param1.parval = 3;
672	/* fall thru */
673	case OP_INT:
674	{
675	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
676	rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
677	if (VBOX_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
678	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
679
680	pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
681	pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
682	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
683	}
684
685	/*
686	* SYSCALL, SYSENTER, INTO and BOUND are also ring-switchers.
687	*/
688	case OP_SYSCALL:
689	case OP_SYSENTER:
690	#ifdef PATM_EMULATE_SYSENTER
691	rc = PATMSysCall(pVM, pRegFrame, pCpu);
692	if (rc == VINF_SUCCESS)
693	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
694	/* else no break; */
695	#endif
696	case OP_BOUND:
697	case OP_INTO:
698	pVM->trpm.s.uActiveVector = ~0;
699	return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
700
701	/*
702	* Handle virtualized TSC reads, just in case.
703	*/
704	case OP_RDTSC:
705	{
706	uint32_t cbIgnored;
707	rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, PC, &cbIgnored);
708	if (VBOX_SUCCESS(rc))
709	pRegFrame->eip += pCpu->opsize;
710	else if (rc == VERR_EM_INTERPRETER)
711	rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
712	return trpmGCExitTrap(pVM, rc, pRegFrame);
713	}
714
715	/*
716	* STI and CLI are I/O privileged, i.e. if IOPL
717	*/
718	case OP_STI:
719	case OP_CLI:
720	{
721	uint32_t efl = CPUMRawGetEFlags(pVM, pRegFrame);
722	if (X86_EFL_GET_IOPL(efl) >= (unsigned)(pRegFrame->ss & X86_SEL_RPL))
723	{
724	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> REM\n"));
725	return trpmGCExitTrap(pVM, VINF_EM_RESCHEDULE_REM, pRegFrame);
726	}
727	LogFlow(("trpmGCTrap0dHandlerRing3: CLI/STI -> #GP(0)\n"));
728	break;
729	}
730	}
731
732	/*
733	* A genuine guest fault.
734	*/
735	return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame);
736	}
737
738
739	/**
740	* Emulates RDTSC for the \#GP handler.
741	*
742	* @returns VINF_SUCCESS or VINF_EM_RAW_EMULATE_INSTR.
743	*
744	* @param pVM Pointer to the shared VM structure.
745	* @param pRegFrame Pointer to the registre frame for the trap.
746	* This will be updated on successful return.
747	*/
748	DECLINLINE(int) trpmGCTrap0dHandlerRdTsc(PVM pVM, PCPUMCTXCORE pRegFrame)
749	{
750	STAM_COUNTER_INC(&pVM->trpm.s.StatTrap0dRdTsc);
751
752	if (CPUMGetGuestCR4(pVM) & X86_CR4_TSD)
753	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); /* will trap (optimize later). */
754
755	uint64_t uTicks = TMCpuTickGet(pVM);
756	pRegFrame->eax = uTicks;
757	pRegFrame->edx = uTicks >> 32;
758	pRegFrame->eip += 2;
759	return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
760	}
761
762
763	/**
764	* \#GP (General Protection Fault) handler.
765	*
766	* @returns VBox status code.
767	* VINF_SUCCESS means we completely handled this trap,
768	* other codes are passed execution to host context.
769	*
770	* @param pVM The VM handle.
771	* @param pTrpm Pointer to TRPM data (within VM).
772	* @param pRegFrame Pointer to the register frame for the trap.
773	*/
774	static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
775	{
776	LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%VRv uErr=%VGv\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
777
778	/*
779	* Convert and validate CS.
780	*/
781	STAM_PROFILE_START(&pVM->trpm.s.StatTrap0dDisasm, a);
782	RTGCPTR PC;
783	uint32_t cBits;
784	int rc = SELMValidateAndConvertCSAddrGCTrap(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs,
785	(RTGCPTR)pRegFrame->eip, &PC, &cBits);
786	if (RT_FAILURE(rc))
787	{
788	Log(("trpmGCTrap0dHandler: Failed to convert %RTsel:%RX32 (cpl=%d) - rc=%Rrc !!\n",
789	pRegFrame->cs, pRegFrame->eip, pRegFrame->ss & X86_SEL_RPL, rc));
790	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
791	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
792	}
793
794	/*
795	* Optimize RDTSC traps.
796	* Some guests (like Solaris) is using RDTSC all over the place and
797	* will end up trapping a lot because of that.
798	*/
799	if ( !pRegFrame->eflags.Bits.u1VM
800	&& ((uint8_t *)PC)[0] == 0x0f
801	&& ((uint8_t *)PC)[1] == 0x31)
802	{
803	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
804	return trpmGCTrap0dHandlerRdTsc(pVM, pRegFrame);
805	}
806
807	/*
808	* Disassemble the instruction.
809	*/
810	DISCPUSTATE Cpu;
811	uint32_t cbOp;
812	rc = DISCoreOneEx((RTGCUINTPTR)PC, cBits == 32 ? CPUMODE_32BIT : cBits == 16 ? CPUMODE_16BIT : CPUMODE_64BIT,
813	NULL, NULL, &Cpu, &cbOp);
814	if (RT_FAILURE(rc))
815	{
816	AssertMsgFailed(("DISCoreOneEx failed to PC=%VGv rc=%Vrc\n", PC, rc));
817	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
818	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
819	}
820	STAM_PROFILE_STOP(&pVM->trpm.s.StatTrap0dDisasm, a);
821
822	/*
823	* Deal with I/O port access.
824	*/
825	if ( pVM->trpm.s.uActiveErrorCode == 0
826	&& (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
827	{
828	rc = EMInterpretPortIO(pVM, pRegFrame, &Cpu, cbOp);
829	return trpmGCExitTrap(pVM, rc, pRegFrame);
830	}
831
832	/*
833	* Deal with Ring-0 (privileged instructions)
834	*/
835	if ( (pRegFrame->ss & X86_SEL_RPL) <= 1
836	&& !pRegFrame->eflags.Bits.u1VM)
837	return trpmGCTrap0dHandlerRing0(pVM, pRegFrame, &Cpu, PC);
838
839	/*
840	* Deal with Ring-3 GPs.
841	*/
842	if (!pRegFrame->eflags.Bits.u1VM)
843	return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu, PC);
844
845	/*
846	* Deal with v86 code.
847	*
848	* We always set IOPL to zero which makes e.g. pushf fault in V86
849	* mode. The guest might use IOPL=3 and therefore not expect a #GP.
850	* Simply fall back to the recompiler to emulate this instruction if
851	* that's the case. To get the correct we must use CPUMRawGetEFlags.
852	*/
853	X86EFLAGS eflags;
854	eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); /* Get the correct value. */
855	if (eflags.Bits.u2IOPL != 3)
856	{
857	Assert(eflags.Bits.u2IOPL == 0);
858
859	int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
860	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
861	return trpmGCExitTrap(pVM, rc, pRegFrame);
862	}
863	return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame);
864	}
865
866
867	/**
868	* \#GP (General Protection Fault) handler.
869	*
870	* @returns VBox status code.
871	* VINF_SUCCESS means we completely handled this trap,
872	* other codes are passed execution to host context.
873	*
874	* @param pTrpm Pointer to TRPM data (within VM).
875	* @param pRegFrame Pointer to the register frame for the trap.
876	* @internal
877	*/
878	DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
879	{
880	LogFlow(("TRPMGCTrap0dHandler: eip=%RGv\n", pRegFrame->eip));
881	PVM pVM = TRPM2VM(pTrpm);
882
883	int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
884	switch (rc)
885	{
886	case VINF_EM_RAW_GUEST_TRAP:
887	case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
888	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
889	rc = VINF_PATM_PATCH_TRAP_GP;
890	break;
891
892	case VINF_EM_RAW_INTERRUPT_PENDING:
893	Assert(TRPMHasTrap(pVM));
894	/* no break; */
895	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
896	case VINF_EM_RAW_EMULATE_INSTR:
897	case VINF_IOM_HC_IOPORT_READ:
898	case VINF_IOM_HC_IOPORT_WRITE:
899	case VINF_IOM_HC_MMIO_WRITE:
900	case VINF_IOM_HC_MMIO_READ:
901	case VINF_IOM_HC_MMIO_READ_WRITE:
902	case VINF_PATM_PATCH_INT3:
903	case VINF_EM_RAW_TO_R3:
904	case VINF_EM_RAW_TIMER_PENDING:
905	case VINF_EM_PENDING_REQUEST:
906	case VINF_EM_HALT:
907	case VINF_SUCCESS:
908	break;
909
910	default:
911	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("return code %d\n", rc));
912	break;
913	}
914	return rc;
915	}
916
917	/**
918	* \#PF (Page Fault) handler.
919	*
920	* Calls PGM which does the actual handling.
921	*
922	*
923	* @returns VBox status code.
924	* VINF_SUCCESS means we completely handled this trap,
925	* other codes are passed execution to host context.
926	*
927	* @param pTrpm Pointer to TRPM data (within VM).
928	* @param pRegFrame Pointer to the register frame for the trap.
929	* @internal
930	*/
931	DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
932	{
933	LogBird(("TRPMGCTrap0eHandler: eip=%RGv\n", pRegFrame->eip));
934	PVM pVM = TRPM2VM(pTrpm);
935
936	/*
937	* This is all PGM stuff.
938	*/
939	int rc = PGMTrap0eHandler(pVM, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
940
941	switch (rc)
942	{
943	case VINF_EM_RAW_EMULATE_INSTR:
944	case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
945	case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
946	case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
947	case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
948	case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
949	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
950	rc = VINF_PATCH_EMULATE_INSTR;
951	break;
952
953	case VINF_EM_RAW_GUEST_TRAP:
954	if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip))
955	return VINF_PATM_PATCH_TRAP_PF;
956
957	rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
958	Assert(rc == VINF_EM_RAW_GUEST_TRAP);
959	break;
960
961	case VINF_EM_RAW_INTERRUPT_PENDING:
962	Assert(TRPMHasTrap(pVM));
963	/* no break; */
964	case VINF_IOM_HC_MMIO_READ:
965	case VINF_IOM_HC_MMIO_WRITE:
966	case VINF_IOM_HC_MMIO_READ_WRITE:
967	case VINF_PATM_HC_MMIO_PATCH_READ:
968	case VINF_PATM_HC_MMIO_PATCH_WRITE:
969	case VINF_SUCCESS:
970	case VINF_EM_RAW_TO_R3:
971	case VINF_EM_PENDING_REQUEST:
972	case VINF_EM_RAW_TIMER_PENDING:
973	case VINF_CSAM_PENDING_ACTION:
974	case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
975	break;
976
977	default:
978	AssertMsg(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip) == false, ("Patch address for return code %d. eip=%08x\n", rc, pRegFrame->eip));
979	break;
980	}
981	return trpmGCExitTrap(pVM, rc, pRegFrame);
982	}
983
984
985	/**
986	* Scans for the EIP in the specified array of trap handlers.
987	*
988	* If we don't fine the EIP, we'll panic.
989	*
990	* @returns VBox status code.
991	*
992	* @param pVM The VM handle.
993	* @param pRegFrame Pointer to the register frame for the trap.
994	* @param paHandlers The array of trap handler records.
995	* @param pEndRecord The end record (exclusive).
996	*/
997	static int trpmGCHyperGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, PCTRPMGCHYPER paHandlers, PCTRPMGCHYPER pEndRecord)
998	{
999	uintptr_t uEip = (uintptr_t)pRegFrame->eip;
1000	Assert(paHandlers <= pEndRecord);
1001
1002	Log(("trpmGCHyperGeneric: uEip=%x %p-%p\n", uEip, paHandlers, pEndRecord));
1003
1004	#if 0 /// @todo later
1005	/*
1006	* Start by doing a kind of binary search.
1007	*/
1008	unsigned iStart = 0;
1009	unsigned iEnd = pEndRecord - paHandlers;
1010	unsigned i = iEnd / 2;
1011	#endif
1012
1013	/*
1014	* Do a linear search now (in case the array wasn't properly sorted).
1015	*/
1016	for (PCTRPMGCHYPER pCur = paHandlers; pCur < pEndRecord; pCur++)
1017	{
1018	if ( pCur->uStartEIP <= uEip
1019	&& (pCur->uEndEIP ? pCur->uEndEIP > uEip : pCur->uStartEIP == uEip))
1020	return pCur->pfnHandler(pVM, pRegFrame, pCur->uUser);
1021	}
1022
1023	return VERR_TRPM_DONT_PANIC;
1024	}
1025
1026
1027	/**
1028	* Hypervisor \#NP ((segment) Not Present) handler.
1029	*
1030	* Scans for the EIP in the registered trap handlers.
1031	*
1032	* @returns VBox status code.
1033	* VINF_SUCCESS means we completely handled this trap,
1034	* other codes are passed back to host context.
1035	*
1036	* @param pTrpm Pointer to TRPM data (within VM).
1037	* @param pRegFrame Pointer to the register frame for the trap.
1038	* @internal
1039	*/
1040	DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1041	{
1042	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
1043	}
1044
1045
1046	/**
1047	* Hypervisor \#GP (General Protection Fault) handler.
1048	*
1049	* Scans for the EIP in the registered trap handlers.
1050	*
1051	* @returns VBox status code.
1052	* VINF_SUCCESS means we completely handled this trap,
1053	* other codes are passed back to host context.
1054	*
1055	* @param pTrpm Pointer to TRPM data (within VM).
1056	* @param pRegFrame Pointer to the register frame for the trap.
1057	* @internal
1058	*/
1059	DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1060	{
1061	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1062	}
1063
1064
1065	/**
1066	* Hypervisor \#PF (Page Fault) handler.
1067	*
1068	* Scans for the EIP in the registered trap handlers.
1069	*
1070	* @returns VBox status code.
1071	* VINF_SUCCESS means we completely handled this trap,
1072	* other codes are passed back to host context.
1073	*
1074	* @param pTrpm Pointer to TRPM data (within VM).
1075	* @param pRegFrame Pointer to the register frame for the trap.
1076	* @internal
1077	*/
1078	DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
1079	{
1080	return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
1081	}
1082
1083
1084	/**
1085	* Deal with hypervisor traps occuring when resuming execution on a trap.
1086	*
1087	* @returns VBox status code.
1088	* @param pVM The VM handle.
1089	* @param pRegFrame Register frame.
1090	* @param uUser User arg.
1091	*/
1092	DECLCALLBACK(int) trpmGCTrapInGeneric(PVM pVM, PCPUMCTXCORE pRegFrame, uintptr_t uUser)
1093	{
1094	Log(("********************************************************\n"));
1095	Log(("trpmGCTrapInGeneric: eip=%RX32 uUser=%#x\n", pRegFrame->eip, uUser));
1096	Log(("********************************************************\n"));
1097
1098	if (uUser & TRPM_TRAP_IN_HYPER)
1099	{
1100	/*
1101	* Check that there is still some stack left, if not we'll flag
1102	* a guru meditation (the alternative is a triple fault).
1103	*/
1104	RTGCUINTPTR cbStackUsed = (RTGCUINTPTR)VMMGetStackGC(pVM) - pRegFrame->esp;
1105	if (cbStackUsed > VMM_STACK_SIZE - _1K)
1106	{
1107	LogRel(("trpmGCTrapInGeneric: ran out of stack: esp=#x cbStackUsed=%#x\n", pRegFrame->esp, cbStackUsed));
1108	return VERR_TRPM_DONT_PANIC;
1109	}
1110
1111	/*
1112	* Just zero the register containing the selector in question.
1113	* We'll deal with the actual stale or troublesome selector value in
1114	* the outermost trap frame.
1115	*/
1116	switch (uUser & TRPM_TRAP_IN_OP_MASK)
1117	{
1118	case TRPM_TRAP_IN_MOV_GS:
1119	pRegFrame->eax = 0;
1120	pRegFrame->gs = 0; /* prevent recursive trouble. */
1121	break;
1122	case TRPM_TRAP_IN_MOV_FS:
1123	pRegFrame->eax = 0;
1124	pRegFrame->fs = 0; /* prevent recursive trouble. */
1125	return VINF_SUCCESS;
1126
1127	default:
1128	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1129	return VERR_INTERNAL_ERROR;
1130	}
1131	}
1132	else
1133	{
1134	/*
1135	* Reconstruct the guest context and switch to the recompiler.
1136	* We ASSUME we're only at
1137	*/
1138	CPUMCTXCORE CtxCore = *pRegFrame;
1139	uint32_t pEsp = (uint32_t )pRegFrame->esp;
1140	int rc;
1141
1142	switch (uUser)
1143	{
1144	/*
1145	* This will only occur when resuming guest code in a trap handler!
1146	*/
1147	/* @note ASSUMES esp points to the temporary guest CPUMCTXCORE!!! */
1148	case TRPM_TRAP_IN_MOV_GS:
1149	case TRPM_TRAP_IN_MOV_FS:
1150	case TRPM_TRAP_IN_MOV_ES:
1151	case TRPM_TRAP_IN_MOV_DS:
1152	{
1153	PCPUMCTXCORE pTempGuestCtx = (PCPUMCTXCORE)pEsp;
1154
1155	/* Just copy the whole thing; several selector registers, eip (etc) and eax are not yet in pRegFrame. */
1156	CtxCore = *pTempGuestCtx;
1157	rc = VINF_EM_RAW_STALE_SELECTOR;
1158	break;
1159	}
1160
1161	/*
1162	* This will only occur when resuming guest code!
1163	*/
1164	case TRPM_TRAP_IN_IRET:
1165	CtxCore.eip = *pEsp++;
1166	CtxCore.cs = (RTSEL)*pEsp++;
1167	CtxCore.eflags.u32 = *pEsp++;
1168	CtxCore.esp = *pEsp++;
1169	CtxCore.ss = (RTSEL)*pEsp++;
1170	rc = VINF_EM_RAW_IRET_TRAP;
1171	break;
1172
1173	/*
1174	* This will only occur when resuming V86 guest code!
1175	*/
1176	case TRPM_TRAP_IN_IRET \| TRPM_TRAP_IN_V86:
1177	CtxCore.eip = *pEsp++;
1178	CtxCore.cs = (RTSEL)*pEsp++;
1179	CtxCore.eflags.u32 = *pEsp++;
1180	CtxCore.esp = *pEsp++;
1181	CtxCore.ss = (RTSEL)*pEsp++;
1182	CtxCore.es = (RTSEL)*pEsp++;
1183	CtxCore.ds = (RTSEL)*pEsp++;
1184	CtxCore.fs = (RTSEL)*pEsp++;
1185	CtxCore.gs = (RTSEL)*pEsp++;
1186	rc = VINF_EM_RAW_IRET_TRAP;
1187	break;
1188
1189	default:
1190	AssertMsgFailed(("Invalid uUser=%#x\n", uUser));
1191	return VERR_INTERNAL_ERROR;
1192	}
1193
1194
1195	CPUMSetGuestCtxCore(pVM, &CtxCore);
1196	TRPMGCHyperReturnToHost(pVM, rc);
1197	}
1198
1199	AssertMsgFailed(("Impossible!\n"));
1200	return VERR_INTERNAL_ERROR;
1201	}
1202

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source: vbox/trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp@ 11424

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